/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de52.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 22:05:03,422 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 22:05:03,424 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 22:05:03,456 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 22:05:03,456 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 22:05:03,457 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 22:05:03,458 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 22:05:03,459 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 22:05:03,460 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 22:05:03,461 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 22:05:03,461 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 22:05:03,462 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 22:05:03,462 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 22:05:03,467 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 22:05:03,468 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 22:05:03,469 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 22:05:03,470 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 22:05:03,471 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 22:05:03,476 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 22:05:03,477 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 22:05:03,477 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 22:05:03,479 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 22:05:03,480 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 22:05:03,482 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 22:05:03,483 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 22:05:03,485 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 22:05:03,489 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 22:05:03,495 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 22:05:03,496 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 22:05:03,497 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 22:05:03,514 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 22:05:03,514 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 22:05:03,517 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 22:05:03,518 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 22:05:03,518 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 22:05:03,518 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 22:05:03,520 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 22:05:03,520 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 22:05:03,520 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 22:05:03,521 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 22:05:03,521 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 22:05:03,521 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 22:05:03,521 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 22:05:03,521 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 22:05:03,521 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 22:05:03,521 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 22:05:03,521 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 22:05:03,521 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 22:05:03,522 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 22:05:03,522 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 22:05:03,522 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 22:05:03,522 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 22:05:03,522 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 22:05:03,522 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 22:05:03,522 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 22:05:03,522 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 22:05:03,522 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 22:05:03,523 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 22:05:03,523 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 22:05:03,523 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 22:05:03,682 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 22:05:03,698 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 22:05:03,700 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 22:05:03,701 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 22:05:03,702 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 22:05:03,703 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de52.c [2022-04-27 22:05:03,738 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/024f9bccc/3ea97283bcbb455b86d1127d1f8ab506/FLAG94d9fb388 [2022-04-27 22:05:04,071 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 22:05:04,072 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c [2022-04-27 22:05:04,075 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/024f9bccc/3ea97283bcbb455b86d1127d1f8ab506/FLAG94d9fb388 [2022-04-27 22:05:04,524 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/024f9bccc/3ea97283bcbb455b86d1127d1f8ab506 [2022-04-27 22:05:04,525 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 22:05:04,526 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 22:05:04,527 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 22:05:04,527 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 22:05:04,533 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 22:05:04,533 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:04,534 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@178ad57b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04, skipping insertion in model container [2022-04-27 22:05:04,534 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:04,539 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 22:05:04,548 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 22:05:04,682 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c[368,381] [2022-04-27 22:05:04,706 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 22:05:04,714 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 22:05:04,723 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c[368,381] [2022-04-27 22:05:04,732 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 22:05:04,743 INFO L208 MainTranslator]: Completed translation [2022-04-27 22:05:04,744 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04 WrapperNode [2022-04-27 22:05:04,745 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 22:05:04,746 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 22:05:04,746 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 22:05:04,746 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 22:05:04,753 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:04,753 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:04,758 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:04,758 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:04,764 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:04,767 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:04,768 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:04,769 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 22:05:04,769 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 22:05:04,769 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 22:05:04,770 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 22:05:04,772 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:04,777 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 22:05:04,782 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:04,791 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 22:05:04,807 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 22:05:04,819 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 22:05:04,819 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 22:05:04,819 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 22:05:04,819 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 22:05:04,819 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 22:05:04,819 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 22:05:04,819 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 22:05:04,819 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 22:05:04,819 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 22:05:04,819 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 22:05:04,819 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 22:05:04,819 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 22:05:04,819 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 22:05:04,820 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 22:05:04,820 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 22:05:04,820 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 22:05:04,820 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 22:05:04,820 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 22:05:04,859 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 22:05:04,860 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 22:05:04,985 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 22:05:04,989 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 22:05:04,989 INFO L299 CfgBuilder]: Removed 5 assume(true) statements. [2022-04-27 22:05:04,990 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:05:04 BoogieIcfgContainer [2022-04-27 22:05:04,990 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 22:05:04,990 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 22:05:04,991 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 22:05:04,991 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 22:05:05,002 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:05:04" (1/1) ... [2022-04-27 22:05:05,003 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 22:05:05,028 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 10:05:05 BasicIcfg [2022-04-27 22:05:05,028 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 22:05:05,032 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 22:05:05,032 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 22:05:05,034 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 22:05:05,035 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 10:05:04" (1/4) ... [2022-04-27 22:05:05,035 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@bb827cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 10:05:05, skipping insertion in model container [2022-04-27 22:05:05,035 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:05:04" (2/4) ... [2022-04-27 22:05:05,035 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@bb827cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 10:05:05, skipping insertion in model container [2022-04-27 22:05:05,035 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:05:04" (3/4) ... [2022-04-27 22:05:05,036 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@bb827cd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 10:05:05, skipping insertion in model container [2022-04-27 22:05:05,036 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 10:05:05" (4/4) ... [2022-04-27 22:05:05,036 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de52.cqvasr [2022-04-27 22:05:05,045 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 22:05:05,045 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 22:05:05,072 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 22:05:05,077 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@396238c7, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@35a5acc9 [2022-04-27 22:05:05,077 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 22:05:05,082 INFO L276 IsEmpty]: Start isEmpty. Operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 22:05:05,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 22:05:05,086 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:05,087 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:05,088 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:05,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:05,092 INFO L85 PathProgramCache]: Analyzing trace with hash 702671213, now seen corresponding path program 1 times [2022-04-27 22:05:05,099 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:05,099 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2041147526] [2022-04-27 22:05:05,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:05,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:05,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:05,228 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:05,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:05,240 INFO L290 TraceCheckUtils]: 0: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-27 22:05:05,240 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-27 22:05:05,240 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-27 22:05:05,242 INFO L272 TraceCheckUtils]: 0: Hoare triple {27#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:05,242 INFO L290 TraceCheckUtils]: 1: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-27 22:05:05,242 INFO L290 TraceCheckUtils]: 2: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-27 22:05:05,243 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-27 22:05:05,243 INFO L272 TraceCheckUtils]: 4: Hoare triple {27#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-27 22:05:05,243 INFO L290 TraceCheckUtils]: 5: Hoare triple {27#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {27#true} is VALID [2022-04-27 22:05:05,243 INFO L290 TraceCheckUtils]: 6: Hoare triple {27#true} [92] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:05:05,244 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#false} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28#false} is VALID [2022-04-27 22:05:05,244 INFO L290 TraceCheckUtils]: 8: Hoare triple {28#false} [96] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:05:05,244 INFO L290 TraceCheckUtils]: 9: Hoare triple {28#false} [99] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:05:05,244 INFO L290 TraceCheckUtils]: 10: Hoare triple {28#false} [102] L35-1-->L41-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:05:05,244 INFO L290 TraceCheckUtils]: 11: Hoare triple {28#false} [105] L41-1-->L41-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:05:05,244 INFO L272 TraceCheckUtils]: 12: Hoare triple {28#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {28#false} is VALID [2022-04-27 22:05:05,245 INFO L290 TraceCheckUtils]: 13: Hoare triple {28#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28#false} is VALID [2022-04-27 22:05:05,245 INFO L290 TraceCheckUtils]: 14: Hoare triple {28#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:05:05,245 INFO L290 TraceCheckUtils]: 15: Hoare triple {28#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:05:05,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:05,246 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:05,246 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2041147526] [2022-04-27 22:05:05,246 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2041147526] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:05:05,246 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:05:05,247 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 22:05:05,249 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295313154] [2022-04-27 22:05:05,249 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:05:05,253 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:05:05,254 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:05,256 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,278 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:05,279 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 22:05:05,279 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:05,296 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 22:05:05,297 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 22:05:05,299 INFO L87 Difference]: Start difference. First operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:05,392 INFO L93 Difference]: Finished difference Result 41 states and 60 transitions. [2022-04-27 22:05:05,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 22:05:05,392 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:05:05,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:05,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2022-04-27 22:05:05,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2022-04-27 22:05:05,408 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 60 transitions. [2022-04-27 22:05:05,479 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:05,484 INFO L225 Difference]: With dead ends: 41 [2022-04-27 22:05:05,484 INFO L226 Difference]: Without dead ends: 17 [2022-04-27 22:05:05,486 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 22:05:05,488 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 19 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:05,489 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 30 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:05:05,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-27 22:05:05,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-27 22:05:05,507 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:05,508 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,508 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,509 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:05,513 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-27 22:05:05,513 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-27 22:05:05,513 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:05,514 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:05,514 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-27 22:05:05,514 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-27 22:05:05,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:05,516 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-27 22:05:05,516 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-27 22:05:05,516 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:05,516 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:05,516 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:05,516 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:05,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-04-27 22:05:05,518 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 21 transitions. Word has length 16 [2022-04-27 22:05:05,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:05,519 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-04-27 22:05:05,519 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,519 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-27 22:05:05,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 22:05:05,519 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:05,520 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:05,520 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 22:05:05,520 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:05,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:05,521 INFO L85 PathProgramCache]: Analyzing trace with hash -1128942900, now seen corresponding path program 1 times [2022-04-27 22:05:05,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:05,521 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846968273] [2022-04-27 22:05:05,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:05,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:05,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:05,611 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:05,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:05,618 INFO L290 TraceCheckUtils]: 0: Hoare triple {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {146#true} is VALID [2022-04-27 22:05:05,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:05:05,618 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {146#true} {146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:05:05,619 INFO L272 TraceCheckUtils]: 0: Hoare triple {146#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:05,619 INFO L290 TraceCheckUtils]: 1: Hoare triple {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {146#true} is VALID [2022-04-27 22:05:05,620 INFO L290 TraceCheckUtils]: 2: Hoare triple {146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:05:05,620 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {146#true} {146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:05:05,620 INFO L272 TraceCheckUtils]: 4: Hoare triple {146#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:05:05,620 INFO L290 TraceCheckUtils]: 5: Hoare triple {146#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {146#true} is VALID [2022-04-27 22:05:05,620 INFO L290 TraceCheckUtils]: 6: Hoare triple {146#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:05:05,620 INFO L290 TraceCheckUtils]: 7: Hoare triple {146#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {146#true} is VALID [2022-04-27 22:05:05,621 INFO L290 TraceCheckUtils]: 8: Hoare triple {146#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:05:05,622 INFO L290 TraceCheckUtils]: 9: Hoare triple {146#true} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} is VALID [2022-04-27 22:05:05,622 INFO L290 TraceCheckUtils]: 10: Hoare triple {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} is VALID [2022-04-27 22:05:05,623 INFO L290 TraceCheckUtils]: 11: Hoare triple {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} is VALID [2022-04-27 22:05:05,625 INFO L272 TraceCheckUtils]: 12: Hoare triple {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {152#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:05:05,625 INFO L290 TraceCheckUtils]: 13: Hoare triple {152#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {153#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:05:05,626 INFO L290 TraceCheckUtils]: 14: Hoare triple {153#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {147#false} is VALID [2022-04-27 22:05:05,626 INFO L290 TraceCheckUtils]: 15: Hoare triple {147#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {147#false} is VALID [2022-04-27 22:05:05,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:05,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:05,626 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846968273] [2022-04-27 22:05:05,626 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [846968273] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:05:05,627 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:05:05,627 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-27 22:05:05,627 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1111918585] [2022-04-27 22:05:05,627 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:05:05,628 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:05:05,628 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:05,628 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,644 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:05,644 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 22:05:05,644 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:05,645 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 22:05:05,651 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-27 22:05:05,652 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:05,843 INFO L93 Difference]: Finished difference Result 34 states and 45 transitions. [2022-04-27 22:05:05,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-27 22:05:05,843 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:05:05,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:05,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 45 transitions. [2022-04-27 22:05:05,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 45 transitions. [2022-04-27 22:05:05,849 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 45 transitions. [2022-04-27 22:05:05,893 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:05,896 INFO L225 Difference]: With dead ends: 34 [2022-04-27 22:05:05,896 INFO L226 Difference]: Without dead ends: 23 [2022-04-27 22:05:05,897 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:05:05,899 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 28 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:05,899 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 32 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 53 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:05:05,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-27 22:05:05,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-04-27 22:05:05,907 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:05,907 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,908 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,909 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:05,910 INFO L93 Difference]: Finished difference Result 23 states and 30 transitions. [2022-04-27 22:05:05,910 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 30 transitions. [2022-04-27 22:05:05,911 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:05,911 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:05,911 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 22:05:05,911 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 22:05:05,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:05,912 INFO L93 Difference]: Finished difference Result 23 states and 30 transitions. [2022-04-27 22:05:05,912 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 30 transitions. [2022-04-27 22:05:05,913 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:05,913 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:05,913 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:05,913 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:05,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 30 transitions. [2022-04-27 22:05:05,914 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 30 transitions. Word has length 16 [2022-04-27 22:05:05,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:05,914 INFO L495 AbstractCegarLoop]: Abstraction has 23 states and 30 transitions. [2022-04-27 22:05:05,914 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:05,914 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 30 transitions. [2022-04-27 22:05:05,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 22:05:05,915 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:05,915 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:05,915 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 22:05:05,915 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:05,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:05,916 INFO L85 PathProgramCache]: Analyzing trace with hash -610770875, now seen corresponding path program 1 times [2022-04-27 22:05:05,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:05,916 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458583145] [2022-04-27 22:05:05,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:05,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:05,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:05,963 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:05,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:05,981 INFO L290 TraceCheckUtils]: 0: Hoare triple {297#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-27 22:05:05,982 INFO L290 TraceCheckUtils]: 1: Hoare triple {291#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:05:05,982 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291#true} {291#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:05:05,983 INFO L272 TraceCheckUtils]: 0: Hoare triple {291#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {297#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:05,983 INFO L290 TraceCheckUtils]: 1: Hoare triple {297#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-27 22:05:05,983 INFO L290 TraceCheckUtils]: 2: Hoare triple {291#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:05:05,983 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291#true} {291#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:05:05,983 INFO L272 TraceCheckUtils]: 4: Hoare triple {291#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:05:05,983 INFO L290 TraceCheckUtils]: 5: Hoare triple {291#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {291#true} is VALID [2022-04-27 22:05:05,984 INFO L290 TraceCheckUtils]: 6: Hoare triple {291#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:05:05,984 INFO L290 TraceCheckUtils]: 7: Hoare triple {291#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {291#true} is VALID [2022-04-27 22:05:05,985 INFO L290 TraceCheckUtils]: 8: Hoare triple {291#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-27 22:05:05,986 INFO L290 TraceCheckUtils]: 9: Hoare triple {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-27 22:05:05,988 INFO L290 TraceCheckUtils]: 10: Hoare triple {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-27 22:05:05,989 INFO L290 TraceCheckUtils]: 11: Hoare triple {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {292#false} is VALID [2022-04-27 22:05:05,989 INFO L290 TraceCheckUtils]: 12: Hoare triple {292#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:05:05,990 INFO L272 TraceCheckUtils]: 13: Hoare triple {292#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {292#false} is VALID [2022-04-27 22:05:05,990 INFO L290 TraceCheckUtils]: 14: Hoare triple {292#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {292#false} is VALID [2022-04-27 22:05:05,990 INFO L290 TraceCheckUtils]: 15: Hoare triple {292#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:05:05,993 INFO L290 TraceCheckUtils]: 16: Hoare triple {292#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:05:05,993 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:05,993 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:05,993 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1458583145] [2022-04-27 22:05:05,993 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1458583145] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:05:05,993 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:05:05,993 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 22:05:05,994 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [418122581] [2022-04-27 22:05:05,994 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:05:05,994 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:05:05,994 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:05,994 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,007 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:06,008 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 22:05:06,008 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:06,008 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 22:05:06,008 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 22:05:06,008 INFO L87 Difference]: Start difference. First operand 23 states and 30 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,097 INFO L93 Difference]: Finished difference Result 34 states and 45 transitions. [2022-04-27 22:05:06,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 22:05:06,097 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:05:06,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:06,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 33 transitions. [2022-04-27 22:05:06,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 33 transitions. [2022-04-27 22:05:06,102 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 33 transitions. [2022-04-27 22:05:06,134 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:06,135 INFO L225 Difference]: With dead ends: 34 [2022-04-27 22:05:06,135 INFO L226 Difference]: Without dead ends: 27 [2022-04-27 22:05:06,135 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:05:06,136 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 21 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:06,136 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 26 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:05:06,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2022-04-27 22:05:06,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2022-04-27 22:05:06,140 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:06,140 INFO L82 GeneralOperation]: Start isEquivalent. First operand 27 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,141 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,141 INFO L87 Difference]: Start difference. First operand 27 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,142 INFO L93 Difference]: Finished difference Result 27 states and 36 transitions. [2022-04-27 22:05:06,142 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 36 transitions. [2022-04-27 22:05:06,142 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:06,142 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:06,143 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 27 states. [2022-04-27 22:05:06,143 INFO L87 Difference]: Start difference. First operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 27 states. [2022-04-27 22:05:06,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,144 INFO L93 Difference]: Finished difference Result 27 states and 36 transitions. [2022-04-27 22:05:06,144 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 36 transitions. [2022-04-27 22:05:06,144 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:06,144 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:06,145 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:06,145 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:06,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 36 transitions. [2022-04-27 22:05:06,146 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 36 transitions. Word has length 17 [2022-04-27 22:05:06,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:06,146 INFO L495 AbstractCegarLoop]: Abstraction has 27 states and 36 transitions. [2022-04-27 22:05:06,146 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,146 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 36 transitions. [2022-04-27 22:05:06,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 22:05:06,147 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:06,147 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:06,147 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-27 22:05:06,147 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:06,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:06,148 INFO L85 PathProgramCache]: Analyzing trace with hash 162216202, now seen corresponding path program 1 times [2022-04-27 22:05:06,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:06,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1759501605] [2022-04-27 22:05:06,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:06,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:06,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:06,175 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:06,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:06,184 INFO L290 TraceCheckUtils]: 0: Hoare triple {445#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {439#true} is VALID [2022-04-27 22:05:06,184 INFO L290 TraceCheckUtils]: 1: Hoare triple {439#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#true} is VALID [2022-04-27 22:05:06,184 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {439#true} {439#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#true} is VALID [2022-04-27 22:05:06,185 INFO L272 TraceCheckUtils]: 0: Hoare triple {439#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {445#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:06,185 INFO L290 TraceCheckUtils]: 1: Hoare triple {445#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {439#true} is VALID [2022-04-27 22:05:06,185 INFO L290 TraceCheckUtils]: 2: Hoare triple {439#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#true} is VALID [2022-04-27 22:05:06,185 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {439#true} {439#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#true} is VALID [2022-04-27 22:05:06,186 INFO L272 TraceCheckUtils]: 4: Hoare triple {439#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#true} is VALID [2022-04-27 22:05:06,186 INFO L290 TraceCheckUtils]: 5: Hoare triple {439#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {439#true} is VALID [2022-04-27 22:05:06,186 INFO L290 TraceCheckUtils]: 6: Hoare triple {439#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:06,187 INFO L290 TraceCheckUtils]: 7: Hoare triple {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:06,187 INFO L290 TraceCheckUtils]: 8: Hoare triple {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:06,188 INFO L290 TraceCheckUtils]: 9: Hoare triple {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:06,188 INFO L290 TraceCheckUtils]: 10: Hoare triple {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {440#false} is VALID [2022-04-27 22:05:06,188 INFO L290 TraceCheckUtils]: 11: Hoare triple {440#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {440#false} is VALID [2022-04-27 22:05:06,188 INFO L290 TraceCheckUtils]: 12: Hoare triple {440#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {440#false} is VALID [2022-04-27 22:05:06,189 INFO L272 TraceCheckUtils]: 13: Hoare triple {440#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {440#false} is VALID [2022-04-27 22:05:06,189 INFO L290 TraceCheckUtils]: 14: Hoare triple {440#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {440#false} is VALID [2022-04-27 22:05:06,189 INFO L290 TraceCheckUtils]: 15: Hoare triple {440#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {440#false} is VALID [2022-04-27 22:05:06,189 INFO L290 TraceCheckUtils]: 16: Hoare triple {440#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {440#false} is VALID [2022-04-27 22:05:06,189 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:06,190 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:06,190 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1759501605] [2022-04-27 22:05:06,190 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1759501605] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:05:06,190 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:05:06,190 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 22:05:06,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2096458970] [2022-04-27 22:05:06,190 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:05:06,191 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:05:06,191 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:06,191 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,201 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:06,202 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 22:05:06,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:06,202 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 22:05:06,202 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 22:05:06,202 INFO L87 Difference]: Start difference. First operand 27 states and 36 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,295 INFO L93 Difference]: Finished difference Result 43 states and 59 transitions. [2022-04-27 22:05:06,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 22:05:06,295 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:05:06,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:06,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 35 transitions. [2022-04-27 22:05:06,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 35 transitions. [2022-04-27 22:05:06,297 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 35 transitions. [2022-04-27 22:05:06,324 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:06,324 INFO L225 Difference]: With dead ends: 43 [2022-04-27 22:05:06,325 INFO L226 Difference]: Without dead ends: 32 [2022-04-27 22:05:06,325 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:05:06,326 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 21 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:06,326 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 27 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:05:06,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-27 22:05:06,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2022-04-27 22:05:06,336 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:06,336 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,337 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,337 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,339 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-04-27 22:05:06,339 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 43 transitions. [2022-04-27 22:05:06,340 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:06,340 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:06,341 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-27 22:05:06,341 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-27 22:05:06,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,343 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-04-27 22:05:06,343 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 43 transitions. [2022-04-27 22:05:06,344 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:06,344 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:06,344 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:06,344 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:06,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 43 transitions. [2022-04-27 22:05:06,345 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 43 transitions. Word has length 17 [2022-04-27 22:05:06,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:06,345 INFO L495 AbstractCegarLoop]: Abstraction has 32 states and 43 transitions. [2022-04-27 22:05:06,345 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,346 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 43 transitions. [2022-04-27 22:05:06,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 22:05:06,346 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:06,346 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:06,346 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-27 22:05:06,346 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:06,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:06,347 INFO L85 PathProgramCache]: Analyzing trace with hash -211948756, now seen corresponding path program 1 times [2022-04-27 22:05:06,347 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:06,347 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2070234924] [2022-04-27 22:05:06,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:06,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:06,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:06,398 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:06,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:06,403 INFO L290 TraceCheckUtils]: 0: Hoare triple {622#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {615#true} is VALID [2022-04-27 22:05:06,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {615#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#true} is VALID [2022-04-27 22:05:06,404 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {615#true} {615#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#true} is VALID [2022-04-27 22:05:06,404 INFO L272 TraceCheckUtils]: 0: Hoare triple {615#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {622#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:06,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {622#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {615#true} is VALID [2022-04-27 22:05:06,405 INFO L290 TraceCheckUtils]: 2: Hoare triple {615#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#true} is VALID [2022-04-27 22:05:06,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {615#true} {615#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#true} is VALID [2022-04-27 22:05:06,405 INFO L272 TraceCheckUtils]: 4: Hoare triple {615#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#true} is VALID [2022-04-27 22:05:06,405 INFO L290 TraceCheckUtils]: 5: Hoare triple {615#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {620#(= main_~y~0 0)} is VALID [2022-04-27 22:05:06,406 INFO L290 TraceCheckUtils]: 6: Hoare triple {620#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {620#(= main_~y~0 0)} is VALID [2022-04-27 22:05:06,406 INFO L290 TraceCheckUtils]: 7: Hoare triple {620#(= main_~y~0 0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {621#(= main_~z~0 0)} is VALID [2022-04-27 22:05:06,406 INFO L290 TraceCheckUtils]: 8: Hoare triple {621#(= main_~z~0 0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {616#false} is VALID [2022-04-27 22:05:06,407 INFO L290 TraceCheckUtils]: 9: Hoare triple {616#false} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-27 22:05:06,407 INFO L290 TraceCheckUtils]: 10: Hoare triple {616#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-27 22:05:06,407 INFO L290 TraceCheckUtils]: 11: Hoare triple {616#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {616#false} is VALID [2022-04-27 22:05:06,407 INFO L290 TraceCheckUtils]: 12: Hoare triple {616#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-27 22:05:06,407 INFO L290 TraceCheckUtils]: 13: Hoare triple {616#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-27 22:05:06,407 INFO L272 TraceCheckUtils]: 14: Hoare triple {616#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {616#false} is VALID [2022-04-27 22:05:06,408 INFO L290 TraceCheckUtils]: 15: Hoare triple {616#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {616#false} is VALID [2022-04-27 22:05:06,408 INFO L290 TraceCheckUtils]: 16: Hoare triple {616#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-27 22:05:06,408 INFO L290 TraceCheckUtils]: 17: Hoare triple {616#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-27 22:05:06,408 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:05:06,408 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:06,408 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2070234924] [2022-04-27 22:05:06,408 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2070234924] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:05:06,409 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:05:06,409 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 22:05:06,409 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441952507] [2022-04-27 22:05:06,409 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:05:06,409 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 22:05:06,409 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:06,410 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,421 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:06,421 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 22:05:06,421 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:06,421 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 22:05:06,421 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:05:06,422 INFO L87 Difference]: Start difference. First operand 32 states and 43 transitions. Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,514 INFO L93 Difference]: Finished difference Result 40 states and 51 transitions. [2022-04-27 22:05:06,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 22:05:06,514 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 22:05:06,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:06,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 35 transitions. [2022-04-27 22:05:06,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 35 transitions. [2022-04-27 22:05:06,517 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 35 transitions. [2022-04-27 22:05:06,547 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:06,549 INFO L225 Difference]: With dead ends: 40 [2022-04-27 22:05:06,549 INFO L226 Difference]: Without dead ends: 28 [2022-04-27 22:05:06,549 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:05:06,554 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 18 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:06,554 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 31 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:05:06,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2022-04-27 22:05:06,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2022-04-27 22:05:06,567 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:06,567 INFO L82 GeneralOperation]: Start isEquivalent. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,568 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,568 INFO L87 Difference]: Start difference. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,570 INFO L93 Difference]: Finished difference Result 28 states and 37 transitions. [2022-04-27 22:05:06,570 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 37 transitions. [2022-04-27 22:05:06,571 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:06,571 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:06,571 INFO L74 IsIncluded]: Start isIncluded. First operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 28 states. [2022-04-27 22:05:06,571 INFO L87 Difference]: Start difference. First operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 28 states. [2022-04-27 22:05:06,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,572 INFO L93 Difference]: Finished difference Result 28 states and 37 transitions. [2022-04-27 22:05:06,572 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 37 transitions. [2022-04-27 22:05:06,572 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:06,572 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:06,573 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:06,573 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:06,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 37 transitions. [2022-04-27 22:05:06,579 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 37 transitions. Word has length 18 [2022-04-27 22:05:06,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:06,579 INFO L495 AbstractCegarLoop]: Abstraction has 28 states and 37 transitions. [2022-04-27 22:05:06,580 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,580 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 37 transitions. [2022-04-27 22:05:06,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 22:05:06,580 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:06,580 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:06,580 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-27 22:05:06,580 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:06,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:06,581 INFO L85 PathProgramCache]: Analyzing trace with hash -1893166358, now seen corresponding path program 1 times [2022-04-27 22:05:06,581 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:06,581 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1554222015] [2022-04-27 22:05:06,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:06,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:06,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:06,649 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:06,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:06,659 INFO L290 TraceCheckUtils]: 0: Hoare triple {785#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {777#true} is VALID [2022-04-27 22:05:06,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {777#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,659 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {777#true} {777#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,659 INFO L272 TraceCheckUtils]: 0: Hoare triple {777#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {785#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:06,660 INFO L290 TraceCheckUtils]: 1: Hoare triple {785#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {777#true} is VALID [2022-04-27 22:05:06,660 INFO L290 TraceCheckUtils]: 2: Hoare triple {777#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,660 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {777#true} {777#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,660 INFO L272 TraceCheckUtils]: 4: Hoare triple {777#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,660 INFO L290 TraceCheckUtils]: 5: Hoare triple {777#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {782#(= main_~y~0 0)} is VALID [2022-04-27 22:05:06,661 INFO L290 TraceCheckUtils]: 6: Hoare triple {782#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:06,661 INFO L290 TraceCheckUtils]: 7: Hoare triple {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:06,662 INFO L290 TraceCheckUtils]: 8: Hoare triple {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {784#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:06,662 INFO L290 TraceCheckUtils]: 9: Hoare triple {784#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,663 INFO L290 TraceCheckUtils]: 10: Hoare triple {778#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {778#false} is VALID [2022-04-27 22:05:06,663 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,663 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,663 INFO L290 TraceCheckUtils]: 13: Hoare triple {778#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {778#false} is VALID [2022-04-27 22:05:06,663 INFO L290 TraceCheckUtils]: 14: Hoare triple {778#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,663 INFO L272 TraceCheckUtils]: 15: Hoare triple {778#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {778#false} is VALID [2022-04-27 22:05:06,664 INFO L290 TraceCheckUtils]: 16: Hoare triple {778#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {778#false} is VALID [2022-04-27 22:05:06,664 INFO L290 TraceCheckUtils]: 17: Hoare triple {778#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,664 INFO L290 TraceCheckUtils]: 18: Hoare triple {778#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,664 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:06,664 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:06,664 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1554222015] [2022-04-27 22:05:06,664 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1554222015] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:06,664 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [598872876] [2022-04-27 22:05:06,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:06,665 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:06,665 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:06,666 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:06,687 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 22:05:06,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:06,712 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-27 22:05:06,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:06,720 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:06,797 INFO L272 TraceCheckUtils]: 0: Hoare triple {777#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {777#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {777#true} is VALID [2022-04-27 22:05:06,798 INFO L290 TraceCheckUtils]: 2: Hoare triple {777#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,798 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {777#true} {777#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,798 INFO L272 TraceCheckUtils]: 4: Hoare triple {777#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,798 INFO L290 TraceCheckUtils]: 5: Hoare triple {777#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {782#(= main_~y~0 0)} is VALID [2022-04-27 22:05:06,799 INFO L290 TraceCheckUtils]: 6: Hoare triple {782#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:06,799 INFO L290 TraceCheckUtils]: 7: Hoare triple {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:06,799 INFO L290 TraceCheckUtils]: 8: Hoare triple {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {813#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:06,800 INFO L290 TraceCheckUtils]: 9: Hoare triple {813#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,800 INFO L290 TraceCheckUtils]: 10: Hoare triple {778#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {778#false} is VALID [2022-04-27 22:05:06,800 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,800 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,800 INFO L290 TraceCheckUtils]: 13: Hoare triple {778#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {778#false} is VALID [2022-04-27 22:05:06,800 INFO L290 TraceCheckUtils]: 14: Hoare triple {778#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,801 INFO L272 TraceCheckUtils]: 15: Hoare triple {778#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {778#false} is VALID [2022-04-27 22:05:06,801 INFO L290 TraceCheckUtils]: 16: Hoare triple {778#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {778#false} is VALID [2022-04-27 22:05:06,801 INFO L290 TraceCheckUtils]: 17: Hoare triple {778#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,801 INFO L290 TraceCheckUtils]: 18: Hoare triple {778#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,801 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:06,801 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:06,876 INFO L290 TraceCheckUtils]: 18: Hoare triple {778#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,876 INFO L290 TraceCheckUtils]: 17: Hoare triple {778#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,876 INFO L290 TraceCheckUtils]: 16: Hoare triple {778#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {778#false} is VALID [2022-04-27 22:05:06,876 INFO L272 TraceCheckUtils]: 15: Hoare triple {778#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {778#false} is VALID [2022-04-27 22:05:06,876 INFO L290 TraceCheckUtils]: 14: Hoare triple {778#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,876 INFO L290 TraceCheckUtils]: 13: Hoare triple {778#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {778#false} is VALID [2022-04-27 22:05:06,876 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,877 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-27 22:05:06,877 INFO L290 TraceCheckUtils]: 10: Hoare triple {868#(not (< 0 (mod main_~y~0 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {778#false} is VALID [2022-04-27 22:05:06,877 INFO L290 TraceCheckUtils]: 9: Hoare triple {872#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {868#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:06,878 INFO L290 TraceCheckUtils]: 8: Hoare triple {777#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {872#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:05:06,878 INFO L290 TraceCheckUtils]: 7: Hoare triple {777#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,878 INFO L290 TraceCheckUtils]: 6: Hoare triple {777#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {777#true} is VALID [2022-04-27 22:05:06,878 INFO L290 TraceCheckUtils]: 5: Hoare triple {777#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {777#true} is VALID [2022-04-27 22:05:06,878 INFO L272 TraceCheckUtils]: 4: Hoare triple {777#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,878 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {777#true} {777#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,878 INFO L290 TraceCheckUtils]: 2: Hoare triple {777#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,878 INFO L290 TraceCheckUtils]: 1: Hoare triple {777#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {777#true} is VALID [2022-04-27 22:05:06,879 INFO L272 TraceCheckUtils]: 0: Hoare triple {777#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-27 22:05:06,879 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:06,879 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [598872876] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:06,879 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-04-27 22:05:06,879 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6, 5] total 9 [2022-04-27 22:05:06,879 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979780324] [2022-04-27 22:05:06,879 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:05:06,879 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:05:06,880 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:06,880 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,890 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:06,890 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 22:05:06,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:06,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 22:05:06,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:05:06,891 INFO L87 Difference]: Start difference. First operand 28 states and 37 transitions. Second operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,926 INFO L93 Difference]: Finished difference Result 35 states and 44 transitions. [2022-04-27 22:05:06,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 22:05:06,926 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:05:06,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:06,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 37 transitions. [2022-04-27 22:05:06,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 37 transitions. [2022-04-27 22:05:06,928 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 37 transitions. [2022-04-27 22:05:06,948 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:06,949 INFO L225 Difference]: With dead ends: 35 [2022-04-27 22:05:06,949 INFO L226 Difference]: Without dead ends: 25 [2022-04-27 22:05:06,949 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:05:06,949 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 3 mSDsluCounter, 10 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:06,950 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 27 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:05:06,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-27 22:05:06,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2022-04-27 22:05:06,955 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:06,955 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,955 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,955 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,956 INFO L93 Difference]: Finished difference Result 25 states and 32 transitions. [2022-04-27 22:05:06,956 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 32 transitions. [2022-04-27 22:05:06,956 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:06,956 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:06,957 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-27 22:05:06,957 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-27 22:05:06,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:06,957 INFO L93 Difference]: Finished difference Result 25 states and 32 transitions. [2022-04-27 22:05:06,958 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 32 transitions. [2022-04-27 22:05:06,958 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:06,958 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:06,958 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:06,958 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:06,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 32 transitions. [2022-04-27 22:05:06,959 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 32 transitions. Word has length 19 [2022-04-27 22:05:06,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:06,959 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 32 transitions. [2022-04-27 22:05:06,959 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:06,959 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 32 transitions. [2022-04-27 22:05:06,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 22:05:06,959 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:06,959 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:06,976 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-27 22:05:07,175 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-04-27 22:05:07,176 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:07,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:07,176 INFO L85 PathProgramCache]: Analyzing trace with hash 1618157770, now seen corresponding path program 1 times [2022-04-27 22:05:07,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:07,176 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773454040] [2022-04-27 22:05:07,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:07,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:07,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:07,226 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:07,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:07,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {1041#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-27 22:05:07,230 INFO L290 TraceCheckUtils]: 1: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,231 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,231 INFO L272 TraceCheckUtils]: 0: Hoare triple {1034#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1041#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:07,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {1041#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-27 22:05:07,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,231 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,232 INFO L272 TraceCheckUtils]: 4: Hoare triple {1034#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,232 INFO L290 TraceCheckUtils]: 5: Hoare triple {1034#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1039#(= main_~y~0 0)} is VALID [2022-04-27 22:05:07,232 INFO L290 TraceCheckUtils]: 6: Hoare triple {1039#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:05:07,233 INFO L290 TraceCheckUtils]: 7: Hoare triple {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:05:07,233 INFO L290 TraceCheckUtils]: 8: Hoare triple {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:05:07,233 INFO L290 TraceCheckUtils]: 9: Hoare triple {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:05:07,234 INFO L290 TraceCheckUtils]: 10: Hoare triple {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:05:07,234 INFO L290 TraceCheckUtils]: 11: Hoare triple {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,234 INFO L290 TraceCheckUtils]: 12: Hoare triple {1035#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1035#false} is VALID [2022-04-27 22:05:07,235 INFO L290 TraceCheckUtils]: 13: Hoare triple {1035#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,235 INFO L290 TraceCheckUtils]: 14: Hoare triple {1035#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,235 INFO L272 TraceCheckUtils]: 15: Hoare triple {1035#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1035#false} is VALID [2022-04-27 22:05:07,235 INFO L290 TraceCheckUtils]: 16: Hoare triple {1035#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1035#false} is VALID [2022-04-27 22:05:07,235 INFO L290 TraceCheckUtils]: 17: Hoare triple {1035#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,235 INFO L290 TraceCheckUtils]: 18: Hoare triple {1035#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,235 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:07,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:07,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773454040] [2022-04-27 22:05:07,236 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [773454040] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:07,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1792611244] [2022-04-27 22:05:07,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:07,236 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:07,236 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:07,237 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:07,238 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 22:05:07,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:07,266 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-27 22:05:07,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:07,271 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:07,326 INFO L272 TraceCheckUtils]: 0: Hoare triple {1034#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,326 INFO L290 TraceCheckUtils]: 1: Hoare triple {1034#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-27 22:05:07,326 INFO L290 TraceCheckUtils]: 2: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,326 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,326 INFO L272 TraceCheckUtils]: 4: Hoare triple {1034#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,327 INFO L290 TraceCheckUtils]: 5: Hoare triple {1034#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1039#(= main_~y~0 0)} is VALID [2022-04-27 22:05:07,327 INFO L290 TraceCheckUtils]: 6: Hoare triple {1039#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1063#(= main_~y~0 1)} is VALID [2022-04-27 22:05:07,327 INFO L290 TraceCheckUtils]: 7: Hoare triple {1063#(= main_~y~0 1)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1063#(= main_~y~0 1)} is VALID [2022-04-27 22:05:07,328 INFO L290 TraceCheckUtils]: 8: Hoare triple {1063#(= main_~y~0 1)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1070#(and (= main_~z~0 main_~y~0) (= main_~y~0 1))} is VALID [2022-04-27 22:05:07,328 INFO L290 TraceCheckUtils]: 9: Hoare triple {1070#(and (= main_~z~0 main_~y~0) (= main_~y~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1063#(= main_~y~0 1)} is VALID [2022-04-27 22:05:07,328 INFO L290 TraceCheckUtils]: 10: Hoare triple {1063#(= main_~y~0 1)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1063#(= main_~y~0 1)} is VALID [2022-04-27 22:05:07,329 INFO L290 TraceCheckUtils]: 11: Hoare triple {1063#(= main_~y~0 1)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,329 INFO L290 TraceCheckUtils]: 12: Hoare triple {1035#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1035#false} is VALID [2022-04-27 22:05:07,329 INFO L290 TraceCheckUtils]: 13: Hoare triple {1035#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,329 INFO L290 TraceCheckUtils]: 14: Hoare triple {1035#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,329 INFO L272 TraceCheckUtils]: 15: Hoare triple {1035#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1035#false} is VALID [2022-04-27 22:05:07,329 INFO L290 TraceCheckUtils]: 16: Hoare triple {1035#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1035#false} is VALID [2022-04-27 22:05:07,329 INFO L290 TraceCheckUtils]: 17: Hoare triple {1035#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,329 INFO L290 TraceCheckUtils]: 18: Hoare triple {1035#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,330 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:05:07,330 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:07,388 INFO L290 TraceCheckUtils]: 18: Hoare triple {1035#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,389 INFO L290 TraceCheckUtils]: 17: Hoare triple {1035#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,389 INFO L290 TraceCheckUtils]: 16: Hoare triple {1035#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1035#false} is VALID [2022-04-27 22:05:07,389 INFO L272 TraceCheckUtils]: 15: Hoare triple {1035#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1035#false} is VALID [2022-04-27 22:05:07,389 INFO L290 TraceCheckUtils]: 14: Hoare triple {1035#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,389 INFO L290 TraceCheckUtils]: 13: Hoare triple {1035#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,389 INFO L290 TraceCheckUtils]: 12: Hoare triple {1035#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1035#false} is VALID [2022-04-27 22:05:07,390 INFO L290 TraceCheckUtils]: 11: Hoare triple {1122#(< 0 (mod main_~y~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-27 22:05:07,390 INFO L290 TraceCheckUtils]: 10: Hoare triple {1122#(< 0 (mod main_~y~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1122#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:05:07,390 INFO L290 TraceCheckUtils]: 9: Hoare triple {1129#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1122#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:05:07,391 INFO L290 TraceCheckUtils]: 8: Hoare triple {1034#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1129#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:07,391 INFO L290 TraceCheckUtils]: 7: Hoare triple {1034#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,391 INFO L290 TraceCheckUtils]: 6: Hoare triple {1034#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1034#true} is VALID [2022-04-27 22:05:07,391 INFO L290 TraceCheckUtils]: 5: Hoare triple {1034#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1034#true} is VALID [2022-04-27 22:05:07,391 INFO L272 TraceCheckUtils]: 4: Hoare triple {1034#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,391 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,391 INFO L290 TraceCheckUtils]: 2: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,392 INFO L290 TraceCheckUtils]: 1: Hoare triple {1034#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-27 22:05:07,392 INFO L272 TraceCheckUtils]: 0: Hoare triple {1034#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-27 22:05:07,392 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:07,392 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1792611244] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:07,392 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-04-27 22:05:07,392 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [5, 5] total 9 [2022-04-27 22:05:07,392 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1798291057] [2022-04-27 22:05:07,392 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:05:07,393 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:05:07,393 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:07,393 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:07,404 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:07,404 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 22:05:07,404 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:07,404 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 22:05:07,405 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:05:07,405 INFO L87 Difference]: Start difference. First operand 25 states and 32 transitions. Second operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:07,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:07,451 INFO L93 Difference]: Finished difference Result 30 states and 36 transitions. [2022-04-27 22:05:07,451 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 22:05:07,452 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:05:07,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:07,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:07,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 31 transitions. [2022-04-27 22:05:07,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:07,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 31 transitions. [2022-04-27 22:05:07,453 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 31 transitions. [2022-04-27 22:05:07,480 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:07,481 INFO L225 Difference]: With dead ends: 30 [2022-04-27 22:05:07,481 INFO L226 Difference]: Without dead ends: 22 [2022-04-27 22:05:07,481 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:05:07,481 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 1 mSDsluCounter, 21 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:07,482 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 41 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:05:07,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-27 22:05:07,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-27 22:05:07,489 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:07,489 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:07,489 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:07,489 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:07,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:07,490 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-27 22:05:07,490 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-27 22:05:07,490 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:07,490 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:07,491 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-27 22:05:07,491 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-27 22:05:07,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:07,491 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-27 22:05:07,491 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-27 22:05:07,491 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:07,492 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:07,492 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:07,492 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:07,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:07,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 27 transitions. [2022-04-27 22:05:07,492 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 27 transitions. Word has length 19 [2022-04-27 22:05:07,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:07,493 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 27 transitions. [2022-04-27 22:05:07,493 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:07,493 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-27 22:05:07,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 22:05:07,493 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:07,493 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:07,509 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:07,709 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-04-27 22:05:07,710 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:07,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:07,710 INFO L85 PathProgramCache]: Analyzing trace with hash -1538757236, now seen corresponding path program 1 times [2022-04-27 22:05:07,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:07,710 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813715683] [2022-04-27 22:05:07,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:07,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:07,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:07,760 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:07,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:07,764 INFO L290 TraceCheckUtils]: 0: Hoare triple {1284#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1277#true} is VALID [2022-04-27 22:05:07,765 INFO L290 TraceCheckUtils]: 1: Hoare triple {1277#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:07,765 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1277#true} {1277#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:07,765 INFO L272 TraceCheckUtils]: 0: Hoare triple {1277#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1284#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:07,765 INFO L290 TraceCheckUtils]: 1: Hoare triple {1284#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1277#true} is VALID [2022-04-27 22:05:07,765 INFO L290 TraceCheckUtils]: 2: Hoare triple {1277#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:07,765 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1277#true} {1277#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:07,766 INFO L272 TraceCheckUtils]: 4: Hoare triple {1277#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:07,766 INFO L290 TraceCheckUtils]: 5: Hoare triple {1277#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1277#true} is VALID [2022-04-27 22:05:07,766 INFO L290 TraceCheckUtils]: 6: Hoare triple {1277#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:07,767 INFO L290 TraceCheckUtils]: 7: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:07,767 INFO L290 TraceCheckUtils]: 8: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:07,768 INFO L290 TraceCheckUtils]: 9: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:07,768 INFO L290 TraceCheckUtils]: 10: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:07,769 INFO L290 TraceCheckUtils]: 11: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:07,769 INFO L290 TraceCheckUtils]: 12: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:07,769 INFO L290 TraceCheckUtils]: 13: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:07,770 INFO L290 TraceCheckUtils]: 14: Hoare triple {1278#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1278#false} is VALID [2022-04-27 22:05:07,770 INFO L290 TraceCheckUtils]: 15: Hoare triple {1278#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:07,770 INFO L272 TraceCheckUtils]: 16: Hoare triple {1278#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1278#false} is VALID [2022-04-27 22:05:07,770 INFO L290 TraceCheckUtils]: 17: Hoare triple {1278#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1278#false} is VALID [2022-04-27 22:05:07,770 INFO L290 TraceCheckUtils]: 18: Hoare triple {1278#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:07,770 INFO L290 TraceCheckUtils]: 19: Hoare triple {1278#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:07,770 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:07,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:07,770 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1813715683] [2022-04-27 22:05:07,770 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1813715683] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:07,771 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1792846274] [2022-04-27 22:05:07,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:07,771 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:07,771 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:07,772 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:07,773 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 22:05:07,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:07,804 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-27 22:05:07,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:07,812 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:08,033 INFO L272 TraceCheckUtils]: 0: Hoare triple {1277#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:08,034 INFO L290 TraceCheckUtils]: 1: Hoare triple {1277#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1277#true} is VALID [2022-04-27 22:05:08,034 INFO L290 TraceCheckUtils]: 2: Hoare triple {1277#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:08,034 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1277#true} {1277#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:08,034 INFO L272 TraceCheckUtils]: 4: Hoare triple {1277#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:08,034 INFO L290 TraceCheckUtils]: 5: Hoare triple {1277#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1277#true} is VALID [2022-04-27 22:05:08,035 INFO L290 TraceCheckUtils]: 6: Hoare triple {1277#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:08,036 INFO L290 TraceCheckUtils]: 7: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:08,037 INFO L290 TraceCheckUtils]: 8: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:08,038 INFO L290 TraceCheckUtils]: 9: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:08,038 INFO L290 TraceCheckUtils]: 10: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:08,038 INFO L290 TraceCheckUtils]: 11: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:08,039 INFO L290 TraceCheckUtils]: 12: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:08,041 INFO L290 TraceCheckUtils]: 13: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:08,041 INFO L290 TraceCheckUtils]: 14: Hoare triple {1278#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1278#false} is VALID [2022-04-27 22:05:08,041 INFO L290 TraceCheckUtils]: 15: Hoare triple {1278#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:08,041 INFO L272 TraceCheckUtils]: 16: Hoare triple {1278#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1278#false} is VALID [2022-04-27 22:05:08,041 INFO L290 TraceCheckUtils]: 17: Hoare triple {1278#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1278#false} is VALID [2022-04-27 22:05:08,041 INFO L290 TraceCheckUtils]: 18: Hoare triple {1278#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:08,042 INFO L290 TraceCheckUtils]: 19: Hoare triple {1278#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:08,042 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:08,042 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:08,242 INFO L290 TraceCheckUtils]: 19: Hoare triple {1278#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:08,243 INFO L290 TraceCheckUtils]: 18: Hoare triple {1278#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:08,243 INFO L290 TraceCheckUtils]: 17: Hoare triple {1278#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1278#false} is VALID [2022-04-27 22:05:08,243 INFO L272 TraceCheckUtils]: 16: Hoare triple {1278#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1278#false} is VALID [2022-04-27 22:05:08,243 INFO L290 TraceCheckUtils]: 15: Hoare triple {1278#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:08,243 INFO L290 TraceCheckUtils]: 14: Hoare triple {1278#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1278#false} is VALID [2022-04-27 22:05:08,244 INFO L290 TraceCheckUtils]: 13: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-27 22:05:08,244 INFO L290 TraceCheckUtils]: 12: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:08,244 INFO L290 TraceCheckUtils]: 11: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:08,245 INFO L290 TraceCheckUtils]: 10: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:08,245 INFO L290 TraceCheckUtils]: 9: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:05:08,246 INFO L290 TraceCheckUtils]: 8: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:08,247 INFO L290 TraceCheckUtils]: 7: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:08,247 INFO L290 TraceCheckUtils]: 6: Hoare triple {1277#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:08,247 INFO L290 TraceCheckUtils]: 5: Hoare triple {1277#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1277#true} is VALID [2022-04-27 22:05:08,248 INFO L272 TraceCheckUtils]: 4: Hoare triple {1277#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:08,248 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1277#true} {1277#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:08,248 INFO L290 TraceCheckUtils]: 2: Hoare triple {1277#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:08,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {1277#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1277#true} is VALID [2022-04-27 22:05:08,248 INFO L272 TraceCheckUtils]: 0: Hoare triple {1277#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-27 22:05:08,248 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:08,248 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1792846274] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:08,248 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:08,248 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 5 [2022-04-27 22:05:08,249 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039467309] [2022-04-27 22:05:08,249 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:08,249 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 22:05:08,249 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:08,249 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,261 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:08,261 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 22:05:08,262 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:08,262 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 22:05:08,262 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:05:08,262 INFO L87 Difference]: Start difference. First operand 22 states and 27 transitions. Second operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:08,359 INFO L93 Difference]: Finished difference Result 33 states and 41 transitions. [2022-04-27 22:05:08,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 22:05:08,359 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 22:05:08,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:08,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 37 transitions. [2022-04-27 22:05:08,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 37 transitions. [2022-04-27 22:05:08,361 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 37 transitions. [2022-04-27 22:05:08,391 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:08,392 INFO L225 Difference]: With dead ends: 33 [2022-04-27 22:05:08,392 INFO L226 Difference]: Without dead ends: 26 [2022-04-27 22:05:08,392 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 38 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:05:08,393 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 22 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:08,393 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 29 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:05:08,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-27 22:05:08,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2022-04-27 22:05:08,404 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:08,404 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,405 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,405 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:08,405 INFO L93 Difference]: Finished difference Result 26 states and 33 transitions. [2022-04-27 22:05:08,406 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 33 transitions. [2022-04-27 22:05:08,406 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:08,406 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:08,406 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-27 22:05:08,406 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-27 22:05:08,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:08,407 INFO L93 Difference]: Finished difference Result 26 states and 33 transitions. [2022-04-27 22:05:08,407 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 33 transitions. [2022-04-27 22:05:08,407 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:08,407 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:08,407 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:08,407 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:08,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 33 transitions. [2022-04-27 22:05:08,408 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 33 transitions. Word has length 20 [2022-04-27 22:05:08,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:08,408 INFO L495 AbstractCegarLoop]: Abstraction has 26 states and 33 transitions. [2022-04-27 22:05:08,409 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,409 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 33 transitions. [2022-04-27 22:05:08,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 22:05:08,409 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:08,409 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:08,443 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:08,619 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:08,619 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:08,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:08,620 INFO L85 PathProgramCache]: Analyzing trace with hash -765770159, now seen corresponding path program 1 times [2022-04-27 22:05:08,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:08,620 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054344003] [2022-04-27 22:05:08,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:08,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:08,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:08,688 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:08,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:08,696 INFO L290 TraceCheckUtils]: 0: Hoare triple {1553#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1543#true} is VALID [2022-04-27 22:05:08,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {1543#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:08,696 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1543#true} {1543#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:08,698 INFO L272 TraceCheckUtils]: 0: Hoare triple {1543#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1553#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:08,698 INFO L290 TraceCheckUtils]: 1: Hoare triple {1553#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1543#true} is VALID [2022-04-27 22:05:08,698 INFO L290 TraceCheckUtils]: 2: Hoare triple {1543#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:08,698 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1543#true} {1543#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:08,698 INFO L272 TraceCheckUtils]: 4: Hoare triple {1543#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:08,698 INFO L290 TraceCheckUtils]: 5: Hoare triple {1543#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1548#(= main_~y~0 0)} is VALID [2022-04-27 22:05:08,699 INFO L290 TraceCheckUtils]: 6: Hoare triple {1548#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:08,699 INFO L290 TraceCheckUtils]: 7: Hoare triple {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:08,700 INFO L290 TraceCheckUtils]: 8: Hoare triple {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:08,700 INFO L290 TraceCheckUtils]: 9: Hoare triple {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1551#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:08,700 INFO L290 TraceCheckUtils]: 10: Hoare triple {1551#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1551#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:08,701 INFO L290 TraceCheckUtils]: 11: Hoare triple {1551#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:08,701 INFO L290 TraceCheckUtils]: 12: Hoare triple {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:08,702 INFO L290 TraceCheckUtils]: 13: Hoare triple {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:08,702 INFO L290 TraceCheckUtils]: 14: Hoare triple {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:08,702 INFO L290 TraceCheckUtils]: 15: Hoare triple {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-27 22:05:08,703 INFO L272 TraceCheckUtils]: 16: Hoare triple {1544#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1544#false} is VALID [2022-04-27 22:05:08,703 INFO L290 TraceCheckUtils]: 17: Hoare triple {1544#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1544#false} is VALID [2022-04-27 22:05:08,703 INFO L290 TraceCheckUtils]: 18: Hoare triple {1544#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-27 22:05:08,703 INFO L290 TraceCheckUtils]: 19: Hoare triple {1544#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-27 22:05:08,703 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:05:08,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:08,703 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054344003] [2022-04-27 22:05:08,703 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054344003] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:08,704 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1265035265] [2022-04-27 22:05:08,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:08,704 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:08,704 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:08,704 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:08,706 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 22:05:08,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:08,738 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-27 22:05:08,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:08,744 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:08,963 INFO L272 TraceCheckUtils]: 0: Hoare triple {1543#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:08,963 INFO L290 TraceCheckUtils]: 1: Hoare triple {1543#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1543#true} is VALID [2022-04-27 22:05:08,963 INFO L290 TraceCheckUtils]: 2: Hoare triple {1543#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:08,964 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1543#true} {1543#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:08,964 INFO L272 TraceCheckUtils]: 4: Hoare triple {1543#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:08,964 INFO L290 TraceCheckUtils]: 5: Hoare triple {1543#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1548#(= main_~y~0 0)} is VALID [2022-04-27 22:05:08,965 INFO L290 TraceCheckUtils]: 6: Hoare triple {1548#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:08,965 INFO L290 TraceCheckUtils]: 7: Hoare triple {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:08,965 INFO L290 TraceCheckUtils]: 8: Hoare triple {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1581#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:08,966 INFO L290 TraceCheckUtils]: 9: Hoare triple {1581#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1585#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:08,966 INFO L290 TraceCheckUtils]: 10: Hoare triple {1585#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1585#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:08,967 INFO L290 TraceCheckUtils]: 11: Hoare triple {1585#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1592#(and (<= main_~z~0 1) (= main_~z~0 (+ main_~y~0 1)) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:08,967 INFO L290 TraceCheckUtils]: 12: Hoare triple {1592#(and (<= main_~z~0 1) (= main_~z~0 (+ main_~y~0 1)) (<= 1 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1592#(and (<= main_~z~0 1) (= main_~z~0 (+ main_~y~0 1)) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:08,968 INFO L290 TraceCheckUtils]: 13: Hoare triple {1592#(and (<= main_~z~0 1) (= main_~z~0 (+ main_~y~0 1)) (<= 1 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:08,968 INFO L290 TraceCheckUtils]: 14: Hoare triple {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:08,969 INFO L290 TraceCheckUtils]: 15: Hoare triple {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-27 22:05:08,969 INFO L272 TraceCheckUtils]: 16: Hoare triple {1544#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1544#false} is VALID [2022-04-27 22:05:08,969 INFO L290 TraceCheckUtils]: 17: Hoare triple {1544#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1544#false} is VALID [2022-04-27 22:05:08,969 INFO L290 TraceCheckUtils]: 18: Hoare triple {1544#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-27 22:05:08,969 INFO L290 TraceCheckUtils]: 19: Hoare triple {1544#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-27 22:05:08,969 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:08,969 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:09,039 INFO L290 TraceCheckUtils]: 19: Hoare triple {1544#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-27 22:05:09,039 INFO L290 TraceCheckUtils]: 18: Hoare triple {1544#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-27 22:05:09,040 INFO L290 TraceCheckUtils]: 17: Hoare triple {1544#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1544#false} is VALID [2022-04-27 22:05:09,040 INFO L272 TraceCheckUtils]: 16: Hoare triple {1544#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1544#false} is VALID [2022-04-27 22:05:09,040 INFO L290 TraceCheckUtils]: 15: Hoare triple {1629#(< 0 (mod main_~z~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-27 22:05:09,040 INFO L290 TraceCheckUtils]: 14: Hoare triple {1629#(< 0 (mod main_~z~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1629#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:05:09,041 INFO L290 TraceCheckUtils]: 13: Hoare triple {1629#(< 0 (mod main_~z~0 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1629#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:05:09,041 INFO L290 TraceCheckUtils]: 12: Hoare triple {1629#(< 0 (mod main_~z~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1629#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:05:09,042 INFO L290 TraceCheckUtils]: 11: Hoare triple {1642#(< 0 (mod (+ main_~z~0 1) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1629#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:05:09,043 INFO L290 TraceCheckUtils]: 10: Hoare triple {1642#(< 0 (mod (+ main_~z~0 1) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1642#(< 0 (mod (+ main_~z~0 1) 4294967296))} is VALID [2022-04-27 22:05:09,043 INFO L290 TraceCheckUtils]: 9: Hoare triple {1543#true} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1642#(< 0 (mod (+ main_~z~0 1) 4294967296))} is VALID [2022-04-27 22:05:09,043 INFO L290 TraceCheckUtils]: 8: Hoare triple {1543#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1543#true} is VALID [2022-04-27 22:05:09,044 INFO L290 TraceCheckUtils]: 7: Hoare triple {1543#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:09,044 INFO L290 TraceCheckUtils]: 6: Hoare triple {1543#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1543#true} is VALID [2022-04-27 22:05:09,044 INFO L290 TraceCheckUtils]: 5: Hoare triple {1543#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1543#true} is VALID [2022-04-27 22:05:09,044 INFO L272 TraceCheckUtils]: 4: Hoare triple {1543#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:09,044 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1543#true} {1543#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:09,044 INFO L290 TraceCheckUtils]: 2: Hoare triple {1543#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:09,044 INFO L290 TraceCheckUtils]: 1: Hoare triple {1543#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1543#true} is VALID [2022-04-27 22:05:09,044 INFO L272 TraceCheckUtils]: 0: Hoare triple {1543#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-27 22:05:09,044 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:09,045 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1265035265] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:09,045 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:09,045 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 4] total 13 [2022-04-27 22:05:09,045 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1175516034] [2022-04-27 22:05:09,045 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:09,046 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 22:05:09,048 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:09,048 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:09,073 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:09,073 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-27 22:05:09,073 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:09,073 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-27 22:05:09,074 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2022-04-27 22:05:09,074 INFO L87 Difference]: Start difference. First operand 26 states and 33 transitions. Second operand has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:09,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:09,441 INFO L93 Difference]: Finished difference Result 63 states and 90 transitions. [2022-04-27 22:05:09,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-27 22:05:09,442 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 22:05:09,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:09,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:09,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 68 transitions. [2022-04-27 22:05:09,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:09,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 68 transitions. [2022-04-27 22:05:09,444 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 68 transitions. [2022-04-27 22:05:09,506 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:09,507 INFO L225 Difference]: With dead ends: 63 [2022-04-27 22:05:09,507 INFO L226 Difference]: Without dead ends: 49 [2022-04-27 22:05:09,507 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=117, Invalid=389, Unknown=0, NotChecked=0, Total=506 [2022-04-27 22:05:09,508 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 44 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:09,508 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 39 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:05:09,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-27 22:05:09,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 40. [2022-04-27 22:05:09,529 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:09,529 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:09,529 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:09,529 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:09,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:09,530 INFO L93 Difference]: Finished difference Result 49 states and 64 transitions. [2022-04-27 22:05:09,531 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 64 transitions. [2022-04-27 22:05:09,531 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:09,531 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:09,531 INFO L74 IsIncluded]: Start isIncluded. First operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-27 22:05:09,531 INFO L87 Difference]: Start difference. First operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-27 22:05:09,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:09,532 INFO L93 Difference]: Finished difference Result 49 states and 64 transitions. [2022-04-27 22:05:09,532 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 64 transitions. [2022-04-27 22:05:09,532 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:09,532 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:09,532 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:09,533 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:09,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:09,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 52 transitions. [2022-04-27 22:05:09,534 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 52 transitions. Word has length 20 [2022-04-27 22:05:09,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:09,534 INFO L495 AbstractCegarLoop]: Abstraction has 40 states and 52 transitions. [2022-04-27 22:05:09,534 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:09,534 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 52 transitions. [2022-04-27 22:05:09,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 22:05:09,534 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:09,534 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:09,550 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:09,750 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:09,751 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:09,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:09,751 INFO L85 PathProgramCache]: Analyzing trace with hash 2057649504, now seen corresponding path program 1 times [2022-04-27 22:05:09,751 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:09,751 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689739767] [2022-04-27 22:05:09,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:09,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:09,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:09,821 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:09,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:09,825 INFO L290 TraceCheckUtils]: 0: Hoare triple {1943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1933#true} is VALID [2022-04-27 22:05:09,825 INFO L290 TraceCheckUtils]: 1: Hoare triple {1933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:09,825 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1933#true} {1933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:09,825 INFO L272 TraceCheckUtils]: 0: Hoare triple {1933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:09,825 INFO L290 TraceCheckUtils]: 1: Hoare triple {1943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1933#true} is VALID [2022-04-27 22:05:09,825 INFO L290 TraceCheckUtils]: 2: Hoare triple {1933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:09,826 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1933#true} {1933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:09,826 INFO L272 TraceCheckUtils]: 4: Hoare triple {1933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:09,826 INFO L290 TraceCheckUtils]: 5: Hoare triple {1933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1938#(= main_~y~0 0)} is VALID [2022-04-27 22:05:09,826 INFO L290 TraceCheckUtils]: 6: Hoare triple {1938#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,827 INFO L290 TraceCheckUtils]: 7: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,827 INFO L290 TraceCheckUtils]: 8: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,827 INFO L290 TraceCheckUtils]: 9: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,828 INFO L290 TraceCheckUtils]: 10: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,828 INFO L290 TraceCheckUtils]: 11: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1938#(= main_~y~0 0)} is VALID [2022-04-27 22:05:09,828 INFO L290 TraceCheckUtils]: 12: Hoare triple {1938#(= main_~y~0 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1938#(= main_~y~0 0)} is VALID [2022-04-27 22:05:09,829 INFO L290 TraceCheckUtils]: 13: Hoare triple {1938#(= main_~y~0 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,829 INFO L290 TraceCheckUtils]: 14: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,830 INFO L290 TraceCheckUtils]: 15: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1940#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-27 22:05:09,830 INFO L290 TraceCheckUtils]: 16: Hoare triple {1940#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1940#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-27 22:05:09,831 INFO L272 TraceCheckUtils]: 17: Hoare triple {1940#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1941#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:05:09,831 INFO L290 TraceCheckUtils]: 18: Hoare triple {1941#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1942#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:05:09,832 INFO L290 TraceCheckUtils]: 19: Hoare triple {1942#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-27 22:05:09,832 INFO L290 TraceCheckUtils]: 20: Hoare triple {1934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-27 22:05:09,832 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:05:09,832 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:09,832 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689739767] [2022-04-27 22:05:09,832 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [689739767] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:09,832 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1874357534] [2022-04-27 22:05:09,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:09,832 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:09,833 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:09,833 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:09,834 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 22:05:09,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:09,863 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 22:05:09,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:09,871 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:09,982 INFO L272 TraceCheckUtils]: 0: Hoare triple {1933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:09,983 INFO L290 TraceCheckUtils]: 1: Hoare triple {1933#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1933#true} is VALID [2022-04-27 22:05:09,983 INFO L290 TraceCheckUtils]: 2: Hoare triple {1933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:09,983 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1933#true} {1933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:09,983 INFO L272 TraceCheckUtils]: 4: Hoare triple {1933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:09,983 INFO L290 TraceCheckUtils]: 5: Hoare triple {1933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1938#(= main_~y~0 0)} is VALID [2022-04-27 22:05:09,985 INFO L290 TraceCheckUtils]: 6: Hoare triple {1938#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,987 INFO L290 TraceCheckUtils]: 7: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,992 INFO L290 TraceCheckUtils]: 8: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,992 INFO L290 TraceCheckUtils]: 9: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,993 INFO L290 TraceCheckUtils]: 10: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,993 INFO L290 TraceCheckUtils]: 11: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1938#(= main_~y~0 0)} is VALID [2022-04-27 22:05:09,994 INFO L290 TraceCheckUtils]: 12: Hoare triple {1938#(= main_~y~0 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1938#(= main_~y~0 0)} is VALID [2022-04-27 22:05:09,994 INFO L290 TraceCheckUtils]: 13: Hoare triple {1938#(= main_~y~0 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,994 INFO L290 TraceCheckUtils]: 14: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:09,995 INFO L290 TraceCheckUtils]: 15: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1938#(= main_~y~0 0)} is VALID [2022-04-27 22:05:09,995 INFO L290 TraceCheckUtils]: 16: Hoare triple {1938#(= main_~y~0 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1938#(= main_~y~0 0)} is VALID [2022-04-27 22:05:09,996 INFO L272 TraceCheckUtils]: 17: Hoare triple {1938#(= main_~y~0 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1998#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:09,996 INFO L290 TraceCheckUtils]: 18: Hoare triple {1998#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2002#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:09,996 INFO L290 TraceCheckUtils]: 19: Hoare triple {2002#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-27 22:05:09,996 INFO L290 TraceCheckUtils]: 20: Hoare triple {1934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-27 22:05:09,997 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:05:09,997 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:10,095 INFO L290 TraceCheckUtils]: 20: Hoare triple {1934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-27 22:05:10,096 INFO L290 TraceCheckUtils]: 19: Hoare triple {2002#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-27 22:05:10,096 INFO L290 TraceCheckUtils]: 18: Hoare triple {1998#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2002#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:10,097 INFO L272 TraceCheckUtils]: 17: Hoare triple {2018#(= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1998#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:10,097 INFO L290 TraceCheckUtils]: 16: Hoare triple {2018#(= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2018#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:05:10,098 INFO L290 TraceCheckUtils]: 15: Hoare triple {2025#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2018#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:05:10,098 INFO L290 TraceCheckUtils]: 14: Hoare triple {2025#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2025#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-27 22:05:10,099 INFO L290 TraceCheckUtils]: 13: Hoare triple {2018#(= (mod main_~y~0 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2025#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-27 22:05:10,099 INFO L290 TraceCheckUtils]: 12: Hoare triple {1933#true} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2018#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:05:10,099 INFO L290 TraceCheckUtils]: 11: Hoare triple {1933#true} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1933#true} is VALID [2022-04-27 22:05:10,099 INFO L290 TraceCheckUtils]: 10: Hoare triple {1933#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L290 TraceCheckUtils]: 9: Hoare triple {1933#true} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L290 TraceCheckUtils]: 8: Hoare triple {1933#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L290 TraceCheckUtils]: 7: Hoare triple {1933#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L290 TraceCheckUtils]: 6: Hoare triple {1933#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L290 TraceCheckUtils]: 5: Hoare triple {1933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L272 TraceCheckUtils]: 4: Hoare triple {1933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1933#true} {1933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L290 TraceCheckUtils]: 2: Hoare triple {1933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L290 TraceCheckUtils]: 1: Hoare triple {1933#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L272 TraceCheckUtils]: 0: Hoare triple {1933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-27 22:05:10,100 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:10,100 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1874357534] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:10,101 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:10,101 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 12 [2022-04-27 22:05:10,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975578238] [2022-04-27 22:05:10,101 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:10,101 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 22:05:10,101 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:10,101 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,127 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:10,128 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-27 22:05:10,128 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:10,128 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-27 22:05:10,128 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2022-04-27 22:05:10,128 INFO L87 Difference]: Start difference. First operand 40 states and 52 transitions. Second operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:10,488 INFO L93 Difference]: Finished difference Result 57 states and 74 transitions. [2022-04-27 22:05:10,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 22:05:10,488 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 22:05:10,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:10,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-27 22:05:10,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-27 22:05:10,490 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 48 transitions. [2022-04-27 22:05:10,526 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:10,527 INFO L225 Difference]: With dead ends: 57 [2022-04-27 22:05:10,527 INFO L226 Difference]: Without dead ends: 49 [2022-04-27 22:05:10,527 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 38 SyntacticMatches, 6 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=245, Unknown=0, NotChecked=0, Total=306 [2022-04-27 22:05:10,528 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 31 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 186 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 59 SdHoareTripleChecker+Invalid, 200 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 186 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:10,528 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [31 Valid, 59 Invalid, 200 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 186 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:05:10,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-27 22:05:10,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 46. [2022-04-27 22:05:10,552 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:10,552 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,552 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,552 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:10,554 INFO L93 Difference]: Finished difference Result 49 states and 65 transitions. [2022-04-27 22:05:10,554 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 65 transitions. [2022-04-27 22:05:10,554 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:10,554 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:10,554 INFO L74 IsIncluded]: Start isIncluded. First operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-27 22:05:10,554 INFO L87 Difference]: Start difference. First operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-27 22:05:10,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:10,555 INFO L93 Difference]: Finished difference Result 49 states and 65 transitions. [2022-04-27 22:05:10,555 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 65 transitions. [2022-04-27 22:05:10,556 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:10,556 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:10,556 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:10,556 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:10,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 62 transitions. [2022-04-27 22:05:10,557 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 62 transitions. Word has length 21 [2022-04-27 22:05:10,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:10,557 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 62 transitions. [2022-04-27 22:05:10,557 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,557 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 62 transitions. [2022-04-27 22:05:10,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-27 22:05:10,557 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:10,558 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:10,577 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:10,771 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-27 22:05:10,771 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:10,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:10,772 INFO L85 PathProgramCache]: Analyzing trace with hash 1877108748, now seen corresponding path program 2 times [2022-04-27 22:05:10,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:10,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117874298] [2022-04-27 22:05:10,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:10,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:10,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:10,811 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:10,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:10,815 INFO L290 TraceCheckUtils]: 0: Hoare triple {2327#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2320#true} is VALID [2022-04-27 22:05:10,815 INFO L290 TraceCheckUtils]: 1: Hoare triple {2320#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:10,815 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2320#true} {2320#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:10,816 INFO L272 TraceCheckUtils]: 0: Hoare triple {2320#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2327#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:10,816 INFO L290 TraceCheckUtils]: 1: Hoare triple {2327#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2320#true} is VALID [2022-04-27 22:05:10,816 INFO L290 TraceCheckUtils]: 2: Hoare triple {2320#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:10,816 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2320#true} {2320#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:10,816 INFO L272 TraceCheckUtils]: 4: Hoare triple {2320#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:10,816 INFO L290 TraceCheckUtils]: 5: Hoare triple {2320#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2320#true} is VALID [2022-04-27 22:05:10,816 INFO L290 TraceCheckUtils]: 6: Hoare triple {2320#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2320#true} is VALID [2022-04-27 22:05:10,816 INFO L290 TraceCheckUtils]: 7: Hoare triple {2320#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:10,817 INFO L290 TraceCheckUtils]: 8: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:10,817 INFO L290 TraceCheckUtils]: 9: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:10,818 INFO L290 TraceCheckUtils]: 10: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:10,818 INFO L290 TraceCheckUtils]: 11: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:10,818 INFO L290 TraceCheckUtils]: 12: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:10,819 INFO L290 TraceCheckUtils]: 13: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:10,819 INFO L290 TraceCheckUtils]: 14: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2321#false} is VALID [2022-04-27 22:05:10,820 INFO L290 TraceCheckUtils]: 15: Hoare triple {2321#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:10,820 INFO L290 TraceCheckUtils]: 16: Hoare triple {2321#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2321#false} is VALID [2022-04-27 22:05:10,820 INFO L290 TraceCheckUtils]: 17: Hoare triple {2321#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:10,820 INFO L272 TraceCheckUtils]: 18: Hoare triple {2321#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2321#false} is VALID [2022-04-27 22:05:10,820 INFO L290 TraceCheckUtils]: 19: Hoare triple {2321#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2321#false} is VALID [2022-04-27 22:05:10,820 INFO L290 TraceCheckUtils]: 20: Hoare triple {2321#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:10,820 INFO L290 TraceCheckUtils]: 21: Hoare triple {2321#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:10,820 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:10,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:10,820 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2117874298] [2022-04-27 22:05:10,820 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2117874298] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:10,821 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1091794897] [2022-04-27 22:05:10,821 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:05:10,821 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:10,821 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:10,821 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:10,822 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 22:05:10,852 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:05:10,852 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:10,852 INFO L263 TraceCheckSpWp]: Trace formula consists of 91 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-27 22:05:10,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:10,857 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:11,061 INFO L272 TraceCheckUtils]: 0: Hoare triple {2320#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:11,062 INFO L290 TraceCheckUtils]: 1: Hoare triple {2320#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2320#true} is VALID [2022-04-27 22:05:11,062 INFO L290 TraceCheckUtils]: 2: Hoare triple {2320#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:11,062 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2320#true} {2320#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:11,062 INFO L272 TraceCheckUtils]: 4: Hoare triple {2320#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:11,062 INFO L290 TraceCheckUtils]: 5: Hoare triple {2320#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2320#true} is VALID [2022-04-27 22:05:11,062 INFO L290 TraceCheckUtils]: 6: Hoare triple {2320#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2320#true} is VALID [2022-04-27 22:05:11,062 INFO L290 TraceCheckUtils]: 7: Hoare triple {2320#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:11,063 INFO L290 TraceCheckUtils]: 8: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:11,063 INFO L290 TraceCheckUtils]: 9: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:11,064 INFO L290 TraceCheckUtils]: 10: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:11,064 INFO L290 TraceCheckUtils]: 11: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:11,064 INFO L290 TraceCheckUtils]: 12: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:11,065 INFO L290 TraceCheckUtils]: 13: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:11,066 INFO L290 TraceCheckUtils]: 14: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2321#false} is VALID [2022-04-27 22:05:11,066 INFO L290 TraceCheckUtils]: 15: Hoare triple {2321#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:11,066 INFO L290 TraceCheckUtils]: 16: Hoare triple {2321#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2321#false} is VALID [2022-04-27 22:05:11,066 INFO L290 TraceCheckUtils]: 17: Hoare triple {2321#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:11,066 INFO L272 TraceCheckUtils]: 18: Hoare triple {2321#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2321#false} is VALID [2022-04-27 22:05:11,066 INFO L290 TraceCheckUtils]: 19: Hoare triple {2321#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2321#false} is VALID [2022-04-27 22:05:11,066 INFO L290 TraceCheckUtils]: 20: Hoare triple {2321#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:11,066 INFO L290 TraceCheckUtils]: 21: Hoare triple {2321#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:11,066 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:11,066 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:11,241 INFO L290 TraceCheckUtils]: 21: Hoare triple {2321#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:11,241 INFO L290 TraceCheckUtils]: 20: Hoare triple {2321#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:11,241 INFO L290 TraceCheckUtils]: 19: Hoare triple {2321#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2321#false} is VALID [2022-04-27 22:05:11,241 INFO L272 TraceCheckUtils]: 18: Hoare triple {2321#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2321#false} is VALID [2022-04-27 22:05:11,242 INFO L290 TraceCheckUtils]: 17: Hoare triple {2321#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:11,242 INFO L290 TraceCheckUtils]: 16: Hoare triple {2321#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2321#false} is VALID [2022-04-27 22:05:11,242 INFO L290 TraceCheckUtils]: 15: Hoare triple {2321#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-27 22:05:11,242 INFO L290 TraceCheckUtils]: 14: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2321#false} is VALID [2022-04-27 22:05:11,243 INFO L290 TraceCheckUtils]: 13: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:11,243 INFO L290 TraceCheckUtils]: 12: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:11,244 INFO L290 TraceCheckUtils]: 11: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:11,244 INFO L290 TraceCheckUtils]: 10: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:11,245 INFO L290 TraceCheckUtils]: 9: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:11,245 INFO L290 TraceCheckUtils]: 8: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:11,245 INFO L290 TraceCheckUtils]: 7: Hoare triple {2320#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:11,245 INFO L290 TraceCheckUtils]: 6: Hoare triple {2320#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2320#true} is VALID [2022-04-27 22:05:11,246 INFO L290 TraceCheckUtils]: 5: Hoare triple {2320#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2320#true} is VALID [2022-04-27 22:05:11,246 INFO L272 TraceCheckUtils]: 4: Hoare triple {2320#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:11,246 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2320#true} {2320#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:11,246 INFO L290 TraceCheckUtils]: 2: Hoare triple {2320#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:11,246 INFO L290 TraceCheckUtils]: 1: Hoare triple {2320#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2320#true} is VALID [2022-04-27 22:05:11,246 INFO L272 TraceCheckUtils]: 0: Hoare triple {2320#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-27 22:05:11,246 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:11,246 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1091794897] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:11,246 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:11,246 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 5 [2022-04-27 22:05:11,246 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1940985107] [2022-04-27 22:05:11,247 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:11,247 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 22:05:11,247 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:11,247 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:11,263 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:11,263 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 22:05:11,263 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:11,264 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 22:05:11,264 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:05:11,264 INFO L87 Difference]: Start difference. First operand 46 states and 62 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:11,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:11,368 INFO L93 Difference]: Finished difference Result 57 states and 77 transitions. [2022-04-27 22:05:11,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 22:05:11,368 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 22:05:11,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:11,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:11,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 37 transitions. [2022-04-27 22:05:11,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:11,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 37 transitions. [2022-04-27 22:05:11,370 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 37 transitions. [2022-04-27 22:05:11,396 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:11,397 INFO L225 Difference]: With dead ends: 57 [2022-04-27 22:05:11,397 INFO L226 Difference]: Without dead ends: 38 [2022-04-27 22:05:11,397 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 45 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:05:11,398 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 22 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:11,398 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 30 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:05:11,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-27 22:05:11,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2022-04-27 22:05:11,412 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:11,412 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:11,412 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:11,412 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:11,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:11,413 INFO L93 Difference]: Finished difference Result 38 states and 52 transitions. [2022-04-27 22:05:11,413 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 52 transitions. [2022-04-27 22:05:11,413 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:11,413 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:11,413 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-27 22:05:11,414 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-27 22:05:11,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:11,414 INFO L93 Difference]: Finished difference Result 38 states and 52 transitions. [2022-04-27 22:05:11,414 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 52 transitions. [2022-04-27 22:05:11,414 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:11,414 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:11,414 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:11,414 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:11,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:11,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 52 transitions. [2022-04-27 22:05:11,415 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 52 transitions. Word has length 22 [2022-04-27 22:05:11,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:11,415 INFO L495 AbstractCegarLoop]: Abstraction has 38 states and 52 transitions. [2022-04-27 22:05:11,415 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:11,415 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 52 transitions. [2022-04-27 22:05:11,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-27 22:05:11,416 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:11,416 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:11,443 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:11,631 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:11,631 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:11,632 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:11,632 INFO L85 PathProgramCache]: Analyzing trace with hash -1264431284, now seen corresponding path program 2 times [2022-04-27 22:05:11,632 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:11,632 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [924130754] [2022-04-27 22:05:11,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:11,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:11,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:11,692 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:11,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:11,695 INFO L290 TraceCheckUtils]: 0: Hoare triple {2672#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2662#true} is VALID [2022-04-27 22:05:11,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {2662#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:11,696 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2662#true} {2662#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:11,696 INFO L272 TraceCheckUtils]: 0: Hoare triple {2662#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2672#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:11,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {2672#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2662#true} is VALID [2022-04-27 22:05:11,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {2662#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:11,696 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2662#true} {2662#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:11,696 INFO L272 TraceCheckUtils]: 4: Hoare triple {2662#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:11,697 INFO L290 TraceCheckUtils]: 5: Hoare triple {2662#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2667#(= main_~y~0 0)} is VALID [2022-04-27 22:05:11,697 INFO L290 TraceCheckUtils]: 6: Hoare triple {2667#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2668#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:11,698 INFO L290 TraceCheckUtils]: 7: Hoare triple {2668#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:11,698 INFO L290 TraceCheckUtils]: 8: Hoare triple {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:11,698 INFO L290 TraceCheckUtils]: 9: Hoare triple {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2670#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:11,699 INFO L290 TraceCheckUtils]: 10: Hoare triple {2670#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2671#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:11,699 INFO L290 TraceCheckUtils]: 11: Hoare triple {2671#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,699 INFO L290 TraceCheckUtils]: 12: Hoare triple {2663#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2663#false} is VALID [2022-04-27 22:05:11,699 INFO L290 TraceCheckUtils]: 13: Hoare triple {2663#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2663#false} is VALID [2022-04-27 22:05:11,699 INFO L290 TraceCheckUtils]: 14: Hoare triple {2663#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,700 INFO L290 TraceCheckUtils]: 15: Hoare triple {2663#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2663#false} is VALID [2022-04-27 22:05:11,700 INFO L290 TraceCheckUtils]: 16: Hoare triple {2663#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,700 INFO L290 TraceCheckUtils]: 17: Hoare triple {2663#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,700 INFO L272 TraceCheckUtils]: 18: Hoare triple {2663#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2663#false} is VALID [2022-04-27 22:05:11,700 INFO L290 TraceCheckUtils]: 19: Hoare triple {2663#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2663#false} is VALID [2022-04-27 22:05:11,700 INFO L290 TraceCheckUtils]: 20: Hoare triple {2663#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,700 INFO L290 TraceCheckUtils]: 21: Hoare triple {2663#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,701 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:05:11,701 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:11,701 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [924130754] [2022-04-27 22:05:11,701 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [924130754] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:11,701 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1173662352] [2022-04-27 22:05:11,701 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:05:11,701 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:11,701 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:11,702 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:11,703 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 22:05:11,732 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:05:11,732 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:11,733 INFO L263 TraceCheckSpWp]: Trace formula consists of 91 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 22:05:11,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:11,738 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:11,822 INFO L272 TraceCheckUtils]: 0: Hoare triple {2662#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:11,823 INFO L290 TraceCheckUtils]: 1: Hoare triple {2662#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2662#true} is VALID [2022-04-27 22:05:11,823 INFO L290 TraceCheckUtils]: 2: Hoare triple {2662#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:11,823 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2662#true} {2662#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:11,823 INFO L272 TraceCheckUtils]: 4: Hoare triple {2662#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:11,823 INFO L290 TraceCheckUtils]: 5: Hoare triple {2662#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2667#(= main_~y~0 0)} is VALID [2022-04-27 22:05:11,823 INFO L290 TraceCheckUtils]: 6: Hoare triple {2667#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2668#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:11,824 INFO L290 TraceCheckUtils]: 7: Hoare triple {2668#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:11,824 INFO L290 TraceCheckUtils]: 8: Hoare triple {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:11,825 INFO L290 TraceCheckUtils]: 9: Hoare triple {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2703#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:11,825 INFO L290 TraceCheckUtils]: 10: Hoare triple {2703#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2707#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:05:11,825 INFO L290 TraceCheckUtils]: 11: Hoare triple {2707#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L290 TraceCheckUtils]: 12: Hoare triple {2663#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L290 TraceCheckUtils]: 13: Hoare triple {2663#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L290 TraceCheckUtils]: 14: Hoare triple {2663#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L290 TraceCheckUtils]: 15: Hoare triple {2663#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L290 TraceCheckUtils]: 16: Hoare triple {2663#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L290 TraceCheckUtils]: 17: Hoare triple {2663#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L272 TraceCheckUtils]: 18: Hoare triple {2663#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L290 TraceCheckUtils]: 19: Hoare triple {2663#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L290 TraceCheckUtils]: 20: Hoare triple {2663#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L290 TraceCheckUtils]: 21: Hoare triple {2663#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,826 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:05:11,826 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:11,998 INFO L290 TraceCheckUtils]: 21: Hoare triple {2663#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,998 INFO L290 TraceCheckUtils]: 20: Hoare triple {2744#(not (<= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-27 22:05:11,999 INFO L290 TraceCheckUtils]: 19: Hoare triple {2748#(< 0 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2744#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:05:11,999 INFO L272 TraceCheckUtils]: 18: Hoare triple {2752#(= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2748#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:11,999 INFO L290 TraceCheckUtils]: 17: Hoare triple {2752#(= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2752#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:05:12,000 INFO L290 TraceCheckUtils]: 16: Hoare triple {2752#(= (mod main_~y~0 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2752#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:05:12,000 INFO L290 TraceCheckUtils]: 15: Hoare triple {2762#(= (mod (+ main_~y~0 1) 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2752#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:05:12,000 INFO L290 TraceCheckUtils]: 14: Hoare triple {2762#(= (mod (+ main_~y~0 1) 4294967296) 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2762#(= (mod (+ main_~y~0 1) 4294967296) 0)} is VALID [2022-04-27 22:05:12,001 INFO L290 TraceCheckUtils]: 13: Hoare triple {2752#(= (mod main_~y~0 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2762#(= (mod (+ main_~y~0 1) 4294967296) 0)} is VALID [2022-04-27 22:05:12,002 INFO L290 TraceCheckUtils]: 12: Hoare triple {2772#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2752#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:05:12,002 INFO L290 TraceCheckUtils]: 11: Hoare triple {2776#(or (= (mod (+ main_~y~0 4294967295) 4294967296) 0) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2772#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-27 22:05:12,003 INFO L290 TraceCheckUtils]: 10: Hoare triple {2780#(or (= (mod (+ main_~y~0 4294967295) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2776#(or (= (mod (+ main_~y~0 4294967295) 4294967296) 0) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:05:12,003 INFO L290 TraceCheckUtils]: 9: Hoare triple {2662#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2780#(or (= (mod (+ main_~y~0 4294967295) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:05:12,003 INFO L290 TraceCheckUtils]: 8: Hoare triple {2662#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:12,004 INFO L290 TraceCheckUtils]: 7: Hoare triple {2662#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2662#true} is VALID [2022-04-27 22:05:12,004 INFO L290 TraceCheckUtils]: 6: Hoare triple {2662#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2662#true} is VALID [2022-04-27 22:05:12,004 INFO L290 TraceCheckUtils]: 5: Hoare triple {2662#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2662#true} is VALID [2022-04-27 22:05:12,004 INFO L272 TraceCheckUtils]: 4: Hoare triple {2662#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:12,004 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2662#true} {2662#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:12,004 INFO L290 TraceCheckUtils]: 2: Hoare triple {2662#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:12,004 INFO L290 TraceCheckUtils]: 1: Hoare triple {2662#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2662#true} is VALID [2022-04-27 22:05:12,004 INFO L272 TraceCheckUtils]: 0: Hoare triple {2662#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-27 22:05:12,004 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:12,004 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1173662352] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:12,004 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:12,004 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 9] total 17 [2022-04-27 22:05:12,005 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1421891603] [2022-04-27 22:05:12,005 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:12,005 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 22:05:12,005 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:12,005 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:12,030 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:12,031 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-27 22:05:12,031 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:12,031 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-27 22:05:12,031 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2022-04-27 22:05:12,031 INFO L87 Difference]: Start difference. First operand 38 states and 52 transitions. Second operand has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:12,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:12,862 INFO L93 Difference]: Finished difference Result 87 states and 126 transitions. [2022-04-27 22:05:12,862 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-27 22:05:12,862 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 22:05:12,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:12,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:12,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 85 transitions. [2022-04-27 22:05:12,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:12,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 85 transitions. [2022-04-27 22:05:12,864 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 85 transitions. [2022-04-27 22:05:12,932 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:12,933 INFO L225 Difference]: With dead ends: 87 [2022-04-27 22:05:12,933 INFO L226 Difference]: Without dead ends: 59 [2022-04-27 22:05:12,933 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 168 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=157, Invalid=899, Unknown=0, NotChecked=0, Total=1056 [2022-04-27 22:05:12,934 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 47 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 313 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 366 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 313 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:12,934 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [47 Valid, 64 Invalid, 366 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 313 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 22:05:12,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-04-27 22:05:12,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 49. [2022-04-27 22:05:12,968 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:12,969 INFO L82 GeneralOperation]: Start isEquivalent. First operand 59 states. Second operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:12,969 INFO L74 IsIncluded]: Start isIncluded. First operand 59 states. Second operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:12,969 INFO L87 Difference]: Start difference. First operand 59 states. Second operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:12,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:12,970 INFO L93 Difference]: Finished difference Result 59 states and 81 transitions. [2022-04-27 22:05:12,970 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 81 transitions. [2022-04-27 22:05:12,970 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:12,970 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:12,970 INFO L74 IsIncluded]: Start isIncluded. First operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-27 22:05:12,971 INFO L87 Difference]: Start difference. First operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-27 22:05:12,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:12,971 INFO L93 Difference]: Finished difference Result 59 states and 81 transitions. [2022-04-27 22:05:12,971 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 81 transitions. [2022-04-27 22:05:12,972 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:12,972 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:12,972 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:12,972 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:12,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:12,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 68 transitions. [2022-04-27 22:05:12,973 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 68 transitions. Word has length 22 [2022-04-27 22:05:12,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:12,973 INFO L495 AbstractCegarLoop]: Abstraction has 49 states and 68 transitions. [2022-04-27 22:05:12,973 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:12,973 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 68 transitions. [2022-04-27 22:05:12,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 22:05:12,973 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:12,973 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:12,993 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-04-27 22:05:13,193 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:13,193 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:13,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:13,194 INFO L85 PathProgramCache]: Analyzing trace with hash -1977751131, now seen corresponding path program 2 times [2022-04-27 22:05:13,194 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:13,194 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [642070544] [2022-04-27 22:05:13,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:13,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:13,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:13,282 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:13,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:13,285 INFO L290 TraceCheckUtils]: 0: Hoare triple {3158#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3146#true} is VALID [2022-04-27 22:05:13,285 INFO L290 TraceCheckUtils]: 1: Hoare triple {3146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,285 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3146#true} {3146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,286 INFO L272 TraceCheckUtils]: 0: Hoare triple {3146#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3158#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:13,286 INFO L290 TraceCheckUtils]: 1: Hoare triple {3158#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3146#true} is VALID [2022-04-27 22:05:13,286 INFO L290 TraceCheckUtils]: 2: Hoare triple {3146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,286 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3146#true} {3146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,286 INFO L272 TraceCheckUtils]: 4: Hoare triple {3146#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,286 INFO L290 TraceCheckUtils]: 5: Hoare triple {3146#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3151#(= main_~y~0 0)} is VALID [2022-04-27 22:05:13,287 INFO L290 TraceCheckUtils]: 6: Hoare triple {3151#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3152#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:13,287 INFO L290 TraceCheckUtils]: 7: Hoare triple {3152#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3153#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:13,288 INFO L290 TraceCheckUtils]: 8: Hoare triple {3153#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3153#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:13,288 INFO L290 TraceCheckUtils]: 9: Hoare triple {3153#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:13,289 INFO L290 TraceCheckUtils]: 10: Hoare triple {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3155#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:13,289 INFO L290 TraceCheckUtils]: 11: Hoare triple {3155#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3156#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:13,290 INFO L290 TraceCheckUtils]: 12: Hoare triple {3156#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3156#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:13,290 INFO L290 TraceCheckUtils]: 13: Hoare triple {3156#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3155#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:13,290 INFO L290 TraceCheckUtils]: 14: Hoare triple {3155#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:13,291 INFO L290 TraceCheckUtils]: 15: Hoare triple {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:13,291 INFO L290 TraceCheckUtils]: 16: Hoare triple {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:13,292 INFO L290 TraceCheckUtils]: 17: Hoare triple {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3157#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:13,292 INFO L290 TraceCheckUtils]: 18: Hoare triple {3157#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,292 INFO L272 TraceCheckUtils]: 19: Hoare triple {3147#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3147#false} is VALID [2022-04-27 22:05:13,292 INFO L290 TraceCheckUtils]: 20: Hoare triple {3147#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3147#false} is VALID [2022-04-27 22:05:13,292 INFO L290 TraceCheckUtils]: 21: Hoare triple {3147#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,292 INFO L290 TraceCheckUtils]: 22: Hoare triple {3147#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,292 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:13,293 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:13,293 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [642070544] [2022-04-27 22:05:13,293 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [642070544] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:13,293 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [263069006] [2022-04-27 22:05:13,293 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:05:13,293 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:13,293 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:13,294 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:13,295 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-27 22:05:13,324 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:05:13,324 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:13,324 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-27 22:05:13,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:13,331 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:13,406 INFO L272 TraceCheckUtils]: 0: Hoare triple {3146#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,406 INFO L290 TraceCheckUtils]: 1: Hoare triple {3146#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3146#true} is VALID [2022-04-27 22:05:13,406 INFO L290 TraceCheckUtils]: 2: Hoare triple {3146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,406 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3146#true} {3146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,407 INFO L272 TraceCheckUtils]: 4: Hoare triple {3146#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,407 INFO L290 TraceCheckUtils]: 5: Hoare triple {3146#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3146#true} is VALID [2022-04-27 22:05:13,407 INFO L290 TraceCheckUtils]: 6: Hoare triple {3146#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:13,408 INFO L290 TraceCheckUtils]: 7: Hoare triple {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:13,408 INFO L290 TraceCheckUtils]: 8: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:13,409 INFO L290 TraceCheckUtils]: 9: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:13,409 INFO L290 TraceCheckUtils]: 10: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:13,410 INFO L290 TraceCheckUtils]: 11: Hoare triple {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:13,410 INFO L290 TraceCheckUtils]: 12: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:13,410 INFO L290 TraceCheckUtils]: 13: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:13,411 INFO L290 TraceCheckUtils]: 14: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:13,411 INFO L290 TraceCheckUtils]: 15: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:13,411 INFO L290 TraceCheckUtils]: 16: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,411 INFO L290 TraceCheckUtils]: 17: Hoare triple {3147#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3147#false} is VALID [2022-04-27 22:05:13,411 INFO L290 TraceCheckUtils]: 18: Hoare triple {3147#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,411 INFO L272 TraceCheckUtils]: 19: Hoare triple {3147#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3147#false} is VALID [2022-04-27 22:05:13,412 INFO L290 TraceCheckUtils]: 20: Hoare triple {3147#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3147#false} is VALID [2022-04-27 22:05:13,412 INFO L290 TraceCheckUtils]: 21: Hoare triple {3147#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,412 INFO L290 TraceCheckUtils]: 22: Hoare triple {3147#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,412 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:05:13,412 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:13,478 INFO L290 TraceCheckUtils]: 22: Hoare triple {3147#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,478 INFO L290 TraceCheckUtils]: 21: Hoare triple {3147#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,478 INFO L290 TraceCheckUtils]: 20: Hoare triple {3147#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3147#false} is VALID [2022-04-27 22:05:13,479 INFO L272 TraceCheckUtils]: 19: Hoare triple {3147#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3147#false} is VALID [2022-04-27 22:05:13,479 INFO L290 TraceCheckUtils]: 18: Hoare triple {3147#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,479 INFO L290 TraceCheckUtils]: 17: Hoare triple {3147#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3147#false} is VALID [2022-04-27 22:05:13,479 INFO L290 TraceCheckUtils]: 16: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-27 22:05:13,479 INFO L290 TraceCheckUtils]: 15: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:13,480 INFO L290 TraceCheckUtils]: 14: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:13,480 INFO L290 TraceCheckUtils]: 13: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:13,480 INFO L290 TraceCheckUtils]: 12: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:13,481 INFO L290 TraceCheckUtils]: 11: Hoare triple {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:13,484 INFO L290 TraceCheckUtils]: 10: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:13,484 INFO L290 TraceCheckUtils]: 9: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:13,485 INFO L290 TraceCheckUtils]: 8: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:13,485 INFO L290 TraceCheckUtils]: 7: Hoare triple {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:13,486 INFO L290 TraceCheckUtils]: 6: Hoare triple {3146#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:13,486 INFO L290 TraceCheckUtils]: 5: Hoare triple {3146#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3146#true} is VALID [2022-04-27 22:05:13,486 INFO L272 TraceCheckUtils]: 4: Hoare triple {3146#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,486 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3146#true} {3146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,486 INFO L290 TraceCheckUtils]: 2: Hoare triple {3146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,486 INFO L290 TraceCheckUtils]: 1: Hoare triple {3146#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3146#true} is VALID [2022-04-27 22:05:13,486 INFO L272 TraceCheckUtils]: 0: Hoare triple {3146#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-27 22:05:13,487 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:05:13,487 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [263069006] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:13,487 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:13,487 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 5, 5] total 13 [2022-04-27 22:05:13,487 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710831587] [2022-04-27 22:05:13,487 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:13,487 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 22:05:13,487 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:13,488 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:13,510 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:13,511 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-27 22:05:13,511 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:13,511 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-27 22:05:13,511 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2022-04-27 22:05:13,511 INFO L87 Difference]: Start difference. First operand 49 states and 68 transitions. Second operand has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:14,435 INFO L93 Difference]: Finished difference Result 80 states and 116 transitions. [2022-04-27 22:05:14,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-27 22:05:14,436 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 22:05:14,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:14,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 84 transitions. [2022-04-27 22:05:14,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 84 transitions. [2022-04-27 22:05:14,439 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 84 transitions. [2022-04-27 22:05:14,511 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:14,512 INFO L225 Difference]: With dead ends: 80 [2022-04-27 22:05:14,512 INFO L226 Difference]: Without dead ends: 59 [2022-04-27 22:05:14,513 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 178 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=194, Invalid=862, Unknown=0, NotChecked=0, Total=1056 [2022-04-27 22:05:14,513 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 52 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 284 mSolverCounterSat, 56 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 52 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 340 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 56 IncrementalHoareTripleChecker+Valid, 284 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:14,513 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [52 Valid, 68 Invalid, 340 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [56 Valid, 284 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 22:05:14,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-04-27 22:05:14,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 56. [2022-04-27 22:05:14,562 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:14,562 INFO L82 GeneralOperation]: Start isEquivalent. First operand 59 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,562 INFO L74 IsIncluded]: Start isIncluded. First operand 59 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,562 INFO L87 Difference]: Start difference. First operand 59 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:14,571 INFO L93 Difference]: Finished difference Result 59 states and 77 transitions. [2022-04-27 22:05:14,572 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 77 transitions. [2022-04-27 22:05:14,572 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:14,572 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:14,572 INFO L74 IsIncluded]: Start isIncluded. First operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-27 22:05:14,572 INFO L87 Difference]: Start difference. First operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-27 22:05:14,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:14,574 INFO L93 Difference]: Finished difference Result 59 states and 77 transitions. [2022-04-27 22:05:14,574 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 77 transitions. [2022-04-27 22:05:14,574 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:14,575 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:14,575 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:14,575 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:14,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 74 transitions. [2022-04-27 22:05:14,576 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 74 transitions. Word has length 23 [2022-04-27 22:05:14,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:14,576 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 74 transitions. [2022-04-27 22:05:14,576 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,576 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 74 transitions. [2022-04-27 22:05:14,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-27 22:05:14,577 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:14,578 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:14,597 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:14,795 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-27 22:05:14,796 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:14,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:14,796 INFO L85 PathProgramCache]: Analyzing trace with hash -1606353935, now seen corresponding path program 3 times [2022-04-27 22:05:14,796 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:14,796 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1643564535] [2022-04-27 22:05:14,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:14,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:14,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:14,865 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:14,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:14,868 INFO L290 TraceCheckUtils]: 0: Hoare triple {3643#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3632#true} is VALID [2022-04-27 22:05:14,868 INFO L290 TraceCheckUtils]: 1: Hoare triple {3632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:14,868 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3632#true} {3632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:14,868 INFO L272 TraceCheckUtils]: 0: Hoare triple {3632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3643#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:14,869 INFO L290 TraceCheckUtils]: 1: Hoare triple {3643#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3632#true} is VALID [2022-04-27 22:05:14,869 INFO L290 TraceCheckUtils]: 2: Hoare triple {3632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:14,869 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3632#true} {3632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:14,869 INFO L272 TraceCheckUtils]: 4: Hoare triple {3632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:14,869 INFO L290 TraceCheckUtils]: 5: Hoare triple {3632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3637#(= main_~y~0 0)} is VALID [2022-04-27 22:05:14,869 INFO L290 TraceCheckUtils]: 6: Hoare triple {3637#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3638#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:14,870 INFO L290 TraceCheckUtils]: 7: Hoare triple {3638#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3639#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:14,870 INFO L290 TraceCheckUtils]: 8: Hoare triple {3639#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:14,871 INFO L290 TraceCheckUtils]: 9: Hoare triple {3640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:14,871 INFO L290 TraceCheckUtils]: 10: Hoare triple {3640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3641#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:05:14,872 INFO L290 TraceCheckUtils]: 11: Hoare triple {3641#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3642#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:14,872 INFO L290 TraceCheckUtils]: 12: Hoare triple {3642#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-27 22:05:14,872 INFO L290 TraceCheckUtils]: 13: Hoare triple {3633#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3633#false} is VALID [2022-04-27 22:05:14,872 INFO L290 TraceCheckUtils]: 14: Hoare triple {3633#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-27 22:05:14,872 INFO L290 TraceCheckUtils]: 15: Hoare triple {3633#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3633#false} is VALID [2022-04-27 22:05:14,872 INFO L290 TraceCheckUtils]: 16: Hoare triple {3633#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-27 22:05:14,872 INFO L290 TraceCheckUtils]: 17: Hoare triple {3633#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3633#false} is VALID [2022-04-27 22:05:14,872 INFO L290 TraceCheckUtils]: 18: Hoare triple {3633#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3633#false} is VALID [2022-04-27 22:05:14,872 INFO L290 TraceCheckUtils]: 19: Hoare triple {3633#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-27 22:05:14,873 INFO L272 TraceCheckUtils]: 20: Hoare triple {3633#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3633#false} is VALID [2022-04-27 22:05:14,873 INFO L290 TraceCheckUtils]: 21: Hoare triple {3633#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3633#false} is VALID [2022-04-27 22:05:14,873 INFO L290 TraceCheckUtils]: 22: Hoare triple {3633#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-27 22:05:14,873 INFO L290 TraceCheckUtils]: 23: Hoare triple {3633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-27 22:05:14,873 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-04-27 22:05:14,873 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:14,873 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1643564535] [2022-04-27 22:05:14,873 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1643564535] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:14,873 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [761376975] [2022-04-27 22:05:14,873 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:05:14,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:14,873 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:14,874 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:14,875 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-27 22:05:14,905 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-27 22:05:14,906 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:14,906 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-27 22:05:14,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:14,912 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:15,123 INFO L272 TraceCheckUtils]: 0: Hoare triple {3632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:15,124 INFO L290 TraceCheckUtils]: 1: Hoare triple {3632#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3632#true} is VALID [2022-04-27 22:05:15,124 INFO L290 TraceCheckUtils]: 2: Hoare triple {3632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:15,125 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3632#true} {3632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:15,125 INFO L272 TraceCheckUtils]: 4: Hoare triple {3632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:15,125 INFO L290 TraceCheckUtils]: 5: Hoare triple {3632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3632#true} is VALID [2022-04-27 22:05:15,125 INFO L290 TraceCheckUtils]: 6: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-27 22:05:15,125 INFO L290 TraceCheckUtils]: 7: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-27 22:05:15,125 INFO L290 TraceCheckUtils]: 8: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-27 22:05:15,125 INFO L290 TraceCheckUtils]: 9: Hoare triple {3632#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:15,125 INFO L290 TraceCheckUtils]: 10: Hoare triple {3632#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3677#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:05:15,126 INFO L290 TraceCheckUtils]: 11: Hoare triple {3677#(= main_~z~0 main_~y~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3681#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-27 22:05:15,126 INFO L290 TraceCheckUtils]: 12: Hoare triple {3681#(= main_~y~0 (+ main_~z~0 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3681#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-27 22:05:15,127 INFO L290 TraceCheckUtils]: 13: Hoare triple {3681#(= main_~y~0 (+ main_~z~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3688#(= main_~z~0 (+ main_~y~0 1))} is VALID [2022-04-27 22:05:15,127 INFO L290 TraceCheckUtils]: 14: Hoare triple {3688#(= main_~z~0 (+ main_~y~0 1))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3688#(= main_~z~0 (+ main_~y~0 1))} is VALID [2022-04-27 22:05:15,127 INFO L290 TraceCheckUtils]: 15: Hoare triple {3688#(= main_~z~0 (+ main_~y~0 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3677#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:05:15,128 INFO L290 TraceCheckUtils]: 16: Hoare triple {3677#(= main_~z~0 main_~y~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3677#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:05:15,128 INFO L290 TraceCheckUtils]: 17: Hoare triple {3677#(= main_~z~0 main_~y~0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3677#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:05:15,129 INFO L290 TraceCheckUtils]: 18: Hoare triple {3677#(= main_~z~0 main_~y~0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3677#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:05:15,129 INFO L290 TraceCheckUtils]: 19: Hoare triple {3677#(= main_~z~0 main_~y~0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3707#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:15,130 INFO L272 TraceCheckUtils]: 20: Hoare triple {3707#(not (< 0 (mod main_~y~0 4294967296)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3711#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:15,130 INFO L290 TraceCheckUtils]: 21: Hoare triple {3711#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3715#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:15,130 INFO L290 TraceCheckUtils]: 22: Hoare triple {3715#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-27 22:05:15,130 INFO L290 TraceCheckUtils]: 23: Hoare triple {3633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-27 22:05:15,131 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:05:15,131 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:15,368 INFO L290 TraceCheckUtils]: 23: Hoare triple {3633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-27 22:05:15,368 INFO L290 TraceCheckUtils]: 22: Hoare triple {3715#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-27 22:05:15,368 INFO L290 TraceCheckUtils]: 21: Hoare triple {3711#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3715#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:15,369 INFO L272 TraceCheckUtils]: 20: Hoare triple {3707#(not (< 0 (mod main_~y~0 4294967296)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3711#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:15,369 INFO L290 TraceCheckUtils]: 19: Hoare triple {3734#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3707#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:15,371 INFO L290 TraceCheckUtils]: 18: Hoare triple {3738#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3734#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:05:15,372 INFO L290 TraceCheckUtils]: 17: Hoare triple {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3738#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 22:05:15,372 INFO L290 TraceCheckUtils]: 16: Hoare triple {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:05:15,373 INFO L290 TraceCheckUtils]: 15: Hoare triple {3749#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:05:15,373 INFO L290 TraceCheckUtils]: 14: Hoare triple {3749#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3749#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 22:05:15,374 INFO L290 TraceCheckUtils]: 13: Hoare triple {3756#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3749#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 22:05:15,375 INFO L290 TraceCheckUtils]: 12: Hoare triple {3756#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3756#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:05:15,376 INFO L290 TraceCheckUtils]: 11: Hoare triple {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3756#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:05:15,376 INFO L290 TraceCheckUtils]: 10: Hoare triple {3632#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:05:15,376 INFO L290 TraceCheckUtils]: 9: Hoare triple {3632#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:15,376 INFO L290 TraceCheckUtils]: 8: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-27 22:05:15,376 INFO L290 TraceCheckUtils]: 7: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-27 22:05:15,376 INFO L290 TraceCheckUtils]: 6: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-27 22:05:15,376 INFO L290 TraceCheckUtils]: 5: Hoare triple {3632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3632#true} is VALID [2022-04-27 22:05:15,376 INFO L272 TraceCheckUtils]: 4: Hoare triple {3632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:15,376 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3632#true} {3632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:15,377 INFO L290 TraceCheckUtils]: 2: Hoare triple {3632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:15,377 INFO L290 TraceCheckUtils]: 1: Hoare triple {3632#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3632#true} is VALID [2022-04-27 22:05:15,377 INFO L272 TraceCheckUtils]: 0: Hoare triple {3632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-27 22:05:15,377 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:05:15,377 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [761376975] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:15,377 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:15,377 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 10] total 20 [2022-04-27 22:05:15,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [577299674] [2022-04-27 22:05:15,377 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:15,381 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 22:05:15,381 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:15,381 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:15,413 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:15,413 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-27 22:05:15,414 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:15,414 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-27 22:05:15,414 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=322, Unknown=0, NotChecked=0, Total=380 [2022-04-27 22:05:15,414 INFO L87 Difference]: Start difference. First operand 56 states and 74 transitions. Second operand has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:17,897 INFO L93 Difference]: Finished difference Result 133 states and 188 transitions. [2022-04-27 22:05:17,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2022-04-27 22:05:17,898 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 22:05:17,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:17,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 130 transitions. [2022-04-27 22:05:17,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 130 transitions. [2022-04-27 22:05:17,901 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 43 states and 130 transitions. [2022-04-27 22:05:18,011 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:18,012 INFO L225 Difference]: With dead ends: 133 [2022-04-27 22:05:18,012 INFO L226 Difference]: Without dead ends: 94 [2022-04-27 22:05:18,014 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 40 SyntacticMatches, 4 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 789 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=518, Invalid=3022, Unknown=0, NotChecked=0, Total=3540 [2022-04-27 22:05:18,014 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 73 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 722 mSolverCounterSat, 130 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 852 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 130 IncrementalHoareTripleChecker+Valid, 722 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:18,014 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [73 Valid, 91 Invalid, 852 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [130 Valid, 722 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-27 22:05:18,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-04-27 22:05:18,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 73. [2022-04-27 22:05:18,082 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:18,082 INFO L82 GeneralOperation]: Start isEquivalent. First operand 94 states. Second operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:18,083 INFO L74 IsIncluded]: Start isIncluded. First operand 94 states. Second operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:18,083 INFO L87 Difference]: Start difference. First operand 94 states. Second operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:18,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:18,084 INFO L93 Difference]: Finished difference Result 94 states and 128 transitions. [2022-04-27 22:05:18,084 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 128 transitions. [2022-04-27 22:05:18,084 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:18,084 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:18,085 INFO L74 IsIncluded]: Start isIncluded. First operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 94 states. [2022-04-27 22:05:18,085 INFO L87 Difference]: Start difference. First operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 94 states. [2022-04-27 22:05:18,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:18,086 INFO L93 Difference]: Finished difference Result 94 states and 128 transitions. [2022-04-27 22:05:18,086 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 128 transitions. [2022-04-27 22:05:18,086 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:18,086 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:18,086 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:18,086 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:18,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:18,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 100 transitions. [2022-04-27 22:05:18,087 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 100 transitions. Word has length 24 [2022-04-27 22:05:18,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:18,087 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 100 transitions. [2022-04-27 22:05:18,087 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:18,088 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 100 transitions. [2022-04-27 22:05:18,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 22:05:18,088 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:18,088 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:18,104 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:18,304 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-27 22:05:18,307 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:18,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:18,308 INFO L85 PathProgramCache]: Analyzing trace with hash -1576992246, now seen corresponding path program 4 times [2022-04-27 22:05:18,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:18,308 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [208119416] [2022-04-27 22:05:18,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:18,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:18,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:18,364 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:18,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:18,367 INFO L290 TraceCheckUtils]: 0: Hoare triple {4341#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4333#true} is VALID [2022-04-27 22:05:18,368 INFO L290 TraceCheckUtils]: 1: Hoare triple {4333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,368 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4333#true} {4333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,368 INFO L272 TraceCheckUtils]: 0: Hoare triple {4333#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4341#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:18,368 INFO L290 TraceCheckUtils]: 1: Hoare triple {4341#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4333#true} is VALID [2022-04-27 22:05:18,368 INFO L290 TraceCheckUtils]: 2: Hoare triple {4333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,368 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4333#true} {4333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,368 INFO L272 TraceCheckUtils]: 4: Hoare triple {4333#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,368 INFO L290 TraceCheckUtils]: 5: Hoare triple {4333#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4333#true} is VALID [2022-04-27 22:05:18,368 INFO L290 TraceCheckUtils]: 6: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4333#true} is VALID [2022-04-27 22:05:18,369 INFO L290 TraceCheckUtils]: 7: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:18,369 INFO L290 TraceCheckUtils]: 8: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:18,370 INFO L290 TraceCheckUtils]: 9: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:18,370 INFO L290 TraceCheckUtils]: 10: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,371 INFO L290 TraceCheckUtils]: 11: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,374 INFO L290 TraceCheckUtils]: 12: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,374 INFO L290 TraceCheckUtils]: 13: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,375 INFO L290 TraceCheckUtils]: 14: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,375 INFO L290 TraceCheckUtils]: 15: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,376 INFO L290 TraceCheckUtils]: 16: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,376 INFO L290 TraceCheckUtils]: 17: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,376 INFO L290 TraceCheckUtils]: 18: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-27 22:05:18,377 INFO L290 TraceCheckUtils]: 19: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-27 22:05:18,377 INFO L290 TraceCheckUtils]: 20: Hoare triple {4334#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,377 INFO L272 TraceCheckUtils]: 21: Hoare triple {4334#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4334#false} is VALID [2022-04-27 22:05:18,377 INFO L290 TraceCheckUtils]: 22: Hoare triple {4334#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4334#false} is VALID [2022-04-27 22:05:18,377 INFO L290 TraceCheckUtils]: 23: Hoare triple {4334#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,377 INFO L290 TraceCheckUtils]: 24: Hoare triple {4334#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,377 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-27 22:05:18,377 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:18,377 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [208119416] [2022-04-27 22:05:18,377 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [208119416] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:18,377 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [272805026] [2022-04-27 22:05:18,377 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:05:18,378 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:18,378 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:18,379 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:18,415 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-27 22:05:18,417 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:05:18,417 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:18,418 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-27 22:05:18,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:18,428 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:18,629 INFO L272 TraceCheckUtils]: 0: Hoare triple {4333#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,629 INFO L290 TraceCheckUtils]: 1: Hoare triple {4333#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4333#true} is VALID [2022-04-27 22:05:18,629 INFO L290 TraceCheckUtils]: 2: Hoare triple {4333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,629 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4333#true} {4333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,629 INFO L272 TraceCheckUtils]: 4: Hoare triple {4333#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,629 INFO L290 TraceCheckUtils]: 5: Hoare triple {4333#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4333#true} is VALID [2022-04-27 22:05:18,630 INFO L290 TraceCheckUtils]: 6: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4333#true} is VALID [2022-04-27 22:05:18,630 INFO L290 TraceCheckUtils]: 7: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:18,631 INFO L290 TraceCheckUtils]: 8: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:18,631 INFO L290 TraceCheckUtils]: 9: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:18,632 INFO L290 TraceCheckUtils]: 10: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,632 INFO L290 TraceCheckUtils]: 11: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,633 INFO L290 TraceCheckUtils]: 12: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,633 INFO L290 TraceCheckUtils]: 13: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,633 INFO L290 TraceCheckUtils]: 14: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,633 INFO L290 TraceCheckUtils]: 15: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,634 INFO L290 TraceCheckUtils]: 16: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,635 INFO L290 TraceCheckUtils]: 17: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,635 INFO L290 TraceCheckUtils]: 18: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-27 22:05:18,635 INFO L290 TraceCheckUtils]: 19: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-27 22:05:18,635 INFO L290 TraceCheckUtils]: 20: Hoare triple {4334#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,635 INFO L272 TraceCheckUtils]: 21: Hoare triple {4334#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4334#false} is VALID [2022-04-27 22:05:18,635 INFO L290 TraceCheckUtils]: 22: Hoare triple {4334#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4334#false} is VALID [2022-04-27 22:05:18,635 INFO L290 TraceCheckUtils]: 23: Hoare triple {4334#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,635 INFO L290 TraceCheckUtils]: 24: Hoare triple {4334#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,635 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-27 22:05:18,635 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:18,717 INFO L290 TraceCheckUtils]: 24: Hoare triple {4334#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,718 INFO L290 TraceCheckUtils]: 23: Hoare triple {4334#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,718 INFO L290 TraceCheckUtils]: 22: Hoare triple {4334#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4334#false} is VALID [2022-04-27 22:05:18,718 INFO L272 TraceCheckUtils]: 21: Hoare triple {4334#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4334#false} is VALID [2022-04-27 22:05:18,718 INFO L290 TraceCheckUtils]: 20: Hoare triple {4334#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,718 INFO L290 TraceCheckUtils]: 19: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-27 22:05:18,718 INFO L290 TraceCheckUtils]: 18: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-27 22:05:18,719 INFO L290 TraceCheckUtils]: 17: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-27 22:05:18,719 INFO L290 TraceCheckUtils]: 16: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,720 INFO L290 TraceCheckUtils]: 15: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,720 INFO L290 TraceCheckUtils]: 14: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,720 INFO L290 TraceCheckUtils]: 13: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,721 INFO L290 TraceCheckUtils]: 12: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,721 INFO L290 TraceCheckUtils]: 11: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,722 INFO L290 TraceCheckUtils]: 10: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:18,722 INFO L290 TraceCheckUtils]: 9: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:18,723 INFO L290 TraceCheckUtils]: 8: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:18,723 INFO L290 TraceCheckUtils]: 7: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:18,723 INFO L290 TraceCheckUtils]: 6: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4333#true} is VALID [2022-04-27 22:05:18,723 INFO L290 TraceCheckUtils]: 5: Hoare triple {4333#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4333#true} is VALID [2022-04-27 22:05:18,723 INFO L272 TraceCheckUtils]: 4: Hoare triple {4333#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,724 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4333#true} {4333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,724 INFO L290 TraceCheckUtils]: 2: Hoare triple {4333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,724 INFO L290 TraceCheckUtils]: 1: Hoare triple {4333#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4333#true} is VALID [2022-04-27 22:05:18,724 INFO L272 TraceCheckUtils]: 0: Hoare triple {4333#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-27 22:05:18,724 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-27 22:05:18,724 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [272805026] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:18,724 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:18,724 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 6 [2022-04-27 22:05:18,724 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1466708314] [2022-04-27 22:05:18,724 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:18,725 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:05:18,725 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:18,725 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:18,754 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:18,754 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 22:05:18,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:18,754 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 22:05:18,754 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-27 22:05:18,755 INFO L87 Difference]: Start difference. First operand 73 states and 100 transitions. Second operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:18,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:18,964 INFO L93 Difference]: Finished difference Result 88 states and 118 transitions. [2022-04-27 22:05:18,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 22:05:18,964 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:05:18,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:18,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:18,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 39 transitions. [2022-04-27 22:05:18,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:18,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 39 transitions. [2022-04-27 22:05:18,966 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 39 transitions. [2022-04-27 22:05:18,996 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:18,997 INFO L225 Difference]: With dead ends: 88 [2022-04-27 22:05:18,997 INFO L226 Difference]: Without dead ends: 75 [2022-04-27 22:05:18,997 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 51 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-04-27 22:05:18,998 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 23 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:18,998 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 35 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:05:18,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-04-27 22:05:19,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2022-04-27 22:05:19,073 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:19,074 INFO L82 GeneralOperation]: Start isEquivalent. First operand 75 states. Second operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:19,074 INFO L74 IsIncluded]: Start isIncluded. First operand 75 states. Second operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:19,074 INFO L87 Difference]: Start difference. First operand 75 states. Second operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:19,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:19,075 INFO L93 Difference]: Finished difference Result 75 states and 101 transitions. [2022-04-27 22:05:19,075 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 101 transitions. [2022-04-27 22:05:19,075 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:19,075 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:19,075 INFO L74 IsIncluded]: Start isIncluded. First operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 75 states. [2022-04-27 22:05:19,076 INFO L87 Difference]: Start difference. First operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 75 states. [2022-04-27 22:05:19,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:19,077 INFO L93 Difference]: Finished difference Result 75 states and 101 transitions. [2022-04-27 22:05:19,077 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 101 transitions. [2022-04-27 22:05:19,077 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:19,077 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:19,077 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:19,077 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:19,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:19,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 101 transitions. [2022-04-27 22:05:19,078 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 101 transitions. Word has length 25 [2022-04-27 22:05:19,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:19,078 INFO L495 AbstractCegarLoop]: Abstraction has 75 states and 101 transitions. [2022-04-27 22:05:19,078 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:19,078 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 101 transitions. [2022-04-27 22:05:19,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 22:05:19,078 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:19,079 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:19,095 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2022-04-27 22:05:19,291 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-27 22:05:19,291 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:19,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:19,292 INFO L85 PathProgramCache]: Analyzing trace with hash 504396842, now seen corresponding path program 3 times [2022-04-27 22:05:19,292 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:19,292 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469436688] [2022-04-27 22:05:19,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:19,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:19,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:19,413 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:19,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:19,417 INFO L290 TraceCheckUtils]: 0: Hoare triple {4879#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4865#true} is VALID [2022-04-27 22:05:19,417 INFO L290 TraceCheckUtils]: 1: Hoare triple {4865#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,417 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4865#true} {4865#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,417 INFO L272 TraceCheckUtils]: 0: Hoare triple {4865#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4879#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:19,417 INFO L290 TraceCheckUtils]: 1: Hoare triple {4879#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4865#true} is VALID [2022-04-27 22:05:19,417 INFO L290 TraceCheckUtils]: 2: Hoare triple {4865#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4865#true} {4865#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,418 INFO L272 TraceCheckUtils]: 4: Hoare triple {4865#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,418 INFO L290 TraceCheckUtils]: 5: Hoare triple {4865#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4870#(= main_~y~0 0)} is VALID [2022-04-27 22:05:19,418 INFO L290 TraceCheckUtils]: 6: Hoare triple {4870#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4871#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:19,419 INFO L290 TraceCheckUtils]: 7: Hoare triple {4871#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4872#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:19,419 INFO L290 TraceCheckUtils]: 8: Hoare triple {4872#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4873#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:19,420 INFO L290 TraceCheckUtils]: 9: Hoare triple {4873#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:19,420 INFO L290 TraceCheckUtils]: 10: Hoare triple {4874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:19,421 INFO L290 TraceCheckUtils]: 11: Hoare triple {4874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4875#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:19,421 INFO L290 TraceCheckUtils]: 12: Hoare triple {4875#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4876#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:05:19,422 INFO L290 TraceCheckUtils]: 13: Hoare triple {4876#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4877#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:19,422 INFO L290 TraceCheckUtils]: 14: Hoare triple {4877#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4878#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:19,423 INFO L290 TraceCheckUtils]: 15: Hoare triple {4878#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,423 INFO L290 TraceCheckUtils]: 16: Hoare triple {4866#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4866#false} is VALID [2022-04-27 22:05:19,423 INFO L290 TraceCheckUtils]: 17: Hoare triple {4866#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,423 INFO L290 TraceCheckUtils]: 18: Hoare triple {4866#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,423 INFO L290 TraceCheckUtils]: 19: Hoare triple {4866#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4866#false} is VALID [2022-04-27 22:05:19,423 INFO L290 TraceCheckUtils]: 20: Hoare triple {4866#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,423 INFO L272 TraceCheckUtils]: 21: Hoare triple {4866#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4866#false} is VALID [2022-04-27 22:05:19,423 INFO L290 TraceCheckUtils]: 22: Hoare triple {4866#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4866#false} is VALID [2022-04-27 22:05:19,423 INFO L290 TraceCheckUtils]: 23: Hoare triple {4866#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,444 INFO L290 TraceCheckUtils]: 24: Hoare triple {4866#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,445 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:19,445 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:19,445 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469436688] [2022-04-27 22:05:19,445 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [469436688] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:19,445 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [289741652] [2022-04-27 22:05:19,445 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:05:19,445 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:19,445 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:19,446 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:19,447 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-27 22:05:19,493 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 22:05:19,494 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:19,494 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 22:05:19,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:19,502 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:19,617 INFO L272 TraceCheckUtils]: 0: Hoare triple {4865#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,617 INFO L290 TraceCheckUtils]: 1: Hoare triple {4865#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4865#true} is VALID [2022-04-27 22:05:19,617 INFO L290 TraceCheckUtils]: 2: Hoare triple {4865#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,617 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4865#true} {4865#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,617 INFO L272 TraceCheckUtils]: 4: Hoare triple {4865#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,617 INFO L290 TraceCheckUtils]: 5: Hoare triple {4865#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4865#true} is VALID [2022-04-27 22:05:19,617 INFO L290 TraceCheckUtils]: 6: Hoare triple {4865#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4865#true} is VALID [2022-04-27 22:05:19,618 INFO L290 TraceCheckUtils]: 7: Hoare triple {4865#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:19,618 INFO L290 TraceCheckUtils]: 8: Hoare triple {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:19,619 INFO L290 TraceCheckUtils]: 9: Hoare triple {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:19,619 INFO L290 TraceCheckUtils]: 10: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:19,620 INFO L290 TraceCheckUtils]: 11: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:19,620 INFO L290 TraceCheckUtils]: 12: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:19,621 INFO L290 TraceCheckUtils]: 13: Hoare triple {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:19,621 INFO L290 TraceCheckUtils]: 14: Hoare triple {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:19,622 INFO L290 TraceCheckUtils]: 15: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:19,622 INFO L290 TraceCheckUtils]: 16: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:19,622 INFO L290 TraceCheckUtils]: 17: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:19,622 INFO L290 TraceCheckUtils]: 18: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,623 INFO L290 TraceCheckUtils]: 19: Hoare triple {4866#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4866#false} is VALID [2022-04-27 22:05:19,623 INFO L290 TraceCheckUtils]: 20: Hoare triple {4866#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,623 INFO L272 TraceCheckUtils]: 21: Hoare triple {4866#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4866#false} is VALID [2022-04-27 22:05:19,623 INFO L290 TraceCheckUtils]: 22: Hoare triple {4866#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4866#false} is VALID [2022-04-27 22:05:19,623 INFO L290 TraceCheckUtils]: 23: Hoare triple {4866#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,623 INFO L290 TraceCheckUtils]: 24: Hoare triple {4866#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,623 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:19,623 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:19,693 INFO L290 TraceCheckUtils]: 24: Hoare triple {4866#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,693 INFO L290 TraceCheckUtils]: 23: Hoare triple {4866#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,693 INFO L290 TraceCheckUtils]: 22: Hoare triple {4866#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4866#false} is VALID [2022-04-27 22:05:19,693 INFO L272 TraceCheckUtils]: 21: Hoare triple {4866#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4866#false} is VALID [2022-04-27 22:05:19,693 INFO L290 TraceCheckUtils]: 20: Hoare triple {4866#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,693 INFO L290 TraceCheckUtils]: 19: Hoare triple {4866#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4866#false} is VALID [2022-04-27 22:05:19,693 INFO L290 TraceCheckUtils]: 18: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-27 22:05:19,704 INFO L290 TraceCheckUtils]: 17: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:19,704 INFO L290 TraceCheckUtils]: 16: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:19,704 INFO L290 TraceCheckUtils]: 15: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:19,705 INFO L290 TraceCheckUtils]: 14: Hoare triple {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:19,706 INFO L290 TraceCheckUtils]: 13: Hoare triple {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:19,707 INFO L290 TraceCheckUtils]: 12: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:19,707 INFO L290 TraceCheckUtils]: 11: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:19,707 INFO L290 TraceCheckUtils]: 10: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:19,708 INFO L290 TraceCheckUtils]: 9: Hoare triple {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:19,709 INFO L290 TraceCheckUtils]: 8: Hoare triple {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:19,709 INFO L290 TraceCheckUtils]: 7: Hoare triple {4865#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:19,709 INFO L290 TraceCheckUtils]: 6: Hoare triple {4865#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4865#true} is VALID [2022-04-27 22:05:19,709 INFO L290 TraceCheckUtils]: 5: Hoare triple {4865#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4865#true} is VALID [2022-04-27 22:05:19,709 INFO L272 TraceCheckUtils]: 4: Hoare triple {4865#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,710 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4865#true} {4865#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,710 INFO L290 TraceCheckUtils]: 2: Hoare triple {4865#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,710 INFO L290 TraceCheckUtils]: 1: Hoare triple {4865#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4865#true} is VALID [2022-04-27 22:05:19,710 INFO L272 TraceCheckUtils]: 0: Hoare triple {4865#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-27 22:05:19,710 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:19,710 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [289741652] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:19,710 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:19,710 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 6, 6] total 16 [2022-04-27 22:05:19,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1647164614] [2022-04-27 22:05:19,710 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:19,711 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:05:19,711 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:19,711 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:19,737 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:19,737 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 22:05:19,737 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:19,738 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 22:05:19,738 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2022-04-27 22:05:19,738 INFO L87 Difference]: Start difference. First operand 75 states and 101 transitions. Second operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:22,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:22,104 INFO L93 Difference]: Finished difference Result 155 states and 224 transitions. [2022-04-27 22:05:22,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-27 22:05:22,104 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:05:22,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:22,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:22,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 125 transitions. [2022-04-27 22:05:22,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:22,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 125 transitions. [2022-04-27 22:05:22,107 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 125 transitions. [2022-04-27 22:05:22,262 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 125 edges. 125 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:22,264 INFO L225 Difference]: With dead ends: 155 [2022-04-27 22:05:22,264 INFO L226 Difference]: Without dead ends: 126 [2022-04-27 22:05:22,265 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 604 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=363, Invalid=2187, Unknown=0, NotChecked=0, Total=2550 [2022-04-27 22:05:22,265 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 109 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 600 mSolverCounterSat, 132 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 732 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 132 IncrementalHoareTripleChecker+Valid, 600 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:22,265 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [109 Valid, 90 Invalid, 732 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [132 Valid, 600 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-27 22:05:22,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2022-04-27 22:05:22,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 98. [2022-04-27 22:05:22,364 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:22,364 INFO L82 GeneralOperation]: Start isEquivalent. First operand 126 states. Second operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:22,364 INFO L74 IsIncluded]: Start isIncluded. First operand 126 states. Second operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:22,364 INFO L87 Difference]: Start difference. First operand 126 states. Second operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:22,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:22,366 INFO L93 Difference]: Finished difference Result 126 states and 173 transitions. [2022-04-27 22:05:22,366 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 173 transitions. [2022-04-27 22:05:22,367 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:22,367 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:22,367 INFO L74 IsIncluded]: Start isIncluded. First operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 126 states. [2022-04-27 22:05:22,367 INFO L87 Difference]: Start difference. First operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 126 states. [2022-04-27 22:05:22,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:22,369 INFO L93 Difference]: Finished difference Result 126 states and 173 transitions. [2022-04-27 22:05:22,369 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 173 transitions. [2022-04-27 22:05:22,369 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:22,369 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:22,369 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:22,369 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:22,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:22,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 129 transitions. [2022-04-27 22:05:22,371 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 129 transitions. Word has length 25 [2022-04-27 22:05:22,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:22,371 INFO L495 AbstractCegarLoop]: Abstraction has 98 states and 129 transitions. [2022-04-27 22:05:22,371 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:22,371 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 129 transitions. [2022-04-27 22:05:22,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 22:05:22,371 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:22,371 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:22,389 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-04-27 22:05:22,587 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-27 22:05:22,588 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:22,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:22,588 INFO L85 PathProgramCache]: Analyzing trace with hash 681498865, now seen corresponding path program 3 times [2022-04-27 22:05:22,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:22,588 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709163556] [2022-04-27 22:05:22,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:22,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:22,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:22,705 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:22,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:22,710 INFO L290 TraceCheckUtils]: 0: Hoare triple {5697#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5683#true} is VALID [2022-04-27 22:05:22,710 INFO L290 TraceCheckUtils]: 1: Hoare triple {5683#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,710 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5683#true} {5683#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,711 INFO L272 TraceCheckUtils]: 0: Hoare triple {5683#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5697#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:22,711 INFO L290 TraceCheckUtils]: 1: Hoare triple {5697#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5683#true} is VALID [2022-04-27 22:05:22,711 INFO L290 TraceCheckUtils]: 2: Hoare triple {5683#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,711 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5683#true} {5683#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,711 INFO L272 TraceCheckUtils]: 4: Hoare triple {5683#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,711 INFO L290 TraceCheckUtils]: 5: Hoare triple {5683#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5688#(= main_~y~0 0)} is VALID [2022-04-27 22:05:22,712 INFO L290 TraceCheckUtils]: 6: Hoare triple {5688#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5689#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:22,713 INFO L290 TraceCheckUtils]: 7: Hoare triple {5689#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5690#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:22,713 INFO L290 TraceCheckUtils]: 8: Hoare triple {5690#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5691#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:22,713 INFO L290 TraceCheckUtils]: 9: Hoare triple {5691#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5691#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:22,714 INFO L290 TraceCheckUtils]: 10: Hoare triple {5691#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5692#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:05:22,714 INFO L290 TraceCheckUtils]: 11: Hoare triple {5692#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5693#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:22,715 INFO L290 TraceCheckUtils]: 12: Hoare triple {5693#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5694#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:22,715 INFO L290 TraceCheckUtils]: 13: Hoare triple {5694#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5695#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:22,715 INFO L290 TraceCheckUtils]: 14: Hoare triple {5695#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5695#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:22,716 INFO L290 TraceCheckUtils]: 15: Hoare triple {5695#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5694#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:22,719 INFO L290 TraceCheckUtils]: 16: Hoare triple {5694#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5693#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:22,719 INFO L290 TraceCheckUtils]: 17: Hoare triple {5693#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:22,720 INFO L290 TraceCheckUtils]: 18: Hoare triple {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:22,720 INFO L290 TraceCheckUtils]: 19: Hoare triple {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:22,720 INFO L290 TraceCheckUtils]: 20: Hoare triple {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:22,721 INFO L290 TraceCheckUtils]: 21: Hoare triple {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,721 INFO L272 TraceCheckUtils]: 22: Hoare triple {5684#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {5684#false} is VALID [2022-04-27 22:05:22,721 INFO L290 TraceCheckUtils]: 23: Hoare triple {5684#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5684#false} is VALID [2022-04-27 22:05:22,721 INFO L290 TraceCheckUtils]: 24: Hoare triple {5684#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,721 INFO L290 TraceCheckUtils]: 25: Hoare triple {5684#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,721 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:05:22,721 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:22,722 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709163556] [2022-04-27 22:05:22,722 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1709163556] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:22,722 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1776340826] [2022-04-27 22:05:22,722 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:05:22,722 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:22,722 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:22,723 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:22,723 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-27 22:05:22,760 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 22:05:22,760 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:22,761 INFO L263 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 22:05:22,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:22,767 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:22,873 INFO L272 TraceCheckUtils]: 0: Hoare triple {5683#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,873 INFO L290 TraceCheckUtils]: 1: Hoare triple {5683#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5683#true} is VALID [2022-04-27 22:05:22,874 INFO L290 TraceCheckUtils]: 2: Hoare triple {5683#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,874 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5683#true} {5683#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,874 INFO L272 TraceCheckUtils]: 4: Hoare triple {5683#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,874 INFO L290 TraceCheckUtils]: 5: Hoare triple {5683#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5683#true} is VALID [2022-04-27 22:05:22,874 INFO L290 TraceCheckUtils]: 6: Hoare triple {5683#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5683#true} is VALID [2022-04-27 22:05:22,874 INFO L290 TraceCheckUtils]: 7: Hoare triple {5683#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:22,875 INFO L290 TraceCheckUtils]: 8: Hoare triple {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:22,875 INFO L290 TraceCheckUtils]: 9: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:22,876 INFO L290 TraceCheckUtils]: 10: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:22,876 INFO L290 TraceCheckUtils]: 11: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:22,877 INFO L290 TraceCheckUtils]: 12: Hoare triple {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5739#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:22,878 INFO L290 TraceCheckUtils]: 13: Hoare triple {5739#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,878 INFO L290 TraceCheckUtils]: 14: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,878 INFO L290 TraceCheckUtils]: 15: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,879 INFO L290 TraceCheckUtils]: 16: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,879 INFO L290 TraceCheckUtils]: 17: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,879 INFO L290 TraceCheckUtils]: 18: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,881 INFO L290 TraceCheckUtils]: 19: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5739#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:22,882 INFO L290 TraceCheckUtils]: 20: Hoare triple {5739#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,882 INFO L290 TraceCheckUtils]: 21: Hoare triple {5684#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,882 INFO L272 TraceCheckUtils]: 22: Hoare triple {5684#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {5684#false} is VALID [2022-04-27 22:05:22,882 INFO L290 TraceCheckUtils]: 23: Hoare triple {5684#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5684#false} is VALID [2022-04-27 22:05:22,882 INFO L290 TraceCheckUtils]: 24: Hoare triple {5684#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,882 INFO L290 TraceCheckUtils]: 25: Hoare triple {5684#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,882 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-27 22:05:22,882 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:22,959 INFO L290 TraceCheckUtils]: 25: Hoare triple {5684#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,959 INFO L290 TraceCheckUtils]: 24: Hoare triple {5684#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,959 INFO L290 TraceCheckUtils]: 23: Hoare triple {5684#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5684#false} is VALID [2022-04-27 22:05:22,959 INFO L272 TraceCheckUtils]: 22: Hoare triple {5684#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {5684#false} is VALID [2022-04-27 22:05:22,959 INFO L290 TraceCheckUtils]: 21: Hoare triple {5684#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,960 INFO L290 TraceCheckUtils]: 20: Hoare triple {5739#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-27 22:05:22,961 INFO L290 TraceCheckUtils]: 19: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5739#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:22,961 INFO L290 TraceCheckUtils]: 18: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,962 INFO L290 TraceCheckUtils]: 17: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,962 INFO L290 TraceCheckUtils]: 16: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,962 INFO L290 TraceCheckUtils]: 15: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,963 INFO L290 TraceCheckUtils]: 14: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,963 INFO L290 TraceCheckUtils]: 13: Hoare triple {5739#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:22,964 INFO L290 TraceCheckUtils]: 12: Hoare triple {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5739#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:22,964 INFO L290 TraceCheckUtils]: 11: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:22,965 INFO L290 TraceCheckUtils]: 10: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:22,965 INFO L290 TraceCheckUtils]: 9: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:22,966 INFO L290 TraceCheckUtils]: 8: Hoare triple {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:22,966 INFO L290 TraceCheckUtils]: 7: Hoare triple {5683#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:22,966 INFO L290 TraceCheckUtils]: 6: Hoare triple {5683#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5683#true} is VALID [2022-04-27 22:05:22,966 INFO L290 TraceCheckUtils]: 5: Hoare triple {5683#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5683#true} is VALID [2022-04-27 22:05:22,966 INFO L272 TraceCheckUtils]: 4: Hoare triple {5683#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,967 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5683#true} {5683#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,967 INFO L290 TraceCheckUtils]: 2: Hoare triple {5683#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,967 INFO L290 TraceCheckUtils]: 1: Hoare triple {5683#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5683#true} is VALID [2022-04-27 22:05:22,967 INFO L272 TraceCheckUtils]: 0: Hoare triple {5683#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-27 22:05:22,967 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-27 22:05:22,967 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1776340826] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:22,967 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:22,967 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 6, 6] total 16 [2022-04-27 22:05:22,967 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387575770] [2022-04-27 22:05:22,967 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:22,968 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 22:05:22,968 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:22,968 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:22,994 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:22,994 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 22:05:22,994 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:22,995 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 22:05:22,995 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=210, Unknown=0, NotChecked=0, Total=240 [2022-04-27 22:05:22,995 INFO L87 Difference]: Start difference. First operand 98 states and 129 transitions. Second operand has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:24,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:24,998 INFO L93 Difference]: Finished difference Result 133 states and 183 transitions. [2022-04-27 22:05:24,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2022-04-27 22:05:24,999 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 22:05:24,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:24,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 115 transitions. [2022-04-27 22:05:25,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 115 transitions. [2022-04-27 22:05:25,001 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 47 states and 115 transitions. [2022-04-27 22:05:25,142 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 115 edges. 115 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:25,143 INFO L225 Difference]: With dead ends: 133 [2022-04-27 22:05:25,143 INFO L226 Difference]: Without dead ends: 106 [2022-04-27 22:05:25,144 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 912 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=489, Invalid=3051, Unknown=0, NotChecked=0, Total=3540 [2022-04-27 22:05:25,144 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 79 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 460 mSolverCounterSat, 123 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 72 SdHoareTripleChecker+Invalid, 583 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 123 IncrementalHoareTripleChecker+Valid, 460 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:25,145 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 72 Invalid, 583 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [123 Valid, 460 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-27 22:05:25,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-04-27 22:05:25,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 87. [2022-04-27 22:05:25,239 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:25,239 INFO L82 GeneralOperation]: Start isEquivalent. First operand 106 states. Second operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,239 INFO L74 IsIncluded]: Start isIncluded. First operand 106 states. Second operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,240 INFO L87 Difference]: Start difference. First operand 106 states. Second operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:25,241 INFO L93 Difference]: Finished difference Result 106 states and 133 transitions. [2022-04-27 22:05:25,241 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 133 transitions. [2022-04-27 22:05:25,241 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:25,241 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:25,242 INFO L74 IsIncluded]: Start isIncluded. First operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 106 states. [2022-04-27 22:05:25,242 INFO L87 Difference]: Start difference. First operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 106 states. [2022-04-27 22:05:25,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:25,243 INFO L93 Difference]: Finished difference Result 106 states and 133 transitions. [2022-04-27 22:05:25,243 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 133 transitions. [2022-04-27 22:05:25,243 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:25,243 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:25,243 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:25,243 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:25,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 111 transitions. [2022-04-27 22:05:25,245 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 111 transitions. Word has length 26 [2022-04-27 22:05:25,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:25,245 INFO L495 AbstractCegarLoop]: Abstraction has 87 states and 111 transitions. [2022-04-27 22:05:25,245 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,245 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 111 transitions. [2022-04-27 22:05:25,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 22:05:25,245 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:25,245 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:25,265 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:25,459 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-27 22:05:25,459 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:25,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:25,460 INFO L85 PathProgramCache]: Analyzing trace with hash -256423350, now seen corresponding path program 5 times [2022-04-27 22:05:25,460 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:25,460 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75618253] [2022-04-27 22:05:25,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:25,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:25,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:25,521 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:25,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:25,524 INFO L290 TraceCheckUtils]: 0: Hoare triple {6450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6442#true} is VALID [2022-04-27 22:05:25,524 INFO L290 TraceCheckUtils]: 1: Hoare triple {6442#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,524 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6442#true} {6442#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,524 INFO L272 TraceCheckUtils]: 0: Hoare triple {6442#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:25,524 INFO L290 TraceCheckUtils]: 1: Hoare triple {6450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6442#true} is VALID [2022-04-27 22:05:25,524 INFO L290 TraceCheckUtils]: 2: Hoare triple {6442#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,525 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6442#true} {6442#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,525 INFO L272 TraceCheckUtils]: 4: Hoare triple {6442#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,525 INFO L290 TraceCheckUtils]: 5: Hoare triple {6442#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6442#true} is VALID [2022-04-27 22:05:25,525 INFO L290 TraceCheckUtils]: 6: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-27 22:05:25,525 INFO L290 TraceCheckUtils]: 7: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-27 22:05:25,525 INFO L290 TraceCheckUtils]: 8: Hoare triple {6442#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:25,526 INFO L290 TraceCheckUtils]: 9: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:25,526 INFO L290 TraceCheckUtils]: 10: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:25,527 INFO L290 TraceCheckUtils]: 11: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,527 INFO L290 TraceCheckUtils]: 12: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,527 INFO L290 TraceCheckUtils]: 13: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,528 INFO L290 TraceCheckUtils]: 14: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,528 INFO L290 TraceCheckUtils]: 15: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,529 INFO L290 TraceCheckUtils]: 16: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:25,529 INFO L290 TraceCheckUtils]: 17: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:25,530 INFO L290 TraceCheckUtils]: 18: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6443#false} is VALID [2022-04-27 22:05:25,530 INFO L290 TraceCheckUtils]: 19: Hoare triple {6443#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,530 INFO L290 TraceCheckUtils]: 20: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-27 22:05:25,530 INFO L290 TraceCheckUtils]: 21: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-27 22:05:25,530 INFO L290 TraceCheckUtils]: 22: Hoare triple {6443#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,530 INFO L272 TraceCheckUtils]: 23: Hoare triple {6443#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {6443#false} is VALID [2022-04-27 22:05:25,530 INFO L290 TraceCheckUtils]: 24: Hoare triple {6443#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6443#false} is VALID [2022-04-27 22:05:25,530 INFO L290 TraceCheckUtils]: 25: Hoare triple {6443#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,530 INFO L290 TraceCheckUtils]: 26: Hoare triple {6443#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,531 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:05:25,531 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:25,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75618253] [2022-04-27 22:05:25,531 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [75618253] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:25,531 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1865438632] [2022-04-27 22:05:25,531 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:05:25,531 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:25,531 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:25,532 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:25,533 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-27 22:05:25,573 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-27 22:05:25,573 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:25,574 INFO L263 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-27 22:05:25,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:25,580 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:25,791 INFO L272 TraceCheckUtils]: 0: Hoare triple {6442#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,792 INFO L290 TraceCheckUtils]: 1: Hoare triple {6442#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6442#true} is VALID [2022-04-27 22:05:25,792 INFO L290 TraceCheckUtils]: 2: Hoare triple {6442#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,792 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6442#true} {6442#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,792 INFO L272 TraceCheckUtils]: 4: Hoare triple {6442#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,792 INFO L290 TraceCheckUtils]: 5: Hoare triple {6442#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6442#true} is VALID [2022-04-27 22:05:25,792 INFO L290 TraceCheckUtils]: 6: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-27 22:05:25,792 INFO L290 TraceCheckUtils]: 7: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-27 22:05:25,792 INFO L290 TraceCheckUtils]: 8: Hoare triple {6442#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:25,793 INFO L290 TraceCheckUtils]: 9: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:25,793 INFO L290 TraceCheckUtils]: 10: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:25,794 INFO L290 TraceCheckUtils]: 11: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,794 INFO L290 TraceCheckUtils]: 12: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,795 INFO L290 TraceCheckUtils]: 13: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,795 INFO L290 TraceCheckUtils]: 14: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,796 INFO L290 TraceCheckUtils]: 15: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,797 INFO L290 TraceCheckUtils]: 16: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:25,798 INFO L290 TraceCheckUtils]: 17: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:25,798 INFO L290 TraceCheckUtils]: 18: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6443#false} is VALID [2022-04-27 22:05:25,798 INFO L290 TraceCheckUtils]: 19: Hoare triple {6443#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,799 INFO L290 TraceCheckUtils]: 20: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-27 22:05:25,799 INFO L290 TraceCheckUtils]: 21: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-27 22:05:25,799 INFO L290 TraceCheckUtils]: 22: Hoare triple {6443#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,799 INFO L272 TraceCheckUtils]: 23: Hoare triple {6443#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {6443#false} is VALID [2022-04-27 22:05:25,799 INFO L290 TraceCheckUtils]: 24: Hoare triple {6443#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6443#false} is VALID [2022-04-27 22:05:25,799 INFO L290 TraceCheckUtils]: 25: Hoare triple {6443#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,799 INFO L290 TraceCheckUtils]: 26: Hoare triple {6443#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,799 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:05:25,799 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:25,881 INFO L290 TraceCheckUtils]: 26: Hoare triple {6443#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,882 INFO L290 TraceCheckUtils]: 25: Hoare triple {6443#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,882 INFO L290 TraceCheckUtils]: 24: Hoare triple {6443#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6443#false} is VALID [2022-04-27 22:05:25,882 INFO L272 TraceCheckUtils]: 23: Hoare triple {6443#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {6443#false} is VALID [2022-04-27 22:05:25,882 INFO L290 TraceCheckUtils]: 22: Hoare triple {6443#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,882 INFO L290 TraceCheckUtils]: 21: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-27 22:05:25,882 INFO L290 TraceCheckUtils]: 20: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-27 22:05:25,882 INFO L290 TraceCheckUtils]: 19: Hoare triple {6443#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-27 22:05:25,883 INFO L290 TraceCheckUtils]: 18: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6443#false} is VALID [2022-04-27 22:05:25,883 INFO L290 TraceCheckUtils]: 17: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:25,884 INFO L290 TraceCheckUtils]: 16: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:25,884 INFO L290 TraceCheckUtils]: 15: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,885 INFO L290 TraceCheckUtils]: 14: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,885 INFO L290 TraceCheckUtils]: 13: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,885 INFO L290 TraceCheckUtils]: 12: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,886 INFO L290 TraceCheckUtils]: 11: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:25,886 INFO L290 TraceCheckUtils]: 10: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:25,887 INFO L290 TraceCheckUtils]: 9: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:25,887 INFO L290 TraceCheckUtils]: 8: Hoare triple {6442#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:25,887 INFO L290 TraceCheckUtils]: 7: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-27 22:05:25,887 INFO L290 TraceCheckUtils]: 6: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-27 22:05:25,887 INFO L290 TraceCheckUtils]: 5: Hoare triple {6442#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6442#true} is VALID [2022-04-27 22:05:25,887 INFO L272 TraceCheckUtils]: 4: Hoare triple {6442#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,887 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6442#true} {6442#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,888 INFO L290 TraceCheckUtils]: 2: Hoare triple {6442#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,888 INFO L290 TraceCheckUtils]: 1: Hoare triple {6442#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6442#true} is VALID [2022-04-27 22:05:25,888 INFO L272 TraceCheckUtils]: 0: Hoare triple {6442#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-27 22:05:25,888 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:05:25,888 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1865438632] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:25,888 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:25,888 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 6 [2022-04-27 22:05:25,888 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002908469] [2022-04-27 22:05:25,888 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:25,889 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:05:25,889 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:25,889 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,908 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:25,909 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 22:05:25,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:25,909 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 22:05:25,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-27 22:05:25,909 INFO L87 Difference]: Start difference. First operand 87 states and 111 transitions. Second operand has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:26,145 INFO L93 Difference]: Finished difference Result 110 states and 141 transitions. [2022-04-27 22:05:26,145 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-27 22:05:26,145 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:05:26,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:26,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 39 transitions. [2022-04-27 22:05:26,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 39 transitions. [2022-04-27 22:05:26,147 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 39 transitions. [2022-04-27 22:05:26,178 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:26,179 INFO L225 Difference]: With dead ends: 110 [2022-04-27 22:05:26,179 INFO L226 Difference]: Without dead ends: 85 [2022-04-27 22:05:26,179 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 56 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:05:26,179 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 22 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:26,180 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 35 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:05:26,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-27 22:05:26,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85. [2022-04-27 22:05:26,265 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:26,265 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,265 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,265 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:26,267 INFO L93 Difference]: Finished difference Result 85 states and 109 transitions. [2022-04-27 22:05:26,267 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-27 22:05:26,267 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:26,267 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:26,267 INFO L74 IsIncluded]: Start isIncluded. First operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-27 22:05:26,267 INFO L87 Difference]: Start difference. First operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-27 22:05:26,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:26,268 INFO L93 Difference]: Finished difference Result 85 states and 109 transitions. [2022-04-27 22:05:26,268 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-27 22:05:26,268 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:26,268 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:26,269 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:26,269 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:26,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 109 transitions. [2022-04-27 22:05:26,270 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 109 transitions. Word has length 27 [2022-04-27 22:05:26,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:26,270 INFO L495 AbstractCegarLoop]: Abstraction has 85 states and 109 transitions. [2022-04-27 22:05:26,270 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,270 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-27 22:05:26,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 22:05:26,270 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:26,270 INFO L195 NwaCegarLoop]: trace histogram [5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:26,286 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:26,475 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-27 22:05:26,475 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:26,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:26,476 INFO L85 PathProgramCache]: Analyzing trace with hash 399846058, now seen corresponding path program 6 times [2022-04-27 22:05:26,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:26,476 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449895454] [2022-04-27 22:05:26,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:26,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:26,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:26,610 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:26,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:26,613 INFO L290 TraceCheckUtils]: 0: Hoare triple {7054#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7040#true} is VALID [2022-04-27 22:05:26,613 INFO L290 TraceCheckUtils]: 1: Hoare triple {7040#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,613 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7040#true} {7040#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,614 INFO L272 TraceCheckUtils]: 0: Hoare triple {7040#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7054#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:26,614 INFO L290 TraceCheckUtils]: 1: Hoare triple {7054#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7040#true} is VALID [2022-04-27 22:05:26,614 INFO L290 TraceCheckUtils]: 2: Hoare triple {7040#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,614 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7040#true} {7040#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,614 INFO L272 TraceCheckUtils]: 4: Hoare triple {7040#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,614 INFO L290 TraceCheckUtils]: 5: Hoare triple {7040#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7045#(= main_~y~0 0)} is VALID [2022-04-27 22:05:26,615 INFO L290 TraceCheckUtils]: 6: Hoare triple {7045#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7046#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:26,615 INFO L290 TraceCheckUtils]: 7: Hoare triple {7046#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7047#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:26,616 INFO L290 TraceCheckUtils]: 8: Hoare triple {7047#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7048#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:26,619 INFO L290 TraceCheckUtils]: 9: Hoare triple {7048#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7049#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:26,620 INFO L290 TraceCheckUtils]: 10: Hoare triple {7049#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7050#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:26,620 INFO L290 TraceCheckUtils]: 11: Hoare triple {7050#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7050#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:26,620 INFO L290 TraceCheckUtils]: 12: Hoare triple {7050#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7051#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:05:26,621 INFO L290 TraceCheckUtils]: 13: Hoare triple {7051#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7052#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:26,627 INFO L290 TraceCheckUtils]: 14: Hoare triple {7052#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7053#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:26,628 INFO L290 TraceCheckUtils]: 15: Hoare triple {7053#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,628 INFO L290 TraceCheckUtils]: 16: Hoare triple {7041#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7041#false} is VALID [2022-04-27 22:05:26,628 INFO L290 TraceCheckUtils]: 17: Hoare triple {7041#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,628 INFO L290 TraceCheckUtils]: 18: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-27 22:05:26,628 INFO L290 TraceCheckUtils]: 19: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-27 22:05:26,628 INFO L290 TraceCheckUtils]: 20: Hoare triple {7041#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,628 INFO L290 TraceCheckUtils]: 21: Hoare triple {7041#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {7041#false} is VALID [2022-04-27 22:05:26,628 INFO L290 TraceCheckUtils]: 22: Hoare triple {7041#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,628 INFO L272 TraceCheckUtils]: 23: Hoare triple {7041#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7041#false} is VALID [2022-04-27 22:05:26,628 INFO L290 TraceCheckUtils]: 24: Hoare triple {7041#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7041#false} is VALID [2022-04-27 22:05:26,628 INFO L290 TraceCheckUtils]: 25: Hoare triple {7041#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,629 INFO L290 TraceCheckUtils]: 26: Hoare triple {7041#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,629 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-04-27 22:05:26,629 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:26,629 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449895454] [2022-04-27 22:05:26,629 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1449895454] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:26,629 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1549934602] [2022-04-27 22:05:26,629 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:05:26,629 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:26,629 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:26,630 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:26,631 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-27 22:05:26,662 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-27 22:05:26,662 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:26,663 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-27 22:05:26,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:26,668 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:26,756 INFO L272 TraceCheckUtils]: 0: Hoare triple {7040#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {7040#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7040#true} is VALID [2022-04-27 22:05:26,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {7040#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7040#true} {7040#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {7040#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {7040#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7040#true} is VALID [2022-04-27 22:05:26,756 INFO L290 TraceCheckUtils]: 6: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-27 22:05:26,757 INFO L290 TraceCheckUtils]: 7: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-27 22:05:26,757 INFO L290 TraceCheckUtils]: 8: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-27 22:05:26,757 INFO L290 TraceCheckUtils]: 9: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-27 22:05:26,757 INFO L290 TraceCheckUtils]: 10: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-27 22:05:26,757 INFO L290 TraceCheckUtils]: 11: Hoare triple {7040#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,757 INFO L290 TraceCheckUtils]: 12: Hoare triple {7040#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7094#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:05:26,757 INFO L290 TraceCheckUtils]: 13: Hoare triple {7094#(= main_~z~0 main_~y~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7098#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-27 22:05:26,758 INFO L290 TraceCheckUtils]: 14: Hoare triple {7098#(= main_~y~0 (+ main_~z~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:26,759 INFO L290 TraceCheckUtils]: 15: Hoare triple {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:26,759 INFO L290 TraceCheckUtils]: 16: Hoare triple {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7109#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:05:26,760 INFO L290 TraceCheckUtils]: 17: Hoare triple {7109#(< 0 (mod main_~y~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,760 INFO L290 TraceCheckUtils]: 18: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-27 22:05:26,760 INFO L290 TraceCheckUtils]: 19: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-27 22:05:26,760 INFO L290 TraceCheckUtils]: 20: Hoare triple {7041#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,760 INFO L290 TraceCheckUtils]: 21: Hoare triple {7041#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {7041#false} is VALID [2022-04-27 22:05:26,760 INFO L290 TraceCheckUtils]: 22: Hoare triple {7041#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,760 INFO L272 TraceCheckUtils]: 23: Hoare triple {7041#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7041#false} is VALID [2022-04-27 22:05:26,760 INFO L290 TraceCheckUtils]: 24: Hoare triple {7041#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7041#false} is VALID [2022-04-27 22:05:26,760 INFO L290 TraceCheckUtils]: 25: Hoare triple {7041#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,760 INFO L290 TraceCheckUtils]: 26: Hoare triple {7041#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,761 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2022-04-27 22:05:26,761 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:26,857 INFO L290 TraceCheckUtils]: 26: Hoare triple {7041#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,857 INFO L290 TraceCheckUtils]: 25: Hoare triple {7041#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,857 INFO L290 TraceCheckUtils]: 24: Hoare triple {7041#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7041#false} is VALID [2022-04-27 22:05:26,857 INFO L272 TraceCheckUtils]: 23: Hoare triple {7041#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7041#false} is VALID [2022-04-27 22:05:26,857 INFO L290 TraceCheckUtils]: 22: Hoare triple {7041#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,857 INFO L290 TraceCheckUtils]: 21: Hoare triple {7041#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {7041#false} is VALID [2022-04-27 22:05:26,857 INFO L290 TraceCheckUtils]: 20: Hoare triple {7041#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,857 INFO L290 TraceCheckUtils]: 19: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-27 22:05:26,857 INFO L290 TraceCheckUtils]: 18: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-27 22:05:26,858 INFO L290 TraceCheckUtils]: 17: Hoare triple {7109#(< 0 (mod main_~y~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-27 22:05:26,859 INFO L290 TraceCheckUtils]: 16: Hoare triple {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7109#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:05:26,859 INFO L290 TraceCheckUtils]: 15: Hoare triple {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:26,860 INFO L290 TraceCheckUtils]: 14: Hoare triple {7176#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:26,860 INFO L290 TraceCheckUtils]: 13: Hoare triple {7180#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7176#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 22:05:26,861 INFO L290 TraceCheckUtils]: 12: Hoare triple {7040#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7180#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:05:26,861 INFO L290 TraceCheckUtils]: 11: Hoare triple {7040#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,861 INFO L290 TraceCheckUtils]: 10: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-27 22:05:26,861 INFO L290 TraceCheckUtils]: 9: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-27 22:05:26,861 INFO L290 TraceCheckUtils]: 8: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-27 22:05:26,861 INFO L290 TraceCheckUtils]: 7: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-27 22:05:26,861 INFO L290 TraceCheckUtils]: 6: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-27 22:05:26,861 INFO L290 TraceCheckUtils]: 5: Hoare triple {7040#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7040#true} is VALID [2022-04-27 22:05:26,861 INFO L272 TraceCheckUtils]: 4: Hoare triple {7040#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,861 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7040#true} {7040#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,862 INFO L290 TraceCheckUtils]: 2: Hoare triple {7040#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,862 INFO L290 TraceCheckUtils]: 1: Hoare triple {7040#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7040#true} is VALID [2022-04-27 22:05:26,862 INFO L272 TraceCheckUtils]: 0: Hoare triple {7040#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-27 22:05:26,862 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2022-04-27 22:05:26,862 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1549934602] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:26,862 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:26,862 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 6, 6] total 18 [2022-04-27 22:05:26,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1521283374] [2022-04-27 22:05:26,862 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:26,863 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:05:26,863 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:26,863 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,885 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:26,885 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-27 22:05:26,885 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:26,886 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-27 22:05:26,886 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2022-04-27 22:05:26,886 INFO L87 Difference]: Start difference. First operand 85 states and 109 transitions. Second operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:28,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:28,486 INFO L93 Difference]: Finished difference Result 185 states and 258 transitions. [2022-04-27 22:05:28,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-27 22:05:28,487 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:05:28,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:28,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:28,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 125 transitions. [2022-04-27 22:05:28,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:28,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 125 transitions. [2022-04-27 22:05:28,489 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 125 transitions. [2022-04-27 22:05:28,589 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 125 edges. 125 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:28,591 INFO L225 Difference]: With dead ends: 185 [2022-04-27 22:05:28,591 INFO L226 Difference]: Without dead ends: 151 [2022-04-27 22:05:28,592 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 309 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=352, Invalid=1370, Unknown=0, NotChecked=0, Total=1722 [2022-04-27 22:05:28,592 INFO L413 NwaCegarLoop]: 37 mSDtfsCounter, 126 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 538 mSolverCounterSat, 157 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 695 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 157 IncrementalHoareTripleChecker+Valid, 538 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:28,592 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [126 Valid, 64 Invalid, 695 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [157 Valid, 538 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-27 22:05:28,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2022-04-27 22:05:28,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 88. [2022-04-27 22:05:28,693 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:28,693 INFO L82 GeneralOperation]: Start isEquivalent. First operand 151 states. Second operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:28,693 INFO L74 IsIncluded]: Start isIncluded. First operand 151 states. Second operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:28,693 INFO L87 Difference]: Start difference. First operand 151 states. Second operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:28,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:28,707 INFO L93 Difference]: Finished difference Result 151 states and 197 transitions. [2022-04-27 22:05:28,708 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 197 transitions. [2022-04-27 22:05:28,708 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:28,708 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:28,708 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 151 states. [2022-04-27 22:05:28,708 INFO L87 Difference]: Start difference. First operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 151 states. [2022-04-27 22:05:28,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:28,713 INFO L93 Difference]: Finished difference Result 151 states and 197 transitions. [2022-04-27 22:05:28,713 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 197 transitions. [2022-04-27 22:05:28,713 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:28,713 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:28,713 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:28,713 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:28,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:28,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 109 transitions. [2022-04-27 22:05:28,714 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 109 transitions. Word has length 27 [2022-04-27 22:05:28,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:28,714 INFO L495 AbstractCegarLoop]: Abstraction has 88 states and 109 transitions. [2022-04-27 22:05:28,715 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:28,715 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 109 transitions. [2022-04-27 22:05:28,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 22:05:28,715 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:28,715 INFO L195 NwaCegarLoop]: trace histogram [6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:28,731 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-04-27 22:05:28,925 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:28,925 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:28,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:28,926 INFO L85 PathProgramCache]: Analyzing trace with hash 1567225004, now seen corresponding path program 4 times [2022-04-27 22:05:28,926 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:28,926 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1021838379] [2022-04-27 22:05:28,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:28,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:28,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:29,049 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:29,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:29,056 INFO L290 TraceCheckUtils]: 0: Hoare triple {7948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7933#true} is VALID [2022-04-27 22:05:29,056 INFO L290 TraceCheckUtils]: 1: Hoare triple {7933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,056 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7933#true} {7933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,057 INFO L272 TraceCheckUtils]: 0: Hoare triple {7933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:29,057 INFO L290 TraceCheckUtils]: 1: Hoare triple {7948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7933#true} is VALID [2022-04-27 22:05:29,057 INFO L290 TraceCheckUtils]: 2: Hoare triple {7933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,057 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7933#true} {7933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,057 INFO L272 TraceCheckUtils]: 4: Hoare triple {7933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,057 INFO L290 TraceCheckUtils]: 5: Hoare triple {7933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7938#(= main_~y~0 0)} is VALID [2022-04-27 22:05:29,058 INFO L290 TraceCheckUtils]: 6: Hoare triple {7938#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:29,058 INFO L290 TraceCheckUtils]: 7: Hoare triple {7939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7940#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:29,058 INFO L290 TraceCheckUtils]: 8: Hoare triple {7940#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7941#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:29,059 INFO L290 TraceCheckUtils]: 9: Hoare triple {7941#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7942#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:29,059 INFO L290 TraceCheckUtils]: 10: Hoare triple {7942#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7943#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:29,060 INFO L290 TraceCheckUtils]: 11: Hoare triple {7943#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:29,060 INFO L290 TraceCheckUtils]: 12: Hoare triple {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:29,061 INFO L290 TraceCheckUtils]: 13: Hoare triple {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7945#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:05:29,061 INFO L290 TraceCheckUtils]: 14: Hoare triple {7945#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7946#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:05:29,061 INFO L290 TraceCheckUtils]: 15: Hoare triple {7946#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7947#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:29,062 INFO L290 TraceCheckUtils]: 16: Hoare triple {7947#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,062 INFO L290 TraceCheckUtils]: 17: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-27 22:05:29,062 INFO L290 TraceCheckUtils]: 18: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-27 22:05:29,062 INFO L290 TraceCheckUtils]: 19: Hoare triple {7934#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,062 INFO L290 TraceCheckUtils]: 20: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-27 22:05:29,062 INFO L290 TraceCheckUtils]: 21: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-27 22:05:29,062 INFO L290 TraceCheckUtils]: 22: Hoare triple {7934#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,062 INFO L290 TraceCheckUtils]: 23: Hoare triple {7934#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,062 INFO L272 TraceCheckUtils]: 24: Hoare triple {7934#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7934#false} is VALID [2022-04-27 22:05:29,062 INFO L290 TraceCheckUtils]: 25: Hoare triple {7934#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7934#false} is VALID [2022-04-27 22:05:29,063 INFO L290 TraceCheckUtils]: 26: Hoare triple {7934#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,063 INFO L290 TraceCheckUtils]: 27: Hoare triple {7934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,063 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:05:29,063 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:29,063 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1021838379] [2022-04-27 22:05:29,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1021838379] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:29,063 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1504076089] [2022-04-27 22:05:29,063 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:05:29,063 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:29,063 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:29,065 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:29,065 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-27 22:05:29,096 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:05:29,096 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:29,097 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 21 conjunts are in the unsatisfiable core [2022-04-27 22:05:29,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:29,104 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:29,304 INFO L272 TraceCheckUtils]: 0: Hoare triple {7933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {7933#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7933#true} is VALID [2022-04-27 22:05:29,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {7933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,304 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7933#true} {7933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,304 INFO L272 TraceCheckUtils]: 4: Hoare triple {7933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,305 INFO L290 TraceCheckUtils]: 5: Hoare triple {7933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7938#(= main_~y~0 0)} is VALID [2022-04-27 22:05:29,305 INFO L290 TraceCheckUtils]: 6: Hoare triple {7938#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:29,308 INFO L290 TraceCheckUtils]: 7: Hoare triple {7939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7940#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:29,309 INFO L290 TraceCheckUtils]: 8: Hoare triple {7940#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7941#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:29,309 INFO L290 TraceCheckUtils]: 9: Hoare triple {7941#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7942#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:29,310 INFO L290 TraceCheckUtils]: 10: Hoare triple {7942#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7943#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:29,310 INFO L290 TraceCheckUtils]: 11: Hoare triple {7943#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:29,311 INFO L290 TraceCheckUtils]: 12: Hoare triple {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:29,311 INFO L290 TraceCheckUtils]: 13: Hoare triple {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7945#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:05:29,311 INFO L290 TraceCheckUtils]: 14: Hoare triple {7945#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7946#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:05:29,312 INFO L290 TraceCheckUtils]: 15: Hoare triple {7946#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7997#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:29,312 INFO L290 TraceCheckUtils]: 16: Hoare triple {7997#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,312 INFO L290 TraceCheckUtils]: 17: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-27 22:05:29,312 INFO L290 TraceCheckUtils]: 18: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-27 22:05:29,312 INFO L290 TraceCheckUtils]: 19: Hoare triple {7934#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,312 INFO L290 TraceCheckUtils]: 20: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-27 22:05:29,313 INFO L290 TraceCheckUtils]: 21: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-27 22:05:29,313 INFO L290 TraceCheckUtils]: 22: Hoare triple {7934#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,313 INFO L290 TraceCheckUtils]: 23: Hoare triple {7934#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,313 INFO L272 TraceCheckUtils]: 24: Hoare triple {7934#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7934#false} is VALID [2022-04-27 22:05:29,313 INFO L290 TraceCheckUtils]: 25: Hoare triple {7934#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7934#false} is VALID [2022-04-27 22:05:29,313 INFO L290 TraceCheckUtils]: 26: Hoare triple {7934#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,313 INFO L290 TraceCheckUtils]: 27: Hoare triple {7934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,313 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:05:29,313 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:29,512 INFO L290 TraceCheckUtils]: 27: Hoare triple {7934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L290 TraceCheckUtils]: 26: Hoare triple {7934#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L290 TraceCheckUtils]: 25: Hoare triple {7934#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L272 TraceCheckUtils]: 24: Hoare triple {7934#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L290 TraceCheckUtils]: 23: Hoare triple {7934#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L290 TraceCheckUtils]: 22: Hoare triple {7934#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L290 TraceCheckUtils]: 21: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L290 TraceCheckUtils]: 20: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L290 TraceCheckUtils]: 19: Hoare triple {7934#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L290 TraceCheckUtils]: 18: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L290 TraceCheckUtils]: 17: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-27 22:05:29,513 INFO L290 TraceCheckUtils]: 16: Hoare triple {8067#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-27 22:05:29,514 INFO L290 TraceCheckUtils]: 15: Hoare triple {8071#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8067#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:05:29,515 INFO L290 TraceCheckUtils]: 14: Hoare triple {8075#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8071#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:29,515 INFO L290 TraceCheckUtils]: 13: Hoare triple {8079#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8075#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 22:05:29,515 INFO L290 TraceCheckUtils]: 12: Hoare triple {8079#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8079#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:05:29,516 INFO L290 TraceCheckUtils]: 11: Hoare triple {8086#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8079#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:05:29,517 INFO L290 TraceCheckUtils]: 10: Hoare triple {8090#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8086#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:29,517 INFO L290 TraceCheckUtils]: 9: Hoare triple {8094#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8090#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:05:29,518 INFO L290 TraceCheckUtils]: 8: Hoare triple {8098#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8094#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:05:29,518 INFO L290 TraceCheckUtils]: 7: Hoare triple {8102#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8098#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:05:29,519 INFO L290 TraceCheckUtils]: 6: Hoare triple {8106#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8102#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:05:29,519 INFO L290 TraceCheckUtils]: 5: Hoare triple {7933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8106#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:05:29,519 INFO L272 TraceCheckUtils]: 4: Hoare triple {7933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,519 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7933#true} {7933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,519 INFO L290 TraceCheckUtils]: 2: Hoare triple {7933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,519 INFO L290 TraceCheckUtils]: 1: Hoare triple {7933#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7933#true} is VALID [2022-04-27 22:05:29,520 INFO L272 TraceCheckUtils]: 0: Hoare triple {7933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-27 22:05:29,520 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:05:29,520 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1504076089] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:29,520 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:29,520 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 24 [2022-04-27 22:05:29,520 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1001720938] [2022-04-27 22:05:29,520 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:29,520 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:05:29,521 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:29,521 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:29,545 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:29,545 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-27 22:05:29,545 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:29,546 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-27 22:05:29,546 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=446, Unknown=0, NotChecked=0, Total=552 [2022-04-27 22:05:29,546 INFO L87 Difference]: Start difference. First operand 88 states and 109 transitions. Second operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:43,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:43,361 INFO L93 Difference]: Finished difference Result 382 states and 535 transitions. [2022-04-27 22:05:43,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 144 states. [2022-04-27 22:05:43,361 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:05:43,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:43,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:43,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 353 transitions. [2022-04-27 22:05:43,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:43,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 353 transitions. [2022-04-27 22:05:43,372 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 144 states and 353 transitions. [2022-04-27 22:05:44,084 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 353 edges. 353 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:44,090 INFO L225 Difference]: With dead ends: 382 [2022-04-27 22:05:44,090 INFO L226 Difference]: Without dead ends: 343 [2022-04-27 22:05:44,095 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 163 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11603 ImplicationChecksByTransitivity, 9.9s TimeCoverageRelationStatistics Valid=5490, Invalid=21570, Unknown=0, NotChecked=0, Total=27060 [2022-04-27 22:05:44,095 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 400 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 910 mSolverCounterSat, 669 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 400 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 1579 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 669 IncrementalHoareTripleChecker+Valid, 910 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:44,095 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [400 Valid, 109 Invalid, 1579 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [669 Valid, 910 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2022-04-27 22:05:44,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states. [2022-04-27 22:05:44,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 108. [2022-04-27 22:05:44,287 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:44,288 INFO L82 GeneralOperation]: Start isEquivalent. First operand 343 states. Second operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:44,288 INFO L74 IsIncluded]: Start isIncluded. First operand 343 states. Second operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:44,288 INFO L87 Difference]: Start difference. First operand 343 states. Second operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:44,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:44,293 INFO L93 Difference]: Finished difference Result 343 states and 463 transitions. [2022-04-27 22:05:44,293 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 463 transitions. [2022-04-27 22:05:44,294 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:44,294 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:44,294 INFO L74 IsIncluded]: Start isIncluded. First operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 343 states. [2022-04-27 22:05:44,294 INFO L87 Difference]: Start difference. First operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 343 states. [2022-04-27 22:05:44,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:44,299 INFO L93 Difference]: Finished difference Result 343 states and 463 transitions. [2022-04-27 22:05:44,299 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 463 transitions. [2022-04-27 22:05:44,300 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:44,300 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:44,300 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:44,300 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:44,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:44,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 139 transitions. [2022-04-27 22:05:44,301 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 139 transitions. Word has length 28 [2022-04-27 22:05:44,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:44,302 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 139 transitions. [2022-04-27 22:05:44,302 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:44,302 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 139 transitions. [2022-04-27 22:05:44,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 22:05:44,302 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:44,302 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:44,318 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:44,518 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:44,518 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:44,518 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:44,518 INFO L85 PathProgramCache]: Analyzing trace with hash 408042245, now seen corresponding path program 4 times [2022-04-27 22:05:44,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:44,518 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748399753] [2022-04-27 22:05:44,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:44,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:44,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:44,692 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:44,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:44,708 INFO L290 TraceCheckUtils]: 0: Hoare triple {9784#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9768#true} is VALID [2022-04-27 22:05:44,708 INFO L290 TraceCheckUtils]: 1: Hoare triple {9768#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:44,708 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9768#true} {9768#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:44,708 INFO L272 TraceCheckUtils]: 0: Hoare triple {9768#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9784#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:44,708 INFO L290 TraceCheckUtils]: 1: Hoare triple {9784#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9768#true} is VALID [2022-04-27 22:05:44,708 INFO L290 TraceCheckUtils]: 2: Hoare triple {9768#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:44,708 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9768#true} {9768#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:44,709 INFO L272 TraceCheckUtils]: 4: Hoare triple {9768#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:44,709 INFO L290 TraceCheckUtils]: 5: Hoare triple {9768#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9773#(= main_~y~0 0)} is VALID [2022-04-27 22:05:44,709 INFO L290 TraceCheckUtils]: 6: Hoare triple {9773#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9774#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:44,710 INFO L290 TraceCheckUtils]: 7: Hoare triple {9774#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9775#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:44,710 INFO L290 TraceCheckUtils]: 8: Hoare triple {9775#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9776#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:44,711 INFO L290 TraceCheckUtils]: 9: Hoare triple {9776#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9777#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:44,711 INFO L290 TraceCheckUtils]: 10: Hoare triple {9777#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9777#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:44,711 INFO L290 TraceCheckUtils]: 11: Hoare triple {9777#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:44,712 INFO L290 TraceCheckUtils]: 12: Hoare triple {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9779#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:05:44,712 INFO L290 TraceCheckUtils]: 13: Hoare triple {9779#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9780#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:44,713 INFO L290 TraceCheckUtils]: 14: Hoare triple {9780#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9781#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:44,713 INFO L290 TraceCheckUtils]: 15: Hoare triple {9781#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9782#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:44,713 INFO L290 TraceCheckUtils]: 16: Hoare triple {9782#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {9782#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:44,714 INFO L290 TraceCheckUtils]: 17: Hoare triple {9782#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9781#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:44,714 INFO L290 TraceCheckUtils]: 18: Hoare triple {9781#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9780#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:44,715 INFO L290 TraceCheckUtils]: 19: Hoare triple {9780#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9779#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:05:44,715 INFO L290 TraceCheckUtils]: 20: Hoare triple {9779#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:44,716 INFO L290 TraceCheckUtils]: 21: Hoare triple {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:44,716 INFO L290 TraceCheckUtils]: 22: Hoare triple {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:44,716 INFO L290 TraceCheckUtils]: 23: Hoare triple {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {9783#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:44,717 INFO L290 TraceCheckUtils]: 24: Hoare triple {9783#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:44,717 INFO L272 TraceCheckUtils]: 25: Hoare triple {9769#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {9769#false} is VALID [2022-04-27 22:05:44,717 INFO L290 TraceCheckUtils]: 26: Hoare triple {9769#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9769#false} is VALID [2022-04-27 22:05:44,717 INFO L290 TraceCheckUtils]: 27: Hoare triple {9769#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:44,717 INFO L290 TraceCheckUtils]: 28: Hoare triple {9769#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:44,717 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:44,717 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:44,717 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748399753] [2022-04-27 22:05:44,718 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1748399753] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:44,718 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [706423915] [2022-04-27 22:05:44,718 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:05:44,718 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:44,718 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:44,719 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:44,719 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-27 22:05:44,753 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:05:44,753 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:44,754 INFO L263 TraceCheckSpWp]: Trace formula consists of 126 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 22:05:44,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:44,760 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:44,903 INFO L272 TraceCheckUtils]: 0: Hoare triple {9768#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:44,904 INFO L290 TraceCheckUtils]: 1: Hoare triple {9768#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9768#true} is VALID [2022-04-27 22:05:44,904 INFO L290 TraceCheckUtils]: 2: Hoare triple {9768#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:44,904 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9768#true} {9768#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:44,904 INFO L272 TraceCheckUtils]: 4: Hoare triple {9768#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:44,904 INFO L290 TraceCheckUtils]: 5: Hoare triple {9768#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9768#true} is VALID [2022-04-27 22:05:44,905 INFO L290 TraceCheckUtils]: 6: Hoare triple {9768#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:44,905 INFO L290 TraceCheckUtils]: 7: Hoare triple {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:44,906 INFO L290 TraceCheckUtils]: 8: Hoare triple {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:44,906 INFO L290 TraceCheckUtils]: 9: Hoare triple {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:44,907 INFO L290 TraceCheckUtils]: 10: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:44,907 INFO L290 TraceCheckUtils]: 11: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:44,907 INFO L290 TraceCheckUtils]: 12: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:44,908 INFO L290 TraceCheckUtils]: 13: Hoare triple {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:44,909 INFO L290 TraceCheckUtils]: 14: Hoare triple {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:44,909 INFO L290 TraceCheckUtils]: 15: Hoare triple {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:44,909 INFO L290 TraceCheckUtils]: 16: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:44,910 INFO L290 TraceCheckUtils]: 17: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:44,910 INFO L290 TraceCheckUtils]: 18: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:44,910 INFO L290 TraceCheckUtils]: 19: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:44,910 INFO L290 TraceCheckUtils]: 20: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:44,911 INFO L290 TraceCheckUtils]: 21: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:44,911 INFO L290 TraceCheckUtils]: 22: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:44,911 INFO L290 TraceCheckUtils]: 23: Hoare triple {9769#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {9769#false} is VALID [2022-04-27 22:05:44,911 INFO L290 TraceCheckUtils]: 24: Hoare triple {9769#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:44,911 INFO L272 TraceCheckUtils]: 25: Hoare triple {9769#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {9769#false} is VALID [2022-04-27 22:05:44,911 INFO L290 TraceCheckUtils]: 26: Hoare triple {9769#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9769#false} is VALID [2022-04-27 22:05:44,911 INFO L290 TraceCheckUtils]: 27: Hoare triple {9769#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:44,911 INFO L290 TraceCheckUtils]: 28: Hoare triple {9769#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:44,911 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-27 22:05:44,912 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:45,001 INFO L290 TraceCheckUtils]: 28: Hoare triple {9769#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:45,001 INFO L290 TraceCheckUtils]: 27: Hoare triple {9769#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:45,001 INFO L290 TraceCheckUtils]: 26: Hoare triple {9769#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9769#false} is VALID [2022-04-27 22:05:45,001 INFO L272 TraceCheckUtils]: 25: Hoare triple {9769#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {9769#false} is VALID [2022-04-27 22:05:45,001 INFO L290 TraceCheckUtils]: 24: Hoare triple {9769#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:45,001 INFO L290 TraceCheckUtils]: 23: Hoare triple {9769#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {9769#false} is VALID [2022-04-27 22:05:45,002 INFO L290 TraceCheckUtils]: 22: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-27 22:05:45,002 INFO L290 TraceCheckUtils]: 21: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:45,002 INFO L290 TraceCheckUtils]: 20: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:45,002 INFO L290 TraceCheckUtils]: 19: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:45,003 INFO L290 TraceCheckUtils]: 18: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:45,003 INFO L290 TraceCheckUtils]: 17: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:45,003 INFO L290 TraceCheckUtils]: 16: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:45,004 INFO L290 TraceCheckUtils]: 15: Hoare triple {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:45,004 INFO L290 TraceCheckUtils]: 14: Hoare triple {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:45,005 INFO L290 TraceCheckUtils]: 13: Hoare triple {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:45,006 INFO L290 TraceCheckUtils]: 12: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:45,006 INFO L290 TraceCheckUtils]: 11: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:45,006 INFO L290 TraceCheckUtils]: 10: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:45,007 INFO L290 TraceCheckUtils]: 9: Hoare triple {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:45,008 INFO L290 TraceCheckUtils]: 8: Hoare triple {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:45,008 INFO L290 TraceCheckUtils]: 7: Hoare triple {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:45,009 INFO L290 TraceCheckUtils]: 6: Hoare triple {9768#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:45,009 INFO L290 TraceCheckUtils]: 5: Hoare triple {9768#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9768#true} is VALID [2022-04-27 22:05:45,009 INFO L272 TraceCheckUtils]: 4: Hoare triple {9768#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:45,009 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9768#true} {9768#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:45,009 INFO L290 TraceCheckUtils]: 2: Hoare triple {9768#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:45,009 INFO L290 TraceCheckUtils]: 1: Hoare triple {9768#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9768#true} is VALID [2022-04-27 22:05:45,009 INFO L272 TraceCheckUtils]: 0: Hoare triple {9768#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-27 22:05:45,009 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-27 22:05:45,010 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [706423915] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:45,010 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:45,010 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 7, 7] total 19 [2022-04-27 22:05:45,010 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [222404145] [2022-04-27 22:05:45,010 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:45,010 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 22:05:45,010 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:45,010 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:45,042 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:45,042 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 22:05:45,042 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:45,043 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 22:05:45,043 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=305, Unknown=0, NotChecked=0, Total=342 [2022-04-27 22:05:45,043 INFO L87 Difference]: Start difference. First operand 108 states and 139 transitions. Second operand has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:49,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:49,918 INFO L93 Difference]: Finished difference Result 177 states and 245 transitions. [2022-04-27 22:05:49,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2022-04-27 22:05:49,918 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 22:05:49,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:49,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:49,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 151 transitions. [2022-04-27 22:05:49,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:49,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 151 transitions. [2022-04-27 22:05:49,921 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 59 states and 151 transitions. [2022-04-27 22:05:50,127 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 151 edges. 151 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:50,129 INFO L225 Difference]: With dead ends: 177 [2022-04-27 22:05:50,129 INFO L226 Difference]: Without dead ends: 158 [2022-04-27 22:05:50,130 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1529 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=710, Invalid=4840, Unknown=0, NotChecked=0, Total=5550 [2022-04-27 22:05:50,130 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 112 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 864 mSolverCounterSat, 223 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 112 SdHoareTripleChecker+Valid, 92 SdHoareTripleChecker+Invalid, 1087 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 223 IncrementalHoareTripleChecker+Valid, 864 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:50,131 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [112 Valid, 92 Invalid, 1087 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [223 Valid, 864 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-27 22:05:50,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2022-04-27 22:05:50,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 123. [2022-04-27 22:05:50,341 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:50,341 INFO L82 GeneralOperation]: Start isEquivalent. First operand 158 states. Second operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:50,341 INFO L74 IsIncluded]: Start isIncluded. First operand 158 states. Second operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:50,341 INFO L87 Difference]: Start difference. First operand 158 states. Second operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:50,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:50,343 INFO L93 Difference]: Finished difference Result 158 states and 199 transitions. [2022-04-27 22:05:50,343 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 199 transitions. [2022-04-27 22:05:50,343 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:50,343 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:50,343 INFO L74 IsIncluded]: Start isIncluded. First operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 158 states. [2022-04-27 22:05:50,344 INFO L87 Difference]: Start difference. First operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 158 states. [2022-04-27 22:05:50,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:50,345 INFO L93 Difference]: Finished difference Result 158 states and 199 transitions. [2022-04-27 22:05:50,345 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 199 transitions. [2022-04-27 22:05:50,345 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:50,345 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:50,346 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:50,346 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:50,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:50,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 157 transitions. [2022-04-27 22:05:50,347 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 157 transitions. Word has length 29 [2022-04-27 22:05:50,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:50,347 INFO L495 AbstractCegarLoop]: Abstraction has 123 states and 157 transitions. [2022-04-27 22:05:50,347 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:50,347 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 157 transitions. [2022-04-27 22:05:50,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 22:05:50,348 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:50,348 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:50,366 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:50,563 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:50,563 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:50,563 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:50,564 INFO L85 PathProgramCache]: Analyzing trace with hash -1025963572, now seen corresponding path program 7 times [2022-04-27 22:05:50,564 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:50,564 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [617759805] [2022-04-27 22:05:50,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:50,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:50,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:50,627 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:50,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:50,635 INFO L290 TraceCheckUtils]: 0: Hoare triple {10816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10807#true} is VALID [2022-04-27 22:05:50,635 INFO L290 TraceCheckUtils]: 1: Hoare triple {10807#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:50,635 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10807#true} {10807#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:50,636 INFO L272 TraceCheckUtils]: 0: Hoare triple {10807#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:50,636 INFO L290 TraceCheckUtils]: 1: Hoare triple {10816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10807#true} is VALID [2022-04-27 22:05:50,636 INFO L290 TraceCheckUtils]: 2: Hoare triple {10807#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:50,636 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10807#true} {10807#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:50,636 INFO L272 TraceCheckUtils]: 4: Hoare triple {10807#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:50,636 INFO L290 TraceCheckUtils]: 5: Hoare triple {10807#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10807#true} is VALID [2022-04-27 22:05:50,636 INFO L290 TraceCheckUtils]: 6: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-27 22:05:50,636 INFO L290 TraceCheckUtils]: 7: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-27 22:05:50,637 INFO L290 TraceCheckUtils]: 8: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:50,637 INFO L290 TraceCheckUtils]: 9: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:50,637 INFO L290 TraceCheckUtils]: 10: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:50,638 INFO L290 TraceCheckUtils]: 11: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,639 INFO L290 TraceCheckUtils]: 12: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,639 INFO L290 TraceCheckUtils]: 13: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,640 INFO L290 TraceCheckUtils]: 14: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,640 INFO L290 TraceCheckUtils]: 15: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,641 INFO L290 TraceCheckUtils]: 16: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,641 INFO L290 TraceCheckUtils]: 17: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,641 INFO L290 TraceCheckUtils]: 18: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,642 INFO L290 TraceCheckUtils]: 19: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,643 INFO L290 TraceCheckUtils]: 20: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,644 INFO L290 TraceCheckUtils]: 21: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:50,644 INFO L290 TraceCheckUtils]: 22: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-27 22:05:50,644 INFO L290 TraceCheckUtils]: 23: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-27 22:05:50,644 INFO L290 TraceCheckUtils]: 24: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-27 22:05:50,644 INFO L290 TraceCheckUtils]: 25: Hoare triple {10808#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:50,645 INFO L272 TraceCheckUtils]: 26: Hoare triple {10808#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {10808#false} is VALID [2022-04-27 22:05:50,645 INFO L290 TraceCheckUtils]: 27: Hoare triple {10808#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10808#false} is VALID [2022-04-27 22:05:50,645 INFO L290 TraceCheckUtils]: 28: Hoare triple {10808#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:50,645 INFO L290 TraceCheckUtils]: 29: Hoare triple {10808#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:50,645 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:05:50,645 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:50,645 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [617759805] [2022-04-27 22:05:50,645 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [617759805] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:50,645 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [323142533] [2022-04-27 22:05:50,645 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:05:50,645 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:50,645 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:50,646 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:50,647 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-27 22:05:50,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:50,678 INFO L263 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 22:05:50,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:50,687 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:50,912 INFO L272 TraceCheckUtils]: 0: Hoare triple {10807#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:50,912 INFO L290 TraceCheckUtils]: 1: Hoare triple {10807#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10807#true} is VALID [2022-04-27 22:05:50,912 INFO L290 TraceCheckUtils]: 2: Hoare triple {10807#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:50,912 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10807#true} {10807#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:50,912 INFO L272 TraceCheckUtils]: 4: Hoare triple {10807#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:50,912 INFO L290 TraceCheckUtils]: 5: Hoare triple {10807#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10807#true} is VALID [2022-04-27 22:05:50,912 INFO L290 TraceCheckUtils]: 6: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-27 22:05:50,912 INFO L290 TraceCheckUtils]: 7: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-27 22:05:50,913 INFO L290 TraceCheckUtils]: 8: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:50,914 INFO L290 TraceCheckUtils]: 9: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:50,914 INFO L290 TraceCheckUtils]: 10: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:50,915 INFO L290 TraceCheckUtils]: 11: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,915 INFO L290 TraceCheckUtils]: 12: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,916 INFO L290 TraceCheckUtils]: 13: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,917 INFO L290 TraceCheckUtils]: 14: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,917 INFO L290 TraceCheckUtils]: 15: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,918 INFO L290 TraceCheckUtils]: 16: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,918 INFO L290 TraceCheckUtils]: 17: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,918 INFO L290 TraceCheckUtils]: 18: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,919 INFO L290 TraceCheckUtils]: 19: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,920 INFO L290 TraceCheckUtils]: 20: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:50,920 INFO L290 TraceCheckUtils]: 21: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:50,920 INFO L290 TraceCheckUtils]: 22: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-27 22:05:50,920 INFO L290 TraceCheckUtils]: 23: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-27 22:05:50,921 INFO L290 TraceCheckUtils]: 24: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-27 22:05:50,921 INFO L290 TraceCheckUtils]: 25: Hoare triple {10808#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:50,921 INFO L272 TraceCheckUtils]: 26: Hoare triple {10808#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {10808#false} is VALID [2022-04-27 22:05:50,921 INFO L290 TraceCheckUtils]: 27: Hoare triple {10808#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10808#false} is VALID [2022-04-27 22:05:50,921 INFO L290 TraceCheckUtils]: 28: Hoare triple {10808#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:50,921 INFO L290 TraceCheckUtils]: 29: Hoare triple {10808#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:50,921 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:05:50,921 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:51,021 INFO L290 TraceCheckUtils]: 29: Hoare triple {10808#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:51,021 INFO L290 TraceCheckUtils]: 28: Hoare triple {10808#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:51,021 INFO L290 TraceCheckUtils]: 27: Hoare triple {10808#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10808#false} is VALID [2022-04-27 22:05:51,021 INFO L272 TraceCheckUtils]: 26: Hoare triple {10808#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {10808#false} is VALID [2022-04-27 22:05:51,021 INFO L290 TraceCheckUtils]: 25: Hoare triple {10808#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:51,021 INFO L290 TraceCheckUtils]: 24: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-27 22:05:51,022 INFO L290 TraceCheckUtils]: 23: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-27 22:05:51,022 INFO L290 TraceCheckUtils]: 22: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-27 22:05:51,022 INFO L290 TraceCheckUtils]: 21: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-27 22:05:51,023 INFO L290 TraceCheckUtils]: 20: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:51,024 INFO L290 TraceCheckUtils]: 19: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:51,035 INFO L290 TraceCheckUtils]: 18: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:51,036 INFO L290 TraceCheckUtils]: 17: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:51,036 INFO L290 TraceCheckUtils]: 16: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:51,049 INFO L290 TraceCheckUtils]: 15: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:51,049 INFO L290 TraceCheckUtils]: 14: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:51,050 INFO L290 TraceCheckUtils]: 13: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:51,051 INFO L290 TraceCheckUtils]: 12: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:51,051 INFO L290 TraceCheckUtils]: 11: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:51,052 INFO L290 TraceCheckUtils]: 10: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:51,052 INFO L290 TraceCheckUtils]: 9: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:51,053 INFO L290 TraceCheckUtils]: 8: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:51,053 INFO L290 TraceCheckUtils]: 7: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-27 22:05:51,053 INFO L290 TraceCheckUtils]: 6: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-27 22:05:51,053 INFO L290 TraceCheckUtils]: 5: Hoare triple {10807#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10807#true} is VALID [2022-04-27 22:05:51,053 INFO L272 TraceCheckUtils]: 4: Hoare triple {10807#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:51,053 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10807#true} {10807#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:51,053 INFO L290 TraceCheckUtils]: 2: Hoare triple {10807#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:51,054 INFO L290 TraceCheckUtils]: 1: Hoare triple {10807#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10807#true} is VALID [2022-04-27 22:05:51,054 INFO L272 TraceCheckUtils]: 0: Hoare triple {10807#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-27 22:05:51,054 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:05:51,054 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [323142533] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:51,054 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:51,054 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 7 [2022-04-27 22:05:51,054 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371462584] [2022-04-27 22:05:51,054 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:51,054 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:05:51,055 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:51,055 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:51,072 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:51,072 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 22:05:51,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:51,072 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 22:05:51,072 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:05:51,073 INFO L87 Difference]: Start difference. First operand 123 states and 157 transitions. Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:51,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:51,563 INFO L93 Difference]: Finished difference Result 137 states and 174 transitions. [2022-04-27 22:05:51,563 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 22:05:51,563 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:05:51,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:51,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:51,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-27 22:05:51,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:51,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-27 22:05:51,564 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 45 transitions. [2022-04-27 22:05:51,612 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:51,613 INFO L225 Difference]: With dead ends: 137 [2022-04-27 22:05:51,613 INFO L226 Difference]: Without dead ends: 124 [2022-04-27 22:05:51,613 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 62 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2022-04-27 22:05:51,614 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 31 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 96 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:51,614 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [31 Valid, 42 Invalid, 96 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:05:51,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2022-04-27 22:05:51,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2022-04-27 22:05:51,834 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:51,835 INFO L82 GeneralOperation]: Start isEquivalent. First operand 124 states. Second operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:51,835 INFO L74 IsIncluded]: Start isIncluded. First operand 124 states. Second operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:51,835 INFO L87 Difference]: Start difference. First operand 124 states. Second operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:51,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:51,836 INFO L93 Difference]: Finished difference Result 124 states and 157 transitions. [2022-04-27 22:05:51,836 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 157 transitions. [2022-04-27 22:05:51,837 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:51,837 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:51,837 INFO L74 IsIncluded]: Start isIncluded. First operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 124 states. [2022-04-27 22:05:51,837 INFO L87 Difference]: Start difference. First operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 124 states. [2022-04-27 22:05:51,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:51,838 INFO L93 Difference]: Finished difference Result 124 states and 157 transitions. [2022-04-27 22:05:51,838 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 157 transitions. [2022-04-27 22:05:51,839 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:51,839 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:51,839 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:51,839 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:51,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:51,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 157 transitions. [2022-04-27 22:05:51,840 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 157 transitions. Word has length 30 [2022-04-27 22:05:51,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:51,840 INFO L495 AbstractCegarLoop]: Abstraction has 124 states and 157 transitions. [2022-04-27 22:05:51,840 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:51,841 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 157 transitions. [2022-04-27 22:05:51,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 22:05:51,841 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:51,841 INFO L195 NwaCegarLoop]: trace histogram [7, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:51,859 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:52,057 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:52,058 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:52,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:52,058 INFO L85 PathProgramCache]: Analyzing trace with hash -1105068913, now seen corresponding path program 5 times [2022-04-27 22:05:52,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:52,058 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676660247] [2022-04-27 22:05:52,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:52,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:52,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:52,221 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:52,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:52,226 INFO L290 TraceCheckUtils]: 0: Hoare triple {11650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11632#true} is VALID [2022-04-27 22:05:52,226 INFO L290 TraceCheckUtils]: 1: Hoare triple {11632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,227 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11632#true} {11632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,227 INFO L272 TraceCheckUtils]: 0: Hoare triple {11632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:52,227 INFO L290 TraceCheckUtils]: 1: Hoare triple {11650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11632#true} is VALID [2022-04-27 22:05:52,227 INFO L290 TraceCheckUtils]: 2: Hoare triple {11632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,227 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11632#true} {11632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,227 INFO L272 TraceCheckUtils]: 4: Hoare triple {11632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,227 INFO L290 TraceCheckUtils]: 5: Hoare triple {11632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11637#(= main_~y~0 0)} is VALID [2022-04-27 22:05:52,228 INFO L290 TraceCheckUtils]: 6: Hoare triple {11637#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11638#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:52,228 INFO L290 TraceCheckUtils]: 7: Hoare triple {11638#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11639#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:52,229 INFO L290 TraceCheckUtils]: 8: Hoare triple {11639#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:52,229 INFO L290 TraceCheckUtils]: 9: Hoare triple {11640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11641#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:52,230 INFO L290 TraceCheckUtils]: 10: Hoare triple {11641#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11642#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:52,230 INFO L290 TraceCheckUtils]: 11: Hoare triple {11642#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11643#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:52,231 INFO L290 TraceCheckUtils]: 12: Hoare triple {11643#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11644#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:05:52,231 INFO L290 TraceCheckUtils]: 13: Hoare triple {11644#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11644#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:05:52,231 INFO L290 TraceCheckUtils]: 14: Hoare triple {11644#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11645#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:05:52,232 INFO L290 TraceCheckUtils]: 15: Hoare triple {11645#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11646#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:05:52,232 INFO L290 TraceCheckUtils]: 16: Hoare triple {11646#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11647#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:05:52,233 INFO L290 TraceCheckUtils]: 17: Hoare triple {11647#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11648#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:52,233 INFO L290 TraceCheckUtils]: 18: Hoare triple {11648#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11649#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 19: Hoare triple {11649#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 20: Hoare triple {11633#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 21: Hoare triple {11633#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 22: Hoare triple {11633#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 23: Hoare triple {11633#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 24: Hoare triple {11633#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 25: Hoare triple {11633#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 26: Hoare triple {11633#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L272 TraceCheckUtils]: 27: Hoare triple {11633#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 28: Hoare triple {11633#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 29: Hoare triple {11633#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,234 INFO L290 TraceCheckUtils]: 30: Hoare triple {11633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,235 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-27 22:05:52,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:52,235 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676660247] [2022-04-27 22:05:52,235 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [676660247] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:52,235 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1766230502] [2022-04-27 22:05:52,235 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:05:52,235 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:52,235 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:52,236 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:52,237 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-27 22:05:52,484 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-27 22:05:52,484 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:52,486 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-27 22:05:52,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:52,497 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:52,649 INFO L272 TraceCheckUtils]: 0: Hoare triple {11632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,649 INFO L290 TraceCheckUtils]: 1: Hoare triple {11632#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11632#true} is VALID [2022-04-27 22:05:52,649 INFO L290 TraceCheckUtils]: 2: Hoare triple {11632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,649 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11632#true} {11632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,649 INFO L272 TraceCheckUtils]: 4: Hoare triple {11632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,649 INFO L290 TraceCheckUtils]: 5: Hoare triple {11632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11632#true} is VALID [2022-04-27 22:05:52,650 INFO L290 TraceCheckUtils]: 6: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-27 22:05:52,650 INFO L290 TraceCheckUtils]: 7: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-27 22:05:52,650 INFO L290 TraceCheckUtils]: 8: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-27 22:05:52,650 INFO L290 TraceCheckUtils]: 9: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-27 22:05:52,650 INFO L290 TraceCheckUtils]: 10: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:52,651 INFO L290 TraceCheckUtils]: 11: Hoare triple {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:52,651 INFO L290 TraceCheckUtils]: 12: Hoare triple {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:52,652 INFO L290 TraceCheckUtils]: 13: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:52,652 INFO L290 TraceCheckUtils]: 14: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:52,653 INFO L290 TraceCheckUtils]: 15: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:52,653 INFO L290 TraceCheckUtils]: 16: Hoare triple {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:52,654 INFO L290 TraceCheckUtils]: 17: Hoare triple {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11708#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:52,654 INFO L290 TraceCheckUtils]: 18: Hoare triple {11708#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,655 INFO L290 TraceCheckUtils]: 19: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,655 INFO L290 TraceCheckUtils]: 20: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,655 INFO L290 TraceCheckUtils]: 21: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,656 INFO L290 TraceCheckUtils]: 22: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,656 INFO L290 TraceCheckUtils]: 23: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,657 INFO L290 TraceCheckUtils]: 24: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {11708#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:52,657 INFO L290 TraceCheckUtils]: 25: Hoare triple {11708#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,657 INFO L290 TraceCheckUtils]: 26: Hoare triple {11633#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,657 INFO L272 TraceCheckUtils]: 27: Hoare triple {11633#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {11633#false} is VALID [2022-04-27 22:05:52,657 INFO L290 TraceCheckUtils]: 28: Hoare triple {11633#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11633#false} is VALID [2022-04-27 22:05:52,657 INFO L290 TraceCheckUtils]: 29: Hoare triple {11633#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,657 INFO L290 TraceCheckUtils]: 30: Hoare triple {11633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,658 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 15 proven. 14 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 22:05:52,658 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:52,740 INFO L290 TraceCheckUtils]: 30: Hoare triple {11633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,740 INFO L290 TraceCheckUtils]: 29: Hoare triple {11633#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,740 INFO L290 TraceCheckUtils]: 28: Hoare triple {11633#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11633#false} is VALID [2022-04-27 22:05:52,740 INFO L272 TraceCheckUtils]: 27: Hoare triple {11633#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {11633#false} is VALID [2022-04-27 22:05:52,740 INFO L290 TraceCheckUtils]: 26: Hoare triple {11633#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,741 INFO L290 TraceCheckUtils]: 25: Hoare triple {11708#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-27 22:05:52,741 INFO L290 TraceCheckUtils]: 24: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {11708#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:52,742 INFO L290 TraceCheckUtils]: 23: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,742 INFO L290 TraceCheckUtils]: 22: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,742 INFO L290 TraceCheckUtils]: 21: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,743 INFO L290 TraceCheckUtils]: 20: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,743 INFO L290 TraceCheckUtils]: 19: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,743 INFO L290 TraceCheckUtils]: 18: Hoare triple {11708#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:52,744 INFO L290 TraceCheckUtils]: 17: Hoare triple {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11708#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:52,745 INFO L290 TraceCheckUtils]: 16: Hoare triple {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:52,752 INFO L290 TraceCheckUtils]: 15: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:52,753 INFO L290 TraceCheckUtils]: 14: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:52,753 INFO L290 TraceCheckUtils]: 13: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:52,754 INFO L290 TraceCheckUtils]: 12: Hoare triple {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:52,754 INFO L290 TraceCheckUtils]: 11: Hoare triple {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:52,755 INFO L290 TraceCheckUtils]: 10: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:52,755 INFO L290 TraceCheckUtils]: 9: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-27 22:05:52,755 INFO L290 TraceCheckUtils]: 8: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-27 22:05:52,755 INFO L290 TraceCheckUtils]: 7: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-27 22:05:52,755 INFO L290 TraceCheckUtils]: 6: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-27 22:05:52,755 INFO L290 TraceCheckUtils]: 5: Hoare triple {11632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11632#true} is VALID [2022-04-27 22:05:52,755 INFO L272 TraceCheckUtils]: 4: Hoare triple {11632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,755 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11632#true} {11632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,755 INFO L290 TraceCheckUtils]: 2: Hoare triple {11632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {11632#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11632#true} is VALID [2022-04-27 22:05:52,755 INFO L272 TraceCheckUtils]: 0: Hoare triple {11632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-27 22:05:52,756 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 15 proven. 14 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 22:05:52,756 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1766230502] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:52,756 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:52,756 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 7, 7] total 21 [2022-04-27 22:05:52,756 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [603475263] [2022-04-27 22:05:52,756 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:52,756 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:05:52,756 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:52,757 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:52,785 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:52,785 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-27 22:05:52,785 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:52,785 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-27 22:05:52,785 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=377, Unknown=0, NotChecked=0, Total=420 [2022-04-27 22:05:52,785 INFO L87 Difference]: Start difference. First operand 124 states and 157 transitions. Second operand has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:58,272 INFO L93 Difference]: Finished difference Result 240 states and 320 transitions. [2022-04-27 22:05:58,272 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2022-04-27 22:05:58,272 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:05:58,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:58,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 173 transitions. [2022-04-27 22:05:58,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 173 transitions. [2022-04-27 22:05:58,275 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 67 states and 173 transitions. [2022-04-27 22:05:58,516 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 173 edges. 173 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:58,518 INFO L225 Difference]: With dead ends: 240 [2022-04-27 22:05:58,518 INFO L226 Difference]: Without dead ends: 209 [2022-04-27 22:05:58,520 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 69 SyntacticMatches, 0 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2053 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=726, Invalid=6414, Unknown=0, NotChecked=0, Total=7140 [2022-04-27 22:05:58,520 INFO L413 NwaCegarLoop]: 34 mSDtfsCounter, 154 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 1306 mSolverCounterSat, 238 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 116 SdHoareTripleChecker+Invalid, 1544 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 238 IncrementalHoareTripleChecker+Valid, 1306 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:58,520 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [154 Valid, 116 Invalid, 1544 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [238 Valid, 1306 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2022-04-27 22:05:58,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2022-04-27 22:05:58,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 134. [2022-04-27 22:05:58,798 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:58,798 INFO L82 GeneralOperation]: Start isEquivalent. First operand 209 states. Second operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,798 INFO L74 IsIncluded]: Start isIncluded. First operand 209 states. Second operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,798 INFO L87 Difference]: Start difference. First operand 209 states. Second operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:58,801 INFO L93 Difference]: Finished difference Result 209 states and 271 transitions. [2022-04-27 22:05:58,801 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 271 transitions. [2022-04-27 22:05:58,801 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:58,801 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:58,801 INFO L74 IsIncluded]: Start isIncluded. First operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 209 states. [2022-04-27 22:05:58,802 INFO L87 Difference]: Start difference. First operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 209 states. [2022-04-27 22:05:58,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:58,804 INFO L93 Difference]: Finished difference Result 209 states and 271 transitions. [2022-04-27 22:05:58,804 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 271 transitions. [2022-04-27 22:05:58,804 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:58,804 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:58,804 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:58,804 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:58,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 168 transitions. [2022-04-27 22:05:58,806 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 168 transitions. Word has length 31 [2022-04-27 22:05:58,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:58,806 INFO L495 AbstractCegarLoop]: Abstraction has 134 states and 168 transitions. [2022-04-27 22:05:58,806 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,806 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 168 transitions. [2022-04-27 22:05:58,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 22:05:58,807 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:58,807 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:58,819 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2022-04-27 22:05:59,010 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:59,011 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:59,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:59,011 INFO L85 PathProgramCache]: Analyzing trace with hash 179018828, now seen corresponding path program 8 times [2022-04-27 22:05:59,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:59,011 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300855586] [2022-04-27 22:05:59,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:59,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:59,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:59,086 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:59,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:59,089 INFO L290 TraceCheckUtils]: 0: Hoare triple {12911#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12902#true} is VALID [2022-04-27 22:05:59,089 INFO L290 TraceCheckUtils]: 1: Hoare triple {12902#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,089 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12902#true} {12902#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,090 INFO L272 TraceCheckUtils]: 0: Hoare triple {12902#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12911#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:59,090 INFO L290 TraceCheckUtils]: 1: Hoare triple {12911#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12902#true} is VALID [2022-04-27 22:05:59,090 INFO L290 TraceCheckUtils]: 2: Hoare triple {12902#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,090 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12902#true} {12902#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,090 INFO L272 TraceCheckUtils]: 4: Hoare triple {12902#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,090 INFO L290 TraceCheckUtils]: 5: Hoare triple {12902#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12902#true} is VALID [2022-04-27 22:05:59,090 INFO L290 TraceCheckUtils]: 6: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-27 22:05:59,090 INFO L290 TraceCheckUtils]: 7: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-27 22:05:59,090 INFO L290 TraceCheckUtils]: 8: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-27 22:05:59,091 INFO L290 TraceCheckUtils]: 9: Hoare triple {12902#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:59,091 INFO L290 TraceCheckUtils]: 10: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:59,092 INFO L290 TraceCheckUtils]: 11: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:59,092 INFO L290 TraceCheckUtils]: 12: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,093 INFO L290 TraceCheckUtils]: 13: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,093 INFO L290 TraceCheckUtils]: 14: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,094 INFO L290 TraceCheckUtils]: 15: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,094 INFO L290 TraceCheckUtils]: 16: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,094 INFO L290 TraceCheckUtils]: 17: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,094 INFO L290 TraceCheckUtils]: 18: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,095 INFO L290 TraceCheckUtils]: 19: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,096 INFO L290 TraceCheckUtils]: 20: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:59,097 INFO L290 TraceCheckUtils]: 21: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:59,097 INFO L290 TraceCheckUtils]: 22: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12903#false} is VALID [2022-04-27 22:05:59,097 INFO L290 TraceCheckUtils]: 23: Hoare triple {12903#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,097 INFO L290 TraceCheckUtils]: 24: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-27 22:05:59,098 INFO L290 TraceCheckUtils]: 25: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-27 22:05:59,098 INFO L290 TraceCheckUtils]: 26: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-27 22:05:59,098 INFO L290 TraceCheckUtils]: 27: Hoare triple {12903#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,098 INFO L272 TraceCheckUtils]: 28: Hoare triple {12903#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {12903#false} is VALID [2022-04-27 22:05:59,098 INFO L290 TraceCheckUtils]: 29: Hoare triple {12903#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12903#false} is VALID [2022-04-27 22:05:59,098 INFO L290 TraceCheckUtils]: 30: Hoare triple {12903#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,098 INFO L290 TraceCheckUtils]: 31: Hoare triple {12903#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,098 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:05:59,098 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:59,098 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300855586] [2022-04-27 22:05:59,098 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1300855586] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:59,098 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [697519430] [2022-04-27 22:05:59,098 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:05:59,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:59,099 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:59,099 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:59,117 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-27 22:05:59,138 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:05:59,138 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:59,139 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 22:05:59,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:59,146 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:59,316 INFO L272 TraceCheckUtils]: 0: Hoare triple {12902#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,317 INFO L290 TraceCheckUtils]: 1: Hoare triple {12902#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12902#true} is VALID [2022-04-27 22:05:59,317 INFO L290 TraceCheckUtils]: 2: Hoare triple {12902#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,317 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12902#true} {12902#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,317 INFO L272 TraceCheckUtils]: 4: Hoare triple {12902#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,317 INFO L290 TraceCheckUtils]: 5: Hoare triple {12902#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12902#true} is VALID [2022-04-27 22:05:59,317 INFO L290 TraceCheckUtils]: 6: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-27 22:05:59,317 INFO L290 TraceCheckUtils]: 7: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-27 22:05:59,317 INFO L290 TraceCheckUtils]: 8: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-27 22:05:59,317 INFO L290 TraceCheckUtils]: 9: Hoare triple {12902#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:59,318 INFO L290 TraceCheckUtils]: 10: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:59,318 INFO L290 TraceCheckUtils]: 11: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:59,319 INFO L290 TraceCheckUtils]: 12: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,320 INFO L290 TraceCheckUtils]: 13: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,320 INFO L290 TraceCheckUtils]: 14: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,320 INFO L290 TraceCheckUtils]: 15: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,321 INFO L290 TraceCheckUtils]: 16: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,321 INFO L290 TraceCheckUtils]: 17: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,321 INFO L290 TraceCheckUtils]: 18: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,322 INFO L290 TraceCheckUtils]: 19: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,323 INFO L290 TraceCheckUtils]: 20: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:59,324 INFO L290 TraceCheckUtils]: 21: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:59,324 INFO L290 TraceCheckUtils]: 22: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12903#false} is VALID [2022-04-27 22:05:59,324 INFO L290 TraceCheckUtils]: 23: Hoare triple {12903#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,324 INFO L290 TraceCheckUtils]: 24: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-27 22:05:59,324 INFO L290 TraceCheckUtils]: 25: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-27 22:05:59,324 INFO L290 TraceCheckUtils]: 26: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-27 22:05:59,324 INFO L290 TraceCheckUtils]: 27: Hoare triple {12903#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,325 INFO L272 TraceCheckUtils]: 28: Hoare triple {12903#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {12903#false} is VALID [2022-04-27 22:05:59,325 INFO L290 TraceCheckUtils]: 29: Hoare triple {12903#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12903#false} is VALID [2022-04-27 22:05:59,325 INFO L290 TraceCheckUtils]: 30: Hoare triple {12903#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,325 INFO L290 TraceCheckUtils]: 31: Hoare triple {12903#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,325 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:05:59,325 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:59,496 INFO L290 TraceCheckUtils]: 31: Hoare triple {12903#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,496 INFO L290 TraceCheckUtils]: 30: Hoare triple {12903#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,496 INFO L290 TraceCheckUtils]: 29: Hoare triple {12903#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12903#false} is VALID [2022-04-27 22:05:59,496 INFO L272 TraceCheckUtils]: 28: Hoare triple {12903#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {12903#false} is VALID [2022-04-27 22:05:59,496 INFO L290 TraceCheckUtils]: 27: Hoare triple {12903#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,496 INFO L290 TraceCheckUtils]: 26: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-27 22:05:59,496 INFO L290 TraceCheckUtils]: 25: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-27 22:05:59,496 INFO L290 TraceCheckUtils]: 24: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-27 22:05:59,496 INFO L290 TraceCheckUtils]: 23: Hoare triple {12903#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-27 22:05:59,497 INFO L290 TraceCheckUtils]: 22: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12903#false} is VALID [2022-04-27 22:05:59,497 INFO L290 TraceCheckUtils]: 21: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:59,498 INFO L290 TraceCheckUtils]: 20: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:59,499 INFO L290 TraceCheckUtils]: 19: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,499 INFO L290 TraceCheckUtils]: 18: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,500 INFO L290 TraceCheckUtils]: 17: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,500 INFO L290 TraceCheckUtils]: 16: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,500 INFO L290 TraceCheckUtils]: 15: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,501 INFO L290 TraceCheckUtils]: 14: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,501 INFO L290 TraceCheckUtils]: 13: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,502 INFO L290 TraceCheckUtils]: 12: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:59,503 INFO L290 TraceCheckUtils]: 11: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:05:59,503 INFO L290 TraceCheckUtils]: 10: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:59,503 INFO L290 TraceCheckUtils]: 9: Hoare triple {12902#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:59,503 INFO L290 TraceCheckUtils]: 8: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-27 22:05:59,503 INFO L290 TraceCheckUtils]: 7: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-27 22:05:59,503 INFO L290 TraceCheckUtils]: 6: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-27 22:05:59,504 INFO L290 TraceCheckUtils]: 5: Hoare triple {12902#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12902#true} is VALID [2022-04-27 22:05:59,504 INFO L272 TraceCheckUtils]: 4: Hoare triple {12902#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,504 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12902#true} {12902#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,504 INFO L290 TraceCheckUtils]: 2: Hoare triple {12902#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,504 INFO L290 TraceCheckUtils]: 1: Hoare triple {12902#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12902#true} is VALID [2022-04-27 22:05:59,504 INFO L272 TraceCheckUtils]: 0: Hoare triple {12902#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-27 22:05:59,504 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:05:59,504 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [697519430] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:59,504 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:59,504 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 7 [2022-04-27 22:05:59,504 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2084328794] [2022-04-27 22:05:59,505 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:59,505 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:05:59,506 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:59,506 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,523 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:59,523 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 22:05:59,523 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:59,524 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 22:05:59,524 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:05:59,524 INFO L87 Difference]: Start difference. First operand 134 states and 168 transitions. Second operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:59,978 INFO L93 Difference]: Finished difference Result 146 states and 182 transitions. [2022-04-27 22:05:59,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 22:05:59,978 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:05:59,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:59,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 44 transitions. [2022-04-27 22:05:59,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 44 transitions. [2022-04-27 22:05:59,979 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 44 transitions. [2022-04-27 22:06:00,010 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:00,011 INFO L225 Difference]: With dead ends: 146 [2022-04-27 22:06:00,011 INFO L226 Difference]: Without dead ends: 121 [2022-04-27 22:06:00,011 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 67 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2022-04-27 22:06:00,012 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 23 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 44 SdHoareTripleChecker+Invalid, 104 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:00,012 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 44 Invalid, 104 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:06:00,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2022-04-27 22:06:00,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2022-04-27 22:06:00,263 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:00,263 INFO L82 GeneralOperation]: Start isEquivalent. First operand 121 states. Second operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:00,264 INFO L74 IsIncluded]: Start isIncluded. First operand 121 states. Second operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:00,264 INFO L87 Difference]: Start difference. First operand 121 states. Second operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:00,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:00,268 INFO L93 Difference]: Finished difference Result 121 states and 153 transitions. [2022-04-27 22:06:00,268 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 153 transitions. [2022-04-27 22:06:00,269 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:00,269 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:00,269 INFO L74 IsIncluded]: Start isIncluded. First operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 121 states. [2022-04-27 22:06:00,269 INFO L87 Difference]: Start difference. First operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 121 states. [2022-04-27 22:06:00,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:00,270 INFO L93 Difference]: Finished difference Result 121 states and 153 transitions. [2022-04-27 22:06:00,270 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 153 transitions. [2022-04-27 22:06:00,270 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:00,270 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:00,270 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:00,270 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:00,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:00,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 153 transitions. [2022-04-27 22:06:00,272 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 153 transitions. Word has length 32 [2022-04-27 22:06:00,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:00,272 INFO L495 AbstractCegarLoop]: Abstraction has 121 states and 153 transitions. [2022-04-27 22:06:00,272 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:00,272 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 153 transitions. [2022-04-27 22:06:00,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 22:06:00,272 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:00,272 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:00,290 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:00,487 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:00,488 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:00,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:00,488 INFO L85 PathProgramCache]: Analyzing trace with hash 28691148, now seen corresponding path program 5 times [2022-04-27 22:06:00,488 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:00,488 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524277643] [2022-04-27 22:06:00,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:00,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:00,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:00,685 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:00,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:00,687 INFO L290 TraceCheckUtils]: 0: Hoare triple {13758#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13740#true} is VALID [2022-04-27 22:06:00,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {13740#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:00,688 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13740#true} {13740#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:00,688 INFO L272 TraceCheckUtils]: 0: Hoare triple {13740#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13758#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:00,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {13758#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13740#true} is VALID [2022-04-27 22:06:00,688 INFO L290 TraceCheckUtils]: 2: Hoare triple {13740#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:00,688 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13740#true} {13740#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:00,688 INFO L272 TraceCheckUtils]: 4: Hoare triple {13740#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:00,689 INFO L290 TraceCheckUtils]: 5: Hoare triple {13740#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13745#(= main_~y~0 0)} is VALID [2022-04-27 22:06:00,689 INFO L290 TraceCheckUtils]: 6: Hoare triple {13745#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13746#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:00,690 INFO L290 TraceCheckUtils]: 7: Hoare triple {13746#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13747#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:00,690 INFO L290 TraceCheckUtils]: 8: Hoare triple {13747#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13748#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:00,691 INFO L290 TraceCheckUtils]: 9: Hoare triple {13748#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13749#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:00,691 INFO L290 TraceCheckUtils]: 10: Hoare triple {13749#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13750#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:00,691 INFO L290 TraceCheckUtils]: 11: Hoare triple {13750#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13750#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:00,692 INFO L290 TraceCheckUtils]: 12: Hoare triple {13750#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:06:00,692 INFO L290 TraceCheckUtils]: 13: Hoare triple {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13752#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:06:00,693 INFO L290 TraceCheckUtils]: 14: Hoare triple {13752#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13753#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:06:00,693 INFO L290 TraceCheckUtils]: 15: Hoare triple {13753#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13754#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:06:00,694 INFO L290 TraceCheckUtils]: 16: Hoare triple {13754#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13755#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:06:00,694 INFO L290 TraceCheckUtils]: 17: Hoare triple {13755#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13756#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:06:00,694 INFO L290 TraceCheckUtils]: 18: Hoare triple {13756#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13756#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:06:00,695 INFO L290 TraceCheckUtils]: 19: Hoare triple {13756#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13755#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:06:00,695 INFO L290 TraceCheckUtils]: 20: Hoare triple {13755#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13754#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:06:00,696 INFO L290 TraceCheckUtils]: 21: Hoare triple {13754#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13753#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:06:00,696 INFO L290 TraceCheckUtils]: 22: Hoare triple {13753#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13752#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:06:00,697 INFO L290 TraceCheckUtils]: 23: Hoare triple {13752#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:06:00,697 INFO L290 TraceCheckUtils]: 24: Hoare triple {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:06:00,698 INFO L290 TraceCheckUtils]: 25: Hoare triple {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:06:00,698 INFO L290 TraceCheckUtils]: 26: Hoare triple {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {13757#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:06:00,698 INFO L290 TraceCheckUtils]: 27: Hoare triple {13757#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:00,699 INFO L272 TraceCheckUtils]: 28: Hoare triple {13741#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {13741#false} is VALID [2022-04-27 22:06:00,699 INFO L290 TraceCheckUtils]: 29: Hoare triple {13741#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13741#false} is VALID [2022-04-27 22:06:00,699 INFO L290 TraceCheckUtils]: 30: Hoare triple {13741#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:00,699 INFO L290 TraceCheckUtils]: 31: Hoare triple {13741#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:00,699 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 46 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:06:00,699 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:00,699 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524277643] [2022-04-27 22:06:00,699 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [524277643] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:00,699 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1421201287] [2022-04-27 22:06:00,699 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:06:00,699 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:00,700 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:00,700 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:00,716 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-27 22:06:00,825 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-27 22:06:00,826 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:00,827 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-27 22:06:00,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:00,834 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:01,002 INFO L272 TraceCheckUtils]: 0: Hoare triple {13740#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:01,002 INFO L290 TraceCheckUtils]: 1: Hoare triple {13740#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13740#true} is VALID [2022-04-27 22:06:01,002 INFO L290 TraceCheckUtils]: 2: Hoare triple {13740#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:01,002 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13740#true} {13740#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:01,002 INFO L272 TraceCheckUtils]: 4: Hoare triple {13740#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:01,002 INFO L290 TraceCheckUtils]: 5: Hoare triple {13740#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13740#true} is VALID [2022-04-27 22:06:01,003 INFO L290 TraceCheckUtils]: 6: Hoare triple {13740#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:01,003 INFO L290 TraceCheckUtils]: 7: Hoare triple {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:01,004 INFO L290 TraceCheckUtils]: 8: Hoare triple {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:01,005 INFO L290 TraceCheckUtils]: 9: Hoare triple {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:06:01,005 INFO L290 TraceCheckUtils]: 10: Hoare triple {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:01,005 INFO L290 TraceCheckUtils]: 11: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:01,006 INFO L290 TraceCheckUtils]: 12: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:01,006 INFO L290 TraceCheckUtils]: 13: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:06:01,007 INFO L290 TraceCheckUtils]: 14: Hoare triple {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:01,007 INFO L290 TraceCheckUtils]: 15: Hoare triple {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:01,008 INFO L290 TraceCheckUtils]: 16: Hoare triple {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:01,008 INFO L290 TraceCheckUtils]: 17: Hoare triple {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,009 INFO L290 TraceCheckUtils]: 18: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,009 INFO L290 TraceCheckUtils]: 19: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,009 INFO L290 TraceCheckUtils]: 20: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,009 INFO L290 TraceCheckUtils]: 21: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,010 INFO L290 TraceCheckUtils]: 22: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,010 INFO L290 TraceCheckUtils]: 23: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,010 INFO L290 TraceCheckUtils]: 24: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,010 INFO L290 TraceCheckUtils]: 25: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:01,010 INFO L290 TraceCheckUtils]: 26: Hoare triple {13741#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {13741#false} is VALID [2022-04-27 22:06:01,011 INFO L290 TraceCheckUtils]: 27: Hoare triple {13741#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:01,011 INFO L272 TraceCheckUtils]: 28: Hoare triple {13741#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {13741#false} is VALID [2022-04-27 22:06:01,011 INFO L290 TraceCheckUtils]: 29: Hoare triple {13741#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13741#false} is VALID [2022-04-27 22:06:01,011 INFO L290 TraceCheckUtils]: 30: Hoare triple {13741#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:01,011 INFO L290 TraceCheckUtils]: 31: Hoare triple {13741#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:01,011 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 22:06:01,011 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:01,102 INFO L290 TraceCheckUtils]: 31: Hoare triple {13741#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:01,102 INFO L290 TraceCheckUtils]: 30: Hoare triple {13741#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:01,102 INFO L290 TraceCheckUtils]: 29: Hoare triple {13741#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13741#false} is VALID [2022-04-27 22:06:01,102 INFO L272 TraceCheckUtils]: 28: Hoare triple {13741#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {13741#false} is VALID [2022-04-27 22:06:01,102 INFO L290 TraceCheckUtils]: 27: Hoare triple {13741#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:01,103 INFO L290 TraceCheckUtils]: 26: Hoare triple {13741#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {13741#false} is VALID [2022-04-27 22:06:01,103 INFO L290 TraceCheckUtils]: 25: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-27 22:06:01,103 INFO L290 TraceCheckUtils]: 24: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,103 INFO L290 TraceCheckUtils]: 23: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,104 INFO L290 TraceCheckUtils]: 22: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,104 INFO L290 TraceCheckUtils]: 21: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,104 INFO L290 TraceCheckUtils]: 20: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,104 INFO L290 TraceCheckUtils]: 19: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,105 INFO L290 TraceCheckUtils]: 18: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,105 INFO L290 TraceCheckUtils]: 17: Hoare triple {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:01,106 INFO L290 TraceCheckUtils]: 16: Hoare triple {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:01,106 INFO L290 TraceCheckUtils]: 15: Hoare triple {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:01,107 INFO L290 TraceCheckUtils]: 14: Hoare triple {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:01,107 INFO L290 TraceCheckUtils]: 13: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:06:01,108 INFO L290 TraceCheckUtils]: 12: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:01,108 INFO L290 TraceCheckUtils]: 11: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:01,108 INFO L290 TraceCheckUtils]: 10: Hoare triple {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:01,109 INFO L290 TraceCheckUtils]: 9: Hoare triple {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:06:01,110 INFO L290 TraceCheckUtils]: 8: Hoare triple {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:01,110 INFO L290 TraceCheckUtils]: 7: Hoare triple {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:01,111 INFO L290 TraceCheckUtils]: 6: Hoare triple {13740#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:01,111 INFO L290 TraceCheckUtils]: 5: Hoare triple {13740#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13740#true} is VALID [2022-04-27 22:06:01,111 INFO L272 TraceCheckUtils]: 4: Hoare triple {13740#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:01,111 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13740#true} {13740#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:01,111 INFO L290 TraceCheckUtils]: 2: Hoare triple {13740#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:01,111 INFO L290 TraceCheckUtils]: 1: Hoare triple {13740#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13740#true} is VALID [2022-04-27 22:06:01,111 INFO L272 TraceCheckUtils]: 0: Hoare triple {13740#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-27 22:06:01,111 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 22:06:01,111 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1421201287] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:01,112 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:01,112 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 8, 8] total 22 [2022-04-27 22:06:01,112 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1789743701] [2022-04-27 22:06:01,112 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:01,112 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:06:01,112 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:01,112 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:01,152 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:01,152 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 22:06:01,152 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:01,153 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 22:06:01,153 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462 [2022-04-27 22:06:01,153 INFO L87 Difference]: Start difference. First operand 121 states and 153 transitions. Second operand has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:12,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:12,363 INFO L93 Difference]: Finished difference Result 223 states and 305 transitions. [2022-04-27 22:06:12,363 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2022-04-27 22:06:12,363 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:06:12,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:12,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:12,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 183 transitions. [2022-04-27 22:06:12,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:12,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 183 transitions. [2022-04-27 22:06:12,368 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 76 states and 183 transitions. [2022-04-27 22:06:12,764 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 183 edges. 183 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:12,767 INFO L225 Difference]: With dead ends: 223 [2022-04-27 22:06:12,767 INFO L226 Difference]: Without dead ends: 203 [2022-04-27 22:06:12,768 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2590 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=1028, Invalid=7902, Unknown=0, NotChecked=0, Total=8930 [2022-04-27 22:06:12,768 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 145 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 1418 mSolverCounterSat, 277 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 117 SdHoareTripleChecker+Invalid, 1695 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 277 IncrementalHoareTripleChecker+Valid, 1418 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:12,768 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [145 Valid, 117 Invalid, 1695 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [277 Valid, 1418 Invalid, 0 Unknown, 0 Unchecked, 3.2s Time] [2022-04-27 22:06:12,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2022-04-27 22:06:13,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 146. [2022-04-27 22:06:13,052 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:13,053 INFO L82 GeneralOperation]: Start isEquivalent. First operand 203 states. Second operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:13,053 INFO L74 IsIncluded]: Start isIncluded. First operand 203 states. Second operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:13,053 INFO L87 Difference]: Start difference. First operand 203 states. Second operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:13,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:13,056 INFO L93 Difference]: Finished difference Result 203 states and 251 transitions. [2022-04-27 22:06:13,056 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 251 transitions. [2022-04-27 22:06:13,056 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:13,056 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:13,056 INFO L74 IsIncluded]: Start isIncluded. First operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 203 states. [2022-04-27 22:06:13,056 INFO L87 Difference]: Start difference. First operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 203 states. [2022-04-27 22:06:13,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:13,060 INFO L93 Difference]: Finished difference Result 203 states and 251 transitions. [2022-04-27 22:06:13,060 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 251 transitions. [2022-04-27 22:06:13,060 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:13,060 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:13,060 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:13,060 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:13,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:13,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 182 transitions. [2022-04-27 22:06:13,062 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 182 transitions. Word has length 32 [2022-04-27 22:06:13,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:13,062 INFO L495 AbstractCegarLoop]: Abstraction has 146 states and 182 transitions. [2022-04-27 22:06:13,062 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:13,062 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 182 transitions. [2022-04-27 22:06:13,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 22:06:13,063 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:13,063 INFO L195 NwaCegarLoop]: trace histogram [8, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:13,069 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:13,267 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-04-27 22:06:13,267 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:13,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:13,267 INFO L85 PathProgramCache]: Analyzing trace with hash -1317090289, now seen corresponding path program 6 times [2022-04-27 22:06:13,267 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:13,268 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1310087384] [2022-04-27 22:06:13,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:13,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:13,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:13,458 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:13,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:13,462 INFO L290 TraceCheckUtils]: 0: Hoare triple {15021#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15003#true} is VALID [2022-04-27 22:06:13,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {15003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,462 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15003#true} {15003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,462 INFO L272 TraceCheckUtils]: 0: Hoare triple {15003#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15021#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:13,463 INFO L290 TraceCheckUtils]: 1: Hoare triple {15021#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15003#true} is VALID [2022-04-27 22:06:13,463 INFO L290 TraceCheckUtils]: 2: Hoare triple {15003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,463 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15003#true} {15003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,463 INFO L272 TraceCheckUtils]: 4: Hoare triple {15003#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,463 INFO L290 TraceCheckUtils]: 5: Hoare triple {15003#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15008#(= main_~y~0 0)} is VALID [2022-04-27 22:06:13,463 INFO L290 TraceCheckUtils]: 6: Hoare triple {15008#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15009#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:13,464 INFO L290 TraceCheckUtils]: 7: Hoare triple {15009#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15010#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:13,464 INFO L290 TraceCheckUtils]: 8: Hoare triple {15010#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15011#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:13,465 INFO L290 TraceCheckUtils]: 9: Hoare triple {15011#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15012#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:13,465 INFO L290 TraceCheckUtils]: 10: Hoare triple {15012#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:13,466 INFO L290 TraceCheckUtils]: 11: Hoare triple {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:13,466 INFO L290 TraceCheckUtils]: 12: Hoare triple {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:13,467 INFO L290 TraceCheckUtils]: 13: Hoare triple {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:13,467 INFO L290 TraceCheckUtils]: 14: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:13,467 INFO L290 TraceCheckUtils]: 15: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {15017#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:06:13,468 INFO L290 TraceCheckUtils]: 16: Hoare triple {15017#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15018#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:06:13,468 INFO L290 TraceCheckUtils]: 17: Hoare triple {15018#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15019#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:06:13,469 INFO L290 TraceCheckUtils]: 18: Hoare triple {15019#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15020#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:06:13,469 INFO L290 TraceCheckUtils]: 19: Hoare triple {15020#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,469 INFO L290 TraceCheckUtils]: 20: Hoare triple {15004#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15004#false} is VALID [2022-04-27 22:06:13,469 INFO L290 TraceCheckUtils]: 21: Hoare triple {15004#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L290 TraceCheckUtils]: 22: Hoare triple {15004#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L290 TraceCheckUtils]: 23: Hoare triple {15004#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L290 TraceCheckUtils]: 24: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L290 TraceCheckUtils]: 25: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L290 TraceCheckUtils]: 26: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L290 TraceCheckUtils]: 27: Hoare triple {15004#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L290 TraceCheckUtils]: 28: Hoare triple {15004#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L272 TraceCheckUtils]: 29: Hoare triple {15004#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L290 TraceCheckUtils]: 30: Hoare triple {15004#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L290 TraceCheckUtils]: 31: Hoare triple {15004#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L290 TraceCheckUtils]: 32: Hoare triple {15004#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,470 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 22:06:13,471 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:13,471 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1310087384] [2022-04-27 22:06:13,471 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1310087384] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:13,471 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1894490715] [2022-04-27 22:06:13,471 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:06:13,471 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:13,471 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:13,472 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:13,472 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-27 22:06:13,531 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-27 22:06:13,532 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:13,532 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-27 22:06:13,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:13,539 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:13,745 INFO L272 TraceCheckUtils]: 0: Hoare triple {15003#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,745 INFO L290 TraceCheckUtils]: 1: Hoare triple {15003#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15003#true} is VALID [2022-04-27 22:06:13,745 INFO L290 TraceCheckUtils]: 2: Hoare triple {15003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,746 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15003#true} {15003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,746 INFO L272 TraceCheckUtils]: 4: Hoare triple {15003#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,746 INFO L290 TraceCheckUtils]: 5: Hoare triple {15003#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15008#(= main_~y~0 0)} is VALID [2022-04-27 22:06:13,746 INFO L290 TraceCheckUtils]: 6: Hoare triple {15008#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15009#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:13,747 INFO L290 TraceCheckUtils]: 7: Hoare triple {15009#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15010#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:13,747 INFO L290 TraceCheckUtils]: 8: Hoare triple {15010#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15011#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:13,748 INFO L290 TraceCheckUtils]: 9: Hoare triple {15011#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15012#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:13,748 INFO L290 TraceCheckUtils]: 10: Hoare triple {15012#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:13,749 INFO L290 TraceCheckUtils]: 11: Hoare triple {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:13,749 INFO L290 TraceCheckUtils]: 12: Hoare triple {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:13,750 INFO L290 TraceCheckUtils]: 13: Hoare triple {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:13,750 INFO L290 TraceCheckUtils]: 14: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:13,750 INFO L290 TraceCheckUtils]: 15: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:13,751 INFO L290 TraceCheckUtils]: 16: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:13,751 INFO L290 TraceCheckUtils]: 17: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:13,751 INFO L290 TraceCheckUtils]: 18: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:13,752 INFO L290 TraceCheckUtils]: 19: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:13,752 INFO L290 TraceCheckUtils]: 20: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:13,752 INFO L290 TraceCheckUtils]: 21: Hoare triple {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:13,753 INFO L290 TraceCheckUtils]: 22: Hoare triple {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:13,753 INFO L290 TraceCheckUtils]: 23: Hoare triple {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,753 INFO L290 TraceCheckUtils]: 24: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-27 22:06:13,753 INFO L290 TraceCheckUtils]: 25: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-27 22:06:13,754 INFO L290 TraceCheckUtils]: 26: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-27 22:06:13,754 INFO L290 TraceCheckUtils]: 27: Hoare triple {15004#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,754 INFO L290 TraceCheckUtils]: 28: Hoare triple {15004#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,754 INFO L272 TraceCheckUtils]: 29: Hoare triple {15004#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {15004#false} is VALID [2022-04-27 22:06:13,754 INFO L290 TraceCheckUtils]: 30: Hoare triple {15004#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15004#false} is VALID [2022-04-27 22:06:13,754 INFO L290 TraceCheckUtils]: 31: Hoare triple {15004#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,754 INFO L290 TraceCheckUtils]: 32: Hoare triple {15004#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,754 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 22:06:13,754 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:13,971 INFO L290 TraceCheckUtils]: 32: Hoare triple {15004#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,971 INFO L290 TraceCheckUtils]: 31: Hoare triple {15004#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,971 INFO L290 TraceCheckUtils]: 30: Hoare triple {15004#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15004#false} is VALID [2022-04-27 22:06:13,971 INFO L272 TraceCheckUtils]: 29: Hoare triple {15004#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {15004#false} is VALID [2022-04-27 22:06:13,971 INFO L290 TraceCheckUtils]: 28: Hoare triple {15004#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,971 INFO L290 TraceCheckUtils]: 27: Hoare triple {15004#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,971 INFO L290 TraceCheckUtils]: 26: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-27 22:06:13,971 INFO L290 TraceCheckUtils]: 25: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-27 22:06:13,972 INFO L290 TraceCheckUtils]: 24: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-27 22:06:13,972 INFO L290 TraceCheckUtils]: 23: Hoare triple {15148#(< 0 (mod main_~y~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-27 22:06:13,973 INFO L290 TraceCheckUtils]: 22: Hoare triple {15152#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15148#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:06:13,974 INFO L290 TraceCheckUtils]: 21: Hoare triple {15156#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15152#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:13,974 INFO L290 TraceCheckUtils]: 20: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15156#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:13,975 INFO L290 TraceCheckUtils]: 19: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:06:13,975 INFO L290 TraceCheckUtils]: 18: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:06:13,975 INFO L290 TraceCheckUtils]: 17: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:06:13,975 INFO L290 TraceCheckUtils]: 16: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:06:13,976 INFO L290 TraceCheckUtils]: 15: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:06:13,976 INFO L290 TraceCheckUtils]: 14: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:06:13,976 INFO L290 TraceCheckUtils]: 13: Hoare triple {15156#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:06:13,977 INFO L290 TraceCheckUtils]: 12: Hoare triple {15152#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15156#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:13,978 INFO L290 TraceCheckUtils]: 11: Hoare triple {15148#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15152#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:13,978 INFO L290 TraceCheckUtils]: 10: Hoare triple {15191#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15148#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:06:13,979 INFO L290 TraceCheckUtils]: 9: Hoare triple {15195#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15191#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:06:13,979 INFO L290 TraceCheckUtils]: 8: Hoare triple {15199#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15195#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:06:13,980 INFO L290 TraceCheckUtils]: 7: Hoare triple {15203#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15199#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:06:13,981 INFO L290 TraceCheckUtils]: 6: Hoare triple {15207#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15203#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:06:13,981 INFO L290 TraceCheckUtils]: 5: Hoare triple {15003#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15207#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:06:13,981 INFO L272 TraceCheckUtils]: 4: Hoare triple {15003#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,981 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15003#true} {15003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,981 INFO L290 TraceCheckUtils]: 2: Hoare triple {15003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,981 INFO L290 TraceCheckUtils]: 1: Hoare triple {15003#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15003#true} is VALID [2022-04-27 22:06:13,981 INFO L272 TraceCheckUtils]: 0: Hoare triple {15003#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-27 22:06:13,981 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 22:06:13,982 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1894490715] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:13,982 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:13,982 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 11, 11] total 25 [2022-04-27 22:06:13,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [611208601] [2022-04-27 22:06:13,982 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:13,982 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 22:06:13,982 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:13,982 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:14,016 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:14,016 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-27 22:06:14,016 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:14,016 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-27 22:06:14,017 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=473, Unknown=0, NotChecked=0, Total=600 [2022-04-27 22:06:14,017 INFO L87 Difference]: Start difference. First operand 146 states and 182 transitions. Second operand has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:28,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:28,895 INFO L93 Difference]: Finished difference Result 727 states and 998 transitions. [2022-04-27 22:06:28,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2022-04-27 22:06:28,895 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 22:06:28,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:28,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:28,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 434 transitions. [2022-04-27 22:06:28,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:28,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 434 transitions. [2022-04-27 22:06:28,908 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 92 states and 434 transitions. [2022-04-27 22:06:30,268 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 434 edges. 434 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:30,286 INFO L225 Difference]: With dead ends: 727 [2022-04-27 22:06:30,286 INFO L226 Difference]: Without dead ends: 697 [2022-04-27 22:06:30,287 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 59 SyntacticMatches, 1 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4703 ImplicationChecksByTransitivity, 8.1s TimeCoverageRelationStatistics Valid=3039, Invalid=9843, Unknown=0, NotChecked=0, Total=12882 [2022-04-27 22:06:30,287 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 693 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 1285 mSolverCounterSat, 677 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 693 SdHoareTripleChecker+Valid, 124 SdHoareTripleChecker+Invalid, 1962 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 677 IncrementalHoareTripleChecker+Valid, 1285 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:30,288 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [693 Valid, 124 Invalid, 1962 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [677 Valid, 1285 Invalid, 0 Unknown, 0 Unchecked, 2.4s Time] [2022-04-27 22:06:30,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2022-04-27 22:06:30,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 202. [2022-04-27 22:06:30,691 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:30,691 INFO L82 GeneralOperation]: Start isEquivalent. First operand 697 states. Second operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:30,691 INFO L74 IsIncluded]: Start isIncluded. First operand 697 states. Second operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:30,691 INFO L87 Difference]: Start difference. First operand 697 states. Second operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:30,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:30,707 INFO L93 Difference]: Finished difference Result 697 states and 921 transitions. [2022-04-27 22:06:30,707 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 921 transitions. [2022-04-27 22:06:30,708 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:30,708 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:30,708 INFO L74 IsIncluded]: Start isIncluded. First operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 697 states. [2022-04-27 22:06:30,708 INFO L87 Difference]: Start difference. First operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 697 states. [2022-04-27 22:06:30,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:30,723 INFO L93 Difference]: Finished difference Result 697 states and 921 transitions. [2022-04-27 22:06:30,723 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 921 transitions. [2022-04-27 22:06:30,724 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:30,724 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:30,724 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:30,724 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:30,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:30,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 256 transitions. [2022-04-27 22:06:30,727 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 256 transitions. Word has length 33 [2022-04-27 22:06:30,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:30,727 INFO L495 AbstractCegarLoop]: Abstraction has 202 states and 256 transitions. [2022-04-27 22:06:30,727 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:30,727 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 256 transitions. [2022-04-27 22:06:30,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 22:06:30,727 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:30,727 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:30,747 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:30,948 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-04-27 22:06:30,948 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:30,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:30,948 INFO L85 PathProgramCache]: Analyzing trace with hash -1824944628, now seen corresponding path program 9 times [2022-04-27 22:06:30,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:30,949 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210720897] [2022-04-27 22:06:30,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:30,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:30,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:31,056 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:31,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:31,059 INFO L290 TraceCheckUtils]: 0: Hoare triple {18024#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18012#true} is VALID [2022-04-27 22:06:31,059 INFO L290 TraceCheckUtils]: 1: Hoare triple {18012#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,059 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18012#true} {18012#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,059 INFO L272 TraceCheckUtils]: 0: Hoare triple {18012#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18024#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:31,060 INFO L290 TraceCheckUtils]: 1: Hoare triple {18024#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18012#true} is VALID [2022-04-27 22:06:31,060 INFO L290 TraceCheckUtils]: 2: Hoare triple {18012#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,060 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18012#true} {18012#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,060 INFO L272 TraceCheckUtils]: 4: Hoare triple {18012#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,060 INFO L290 TraceCheckUtils]: 5: Hoare triple {18012#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {18012#true} is VALID [2022-04-27 22:06:31,060 INFO L290 TraceCheckUtils]: 6: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-27 22:06:31,060 INFO L290 TraceCheckUtils]: 7: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-27 22:06:31,060 INFO L290 TraceCheckUtils]: 8: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-27 22:06:31,060 INFO L290 TraceCheckUtils]: 9: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-27 22:06:31,061 INFO L290 TraceCheckUtils]: 10: Hoare triple {18012#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18017#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:06:31,061 INFO L290 TraceCheckUtils]: 11: Hoare triple {18017#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {18017#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:06:31,062 INFO L290 TraceCheckUtils]: 12: Hoare triple {18017#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18018#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:06:31,062 INFO L290 TraceCheckUtils]: 13: Hoare triple {18018#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18019#(<= (+ 2 (* (div (+ main_~x~0 4294967293) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:06:31,063 INFO L290 TraceCheckUtils]: 14: Hoare triple {18019#(<= (+ 2 (* (div (+ main_~x~0 4294967293) 4294967296) 4294967296)) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18020#(<= (+ 3 (* (div (+ 4294967292 main_~x~0) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:06:31,064 INFO L290 TraceCheckUtils]: 15: Hoare triple {18020#(<= (+ 3 (* (div (+ 4294967292 main_~x~0) 4294967296) 4294967296)) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:06:31,064 INFO L290 TraceCheckUtils]: 16: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:06:31,064 INFO L290 TraceCheckUtils]: 17: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:06:31,065 INFO L290 TraceCheckUtils]: 18: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:06:31,065 INFO L290 TraceCheckUtils]: 19: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:06:31,065 INFO L290 TraceCheckUtils]: 20: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:06:31,066 INFO L290 TraceCheckUtils]: 21: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:06:31,067 INFO L290 TraceCheckUtils]: 22: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18022#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:06:31,067 INFO L290 TraceCheckUtils]: 23: Hoare triple {18022#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18023#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:06:31,068 INFO L290 TraceCheckUtils]: 24: Hoare triple {18023#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,068 INFO L290 TraceCheckUtils]: 25: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,068 INFO L290 TraceCheckUtils]: 26: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,068 INFO L290 TraceCheckUtils]: 27: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,068 INFO L290 TraceCheckUtils]: 28: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,068 INFO L290 TraceCheckUtils]: 29: Hoare triple {18013#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,068 INFO L272 TraceCheckUtils]: 30: Hoare triple {18013#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {18013#false} is VALID [2022-04-27 22:06:31,068 INFO L290 TraceCheckUtils]: 31: Hoare triple {18013#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18013#false} is VALID [2022-04-27 22:06:31,068 INFO L290 TraceCheckUtils]: 32: Hoare triple {18013#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,068 INFO L290 TraceCheckUtils]: 33: Hoare triple {18013#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,069 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-04-27 22:06:31,069 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:31,069 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210720897] [2022-04-27 22:06:31,069 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1210720897] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:31,069 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [133322968] [2022-04-27 22:06:31,069 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:06:31,069 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:31,069 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:31,070 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:31,071 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-27 22:06:31,122 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 22:06:31,122 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:31,123 INFO L263 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 22:06:31,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:31,130 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:31,263 INFO L272 TraceCheckUtils]: 0: Hoare triple {18012#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,263 INFO L290 TraceCheckUtils]: 1: Hoare triple {18012#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18012#true} is VALID [2022-04-27 22:06:31,263 INFO L290 TraceCheckUtils]: 2: Hoare triple {18012#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,263 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18012#true} {18012#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,263 INFO L272 TraceCheckUtils]: 4: Hoare triple {18012#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,263 INFO L290 TraceCheckUtils]: 5: Hoare triple {18012#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {18012#true} is VALID [2022-04-27 22:06:31,263 INFO L290 TraceCheckUtils]: 6: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-27 22:06:31,263 INFO L290 TraceCheckUtils]: 7: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-27 22:06:31,264 INFO L290 TraceCheckUtils]: 8: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:31,265 INFO L290 TraceCheckUtils]: 9: Hoare triple {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:31,265 INFO L290 TraceCheckUtils]: 10: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:31,265 INFO L290 TraceCheckUtils]: 11: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:31,266 INFO L290 TraceCheckUtils]: 12: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:31,267 INFO L290 TraceCheckUtils]: 13: Hoare triple {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18069#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:31,267 INFO L290 TraceCheckUtils]: 14: Hoare triple {18069#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:31,268 INFO L290 TraceCheckUtils]: 15: Hoare triple {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,268 INFO L290 TraceCheckUtils]: 16: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,269 INFO L290 TraceCheckUtils]: 17: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,269 INFO L290 TraceCheckUtils]: 18: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,269 INFO L290 TraceCheckUtils]: 19: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,270 INFO L290 TraceCheckUtils]: 20: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,270 INFO L290 TraceCheckUtils]: 21: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,270 INFO L290 TraceCheckUtils]: 22: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:31,271 INFO L290 TraceCheckUtils]: 23: Hoare triple {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18069#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:31,271 INFO L290 TraceCheckUtils]: 24: Hoare triple {18069#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,271 INFO L290 TraceCheckUtils]: 25: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,271 INFO L290 TraceCheckUtils]: 26: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,272 INFO L290 TraceCheckUtils]: 27: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,272 INFO L290 TraceCheckUtils]: 28: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,272 INFO L290 TraceCheckUtils]: 29: Hoare triple {18013#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,272 INFO L272 TraceCheckUtils]: 30: Hoare triple {18013#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {18013#false} is VALID [2022-04-27 22:06:31,272 INFO L290 TraceCheckUtils]: 31: Hoare triple {18013#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18013#false} is VALID [2022-04-27 22:06:31,272 INFO L290 TraceCheckUtils]: 32: Hoare triple {18013#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,272 INFO L290 TraceCheckUtils]: 33: Hoare triple {18013#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,272 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2022-04-27 22:06:31,272 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:31,362 INFO L290 TraceCheckUtils]: 33: Hoare triple {18013#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,362 INFO L290 TraceCheckUtils]: 32: Hoare triple {18013#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,362 INFO L290 TraceCheckUtils]: 31: Hoare triple {18013#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18013#false} is VALID [2022-04-27 22:06:31,362 INFO L272 TraceCheckUtils]: 30: Hoare triple {18013#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {18013#false} is VALID [2022-04-27 22:06:31,362 INFO L290 TraceCheckUtils]: 29: Hoare triple {18013#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,362 INFO L290 TraceCheckUtils]: 28: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,362 INFO L290 TraceCheckUtils]: 27: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,363 INFO L290 TraceCheckUtils]: 26: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,363 INFO L290 TraceCheckUtils]: 25: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-27 22:06:31,363 INFO L290 TraceCheckUtils]: 24: Hoare triple {18069#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-27 22:06:31,364 INFO L290 TraceCheckUtils]: 23: Hoare triple {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18069#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:31,364 INFO L290 TraceCheckUtils]: 22: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:31,365 INFO L290 TraceCheckUtils]: 21: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,365 INFO L290 TraceCheckUtils]: 20: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,365 INFO L290 TraceCheckUtils]: 19: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,366 INFO L290 TraceCheckUtils]: 18: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,366 INFO L290 TraceCheckUtils]: 17: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,366 INFO L290 TraceCheckUtils]: 16: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,367 INFO L290 TraceCheckUtils]: 15: Hoare triple {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:31,367 INFO L290 TraceCheckUtils]: 14: Hoare triple {18069#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:31,368 INFO L290 TraceCheckUtils]: 13: Hoare triple {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18069#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:31,369 INFO L290 TraceCheckUtils]: 12: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:31,369 INFO L290 TraceCheckUtils]: 11: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:31,369 INFO L290 TraceCheckUtils]: 10: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:31,370 INFO L290 TraceCheckUtils]: 9: Hoare triple {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:31,370 INFO L290 TraceCheckUtils]: 8: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:31,370 INFO L290 TraceCheckUtils]: 7: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-27 22:06:31,370 INFO L290 TraceCheckUtils]: 6: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-27 22:06:31,370 INFO L290 TraceCheckUtils]: 5: Hoare triple {18012#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {18012#true} is VALID [2022-04-27 22:06:31,371 INFO L272 TraceCheckUtils]: 4: Hoare triple {18012#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,371 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18012#true} {18012#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,371 INFO L290 TraceCheckUtils]: 2: Hoare triple {18012#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,371 INFO L290 TraceCheckUtils]: 1: Hoare triple {18012#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18012#true} is VALID [2022-04-27 22:06:31,371 INFO L272 TraceCheckUtils]: 0: Hoare triple {18012#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-27 22:06:31,371 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2022-04-27 22:06:31,371 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [133322968] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:31,371 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:31,371 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 7] total 15 [2022-04-27 22:06:31,371 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1138429834] [2022-04-27 22:06:31,371 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:31,372 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 22:06:31,372 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:31,372 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:31,411 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:31,411 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 22:06:31,411 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:31,411 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 22:06:31,411 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=150, Unknown=0, NotChecked=0, Total=210 [2022-04-27 22:06:31,412 INFO L87 Difference]: Start difference. First operand 202 states and 256 transitions. Second operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:32,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:32,571 INFO L93 Difference]: Finished difference Result 326 states and 431 transitions. [2022-04-27 22:06:32,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-27 22:06:32,571 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 22:06:32,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:32,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:32,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 94 transitions. [2022-04-27 22:06:32,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:32,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 94 transitions. [2022-04-27 22:06:32,573 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 94 transitions. [2022-04-27 22:06:32,682 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:32,686 INFO L225 Difference]: With dead ends: 326 [2022-04-27 22:06:32,686 INFO L226 Difference]: Without dead ends: 309 [2022-04-27 22:06:32,687 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=245, Invalid=685, Unknown=0, NotChecked=0, Total=930 [2022-04-27 22:06:32,687 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 117 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 82 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 117 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 210 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 82 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:32,687 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [117 Valid, 50 Invalid, 210 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [82 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:06:32,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2022-04-27 22:06:33,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 268. [2022-04-27 22:06:33,196 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:33,196 INFO L82 GeneralOperation]: Start isEquivalent. First operand 309 states. Second operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:33,196 INFO L74 IsIncluded]: Start isIncluded. First operand 309 states. Second operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:33,197 INFO L87 Difference]: Start difference. First operand 309 states. Second operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:33,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:33,200 INFO L93 Difference]: Finished difference Result 309 states and 397 transitions. [2022-04-27 22:06:33,200 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 397 transitions. [2022-04-27 22:06:33,201 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:33,201 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:33,201 INFO L74 IsIncluded]: Start isIncluded. First operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 309 states. [2022-04-27 22:06:33,201 INFO L87 Difference]: Start difference. First operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 309 states. [2022-04-27 22:06:33,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:33,205 INFO L93 Difference]: Finished difference Result 309 states and 397 transitions. [2022-04-27 22:06:33,205 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 397 transitions. [2022-04-27 22:06:33,205 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:33,205 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:33,205 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:33,205 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:33,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:33,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 352 transitions. [2022-04-27 22:06:33,209 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 352 transitions. Word has length 34 [2022-04-27 22:06:33,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:33,209 INFO L495 AbstractCegarLoop]: Abstraction has 268 states and 352 transitions. [2022-04-27 22:06:33,209 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:33,209 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 352 transitions. [2022-04-27 22:06:33,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-27 22:06:33,210 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:33,210 INFO L195 NwaCegarLoop]: trace histogram [9, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:33,231 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:33,411 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-04-27 22:06:33,411 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:33,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:33,412 INFO L85 PathProgramCache]: Analyzing trace with hash 145125386, now seen corresponding path program 7 times [2022-04-27 22:06:33,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:33,412 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [521983913] [2022-04-27 22:06:33,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:33,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:33,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:33,601 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:33,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:33,608 INFO L290 TraceCheckUtils]: 0: Hoare triple {19710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19691#true} is VALID [2022-04-27 22:06:33,608 INFO L290 TraceCheckUtils]: 1: Hoare triple {19691#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:33,608 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19691#true} {19691#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:33,609 INFO L272 TraceCheckUtils]: 0: Hoare triple {19691#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:33,609 INFO L290 TraceCheckUtils]: 1: Hoare triple {19710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19691#true} is VALID [2022-04-27 22:06:33,609 INFO L290 TraceCheckUtils]: 2: Hoare triple {19691#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:33,609 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19691#true} {19691#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:33,609 INFO L272 TraceCheckUtils]: 4: Hoare triple {19691#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:33,609 INFO L290 TraceCheckUtils]: 5: Hoare triple {19691#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19696#(= main_~y~0 0)} is VALID [2022-04-27 22:06:33,610 INFO L290 TraceCheckUtils]: 6: Hoare triple {19696#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19697#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:33,610 INFO L290 TraceCheckUtils]: 7: Hoare triple {19697#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19698#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:33,611 INFO L290 TraceCheckUtils]: 8: Hoare triple {19698#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19699#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:33,611 INFO L290 TraceCheckUtils]: 9: Hoare triple {19699#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19700#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:33,612 INFO L290 TraceCheckUtils]: 10: Hoare triple {19700#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19701#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:33,612 INFO L290 TraceCheckUtils]: 11: Hoare triple {19701#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19702#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:33,613 INFO L290 TraceCheckUtils]: 12: Hoare triple {19702#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19703#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:33,613 INFO L290 TraceCheckUtils]: 13: Hoare triple {19703#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19704#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:33,614 INFO L290 TraceCheckUtils]: 14: Hoare triple {19704#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:06:33,614 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:06:33,615 INFO L290 TraceCheckUtils]: 16: Hoare triple {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19706#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 22:06:33,615 INFO L290 TraceCheckUtils]: 17: Hoare triple {19706#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19707#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:06:33,616 INFO L290 TraceCheckUtils]: 18: Hoare triple {19707#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19708#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:06:33,616 INFO L290 TraceCheckUtils]: 19: Hoare triple {19708#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19709#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 20: Hoare triple {19709#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 21: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 22: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 23: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 24: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 25: Hoare triple {19692#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 26: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 27: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 28: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 29: Hoare triple {19692#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,617 INFO L290 TraceCheckUtils]: 30: Hoare triple {19692#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,618 INFO L272 TraceCheckUtils]: 31: Hoare triple {19692#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {19692#false} is VALID [2022-04-27 22:06:33,618 INFO L290 TraceCheckUtils]: 32: Hoare triple {19692#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19692#false} is VALID [2022-04-27 22:06:33,618 INFO L290 TraceCheckUtils]: 33: Hoare triple {19692#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,618 INFO L290 TraceCheckUtils]: 34: Hoare triple {19692#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,618 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 22:06:33,618 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:33,618 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [521983913] [2022-04-27 22:06:33,618 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [521983913] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:33,618 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [863371455] [2022-04-27 22:06:33,619 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:06:33,619 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:33,619 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:33,619 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:33,620 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-27 22:06:33,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:33,661 INFO L263 TraceCheckSpWp]: Trace formula consists of 156 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-27 22:06:33,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:33,669 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:33,895 INFO L272 TraceCheckUtils]: 0: Hoare triple {19691#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:33,895 INFO L290 TraceCheckUtils]: 1: Hoare triple {19691#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19691#true} is VALID [2022-04-27 22:06:33,895 INFO L290 TraceCheckUtils]: 2: Hoare triple {19691#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:33,895 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19691#true} {19691#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:33,895 INFO L272 TraceCheckUtils]: 4: Hoare triple {19691#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:33,895 INFO L290 TraceCheckUtils]: 5: Hoare triple {19691#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19696#(= main_~y~0 0)} is VALID [2022-04-27 22:06:33,896 INFO L290 TraceCheckUtils]: 6: Hoare triple {19696#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19697#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:33,896 INFO L290 TraceCheckUtils]: 7: Hoare triple {19697#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19698#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:33,897 INFO L290 TraceCheckUtils]: 8: Hoare triple {19698#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19699#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:33,897 INFO L290 TraceCheckUtils]: 9: Hoare triple {19699#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19700#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:33,898 INFO L290 TraceCheckUtils]: 10: Hoare triple {19700#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19701#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:33,898 INFO L290 TraceCheckUtils]: 11: Hoare triple {19701#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19702#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:33,899 INFO L290 TraceCheckUtils]: 12: Hoare triple {19702#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19703#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:33,899 INFO L290 TraceCheckUtils]: 13: Hoare triple {19703#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19704#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:33,901 INFO L290 TraceCheckUtils]: 14: Hoare triple {19704#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:06:33,901 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:06:33,902 INFO L290 TraceCheckUtils]: 16: Hoare triple {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19706#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 22:06:33,902 INFO L290 TraceCheckUtils]: 17: Hoare triple {19706#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19707#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:06:33,903 INFO L290 TraceCheckUtils]: 18: Hoare triple {19707#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19708#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:06:33,903 INFO L290 TraceCheckUtils]: 19: Hoare triple {19708#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19771#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:06:33,903 INFO L290 TraceCheckUtils]: 20: Hoare triple {19771#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 21: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 22: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 23: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 24: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 25: Hoare triple {19692#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 26: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 27: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 28: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 29: Hoare triple {19692#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 30: Hoare triple {19692#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L272 TraceCheckUtils]: 31: Hoare triple {19692#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 32: Hoare triple {19692#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19692#false} is VALID [2022-04-27 22:06:33,904 INFO L290 TraceCheckUtils]: 33: Hoare triple {19692#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,905 INFO L290 TraceCheckUtils]: 34: Hoare triple {19692#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:33,905 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 22:06:33,905 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:34,228 INFO L290 TraceCheckUtils]: 34: Hoare triple {19692#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:34,228 INFO L290 TraceCheckUtils]: 33: Hoare triple {19692#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:34,228 INFO L290 TraceCheckUtils]: 32: Hoare triple {19692#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L272 TraceCheckUtils]: 31: Hoare triple {19692#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L290 TraceCheckUtils]: 30: Hoare triple {19692#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L290 TraceCheckUtils]: 29: Hoare triple {19692#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L290 TraceCheckUtils]: 28: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L290 TraceCheckUtils]: 27: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L290 TraceCheckUtils]: 26: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L290 TraceCheckUtils]: 25: Hoare triple {19692#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L290 TraceCheckUtils]: 24: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L290 TraceCheckUtils]: 23: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L290 TraceCheckUtils]: 22: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:34,229 INFO L290 TraceCheckUtils]: 21: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-27 22:06:34,230 INFO L290 TraceCheckUtils]: 20: Hoare triple {19859#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-27 22:06:34,231 INFO L290 TraceCheckUtils]: 19: Hoare triple {19863#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19859#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:06:34,232 INFO L290 TraceCheckUtils]: 18: Hoare triple {19867#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19863#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:34,232 INFO L290 TraceCheckUtils]: 17: Hoare triple {19871#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19867#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:34,233 INFO L290 TraceCheckUtils]: 16: Hoare triple {19875#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19871#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 22:06:34,233 INFO L290 TraceCheckUtils]: 15: Hoare triple {19875#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19875#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:06:34,233 INFO L290 TraceCheckUtils]: 14: Hoare triple {19882#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19875#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:06:34,234 INFO L290 TraceCheckUtils]: 13: Hoare triple {19886#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19882#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:34,235 INFO L290 TraceCheckUtils]: 12: Hoare triple {19890#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19886#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:34,235 INFO L290 TraceCheckUtils]: 11: Hoare triple {19894#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19890#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:06:34,236 INFO L290 TraceCheckUtils]: 10: Hoare triple {19898#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19894#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:06:34,236 INFO L290 TraceCheckUtils]: 9: Hoare triple {19902#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19898#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:06:34,237 INFO L290 TraceCheckUtils]: 8: Hoare triple {19906#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19902#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:06:34,238 INFO L290 TraceCheckUtils]: 7: Hoare triple {19910#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19906#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:06:34,238 INFO L290 TraceCheckUtils]: 6: Hoare triple {19914#(< 0 (mod (+ main_~y~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19910#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:06:34,239 INFO L290 TraceCheckUtils]: 5: Hoare triple {19691#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19914#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 22:06:34,239 INFO L272 TraceCheckUtils]: 4: Hoare triple {19691#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:34,239 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19691#true} {19691#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:34,239 INFO L290 TraceCheckUtils]: 2: Hoare triple {19691#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:34,239 INFO L290 TraceCheckUtils]: 1: Hoare triple {19691#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19691#true} is VALID [2022-04-27 22:06:34,239 INFO L272 TraceCheckUtils]: 0: Hoare triple {19691#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-27 22:06:34,239 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 22:06:34,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [863371455] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:34,239 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:34,239 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 32 [2022-04-27 22:06:34,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1991972069] [2022-04-27 22:06:34,240 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:34,240 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 22:06:34,240 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:34,240 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:34,274 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:34,275 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-27 22:06:34,275 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:34,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-27 22:06:34,275 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=181, Invalid=811, Unknown=0, NotChecked=0, Total=992 [2022-04-27 22:06:34,275 INFO L87 Difference]: Start difference. First operand 268 states and 352 transitions. Second operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:24,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:24,484 INFO L93 Difference]: Finished difference Result 1037 states and 1462 transitions. [2022-04-27 22:08:24,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 327 states. [2022-04-27 22:08:24,484 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 22:08:24,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:08:24,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:24,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 707 transitions. [2022-04-27 22:08:24,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:24,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 707 transitions. [2022-04-27 22:08:24,515 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 327 states and 707 transitions. [2022-04-27 22:08:28,630 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 707 edges. 707 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:28,664 INFO L225 Difference]: With dead ends: 1037 [2022-04-27 22:08:28,664 INFO L226 Difference]: Without dead ends: 963 [2022-04-27 22:08:28,671 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 412 GetRequests, 57 SyntacticMatches, 1 SemanticMatches, 354 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60520 ImplicationChecksByTransitivity, 91.2s TimeCoverageRelationStatistics Valid=21899, Invalid=104481, Unknown=0, NotChecked=0, Total=126380 [2022-04-27 22:08:28,672 INFO L413 NwaCegarLoop]: 58 mSDtfsCounter, 901 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 1970 mSolverCounterSat, 1679 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 901 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 3649 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1679 IncrementalHoareTripleChecker+Valid, 1970 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 7.7s IncrementalHoareTripleChecker+Time [2022-04-27 22:08:28,672 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [901 Valid, 135 Invalid, 3649 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1679 Valid, 1970 Invalid, 0 Unknown, 0 Unchecked, 7.7s Time] [2022-04-27 22:08:28,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 963 states. [2022-04-27 22:08:29,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 963 to 308. [2022-04-27 22:08:29,291 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:08:29,291 INFO L82 GeneralOperation]: Start isEquivalent. First operand 963 states. Second operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:29,291 INFO L74 IsIncluded]: Start isIncluded. First operand 963 states. Second operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:29,292 INFO L87 Difference]: Start difference. First operand 963 states. Second operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:29,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:29,319 INFO L93 Difference]: Finished difference Result 963 states and 1301 transitions. [2022-04-27 22:08:29,319 INFO L276 IsEmpty]: Start isEmpty. Operand 963 states and 1301 transitions. [2022-04-27 22:08:29,320 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:29,320 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:29,320 INFO L74 IsIncluded]: Start isIncluded. First operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 963 states. [2022-04-27 22:08:29,321 INFO L87 Difference]: Start difference. First operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 963 states. [2022-04-27 22:08:29,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:29,347 INFO L93 Difference]: Finished difference Result 963 states and 1301 transitions. [2022-04-27 22:08:29,347 INFO L276 IsEmpty]: Start isEmpty. Operand 963 states and 1301 transitions. [2022-04-27 22:08:29,348 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:29,348 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:29,348 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:08:29,348 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:08:29,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:29,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 407 transitions. [2022-04-27 22:08:29,353 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 407 transitions. Word has length 35 [2022-04-27 22:08:29,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:08:29,353 INFO L495 AbstractCegarLoop]: Abstraction has 308 states and 407 transitions. [2022-04-27 22:08:29,353 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:29,353 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 407 transitions. [2022-04-27 22:08:29,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-27 22:08:29,354 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:08:29,354 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:08:29,373 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Ended with exit code 0 [2022-04-27 22:08:29,567 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:29,567 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:08:29,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:08:29,568 INFO L85 PathProgramCache]: Analyzing trace with hash 1440953804, now seen corresponding path program 10 times [2022-04-27 22:08:29,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:08:29,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825719376] [2022-04-27 22:08:29,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:08:29,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:08:29,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:29,713 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:08:29,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:29,720 INFO L290 TraceCheckUtils]: 0: Hoare triple {24275#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24262#true} is VALID [2022-04-27 22:08:29,720 INFO L290 TraceCheckUtils]: 1: Hoare triple {24262#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:29,720 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24262#true} {24262#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:29,721 INFO L272 TraceCheckUtils]: 0: Hoare triple {24262#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24275#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:08:29,721 INFO L290 TraceCheckUtils]: 1: Hoare triple {24275#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24262#true} is VALID [2022-04-27 22:08:29,721 INFO L290 TraceCheckUtils]: 2: Hoare triple {24262#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:29,721 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24262#true} {24262#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:29,721 INFO L272 TraceCheckUtils]: 4: Hoare triple {24262#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:29,721 INFO L290 TraceCheckUtils]: 5: Hoare triple {24262#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24267#(= main_~y~0 0)} is VALID [2022-04-27 22:08:29,722 INFO L290 TraceCheckUtils]: 6: Hoare triple {24267#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:29,722 INFO L290 TraceCheckUtils]: 7: Hoare triple {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:29,723 INFO L290 TraceCheckUtils]: 8: Hoare triple {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:29,723 INFO L290 TraceCheckUtils]: 9: Hoare triple {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:29,724 INFO L290 TraceCheckUtils]: 10: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:29,724 INFO L290 TraceCheckUtils]: 11: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:29,724 INFO L290 TraceCheckUtils]: 12: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:29,725 INFO L290 TraceCheckUtils]: 13: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:29,725 INFO L290 TraceCheckUtils]: 14: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:29,725 INFO L290 TraceCheckUtils]: 15: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:29,726 INFO L290 TraceCheckUtils]: 16: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:29,726 INFO L290 TraceCheckUtils]: 17: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:29,727 INFO L290 TraceCheckUtils]: 18: Hoare triple {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:29,727 INFO L290 TraceCheckUtils]: 19: Hoare triple {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:29,727 INFO L290 TraceCheckUtils]: 20: Hoare triple {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24267#(= main_~y~0 0)} is VALID [2022-04-27 22:08:29,728 INFO L290 TraceCheckUtils]: 21: Hoare triple {24267#(= main_~y~0 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24267#(= main_~y~0 0)} is VALID [2022-04-27 22:08:29,728 INFO L290 TraceCheckUtils]: 22: Hoare triple {24267#(= main_~y~0 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:29,729 INFO L290 TraceCheckUtils]: 23: Hoare triple {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:29,729 INFO L290 TraceCheckUtils]: 24: Hoare triple {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:29,729 INFO L290 TraceCheckUtils]: 25: Hoare triple {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:29,730 INFO L290 TraceCheckUtils]: 26: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:29,730 INFO L290 TraceCheckUtils]: 27: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:29,731 INFO L290 TraceCheckUtils]: 28: Hoare triple {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:29,731 INFO L290 TraceCheckUtils]: 29: Hoare triple {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:29,732 INFO L290 TraceCheckUtils]: 30: Hoare triple {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24272#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-27 22:08:29,732 INFO L290 TraceCheckUtils]: 31: Hoare triple {24272#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {24272#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-27 22:08:29,733 INFO L272 TraceCheckUtils]: 32: Hoare triple {24272#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {24273#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:08:29,733 INFO L290 TraceCheckUtils]: 33: Hoare triple {24273#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24274#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:08:29,733 INFO L290 TraceCheckUtils]: 34: Hoare triple {24274#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {24263#false} is VALID [2022-04-27 22:08:29,733 INFO L290 TraceCheckUtils]: 35: Hoare triple {24263#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24263#false} is VALID [2022-04-27 22:08:29,734 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:08:29,734 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:08:29,734 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825719376] [2022-04-27 22:08:29,734 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [825719376] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:08:29,734 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1937679563] [2022-04-27 22:08:29,734 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:08:29,734 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:29,734 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:08:29,735 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:08:29,735 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-27 22:08:29,775 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:08:29,776 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:08:29,777 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 48 conjunts are in the unsatisfiable core [2022-04-27 22:08:29,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:29,785 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:08:30,121 INFO L272 TraceCheckUtils]: 0: Hoare triple {24262#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:30,122 INFO L290 TraceCheckUtils]: 1: Hoare triple {24262#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24262#true} is VALID [2022-04-27 22:08:30,122 INFO L290 TraceCheckUtils]: 2: Hoare triple {24262#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:30,122 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24262#true} {24262#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:30,122 INFO L272 TraceCheckUtils]: 4: Hoare triple {24262#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:30,122 INFO L290 TraceCheckUtils]: 5: Hoare triple {24262#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24267#(= main_~y~0 0)} is VALID [2022-04-27 22:08:30,122 INFO L290 TraceCheckUtils]: 6: Hoare triple {24267#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:30,123 INFO L290 TraceCheckUtils]: 7: Hoare triple {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:30,123 INFO L290 TraceCheckUtils]: 8: Hoare triple {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:30,124 INFO L290 TraceCheckUtils]: 9: Hoare triple {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,124 INFO L290 TraceCheckUtils]: 10: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,125 INFO L290 TraceCheckUtils]: 11: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24312#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,125 INFO L290 TraceCheckUtils]: 12: Hoare triple {24312#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24316#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:08:30,126 INFO L290 TraceCheckUtils]: 13: Hoare triple {24316#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24320#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,126 INFO L290 TraceCheckUtils]: 14: Hoare triple {24320#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24324#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,127 INFO L290 TraceCheckUtils]: 15: Hoare triple {24324#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24328#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,127 INFO L290 TraceCheckUtils]: 16: Hoare triple {24328#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= main_~y~0 4) (<= 4 main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,128 INFO L290 TraceCheckUtils]: 17: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:30,128 INFO L290 TraceCheckUtils]: 18: Hoare triple {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:30,129 INFO L290 TraceCheckUtils]: 19: Hoare triple {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:30,131 INFO L290 TraceCheckUtils]: 20: Hoare triple {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24267#(= main_~y~0 0)} is VALID [2022-04-27 22:08:30,132 INFO L290 TraceCheckUtils]: 21: Hoare triple {24267#(= main_~y~0 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24267#(= main_~y~0 0)} is VALID [2022-04-27 22:08:30,137 INFO L290 TraceCheckUtils]: 22: Hoare triple {24267#(= main_~y~0 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:30,138 INFO L290 TraceCheckUtils]: 23: Hoare triple {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:30,138 INFO L290 TraceCheckUtils]: 24: Hoare triple {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:30,139 INFO L290 TraceCheckUtils]: 25: Hoare triple {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,139 INFO L290 TraceCheckUtils]: 26: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,139 INFO L290 TraceCheckUtils]: 27: Hoare triple {24271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:30,140 INFO L290 TraceCheckUtils]: 28: Hoare triple {24270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:30,141 INFO L290 TraceCheckUtils]: 29: Hoare triple {24269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:30,141 INFO L290 TraceCheckUtils]: 30: Hoare triple {24268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24267#(= main_~y~0 0)} is VALID [2022-04-27 22:08:30,141 INFO L290 TraceCheckUtils]: 31: Hoare triple {24267#(= main_~y~0 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {24267#(= main_~y~0 0)} is VALID [2022-04-27 22:08:30,142 INFO L272 TraceCheckUtils]: 32: Hoare triple {24267#(= main_~y~0 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {24380#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:08:30,142 INFO L290 TraceCheckUtils]: 33: Hoare triple {24380#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24384#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:08:30,142 INFO L290 TraceCheckUtils]: 34: Hoare triple {24384#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {24263#false} is VALID [2022-04-27 22:08:30,143 INFO L290 TraceCheckUtils]: 35: Hoare triple {24263#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24263#false} is VALID [2022-04-27 22:08:30,143 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:08:30,143 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:08:30,420 INFO L290 TraceCheckUtils]: 35: Hoare triple {24263#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24263#false} is VALID [2022-04-27 22:08:30,420 INFO L290 TraceCheckUtils]: 34: Hoare triple {24384#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {24263#false} is VALID [2022-04-27 22:08:30,420 INFO L290 TraceCheckUtils]: 33: Hoare triple {24380#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24384#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:08:30,421 INFO L272 TraceCheckUtils]: 32: Hoare triple {24400#(= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {24380#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:08:30,421 INFO L290 TraceCheckUtils]: 31: Hoare triple {24400#(= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {24400#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:08:30,422 INFO L290 TraceCheckUtils]: 30: Hoare triple {24407#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24400#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:08:30,422 INFO L290 TraceCheckUtils]: 29: Hoare triple {24411#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24407#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-27 22:08:30,423 INFO L290 TraceCheckUtils]: 28: Hoare triple {24415#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24411#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} is VALID [2022-04-27 22:08:30,424 INFO L290 TraceCheckUtils]: 27: Hoare triple {24419#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24415#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} is VALID [2022-04-27 22:08:30,424 INFO L290 TraceCheckUtils]: 26: Hoare triple {24419#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24419#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} is VALID [2022-04-27 22:08:30,424 INFO L290 TraceCheckUtils]: 25: Hoare triple {24415#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24419#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} is VALID [2022-04-27 22:08:30,425 INFO L290 TraceCheckUtils]: 24: Hoare triple {24411#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24415#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} is VALID [2022-04-27 22:08:30,426 INFO L290 TraceCheckUtils]: 23: Hoare triple {24407#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24411#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} is VALID [2022-04-27 22:08:30,426 INFO L290 TraceCheckUtils]: 22: Hoare triple {24400#(= (mod main_~y~0 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24407#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-27 22:08:30,426 INFO L290 TraceCheckUtils]: 21: Hoare triple {24400#(= (mod main_~y~0 4294967296) 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24400#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:08:30,427 INFO L290 TraceCheckUtils]: 20: Hoare triple {24407#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24400#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-27 22:08:30,428 INFO L290 TraceCheckUtils]: 19: Hoare triple {24411#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24407#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-27 22:08:30,428 INFO L290 TraceCheckUtils]: 18: Hoare triple {24415#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24411#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} is VALID [2022-04-27 22:08:30,429 INFO L290 TraceCheckUtils]: 17: Hoare triple {24419#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24415#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} is VALID [2022-04-27 22:08:30,429 INFO L290 TraceCheckUtils]: 16: Hoare triple {24453#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24419#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} is VALID [2022-04-27 22:08:30,430 INFO L290 TraceCheckUtils]: 15: Hoare triple {24457#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24453#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:08:30,431 INFO L290 TraceCheckUtils]: 14: Hoare triple {24461#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24457#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:08:30,431 INFO L290 TraceCheckUtils]: 13: Hoare triple {24465#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24461#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:08:30,432 INFO L290 TraceCheckUtils]: 12: Hoare triple {24469#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24465#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:08:30,432 INFO L290 TraceCheckUtils]: 11: Hoare triple {24262#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24469#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} is VALID [2022-04-27 22:08:30,432 INFO L290 TraceCheckUtils]: 10: Hoare triple {24262#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L290 TraceCheckUtils]: 9: Hoare triple {24262#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L290 TraceCheckUtils]: 8: Hoare triple {24262#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L290 TraceCheckUtils]: 7: Hoare triple {24262#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L290 TraceCheckUtils]: 6: Hoare triple {24262#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L290 TraceCheckUtils]: 5: Hoare triple {24262#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L272 TraceCheckUtils]: 4: Hoare triple {24262#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24262#true} {24262#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L290 TraceCheckUtils]: 2: Hoare triple {24262#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L290 TraceCheckUtils]: 1: Hoare triple {24262#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L272 TraceCheckUtils]: 0: Hoare triple {24262#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24262#true} is VALID [2022-04-27 22:08:30,433 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:08:30,433 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1937679563] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:08:30,434 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:08:30,434 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 14, 14] total 28 [2022-04-27 22:08:30,434 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1056629566] [2022-04-27 22:08:30,434 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:08:30,434 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:08:30,434 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:08:30,434 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:30,482 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:30,482 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-27 22:08:30,482 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:08:30,482 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-27 22:08:30,482 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=649, Unknown=0, NotChecked=0, Total=756 [2022-04-27 22:08:30,483 INFO L87 Difference]: Start difference. First operand 308 states and 407 transitions. Second operand has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:33,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:33,696 INFO L93 Difference]: Finished difference Result 385 states and 506 transitions. [2022-04-27 22:08:33,696 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-27 22:08:33,696 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:08:33,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:08:33,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:33,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 103 transitions. [2022-04-27 22:08:33,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:33,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 103 transitions. [2022-04-27 22:08:33,698 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 103 transitions. [2022-04-27 22:08:33,785 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:33,790 INFO L225 Difference]: With dead ends: 385 [2022-04-27 22:08:33,790 INFO L226 Difference]: Without dead ends: 339 [2022-04-27 22:08:33,791 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 67 SyntacticMatches, 6 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 946 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=472, Invalid=3434, Unknown=0, NotChecked=0, Total=3906 [2022-04-27 22:08:33,791 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 59 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 679 mSolverCounterSat, 93 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 772 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 93 IncrementalHoareTripleChecker+Valid, 679 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 22:08:33,791 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 96 Invalid, 772 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [93 Valid, 679 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-27 22:08:33,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 339 states. [2022-04-27 22:08:34,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 339 to 290. [2022-04-27 22:08:34,382 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:08:34,383 INFO L82 GeneralOperation]: Start isEquivalent. First operand 339 states. Second operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:34,383 INFO L74 IsIncluded]: Start isIncluded. First operand 339 states. Second operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:34,383 INFO L87 Difference]: Start difference. First operand 339 states. Second operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:34,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:34,387 INFO L93 Difference]: Finished difference Result 339 states and 450 transitions. [2022-04-27 22:08:34,387 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 450 transitions. [2022-04-27 22:08:34,388 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:34,388 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:34,388 INFO L74 IsIncluded]: Start isIncluded. First operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 339 states. [2022-04-27 22:08:34,388 INFO L87 Difference]: Start difference. First operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 339 states. [2022-04-27 22:08:34,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:34,392 INFO L93 Difference]: Finished difference Result 339 states and 450 transitions. [2022-04-27 22:08:34,392 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 450 transitions. [2022-04-27 22:08:34,393 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:34,393 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:34,393 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:08:34,393 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:08:34,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:34,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 390 transitions. [2022-04-27 22:08:34,397 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 390 transitions. Word has length 36 [2022-04-27 22:08:34,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:08:34,397 INFO L495 AbstractCegarLoop]: Abstraction has 290 states and 390 transitions. [2022-04-27 22:08:34,397 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:34,397 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 390 transitions. [2022-04-27 22:08:34,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-04-27 22:08:34,398 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:08:34,398 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:08:34,413 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-27 22:08:34,598 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-04-27 22:08:34,598 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:08:34,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:08:34,598 INFO L85 PathProgramCache]: Analyzing trace with hash 1291441514, now seen corresponding path program 8 times [2022-04-27 22:08:34,598 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:08:34,599 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1990761785] [2022-04-27 22:08:34,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:08:34,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:08:34,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:34,825 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:08:34,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:34,828 INFO L290 TraceCheckUtils]: 0: Hoare triple {26190#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26170#true} is VALID [2022-04-27 22:08:34,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {26170#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:34,828 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26170#true} {26170#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:34,828 INFO L272 TraceCheckUtils]: 0: Hoare triple {26170#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26190#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:08:34,829 INFO L290 TraceCheckUtils]: 1: Hoare triple {26190#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26170#true} is VALID [2022-04-27 22:08:34,829 INFO L290 TraceCheckUtils]: 2: Hoare triple {26170#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:34,829 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26170#true} {26170#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:34,829 INFO L272 TraceCheckUtils]: 4: Hoare triple {26170#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:34,829 INFO L290 TraceCheckUtils]: 5: Hoare triple {26170#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26175#(= main_~y~0 0)} is VALID [2022-04-27 22:08:34,829 INFO L290 TraceCheckUtils]: 6: Hoare triple {26175#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26176#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:34,830 INFO L290 TraceCheckUtils]: 7: Hoare triple {26176#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26177#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:34,830 INFO L290 TraceCheckUtils]: 8: Hoare triple {26177#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26178#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:34,831 INFO L290 TraceCheckUtils]: 9: Hoare triple {26178#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26179#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:34,831 INFO L290 TraceCheckUtils]: 10: Hoare triple {26179#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26180#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:08:34,832 INFO L290 TraceCheckUtils]: 11: Hoare triple {26180#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26181#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:34,832 INFO L290 TraceCheckUtils]: 12: Hoare triple {26181#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {26181#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:34,832 INFO L290 TraceCheckUtils]: 13: Hoare triple {26181#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {26182#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:34,833 INFO L290 TraceCheckUtils]: 14: Hoare triple {26182#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26183#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:08:34,833 INFO L290 TraceCheckUtils]: 15: Hoare triple {26183#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26184#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:08:34,834 INFO L290 TraceCheckUtils]: 16: Hoare triple {26184#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26185#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:08:34,834 INFO L290 TraceCheckUtils]: 17: Hoare triple {26185#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26186#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:08:34,835 INFO L290 TraceCheckUtils]: 18: Hoare triple {26186#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26187#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:08:34,835 INFO L290 TraceCheckUtils]: 19: Hoare triple {26187#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26188#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:08:34,836 INFO L290 TraceCheckUtils]: 20: Hoare triple {26188#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26188#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:08:34,836 INFO L290 TraceCheckUtils]: 21: Hoare triple {26188#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26187#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:08:34,836 INFO L290 TraceCheckUtils]: 22: Hoare triple {26187#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26186#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:08:34,837 INFO L290 TraceCheckUtils]: 23: Hoare triple {26186#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26185#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:08:34,837 INFO L290 TraceCheckUtils]: 24: Hoare triple {26185#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26184#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:08:34,838 INFO L290 TraceCheckUtils]: 25: Hoare triple {26184#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26183#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:08:34,838 INFO L290 TraceCheckUtils]: 26: Hoare triple {26183#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:34,839 INFO L290 TraceCheckUtils]: 27: Hoare triple {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:34,839 INFO L290 TraceCheckUtils]: 28: Hoare triple {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:34,839 INFO L290 TraceCheckUtils]: 29: Hoare triple {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:34,840 INFO L290 TraceCheckUtils]: 30: Hoare triple {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:34,840 INFO L290 TraceCheckUtils]: 31: Hoare triple {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:34,840 INFO L290 TraceCheckUtils]: 32: Hoare triple {26189#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:34,841 INFO L272 TraceCheckUtils]: 33: Hoare triple {26171#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {26171#false} is VALID [2022-04-27 22:08:34,841 INFO L290 TraceCheckUtils]: 34: Hoare triple {26171#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26171#false} is VALID [2022-04-27 22:08:34,841 INFO L290 TraceCheckUtils]: 35: Hoare triple {26171#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:34,841 INFO L290 TraceCheckUtils]: 36: Hoare triple {26171#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:34,841 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:08:34,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:08:34,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1990761785] [2022-04-27 22:08:34,841 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1990761785] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:08:34,841 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [475766078] [2022-04-27 22:08:34,841 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:08:34,841 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:34,842 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:08:34,842 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:08:34,843 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-27 22:08:34,881 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:08:34,881 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:08:34,882 INFO L263 TraceCheckSpWp]: Trace formula consists of 166 conjuncts, 26 conjunts are in the unsatisfiable core [2022-04-27 22:08:34,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:34,890 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:08:35,091 INFO L272 TraceCheckUtils]: 0: Hoare triple {26170#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:35,091 INFO L290 TraceCheckUtils]: 1: Hoare triple {26170#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26170#true} is VALID [2022-04-27 22:08:35,091 INFO L290 TraceCheckUtils]: 2: Hoare triple {26170#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:35,091 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26170#true} {26170#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:35,091 INFO L272 TraceCheckUtils]: 4: Hoare triple {26170#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:35,091 INFO L290 TraceCheckUtils]: 5: Hoare triple {26170#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26170#true} is VALID [2022-04-27 22:08:35,091 INFO L290 TraceCheckUtils]: 6: Hoare triple {26170#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26170#true} is VALID [2022-04-27 22:08:35,091 INFO L290 TraceCheckUtils]: 7: Hoare triple {26170#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26170#true} is VALID [2022-04-27 22:08:35,091 INFO L290 TraceCheckUtils]: 8: Hoare triple {26170#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26170#true} is VALID [2022-04-27 22:08:35,092 INFO L290 TraceCheckUtils]: 9: Hoare triple {26170#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26221#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:08:35,093 INFO L290 TraceCheckUtils]: 10: Hoare triple {26221#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26225#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:08:35,093 INFO L290 TraceCheckUtils]: 11: Hoare triple {26225#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:08:35,094 INFO L290 TraceCheckUtils]: 12: Hoare triple {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:08:35,094 INFO L290 TraceCheckUtils]: 13: Hoare triple {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:08:35,095 INFO L290 TraceCheckUtils]: 14: Hoare triple {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26225#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:08:35,096 INFO L290 TraceCheckUtils]: 15: Hoare triple {26225#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26221#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:08:35,096 INFO L290 TraceCheckUtils]: 16: Hoare triple {26221#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26245#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:08:35,097 INFO L290 TraceCheckUtils]: 17: Hoare triple {26245#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26249#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:08:35,098 INFO L290 TraceCheckUtils]: 18: Hoare triple {26249#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26253#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:08:35,098 INFO L290 TraceCheckUtils]: 19: Hoare triple {26253#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,098 INFO L290 TraceCheckUtils]: 20: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,099 INFO L290 TraceCheckUtils]: 21: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,099 INFO L290 TraceCheckUtils]: 22: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,099 INFO L290 TraceCheckUtils]: 23: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,099 INFO L290 TraceCheckUtils]: 24: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,100 INFO L290 TraceCheckUtils]: 25: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,100 INFO L290 TraceCheckUtils]: 26: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,100 INFO L290 TraceCheckUtils]: 27: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,101 INFO L290 TraceCheckUtils]: 28: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26253#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:08:35,101 INFO L290 TraceCheckUtils]: 29: Hoare triple {26253#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26249#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:08:35,102 INFO L290 TraceCheckUtils]: 30: Hoare triple {26249#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26245#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:08:35,102 INFO L290 TraceCheckUtils]: 31: Hoare triple {26245#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:35,103 INFO L290 TraceCheckUtils]: 32: Hoare triple {26171#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:35,103 INFO L272 TraceCheckUtils]: 33: Hoare triple {26171#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {26171#false} is VALID [2022-04-27 22:08:35,103 INFO L290 TraceCheckUtils]: 34: Hoare triple {26171#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26171#false} is VALID [2022-04-27 22:08:35,103 INFO L290 TraceCheckUtils]: 35: Hoare triple {26171#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:35,103 INFO L290 TraceCheckUtils]: 36: Hoare triple {26171#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:35,103 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 12 proven. 30 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-27 22:08:35,103 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:08:35,208 INFO L290 TraceCheckUtils]: 36: Hoare triple {26171#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:35,209 INFO L290 TraceCheckUtils]: 35: Hoare triple {26171#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:35,209 INFO L290 TraceCheckUtils]: 34: Hoare triple {26171#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26171#false} is VALID [2022-04-27 22:08:35,209 INFO L272 TraceCheckUtils]: 33: Hoare triple {26171#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {26171#false} is VALID [2022-04-27 22:08:35,209 INFO L290 TraceCheckUtils]: 32: Hoare triple {26171#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:35,210 INFO L290 TraceCheckUtils]: 31: Hoare triple {26245#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26171#false} is VALID [2022-04-27 22:08:35,211 INFO L290 TraceCheckUtils]: 30: Hoare triple {26249#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26245#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:08:35,211 INFO L290 TraceCheckUtils]: 29: Hoare triple {26253#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26249#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:08:35,212 INFO L290 TraceCheckUtils]: 28: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26253#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:08:35,213 INFO L290 TraceCheckUtils]: 27: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,213 INFO L290 TraceCheckUtils]: 26: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,213 INFO L290 TraceCheckUtils]: 25: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,213 INFO L290 TraceCheckUtils]: 24: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,214 INFO L290 TraceCheckUtils]: 23: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,214 INFO L290 TraceCheckUtils]: 22: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,214 INFO L290 TraceCheckUtils]: 21: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,214 INFO L290 TraceCheckUtils]: 20: Hoare triple {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,215 INFO L290 TraceCheckUtils]: 19: Hoare triple {26253#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26257#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:35,216 INFO L290 TraceCheckUtils]: 18: Hoare triple {26249#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26253#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:08:35,216 INFO L290 TraceCheckUtils]: 17: Hoare triple {26245#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26249#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:08:35,217 INFO L290 TraceCheckUtils]: 16: Hoare triple {26221#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26245#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:08:35,217 INFO L290 TraceCheckUtils]: 15: Hoare triple {26225#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26221#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:08:35,218 INFO L290 TraceCheckUtils]: 14: Hoare triple {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26225#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:08:35,218 INFO L290 TraceCheckUtils]: 13: Hoare triple {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:08:35,219 INFO L290 TraceCheckUtils]: 12: Hoare triple {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:08:35,219 INFO L290 TraceCheckUtils]: 11: Hoare triple {26225#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26229#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:08:35,220 INFO L290 TraceCheckUtils]: 10: Hoare triple {26221#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26225#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:08:35,220 INFO L290 TraceCheckUtils]: 9: Hoare triple {26170#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26221#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:08:35,220 INFO L290 TraceCheckUtils]: 8: Hoare triple {26170#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26170#true} is VALID [2022-04-27 22:08:35,220 INFO L290 TraceCheckUtils]: 7: Hoare triple {26170#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26170#true} is VALID [2022-04-27 22:08:35,220 INFO L290 TraceCheckUtils]: 6: Hoare triple {26170#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26170#true} is VALID [2022-04-27 22:08:35,221 INFO L290 TraceCheckUtils]: 5: Hoare triple {26170#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26170#true} is VALID [2022-04-27 22:08:35,221 INFO L272 TraceCheckUtils]: 4: Hoare triple {26170#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:35,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26170#true} {26170#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:35,221 INFO L290 TraceCheckUtils]: 2: Hoare triple {26170#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:35,221 INFO L290 TraceCheckUtils]: 1: Hoare triple {26170#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26170#true} is VALID [2022-04-27 22:08:35,221 INFO L272 TraceCheckUtils]: 0: Hoare triple {26170#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26170#true} is VALID [2022-04-27 22:08:35,221 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 12 proven. 30 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-27 22:08:35,221 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [475766078] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:08:35,221 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:08:35,221 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 9, 9] total 25 [2022-04-27 22:08:35,222 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1737187935] [2022-04-27 22:08:35,222 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:08:35,222 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-27 22:08:35,222 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:08:35,222 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:35,292 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:35,292 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-27 22:08:35,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:08:35,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-27 22:08:35,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=552, Unknown=0, NotChecked=0, Total=600 [2022-04-27 22:08:35,292 INFO L87 Difference]: Start difference. First operand 290 states and 390 transitions. Second operand has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:50,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:50,716 INFO L93 Difference]: Finished difference Result 455 states and 609 transitions. [2022-04-27 22:08:50,716 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2022-04-27 22:08:50,716 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-27 22:08:50,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:08:50,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:50,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 199 transitions. [2022-04-27 22:08:50,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:50,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 199 transitions. [2022-04-27 22:08:50,719 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 99 states and 199 transitions. [2022-04-27 22:08:51,053 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 199 edges. 199 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:51,060 INFO L225 Difference]: With dead ends: 455 [2022-04-27 22:08:51,060 INFO L226 Difference]: Without dead ends: 394 [2022-04-27 22:08:51,061 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 75 SyntacticMatches, 0 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4540 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=1486, Invalid=13034, Unknown=0, NotChecked=0, Total=14520 [2022-04-27 22:08:51,061 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 135 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 1856 mSolverCounterSat, 330 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 135 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 2186 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 330 IncrementalHoareTripleChecker+Valid, 1856 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:08:51,062 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [135 Valid, 135 Invalid, 2186 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [330 Valid, 1856 Invalid, 0 Unknown, 0 Unchecked, 4.3s Time] [2022-04-27 22:08:51,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2022-04-27 22:08:51,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 327. [2022-04-27 22:08:51,714 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:08:51,715 INFO L82 GeneralOperation]: Start isEquivalent. First operand 394 states. Second operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:51,715 INFO L74 IsIncluded]: Start isIncluded. First operand 394 states. Second operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:51,715 INFO L87 Difference]: Start difference. First operand 394 states. Second operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:51,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:51,721 INFO L93 Difference]: Finished difference Result 394 states and 502 transitions. [2022-04-27 22:08:51,721 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 502 transitions. [2022-04-27 22:08:51,722 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:51,722 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:51,722 INFO L74 IsIncluded]: Start isIncluded. First operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 394 states. [2022-04-27 22:08:51,722 INFO L87 Difference]: Start difference. First operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 394 states. [2022-04-27 22:08:51,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:51,736 INFO L93 Difference]: Finished difference Result 394 states and 502 transitions. [2022-04-27 22:08:51,736 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 502 transitions. [2022-04-27 22:08:51,736 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:51,737 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:51,737 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:08:51,737 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:08:51,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:51,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 426 transitions. [2022-04-27 22:08:51,741 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 426 transitions. Word has length 37 [2022-04-27 22:08:51,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:08:51,742 INFO L495 AbstractCegarLoop]: Abstraction has 327 states and 426 transitions. [2022-04-27 22:08:51,742 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:51,742 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 426 transitions. [2022-04-27 22:08:51,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-27 22:08:51,742 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:08:51,742 INFO L195 NwaCegarLoop]: trace histogram [10, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:08:51,760 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-04-27 22:08:51,955 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:51,955 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:08:51,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:08:51,956 INFO L85 PathProgramCache]: Analyzing trace with hash 1823283916, now seen corresponding path program 9 times [2022-04-27 22:08:51,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:08:51,956 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [536690138] [2022-04-27 22:08:51,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:08:51,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:08:51,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:52,186 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:08:52,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:52,188 INFO L290 TraceCheckUtils]: 0: Hoare triple {28424#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28403#true} is VALID [2022-04-27 22:08:52,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {28403#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:52,189 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28403#true} {28403#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:52,189 INFO L272 TraceCheckUtils]: 0: Hoare triple {28403#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28424#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:08:52,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {28424#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28403#true} is VALID [2022-04-27 22:08:52,189 INFO L290 TraceCheckUtils]: 2: Hoare triple {28403#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:52,189 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28403#true} {28403#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:52,189 INFO L272 TraceCheckUtils]: 4: Hoare triple {28403#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:52,190 INFO L290 TraceCheckUtils]: 5: Hoare triple {28403#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28408#(= main_~y~0 0)} is VALID [2022-04-27 22:08:52,190 INFO L290 TraceCheckUtils]: 6: Hoare triple {28408#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28409#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:52,191 INFO L290 TraceCheckUtils]: 7: Hoare triple {28409#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28410#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:52,191 INFO L290 TraceCheckUtils]: 8: Hoare triple {28410#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28411#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:52,192 INFO L290 TraceCheckUtils]: 9: Hoare triple {28411#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28412#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:52,192 INFO L290 TraceCheckUtils]: 10: Hoare triple {28412#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28413#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:08:52,193 INFO L290 TraceCheckUtils]: 11: Hoare triple {28413#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28414#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:52,193 INFO L290 TraceCheckUtils]: 12: Hoare triple {28414#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28415#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:08:52,194 INFO L290 TraceCheckUtils]: 13: Hoare triple {28415#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28416#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:08:52,194 INFO L290 TraceCheckUtils]: 14: Hoare triple {28416#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28417#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:08:52,195 INFO L290 TraceCheckUtils]: 15: Hoare triple {28417#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28418#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:08:52,195 INFO L290 TraceCheckUtils]: 16: Hoare triple {28418#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28418#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:08:52,195 INFO L290 TraceCheckUtils]: 17: Hoare triple {28418#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28419#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-27 22:08:52,196 INFO L290 TraceCheckUtils]: 18: Hoare triple {28419#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28420#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 22:08:52,196 INFO L290 TraceCheckUtils]: 19: Hoare triple {28420#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28421#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:08:52,197 INFO L290 TraceCheckUtils]: 20: Hoare triple {28421#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28422#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:08:52,197 INFO L290 TraceCheckUtils]: 21: Hoare triple {28422#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28423#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 22: Hoare triple {28423#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28404#false} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 23: Hoare triple {28404#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28404#false} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 24: Hoare triple {28404#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28404#false} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 25: Hoare triple {28404#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28404#false} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 26: Hoare triple {28404#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28404#false} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 27: Hoare triple {28404#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28404#false} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 28: Hoare triple {28404#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28404#false} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 29: Hoare triple {28404#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28404#false} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 30: Hoare triple {28404#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28404#false} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 31: Hoare triple {28404#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28404#false} is VALID [2022-04-27 22:08:52,198 INFO L290 TraceCheckUtils]: 32: Hoare triple {28404#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28404#false} is VALID [2022-04-27 22:08:52,199 INFO L290 TraceCheckUtils]: 33: Hoare triple {28404#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28404#false} is VALID [2022-04-27 22:08:52,199 INFO L272 TraceCheckUtils]: 34: Hoare triple {28404#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {28404#false} is VALID [2022-04-27 22:08:52,199 INFO L290 TraceCheckUtils]: 35: Hoare triple {28404#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28404#false} is VALID [2022-04-27 22:08:52,199 INFO L290 TraceCheckUtils]: 36: Hoare triple {28404#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28404#false} is VALID [2022-04-27 22:08:52,199 INFO L290 TraceCheckUtils]: 37: Hoare triple {28404#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28404#false} is VALID [2022-04-27 22:08:52,199 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-04-27 22:08:52,199 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:08:52,199 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [536690138] [2022-04-27 22:08:52,199 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [536690138] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:08:52,199 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [487675324] [2022-04-27 22:08:52,199 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:08:52,200 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:52,200 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:08:52,200 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:08:52,202 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-04-27 22:08:52,249 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 22:08:52,249 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:08:52,250 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 38 conjunts are in the unsatisfiable core [2022-04-27 22:08:52,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:52,259 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:08:52,669 INFO L272 TraceCheckUtils]: 0: Hoare triple {28403#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:52,669 INFO L290 TraceCheckUtils]: 1: Hoare triple {28403#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28403#true} is VALID [2022-04-27 22:08:52,669 INFO L290 TraceCheckUtils]: 2: Hoare triple {28403#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:52,669 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28403#true} {28403#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:52,669 INFO L272 TraceCheckUtils]: 4: Hoare triple {28403#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:52,669 INFO L290 TraceCheckUtils]: 5: Hoare triple {28403#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28403#true} is VALID [2022-04-27 22:08:52,669 INFO L290 TraceCheckUtils]: 6: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:52,669 INFO L290 TraceCheckUtils]: 7: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:52,669 INFO L290 TraceCheckUtils]: 8: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:52,670 INFO L290 TraceCheckUtils]: 9: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:52,670 INFO L290 TraceCheckUtils]: 10: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:52,670 INFO L290 TraceCheckUtils]: 11: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:52,672 INFO L290 TraceCheckUtils]: 12: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:52,672 INFO L290 TraceCheckUtils]: 13: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:52,672 INFO L290 TraceCheckUtils]: 14: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:52,672 INFO L290 TraceCheckUtils]: 15: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:52,672 INFO L290 TraceCheckUtils]: 16: Hoare triple {28403#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:52,673 INFO L290 TraceCheckUtils]: 17: Hoare triple {28403#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28479#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:08:52,673 INFO L290 TraceCheckUtils]: 18: Hoare triple {28479#(= main_~z~0 main_~y~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28483#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-27 22:08:52,674 INFO L290 TraceCheckUtils]: 19: Hoare triple {28483#(= main_~y~0 (+ main_~z~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28487#(= main_~y~0 (+ main_~z~0 2))} is VALID [2022-04-27 22:08:52,674 INFO L290 TraceCheckUtils]: 20: Hoare triple {28487#(= main_~y~0 (+ main_~z~0 2))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28491#(= (+ (- 2) main_~y~0) (+ main_~z~0 1))} is VALID [2022-04-27 22:08:52,675 INFO L290 TraceCheckUtils]: 21: Hoare triple {28491#(= (+ (- 2) main_~y~0) (+ main_~z~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28495#(= (+ (- 2) main_~y~0) (+ main_~z~0 2))} is VALID [2022-04-27 22:08:52,675 INFO L290 TraceCheckUtils]: 22: Hoare triple {28495#(= (+ (- 2) main_~y~0) (+ main_~z~0 2))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28495#(= (+ (- 2) main_~y~0) (+ main_~z~0 2))} is VALID [2022-04-27 22:08:52,675 INFO L290 TraceCheckUtils]: 23: Hoare triple {28495#(= (+ (- 2) main_~y~0) (+ main_~z~0 2))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28487#(= main_~y~0 (+ main_~z~0 2))} is VALID [2022-04-27 22:08:52,676 INFO L290 TraceCheckUtils]: 24: Hoare triple {28487#(= main_~y~0 (+ main_~z~0 2))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28479#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:08:52,676 INFO L290 TraceCheckUtils]: 25: Hoare triple {28479#(= main_~z~0 main_~y~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28508#(= (+ main_~y~0 2) main_~z~0)} is VALID [2022-04-27 22:08:52,677 INFO L290 TraceCheckUtils]: 26: Hoare triple {28508#(= (+ main_~y~0 2) main_~z~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28512#(= (+ (- 1) main_~z~0) (+ main_~y~0 3))} is VALID [2022-04-27 22:08:52,677 INFO L290 TraceCheckUtils]: 27: Hoare triple {28512#(= (+ (- 1) main_~z~0) (+ main_~y~0 3))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28512#(= (+ (- 1) main_~z~0) (+ main_~y~0 3))} is VALID [2022-04-27 22:08:52,678 INFO L290 TraceCheckUtils]: 28: Hoare triple {28512#(= (+ (- 1) main_~z~0) (+ main_~y~0 3))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28519#(= main_~y~0 (+ main_~z~0 (- 3)))} is VALID [2022-04-27 22:08:52,678 INFO L290 TraceCheckUtils]: 29: Hoare triple {28519#(= main_~y~0 (+ main_~z~0 (- 3)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28508#(= (+ main_~y~0 2) main_~z~0)} is VALID [2022-04-27 22:08:52,679 INFO L290 TraceCheckUtils]: 30: Hoare triple {28508#(= (+ main_~y~0 2) main_~z~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28526#(= main_~z~0 (+ main_~y~0 1))} is VALID [2022-04-27 22:08:52,679 INFO L290 TraceCheckUtils]: 31: Hoare triple {28526#(= main_~z~0 (+ main_~y~0 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28479#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:08:52,679 INFO L290 TraceCheckUtils]: 32: Hoare triple {28479#(= main_~z~0 main_~y~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28479#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:08:52,680 INFO L290 TraceCheckUtils]: 33: Hoare triple {28479#(= main_~z~0 main_~y~0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28536#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:08:52,680 INFO L272 TraceCheckUtils]: 34: Hoare triple {28536#(not (< 0 (mod main_~y~0 4294967296)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {28540#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:08:52,681 INFO L290 TraceCheckUtils]: 35: Hoare triple {28540#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28544#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:08:52,681 INFO L290 TraceCheckUtils]: 36: Hoare triple {28544#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28404#false} is VALID [2022-04-27 22:08:52,681 INFO L290 TraceCheckUtils]: 37: Hoare triple {28404#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28404#false} is VALID [2022-04-27 22:08:52,681 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2022-04-27 22:08:52,681 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:08:53,267 INFO L290 TraceCheckUtils]: 37: Hoare triple {28404#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28404#false} is VALID [2022-04-27 22:08:53,267 INFO L290 TraceCheckUtils]: 36: Hoare triple {28544#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28404#false} is VALID [2022-04-27 22:08:53,267 INFO L290 TraceCheckUtils]: 35: Hoare triple {28540#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28544#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:08:53,268 INFO L272 TraceCheckUtils]: 34: Hoare triple {28536#(not (< 0 (mod main_~y~0 4294967296)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {28540#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:08:53,268 INFO L290 TraceCheckUtils]: 33: Hoare triple {28563#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28536#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:08:53,269 INFO L290 TraceCheckUtils]: 32: Hoare triple {28563#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28563#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:08:53,269 INFO L290 TraceCheckUtils]: 31: Hoare triple {28570#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 1) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28563#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:08:53,270 INFO L290 TraceCheckUtils]: 30: Hoare triple {28574#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 2) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28570#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 1) 4294967296))))} is VALID [2022-04-27 22:08:53,271 INFO L290 TraceCheckUtils]: 29: Hoare triple {28578#(or (not (< 0 (mod (+ main_~y~0 3) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28574#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 2) 4294967296))))} is VALID [2022-04-27 22:08:53,271 INFO L290 TraceCheckUtils]: 28: Hoare triple {28582#(or (not (< 0 (mod (+ main_~y~0 4) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28578#(or (not (< 0 (mod (+ main_~y~0 3) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:08:53,272 INFO L290 TraceCheckUtils]: 27: Hoare triple {28582#(or (not (< 0 (mod (+ main_~y~0 4) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28582#(or (not (< 0 (mod (+ main_~y~0 4) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:08:53,273 INFO L290 TraceCheckUtils]: 26: Hoare triple {28589#(or (not (< 0 (mod (+ main_~y~0 3) 4294967296))) (< 0 (mod (+ main_~z~0 1) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28582#(or (not (< 0 (mod (+ main_~y~0 4) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:08:53,274 INFO L290 TraceCheckUtils]: 25: Hoare triple {28593#(or (< 0 (mod (+ main_~z~0 2) 4294967296)) (not (< 0 (mod (+ main_~y~0 2) 4294967296))))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28589#(or (not (< 0 (mod (+ main_~y~0 3) 4294967296))) (< 0 (mod (+ main_~z~0 1) 4294967296)))} is VALID [2022-04-27 22:08:53,275 INFO L290 TraceCheckUtils]: 24: Hoare triple {28597#(or (not (< 0 (mod (+ main_~y~0 1) 4294967296))) (< 0 (mod (+ main_~z~0 3) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28593#(or (< 0 (mod (+ main_~z~0 2) 4294967296)) (not (< 0 (mod (+ main_~y~0 2) 4294967296))))} is VALID [2022-04-27 22:08:53,276 INFO L290 TraceCheckUtils]: 23: Hoare triple {28601#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 4) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28597#(or (not (< 0 (mod (+ main_~y~0 1) 4294967296))) (< 0 (mod (+ main_~z~0 3) 4294967296)))} is VALID [2022-04-27 22:08:53,276 INFO L290 TraceCheckUtils]: 22: Hoare triple {28601#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 4) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28601#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 4) 4294967296)))} is VALID [2022-04-27 22:08:53,277 INFO L290 TraceCheckUtils]: 21: Hoare triple {28608#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 3) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28601#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 4) 4294967296)))} is VALID [2022-04-27 22:08:53,277 INFO L290 TraceCheckUtils]: 20: Hoare triple {28612#(or (< 0 (mod (+ main_~z~0 2) 4294967296)) (not (< 0 (mod main_~y~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28608#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 3) 4294967296)))} is VALID [2022-04-27 22:08:53,278 INFO L290 TraceCheckUtils]: 19: Hoare triple {28616#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 1) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28612#(or (< 0 (mod (+ main_~z~0 2) 4294967296)) (not (< 0 (mod main_~y~0 4294967296))))} is VALID [2022-04-27 22:08:53,279 INFO L290 TraceCheckUtils]: 18: Hoare triple {28563#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28616#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 1) 4294967296)))} is VALID [2022-04-27 22:08:53,279 INFO L290 TraceCheckUtils]: 17: Hoare triple {28403#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28563#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:08:53,279 INFO L290 TraceCheckUtils]: 16: Hoare triple {28403#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:53,279 INFO L290 TraceCheckUtils]: 15: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:53,279 INFO L290 TraceCheckUtils]: 14: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:53,279 INFO L290 TraceCheckUtils]: 13: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:53,279 INFO L290 TraceCheckUtils]: 12: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:53,279 INFO L290 TraceCheckUtils]: 11: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:53,279 INFO L290 TraceCheckUtils]: 10: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:53,279 INFO L290 TraceCheckUtils]: 9: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:53,280 INFO L290 TraceCheckUtils]: 8: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:53,280 INFO L290 TraceCheckUtils]: 7: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:53,280 INFO L290 TraceCheckUtils]: 6: Hoare triple {28403#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28403#true} is VALID [2022-04-27 22:08:53,280 INFO L290 TraceCheckUtils]: 5: Hoare triple {28403#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28403#true} is VALID [2022-04-27 22:08:53,280 INFO L272 TraceCheckUtils]: 4: Hoare triple {28403#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:53,280 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28403#true} {28403#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:53,280 INFO L290 TraceCheckUtils]: 2: Hoare triple {28403#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:53,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {28403#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28403#true} is VALID [2022-04-27 22:08:53,280 INFO L272 TraceCheckUtils]: 0: Hoare triple {28403#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28403#true} is VALID [2022-04-27 22:08:53,280 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2022-04-27 22:08:53,280 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [487675324] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:08:53,281 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:08:53,281 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 14, 17] total 43 [2022-04-27 22:08:53,281 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557646049] [2022-04-27 22:08:53,281 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:08:53,281 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-27 22:08:53,281 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:08:53,281 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:53,336 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:53,336 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-04-27 22:08:53,336 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:08:53,336 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-04-27 22:08:53,337 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=1643, Unknown=0, NotChecked=0, Total=1806 [2022-04-27 22:08:53,337 INFO L87 Difference]: Start difference. First operand 327 states and 426 transitions. Second operand has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:24,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:24,859 INFO L93 Difference]: Finished difference Result 775 states and 1082 transitions. [2022-04-27 22:09:24,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 158 states. [2022-04-27 22:09:24,860 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-27 22:09:24,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:09:24,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:24,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 365 transitions. [2022-04-27 22:09:24,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:24,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 365 transitions. [2022-04-27 22:09:24,866 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 158 states and 365 transitions. [2022-04-27 22:09:25,524 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 365 edges. 365 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:09:25,540 INFO L225 Difference]: With dead ends: 775 [2022-04-27 22:09:25,540 INFO L226 Difference]: Without dead ends: 687 [2022-04-27 22:09:25,542 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 262 GetRequests, 62 SyntacticMatches, 4 SemanticMatches, 196 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11926 ImplicationChecksByTransitivity, 14.0s TimeCoverageRelationStatistics Valid=3458, Invalid=35548, Unknown=0, NotChecked=0, Total=39006 [2022-04-27 22:09:25,543 INFO L413 NwaCegarLoop]: 55 mSDtfsCounter, 240 mSDsluCounter, 152 mSDsCounter, 0 mSdLazyCounter, 6268 mSolverCounterSat, 951 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 8.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 240 SdHoareTripleChecker+Valid, 207 SdHoareTripleChecker+Invalid, 7219 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 951 IncrementalHoareTripleChecker+Valid, 6268 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 8.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:09:25,543 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [240 Valid, 207 Invalid, 7219 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [951 Valid, 6268 Invalid, 0 Unknown, 0 Unchecked, 8.4s Time] [2022-04-27 22:09:25,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 687 states. [2022-04-27 22:09:26,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 687 to 406. [2022-04-27 22:09:26,353 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:09:26,354 INFO L82 GeneralOperation]: Start isEquivalent. First operand 687 states. Second operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:26,354 INFO L74 IsIncluded]: Start isIncluded. First operand 687 states. Second operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:26,354 INFO L87 Difference]: Start difference. First operand 687 states. Second operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:26,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:26,368 INFO L93 Difference]: Finished difference Result 687 states and 906 transitions. [2022-04-27 22:09:26,368 INFO L276 IsEmpty]: Start isEmpty. Operand 687 states and 906 transitions. [2022-04-27 22:09:26,368 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:09:26,368 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:09:26,369 INFO L74 IsIncluded]: Start isIncluded. First operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 687 states. [2022-04-27 22:09:26,369 INFO L87 Difference]: Start difference. First operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 687 states. [2022-04-27 22:09:26,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:26,383 INFO L93 Difference]: Finished difference Result 687 states and 906 transitions. [2022-04-27 22:09:26,383 INFO L276 IsEmpty]: Start isEmpty. Operand 687 states and 906 transitions. [2022-04-27 22:09:26,383 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:09:26,383 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:09:26,384 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:09:26,384 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:09:26,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:26,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 549 transitions. [2022-04-27 22:09:26,391 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 549 transitions. Word has length 38 [2022-04-27 22:09:26,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:09:26,391 INFO L495 AbstractCegarLoop]: Abstraction has 406 states and 549 transitions. [2022-04-27 22:09:26,391 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:26,391 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 549 transitions. [2022-04-27 22:09:26,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-04-27 22:09:26,391 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:09:26,391 INFO L195 NwaCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:09:26,409 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Ended with exit code 0 [2022-04-27 22:09:26,607 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable30 [2022-04-27 22:09:26,607 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:09:26,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:09:26,608 INFO L85 PathProgramCache]: Analyzing trace with hash 2108423050, now seen corresponding path program 6 times [2022-04-27 22:09:26,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:09:26,608 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299222783] [2022-04-27 22:09:26,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:09:26,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:09:26,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:26,860 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:09:26,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:26,863 INFO L290 TraceCheckUtils]: 0: Hoare triple {31825#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31804#true} is VALID [2022-04-27 22:09:26,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {31804#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:26,863 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31804#true} {31804#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:26,864 INFO L272 TraceCheckUtils]: 0: Hoare triple {31804#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31825#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:09:26,864 INFO L290 TraceCheckUtils]: 1: Hoare triple {31825#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31804#true} is VALID [2022-04-27 22:09:26,864 INFO L290 TraceCheckUtils]: 2: Hoare triple {31804#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:26,864 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31804#true} {31804#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:26,864 INFO L272 TraceCheckUtils]: 4: Hoare triple {31804#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:26,864 INFO L290 TraceCheckUtils]: 5: Hoare triple {31804#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {31809#(= main_~y~0 0)} is VALID [2022-04-27 22:09:26,865 INFO L290 TraceCheckUtils]: 6: Hoare triple {31809#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31810#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:09:26,865 INFO L290 TraceCheckUtils]: 7: Hoare triple {31810#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31811#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:09:26,866 INFO L290 TraceCheckUtils]: 8: Hoare triple {31811#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31812#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:09:26,866 INFO L290 TraceCheckUtils]: 9: Hoare triple {31812#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31813#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:09:26,867 INFO L290 TraceCheckUtils]: 10: Hoare triple {31813#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31814#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:09:26,871 INFO L290 TraceCheckUtils]: 11: Hoare triple {31814#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31815#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:26,872 INFO L290 TraceCheckUtils]: 12: Hoare triple {31815#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31816#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:09:26,872 INFO L290 TraceCheckUtils]: 13: Hoare triple {31816#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {31816#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:09:26,872 INFO L290 TraceCheckUtils]: 14: Hoare triple {31816#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {31817#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:09:26,873 INFO L290 TraceCheckUtils]: 15: Hoare triple {31817#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31818#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:09:26,873 INFO L290 TraceCheckUtils]: 16: Hoare triple {31818#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31819#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:09:26,874 INFO L290 TraceCheckUtils]: 17: Hoare triple {31819#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31820#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:09:26,874 INFO L290 TraceCheckUtils]: 18: Hoare triple {31820#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31821#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:09:26,875 INFO L290 TraceCheckUtils]: 19: Hoare triple {31821#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31822#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:09:26,875 INFO L290 TraceCheckUtils]: 20: Hoare triple {31822#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31823#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:09:26,876 INFO L290 TraceCheckUtils]: 21: Hoare triple {31823#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31824#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 22: Hoare triple {31824#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 23: Hoare triple {31805#false} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 24: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 25: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 26: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 27: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 28: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 29: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 30: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 31: Hoare triple {31805#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 32: Hoare triple {31805#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 33: Hoare triple {31805#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 34: Hoare triple {31805#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L272 TraceCheckUtils]: 35: Hoare triple {31805#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {31805#false} is VALID [2022-04-27 22:09:26,877 INFO L290 TraceCheckUtils]: 36: Hoare triple {31805#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31805#false} is VALID [2022-04-27 22:09:26,878 INFO L290 TraceCheckUtils]: 37: Hoare triple {31805#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:26,878 INFO L290 TraceCheckUtils]: 38: Hoare triple {31805#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:26,878 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 8 proven. 56 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-27 22:09:26,878 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:09:26,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [299222783] [2022-04-27 22:09:26,878 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [299222783] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:09:26,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1721985099] [2022-04-27 22:09:26,878 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:09:26,878 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:09:26,878 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:09:26,879 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:09:26,880 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-04-27 22:09:26,987 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-27 22:09:26,987 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:09:26,988 INFO L263 TraceCheckSpWp]: Trace formula consists of 176 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-27 22:09:26,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:26,998 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:09:27,251 INFO L272 TraceCheckUtils]: 0: Hoare triple {31804#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:27,252 INFO L290 TraceCheckUtils]: 1: Hoare triple {31804#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31804#true} is VALID [2022-04-27 22:09:27,252 INFO L290 TraceCheckUtils]: 2: Hoare triple {31804#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:27,252 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31804#true} {31804#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:27,252 INFO L272 TraceCheckUtils]: 4: Hoare triple {31804#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:27,252 INFO L290 TraceCheckUtils]: 5: Hoare triple {31804#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {31809#(= main_~y~0 0)} is VALID [2022-04-27 22:09:27,252 INFO L290 TraceCheckUtils]: 6: Hoare triple {31809#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31810#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:09:27,253 INFO L290 TraceCheckUtils]: 7: Hoare triple {31810#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31811#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:09:27,253 INFO L290 TraceCheckUtils]: 8: Hoare triple {31811#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31812#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:09:27,254 INFO L290 TraceCheckUtils]: 9: Hoare triple {31812#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31813#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:09:27,254 INFO L290 TraceCheckUtils]: 10: Hoare triple {31813#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31814#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:09:27,255 INFO L290 TraceCheckUtils]: 11: Hoare triple {31814#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31815#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:27,255 INFO L290 TraceCheckUtils]: 12: Hoare triple {31815#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31816#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:09:27,256 INFO L290 TraceCheckUtils]: 13: Hoare triple {31816#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {31816#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:09:27,256 INFO L290 TraceCheckUtils]: 14: Hoare triple {31816#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {31817#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:09:27,256 INFO L290 TraceCheckUtils]: 15: Hoare triple {31817#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31818#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:09:27,257 INFO L290 TraceCheckUtils]: 16: Hoare triple {31818#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31819#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:09:27,257 INFO L290 TraceCheckUtils]: 17: Hoare triple {31819#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31820#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:09:27,258 INFO L290 TraceCheckUtils]: 18: Hoare triple {31820#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31821#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:09:27,258 INFO L290 TraceCheckUtils]: 19: Hoare triple {31821#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31822#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:09:27,259 INFO L290 TraceCheckUtils]: 20: Hoare triple {31822#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31823#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:09:27,259 INFO L290 TraceCheckUtils]: 21: Hoare triple {31823#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31824#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:09:27,260 INFO L290 TraceCheckUtils]: 22: Hoare triple {31824#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31895#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:09:27,260 INFO L290 TraceCheckUtils]: 23: Hoare triple {31895#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,260 INFO L290 TraceCheckUtils]: 24: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,260 INFO L290 TraceCheckUtils]: 25: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,260 INFO L290 TraceCheckUtils]: 26: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,260 INFO L290 TraceCheckUtils]: 27: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L290 TraceCheckUtils]: 28: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L290 TraceCheckUtils]: 29: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L290 TraceCheckUtils]: 30: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L290 TraceCheckUtils]: 31: Hoare triple {31805#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L290 TraceCheckUtils]: 32: Hoare triple {31805#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L290 TraceCheckUtils]: 33: Hoare triple {31805#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L290 TraceCheckUtils]: 34: Hoare triple {31805#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L272 TraceCheckUtils]: 35: Hoare triple {31805#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L290 TraceCheckUtils]: 36: Hoare triple {31805#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L290 TraceCheckUtils]: 37: Hoare triple {31805#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L290 TraceCheckUtils]: 38: Hoare triple {31805#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,261 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-27 22:09:27,261 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:09:27,676 INFO L290 TraceCheckUtils]: 38: Hoare triple {31805#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,676 INFO L290 TraceCheckUtils]: 37: Hoare triple {31805#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,676 INFO L290 TraceCheckUtils]: 36: Hoare triple {31805#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31805#false} is VALID [2022-04-27 22:09:27,676 INFO L272 TraceCheckUtils]: 35: Hoare triple {31805#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {31805#false} is VALID [2022-04-27 22:09:27,676 INFO L290 TraceCheckUtils]: 34: Hoare triple {31805#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,676 INFO L290 TraceCheckUtils]: 33: Hoare triple {31805#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {31805#false} is VALID [2022-04-27 22:09:27,676 INFO L290 TraceCheckUtils]: 32: Hoare triple {31805#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,676 INFO L290 TraceCheckUtils]: 31: Hoare triple {31805#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,676 INFO L290 TraceCheckUtils]: 30: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,676 INFO L290 TraceCheckUtils]: 29: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,676 INFO L290 TraceCheckUtils]: 28: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,677 INFO L290 TraceCheckUtils]: 27: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,677 INFO L290 TraceCheckUtils]: 26: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,677 INFO L290 TraceCheckUtils]: 25: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,677 INFO L290 TraceCheckUtils]: 24: Hoare triple {31805#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31805#false} is VALID [2022-04-27 22:09:27,677 INFO L290 TraceCheckUtils]: 23: Hoare triple {31989#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {31805#false} is VALID [2022-04-27 22:09:27,678 INFO L290 TraceCheckUtils]: 22: Hoare triple {31993#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31989#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:09:27,678 INFO L290 TraceCheckUtils]: 21: Hoare triple {31997#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31993#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:09:27,679 INFO L290 TraceCheckUtils]: 20: Hoare triple {32001#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31997#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:27,680 INFO L290 TraceCheckUtils]: 19: Hoare triple {32005#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32001#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 22:09:27,680 INFO L290 TraceCheckUtils]: 18: Hoare triple {32009#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32005#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-27 22:09:27,681 INFO L290 TraceCheckUtils]: 17: Hoare triple {32013#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32009#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-27 22:09:27,682 INFO L290 TraceCheckUtils]: 16: Hoare triple {32017#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32013#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-27 22:09:27,682 INFO L290 TraceCheckUtils]: 15: Hoare triple {32021#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32017#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-27 22:09:27,682 INFO L290 TraceCheckUtils]: 14: Hoare triple {32025#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32021#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} is VALID [2022-04-27 22:09:27,683 INFO L290 TraceCheckUtils]: 13: Hoare triple {32025#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32025#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-27 22:09:27,683 INFO L290 TraceCheckUtils]: 12: Hoare triple {32032#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32025#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-27 22:09:27,684 INFO L290 TraceCheckUtils]: 11: Hoare triple {32036#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32032#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-27 22:09:27,685 INFO L290 TraceCheckUtils]: 10: Hoare triple {32040#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32036#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:09:27,685 INFO L290 TraceCheckUtils]: 9: Hoare triple {32044#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32040#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:09:27,686 INFO L290 TraceCheckUtils]: 8: Hoare triple {32048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32044#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:09:27,686 INFO L290 TraceCheckUtils]: 7: Hoare triple {32052#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:09:27,687 INFO L290 TraceCheckUtils]: 6: Hoare triple {32056#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32052#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:27,687 INFO L290 TraceCheckUtils]: 5: Hoare triple {31804#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32056#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:09:27,687 INFO L272 TraceCheckUtils]: 4: Hoare triple {31804#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:27,687 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31804#true} {31804#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:27,687 INFO L290 TraceCheckUtils]: 2: Hoare triple {31804#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:27,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {31804#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31804#true} is VALID [2022-04-27 22:09:27,688 INFO L272 TraceCheckUtils]: 0: Hoare triple {31804#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31804#true} is VALID [2022-04-27 22:09:27,688 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-27 22:09:27,688 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1721985099] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:09:27,688 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:09:27,688 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19] total 37 [2022-04-27 22:09:27,688 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1525102821] [2022-04-27 22:09:27,688 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:09:27,689 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2022-04-27 22:09:27,689 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:09:27,689 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:27,726 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:09:27,727 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-27 22:09:27,727 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:09:27,727 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-27 22:09:27,727 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=201, Invalid=1131, Unknown=0, NotChecked=0, Total=1332 [2022-04-27 22:09:27,727 INFO L87 Difference]: Start difference. First operand 406 states and 549 transitions. Second operand has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:37,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:14:37,874 INFO L93 Difference]: Finished difference Result 1424 states and 2126 transitions. [2022-04-27 22:14:37,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 606 states. [2022-04-27 22:14:37,875 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2022-04-27 22:14:37,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:14:37,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:37,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 1313 transitions. [2022-04-27 22:14:37,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:37,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 1313 transitions. [2022-04-27 22:14:37,970 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 606 states and 1313 transitions. [2022-04-27 22:14:49,582 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1313 edges. 1313 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:14:49,637 INFO L225 Difference]: With dead ends: 1424 [2022-04-27 22:14:49,637 INFO L226 Difference]: Without dead ends: 1284 [2022-04-27 22:14:49,663 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 700 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 638 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196303 ImplicationChecksByTransitivity, 244.6s TimeCoverageRelationStatistics Valid=44975, Invalid=363985, Unknown=0, NotChecked=0, Total=408960 [2022-04-27 22:14:49,663 INFO L413 NwaCegarLoop]: 43 mSDtfsCounter, 1138 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 2633 mSolverCounterSat, 3215 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 27.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1138 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 5848 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3215 IncrementalHoareTripleChecker+Valid, 2633 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 27.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:14:49,663 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1138 Valid, 145 Invalid, 5848 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3215 Valid, 2633 Invalid, 0 Unknown, 0 Unchecked, 27.5s Time] [2022-04-27 22:14:49,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1284 states. [2022-04-27 22:14:50,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1284 to 618. [2022-04-27 22:14:50,960 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:14:50,960 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1284 states. Second operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:50,961 INFO L74 IsIncluded]: Start isIncluded. First operand 1284 states. Second operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:50,961 INFO L87 Difference]: Start difference. First operand 1284 states. Second operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:51,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:14:51,004 INFO L93 Difference]: Finished difference Result 1284 states and 1811 transitions. [2022-04-27 22:14:51,004 INFO L276 IsEmpty]: Start isEmpty. Operand 1284 states and 1811 transitions. [2022-04-27 22:14:51,005 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:14:51,005 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:14:51,006 INFO L74 IsIncluded]: Start isIncluded. First operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1284 states. [2022-04-27 22:14:51,006 INFO L87 Difference]: Start difference. First operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1284 states. [2022-04-27 22:14:51,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:14:51,050 INFO L93 Difference]: Finished difference Result 1284 states and 1811 transitions. [2022-04-27 22:14:51,050 INFO L276 IsEmpty]: Start isEmpty. Operand 1284 states and 1811 transitions. [2022-04-27 22:14:51,051 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:14:51,051 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:14:51,051 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:14:51,051 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:14:51,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:51,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 618 states to 618 states and 871 transitions. [2022-04-27 22:14:51,064 INFO L78 Accepts]: Start accepts. Automaton has 618 states and 871 transitions. Word has length 39 [2022-04-27 22:14:51,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:14:51,065 INFO L495 AbstractCegarLoop]: Abstraction has 618 states and 871 transitions. [2022-04-27 22:14:51,065 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:51,065 INFO L276 IsEmpty]: Start isEmpty. Operand 618 states and 871 transitions. [2022-04-27 22:14:51,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-04-27 22:14:51,065 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:14:51,065 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:14:51,081 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Ended with exit code 0 [2022-04-27 22:14:51,266 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,28 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:14:51,266 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:14:51,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:14:51,266 INFO L85 PathProgramCache]: Analyzing trace with hash -1179511284, now seen corresponding path program 11 times [2022-04-27 22:14:51,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:14:51,266 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486340971] [2022-04-27 22:14:51,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:14:51,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:14:51,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:14:51,399 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:14:51,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:14:51,402 INFO L290 TraceCheckUtils]: 0: Hoare triple {38270#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {38259#true} is VALID [2022-04-27 22:14:51,402 INFO L290 TraceCheckUtils]: 1: Hoare triple {38259#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:51,402 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {38259#true} {38259#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:51,402 INFO L272 TraceCheckUtils]: 0: Hoare triple {38259#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38270#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:14:51,402 INFO L290 TraceCheckUtils]: 1: Hoare triple {38270#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {38259#true} is VALID [2022-04-27 22:14:51,402 INFO L290 TraceCheckUtils]: 2: Hoare triple {38259#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:51,403 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38259#true} {38259#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:51,403 INFO L272 TraceCheckUtils]: 4: Hoare triple {38259#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:51,403 INFO L290 TraceCheckUtils]: 5: Hoare triple {38259#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {38259#true} is VALID [2022-04-27 22:14:51,403 INFO L290 TraceCheckUtils]: 6: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:51,403 INFO L290 TraceCheckUtils]: 7: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:51,403 INFO L290 TraceCheckUtils]: 8: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:51,403 INFO L290 TraceCheckUtils]: 9: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:51,404 INFO L290 TraceCheckUtils]: 10: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38264#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:14:51,404 INFO L290 TraceCheckUtils]: 11: Hoare triple {38264#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {38264#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:14:51,404 INFO L290 TraceCheckUtils]: 12: Hoare triple {38264#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {38264#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:14:51,405 INFO L290 TraceCheckUtils]: 13: Hoare triple {38264#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38265#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:51,406 INFO L290 TraceCheckUtils]: 14: Hoare triple {38265#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38266#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:51,407 INFO L290 TraceCheckUtils]: 15: Hoare triple {38266#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38267#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:51,408 INFO L290 TraceCheckUtils]: 16: Hoare triple {38267#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38268#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} is VALID [2022-04-27 22:14:51,408 INFO L290 TraceCheckUtils]: 17: Hoare triple {38268#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:51,409 INFO L290 TraceCheckUtils]: 18: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:51,409 INFO L290 TraceCheckUtils]: 19: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:51,409 INFO L290 TraceCheckUtils]: 20: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:51,410 INFO L290 TraceCheckUtils]: 21: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:51,410 INFO L290 TraceCheckUtils]: 22: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:51,410 INFO L290 TraceCheckUtils]: 23: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:51,411 INFO L290 TraceCheckUtils]: 24: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:51,411 INFO L290 TraceCheckUtils]: 25: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38268#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} is VALID [2022-04-27 22:14:51,412 INFO L290 TraceCheckUtils]: 26: Hoare triple {38268#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38267#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:51,413 INFO L290 TraceCheckUtils]: 27: Hoare triple {38267#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38266#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:51,414 INFO L290 TraceCheckUtils]: 28: Hoare triple {38266#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38265#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:51,414 INFO L290 TraceCheckUtils]: 29: Hoare triple {38265#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L290 TraceCheckUtils]: 30: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L290 TraceCheckUtils]: 31: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L290 TraceCheckUtils]: 32: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L290 TraceCheckUtils]: 33: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L290 TraceCheckUtils]: 34: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L290 TraceCheckUtils]: 35: Hoare triple {38260#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L272 TraceCheckUtils]: 36: Hoare triple {38260#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L290 TraceCheckUtils]: 37: Hoare triple {38260#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L290 TraceCheckUtils]: 38: Hoare triple {38260#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L290 TraceCheckUtils]: 39: Hoare triple {38260#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:51,415 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 22:14:51,415 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:14:51,416 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486340971] [2022-04-27 22:14:51,416 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [486340971] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:14:51,416 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [451159752] [2022-04-27 22:14:51,416 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:14:51,416 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:14:51,416 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:14:51,417 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:14:51,419 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-04-27 22:14:51,742 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-27 22:14:51,743 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:14:51,744 INFO L263 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 22:14:51,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:14:51,753 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:14:52,018 INFO L272 TraceCheckUtils]: 0: Hoare triple {38259#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:52,018 INFO L290 TraceCheckUtils]: 1: Hoare triple {38259#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {38259#true} is VALID [2022-04-27 22:14:52,018 INFO L290 TraceCheckUtils]: 2: Hoare triple {38259#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:52,018 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38259#true} {38259#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:52,018 INFO L272 TraceCheckUtils]: 4: Hoare triple {38259#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:52,018 INFO L290 TraceCheckUtils]: 5: Hoare triple {38259#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {38259#true} is VALID [2022-04-27 22:14:52,018 INFO L290 TraceCheckUtils]: 6: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:52,018 INFO L290 TraceCheckUtils]: 7: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:52,019 INFO L290 TraceCheckUtils]: 8: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:52,019 INFO L290 TraceCheckUtils]: 9: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:52,019 INFO L290 TraceCheckUtils]: 10: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:52,019 INFO L290 TraceCheckUtils]: 11: Hoare triple {38259#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {38307#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:14:52,019 INFO L290 TraceCheckUtils]: 12: Hoare triple {38307#(not (< 0 (mod main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {38307#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:14:52,020 INFO L290 TraceCheckUtils]: 13: Hoare triple {38307#(not (< 0 (mod main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38314#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:14:52,021 INFO L290 TraceCheckUtils]: 14: Hoare triple {38314#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38318#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:14:52,021 INFO L290 TraceCheckUtils]: 15: Hoare triple {38318#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38322#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:14:52,022 INFO L290 TraceCheckUtils]: 16: Hoare triple {38322#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38326#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:14:52,022 INFO L290 TraceCheckUtils]: 17: Hoare triple {38326#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:14:52,023 INFO L290 TraceCheckUtils]: 18: Hoare triple {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:14:52,023 INFO L290 TraceCheckUtils]: 19: Hoare triple {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:14:52,023 INFO L290 TraceCheckUtils]: 20: Hoare triple {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:14:52,024 INFO L290 TraceCheckUtils]: 21: Hoare triple {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:14:52,024 INFO L290 TraceCheckUtils]: 22: Hoare triple {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:14:52,024 INFO L290 TraceCheckUtils]: 23: Hoare triple {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:14:52,024 INFO L290 TraceCheckUtils]: 24: Hoare triple {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:14:52,025 INFO L290 TraceCheckUtils]: 25: Hoare triple {38330#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38326#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:14:52,026 INFO L290 TraceCheckUtils]: 26: Hoare triple {38326#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38322#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:14:52,026 INFO L290 TraceCheckUtils]: 27: Hoare triple {38322#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38318#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:14:52,027 INFO L290 TraceCheckUtils]: 28: Hoare triple {38318#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38314#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:14:52,027 INFO L290 TraceCheckUtils]: 29: Hoare triple {38314#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:52,027 INFO L290 TraceCheckUtils]: 30: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:52,028 INFO L290 TraceCheckUtils]: 31: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:52,028 INFO L290 TraceCheckUtils]: 32: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:52,028 INFO L290 TraceCheckUtils]: 33: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:52,028 INFO L290 TraceCheckUtils]: 34: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:52,028 INFO L290 TraceCheckUtils]: 35: Hoare triple {38260#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:52,028 INFO L272 TraceCheckUtils]: 36: Hoare triple {38260#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {38260#false} is VALID [2022-04-27 22:14:52,028 INFO L290 TraceCheckUtils]: 37: Hoare triple {38260#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {38260#false} is VALID [2022-04-27 22:14:52,028 INFO L290 TraceCheckUtils]: 38: Hoare triple {38260#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:52,028 INFO L290 TraceCheckUtils]: 39: Hoare triple {38260#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:52,028 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-27 22:14:52,028 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:14:52,240 INFO L290 TraceCheckUtils]: 39: Hoare triple {38260#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:52,240 INFO L290 TraceCheckUtils]: 38: Hoare triple {38260#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:52,240 INFO L290 TraceCheckUtils]: 37: Hoare triple {38260#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {38260#false} is VALID [2022-04-27 22:14:52,240 INFO L272 TraceCheckUtils]: 36: Hoare triple {38260#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {38260#false} is VALID [2022-04-27 22:14:52,240 INFO L290 TraceCheckUtils]: 35: Hoare triple {38260#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:52,240 INFO L290 TraceCheckUtils]: 34: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:52,240 INFO L290 TraceCheckUtils]: 33: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:52,240 INFO L290 TraceCheckUtils]: 32: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:52,240 INFO L290 TraceCheckUtils]: 31: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:52,240 INFO L290 TraceCheckUtils]: 30: Hoare triple {38260#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38260#false} is VALID [2022-04-27 22:14:52,241 INFO L290 TraceCheckUtils]: 29: Hoare triple {38265#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {38260#false} is VALID [2022-04-27 22:14:52,242 INFO L290 TraceCheckUtils]: 28: Hoare triple {38266#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38265#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:52,244 INFO L290 TraceCheckUtils]: 27: Hoare triple {38267#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38266#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:52,245 INFO L290 TraceCheckUtils]: 26: Hoare triple {38268#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38267#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:52,245 INFO L290 TraceCheckUtils]: 25: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38268#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} is VALID [2022-04-27 22:14:52,246 INFO L290 TraceCheckUtils]: 24: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:52,246 INFO L290 TraceCheckUtils]: 23: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:52,247 INFO L290 TraceCheckUtils]: 22: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:52,247 INFO L290 TraceCheckUtils]: 21: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:52,247 INFO L290 TraceCheckUtils]: 20: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:52,248 INFO L290 TraceCheckUtils]: 19: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:52,248 INFO L290 TraceCheckUtils]: 18: Hoare triple {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:52,249 INFO L290 TraceCheckUtils]: 17: Hoare triple {38268#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38269#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-27 22:14:52,249 INFO L290 TraceCheckUtils]: 16: Hoare triple {38267#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38268#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} is VALID [2022-04-27 22:14:52,250 INFO L290 TraceCheckUtils]: 15: Hoare triple {38266#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38267#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:52,251 INFO L290 TraceCheckUtils]: 14: Hoare triple {38265#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38266#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:52,252 INFO L290 TraceCheckUtils]: 13: Hoare triple {38264#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38265#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:14:52,252 INFO L290 TraceCheckUtils]: 12: Hoare triple {38264#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {38264#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:14:52,252 INFO L290 TraceCheckUtils]: 11: Hoare triple {38259#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {38264#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:14:52,252 INFO L290 TraceCheckUtils]: 10: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L290 TraceCheckUtils]: 9: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L290 TraceCheckUtils]: 8: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L290 TraceCheckUtils]: 7: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L290 TraceCheckUtils]: 6: Hoare triple {38259#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L290 TraceCheckUtils]: 5: Hoare triple {38259#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L272 TraceCheckUtils]: 4: Hoare triple {38259#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38259#true} {38259#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L290 TraceCheckUtils]: 2: Hoare triple {38259#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {38259#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L272 TraceCheckUtils]: 0: Hoare triple {38259#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38259#true} is VALID [2022-04-27 22:14:52,253 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-27 22:14:52,253 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [451159752] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:14:52,254 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:14:52,254 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 15 [2022-04-27 22:14:52,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1252018592] [2022-04-27 22:14:52,254 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:14:52,254 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 40 [2022-04-27 22:14:52,254 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:14:52,254 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:52,288 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:14:52,289 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 22:14:52,289 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:14:52,289 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 22:14:52,289 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2022-04-27 22:14:52,289 INFO L87 Difference]: Start difference. First operand 618 states and 871 transitions. Second operand has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:55,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:14:55,002 INFO L93 Difference]: Finished difference Result 908 states and 1343 transitions. [2022-04-27 22:14:55,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-27 22:14:55,002 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 40 [2022-04-27 22:14:55,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:14:55,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:55,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 107 transitions. [2022-04-27 22:14:55,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:55,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 107 transitions. [2022-04-27 22:14:55,004 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 107 transitions. [2022-04-27 22:14:55,248 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 107 edges. 107 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:14:55,271 INFO L225 Difference]: With dead ends: 908 [2022-04-27 22:14:55,271 INFO L226 Difference]: Without dead ends: 797 [2022-04-27 22:14:55,272 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 79 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 377 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=339, Invalid=1067, Unknown=0, NotChecked=0, Total=1406 [2022-04-27 22:14:55,272 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 156 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 170 mSolverCounterSat, 88 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 156 SdHoareTripleChecker+Valid, 55 SdHoareTripleChecker+Invalid, 258 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 88 IncrementalHoareTripleChecker+Valid, 170 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:14:55,272 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [156 Valid, 55 Invalid, 258 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [88 Valid, 170 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 22:14:55,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 797 states. [2022-04-27 22:14:56,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 797 to 749. [2022-04-27 22:14:56,653 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:14:56,654 INFO L82 GeneralOperation]: Start isEquivalent. First operand 797 states. Second operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:56,654 INFO L74 IsIncluded]: Start isIncluded. First operand 797 states. Second operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:56,655 INFO L87 Difference]: Start difference. First operand 797 states. Second operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:56,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:14:56,675 INFO L93 Difference]: Finished difference Result 797 states and 1136 transitions. [2022-04-27 22:14:56,675 INFO L276 IsEmpty]: Start isEmpty. Operand 797 states and 1136 transitions. [2022-04-27 22:14:56,675 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:14:56,675 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:14:56,676 INFO L74 IsIncluded]: Start isIncluded. First operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 797 states. [2022-04-27 22:14:56,676 INFO L87 Difference]: Start difference. First operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 797 states. [2022-04-27 22:14:56,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:14:56,696 INFO L93 Difference]: Finished difference Result 797 states and 1136 transitions. [2022-04-27 22:14:56,696 INFO L276 IsEmpty]: Start isEmpty. Operand 797 states and 1136 transitions. [2022-04-27 22:14:56,697 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:14:56,697 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:14:56,697 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:14:56,697 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:14:56,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:56,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 749 states to 749 states and 1080 transitions. [2022-04-27 22:14:56,714 INFO L78 Accepts]: Start accepts. Automaton has 749 states and 1080 transitions. Word has length 40 [2022-04-27 22:14:56,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:14:56,714 INFO L495 AbstractCegarLoop]: Abstraction has 749 states and 1080 transitions. [2022-04-27 22:14:56,714 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:56,714 INFO L276 IsEmpty]: Start isEmpty. Operand 749 states and 1080 transitions. [2022-04-27 22:14:56,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-04-27 22:14:56,715 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:14:56,715 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:14:56,719 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Forceful destruction successful, exit code 0 [2022-04-27 22:14:56,919 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,29 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:14:56,919 INFO L420 AbstractCegarLoop]: === Iteration 34 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:14:56,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:14:56,919 INFO L85 PathProgramCache]: Analyzing trace with hash 287258053, now seen corresponding path program 7 times [2022-04-27 22:14:56,920 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:14:56,920 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742103322] [2022-04-27 22:14:56,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:14:56,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:14:56,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:14:57,242 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:14:57,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:14:57,244 INFO L290 TraceCheckUtils]: 0: Hoare triple {42146#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42122#true} is VALID [2022-04-27 22:14:57,245 INFO L290 TraceCheckUtils]: 1: Hoare triple {42122#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,245 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {42122#true} {42122#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,245 INFO L272 TraceCheckUtils]: 0: Hoare triple {42122#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42146#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:14:57,245 INFO L290 TraceCheckUtils]: 1: Hoare triple {42146#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42122#true} is VALID [2022-04-27 22:14:57,245 INFO L290 TraceCheckUtils]: 2: Hoare triple {42122#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,245 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42122#true} {42122#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,245 INFO L272 TraceCheckUtils]: 4: Hoare triple {42122#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,246 INFO L290 TraceCheckUtils]: 5: Hoare triple {42122#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {42127#(= main_~y~0 0)} is VALID [2022-04-27 22:14:57,246 INFO L290 TraceCheckUtils]: 6: Hoare triple {42127#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42128#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:14:57,247 INFO L290 TraceCheckUtils]: 7: Hoare triple {42128#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42129#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:14:57,247 INFO L290 TraceCheckUtils]: 8: Hoare triple {42129#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42130#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:14:57,248 INFO L290 TraceCheckUtils]: 9: Hoare triple {42130#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42131#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:14:57,248 INFO L290 TraceCheckUtils]: 10: Hoare triple {42131#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42132#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:14:57,249 INFO L290 TraceCheckUtils]: 11: Hoare triple {42132#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42133#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:14:57,249 INFO L290 TraceCheckUtils]: 12: Hoare triple {42133#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42134#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:14:57,250 INFO L290 TraceCheckUtils]: 13: Hoare triple {42134#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42135#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:14:57,250 INFO L290 TraceCheckUtils]: 14: Hoare triple {42135#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {42135#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:14:57,251 INFO L290 TraceCheckUtils]: 15: Hoare triple {42135#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {42136#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:14:57,251 INFO L290 TraceCheckUtils]: 16: Hoare triple {42136#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42137#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:14:57,252 INFO L290 TraceCheckUtils]: 17: Hoare triple {42137#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42138#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:14:57,252 INFO L290 TraceCheckUtils]: 18: Hoare triple {42138#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42139#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:14:57,253 INFO L290 TraceCheckUtils]: 19: Hoare triple {42139#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42140#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:14:57,253 INFO L290 TraceCheckUtils]: 20: Hoare triple {42140#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42141#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:14:57,254 INFO L290 TraceCheckUtils]: 21: Hoare triple {42141#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42142#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:14:57,254 INFO L290 TraceCheckUtils]: 22: Hoare triple {42142#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42143#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:14:57,255 INFO L290 TraceCheckUtils]: 23: Hoare triple {42143#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42144#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:14:57,255 INFO L290 TraceCheckUtils]: 24: Hoare triple {42144#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {42144#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:14:57,256 INFO L290 TraceCheckUtils]: 25: Hoare triple {42144#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42143#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:14:57,256 INFO L290 TraceCheckUtils]: 26: Hoare triple {42143#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42142#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:14:57,257 INFO L290 TraceCheckUtils]: 27: Hoare triple {42142#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42141#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:14:57,257 INFO L290 TraceCheckUtils]: 28: Hoare triple {42141#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42140#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:14:57,258 INFO L290 TraceCheckUtils]: 29: Hoare triple {42140#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42139#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:14:57,258 INFO L290 TraceCheckUtils]: 30: Hoare triple {42139#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42138#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:14:57,259 INFO L290 TraceCheckUtils]: 31: Hoare triple {42138#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42137#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:14:57,259 INFO L290 TraceCheckUtils]: 32: Hoare triple {42137#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42136#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:14:57,260 INFO L290 TraceCheckUtils]: 33: Hoare triple {42136#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {42136#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:14:57,260 INFO L290 TraceCheckUtils]: 34: Hoare triple {42136#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {42136#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:14:57,260 INFO L290 TraceCheckUtils]: 35: Hoare triple {42136#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {42145#(and (<= 7 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:14:57,261 INFO L290 TraceCheckUtils]: 36: Hoare triple {42145#(and (<= 7 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,261 INFO L272 TraceCheckUtils]: 37: Hoare triple {42123#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {42123#false} is VALID [2022-04-27 22:14:57,261 INFO L290 TraceCheckUtils]: 38: Hoare triple {42123#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {42123#false} is VALID [2022-04-27 22:14:57,261 INFO L290 TraceCheckUtils]: 39: Hoare triple {42123#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,261 INFO L290 TraceCheckUtils]: 40: Hoare triple {42123#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,261 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 109 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:14:57,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:14:57,262 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742103322] [2022-04-27 22:14:57,262 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1742103322] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:14:57,262 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [521925924] [2022-04-27 22:14:57,262 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:14:57,262 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:14:57,262 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:14:57,263 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:14:57,264 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-04-27 22:14:57,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:14:57,311 INFO L263 TraceCheckSpWp]: Trace formula consists of 186 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-27 22:14:57,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:14:57,321 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:14:57,611 INFO L272 TraceCheckUtils]: 0: Hoare triple {42122#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {42122#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42122#true} is VALID [2022-04-27 22:14:57,612 INFO L290 TraceCheckUtils]: 2: Hoare triple {42122#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42122#true} {42122#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,612 INFO L272 TraceCheckUtils]: 4: Hoare triple {42122#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,612 INFO L290 TraceCheckUtils]: 5: Hoare triple {42122#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {42122#true} is VALID [2022-04-27 22:14:57,613 INFO L290 TraceCheckUtils]: 6: Hoare triple {42122#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42168#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:14:57,613 INFO L290 TraceCheckUtils]: 7: Hoare triple {42168#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42172#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:14:57,614 INFO L290 TraceCheckUtils]: 8: Hoare triple {42172#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42176#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:14:57,614 INFO L290 TraceCheckUtils]: 9: Hoare triple {42176#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42180#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:14:57,615 INFO L290 TraceCheckUtils]: 10: Hoare triple {42180#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42184#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:14:57,616 INFO L290 TraceCheckUtils]: 11: Hoare triple {42184#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42188#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 22:14:57,616 INFO L290 TraceCheckUtils]: 12: Hoare triple {42188#(< 0 (mod (+ main_~x~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42192#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 22:14:57,617 INFO L290 TraceCheckUtils]: 13: Hoare triple {42192#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:14:57,617 INFO L290 TraceCheckUtils]: 14: Hoare triple {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:14:57,617 INFO L290 TraceCheckUtils]: 15: Hoare triple {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:14:57,618 INFO L290 TraceCheckUtils]: 16: Hoare triple {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42192#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 22:14:57,618 INFO L290 TraceCheckUtils]: 17: Hoare triple {42192#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42188#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 22:14:57,619 INFO L290 TraceCheckUtils]: 18: Hoare triple {42188#(< 0 (mod (+ main_~x~0 6) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42184#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:14:57,620 INFO L290 TraceCheckUtils]: 19: Hoare triple {42184#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42180#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:14:57,620 INFO L290 TraceCheckUtils]: 20: Hoare triple {42180#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42176#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:14:57,621 INFO L290 TraceCheckUtils]: 21: Hoare triple {42176#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42172#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:14:57,621 INFO L290 TraceCheckUtils]: 22: Hoare triple {42172#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42168#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:14:57,622 INFO L290 TraceCheckUtils]: 23: Hoare triple {42168#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,622 INFO L290 TraceCheckUtils]: 24: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,622 INFO L290 TraceCheckUtils]: 25: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,623 INFO L290 TraceCheckUtils]: 26: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,623 INFO L290 TraceCheckUtils]: 27: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,623 INFO L290 TraceCheckUtils]: 28: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,624 INFO L290 TraceCheckUtils]: 29: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,624 INFO L290 TraceCheckUtils]: 30: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,624 INFO L290 TraceCheckUtils]: 31: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,625 INFO L290 TraceCheckUtils]: 32: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,625 INFO L290 TraceCheckUtils]: 33: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,625 INFO L290 TraceCheckUtils]: 34: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,625 INFO L290 TraceCheckUtils]: 35: Hoare triple {42123#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {42123#false} is VALID [2022-04-27 22:14:57,625 INFO L290 TraceCheckUtils]: 36: Hoare triple {42123#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,625 INFO L272 TraceCheckUtils]: 37: Hoare triple {42123#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {42123#false} is VALID [2022-04-27 22:14:57,625 INFO L290 TraceCheckUtils]: 38: Hoare triple {42123#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {42123#false} is VALID [2022-04-27 22:14:57,625 INFO L290 TraceCheckUtils]: 39: Hoare triple {42123#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,625 INFO L290 TraceCheckUtils]: 40: Hoare triple {42123#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,626 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 8 proven. 64 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-27 22:14:57,626 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:14:57,748 INFO L290 TraceCheckUtils]: 40: Hoare triple {42123#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,748 INFO L290 TraceCheckUtils]: 39: Hoare triple {42123#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,748 INFO L290 TraceCheckUtils]: 38: Hoare triple {42123#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {42123#false} is VALID [2022-04-27 22:14:57,748 INFO L272 TraceCheckUtils]: 37: Hoare triple {42123#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {42123#false} is VALID [2022-04-27 22:14:57,748 INFO L290 TraceCheckUtils]: 36: Hoare triple {42123#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,748 INFO L290 TraceCheckUtils]: 35: Hoare triple {42123#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {42123#false} is VALID [2022-04-27 22:14:57,748 INFO L290 TraceCheckUtils]: 34: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {42123#false} is VALID [2022-04-27 22:14:57,749 INFO L290 TraceCheckUtils]: 33: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,749 INFO L290 TraceCheckUtils]: 32: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,749 INFO L290 TraceCheckUtils]: 31: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,749 INFO L290 TraceCheckUtils]: 30: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,750 INFO L290 TraceCheckUtils]: 29: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,750 INFO L290 TraceCheckUtils]: 28: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,750 INFO L290 TraceCheckUtils]: 27: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,750 INFO L290 TraceCheckUtils]: 26: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,751 INFO L290 TraceCheckUtils]: 25: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,751 INFO L290 TraceCheckUtils]: 24: Hoare triple {42227#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,752 INFO L290 TraceCheckUtils]: 23: Hoare triple {42168#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42227#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:14:57,752 INFO L290 TraceCheckUtils]: 22: Hoare triple {42172#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42168#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:14:57,753 INFO L290 TraceCheckUtils]: 21: Hoare triple {42176#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42172#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:14:57,753 INFO L290 TraceCheckUtils]: 20: Hoare triple {42180#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42176#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:14:57,754 INFO L290 TraceCheckUtils]: 19: Hoare triple {42184#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42180#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:14:57,755 INFO L290 TraceCheckUtils]: 18: Hoare triple {42188#(< 0 (mod (+ main_~x~0 6) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42184#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:14:57,755 INFO L290 TraceCheckUtils]: 17: Hoare triple {42192#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42188#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 22:14:57,756 INFO L290 TraceCheckUtils]: 16: Hoare triple {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42192#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 22:14:57,756 INFO L290 TraceCheckUtils]: 15: Hoare triple {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:14:57,756 INFO L290 TraceCheckUtils]: 14: Hoare triple {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:14:57,757 INFO L290 TraceCheckUtils]: 13: Hoare triple {42192#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42196#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:14:57,759 INFO L290 TraceCheckUtils]: 12: Hoare triple {42188#(< 0 (mod (+ main_~x~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42192#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 22:14:57,760 INFO L290 TraceCheckUtils]: 11: Hoare triple {42184#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42188#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 22:14:57,761 INFO L290 TraceCheckUtils]: 10: Hoare triple {42180#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42184#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:14:57,761 INFO L290 TraceCheckUtils]: 9: Hoare triple {42176#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42180#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:14:57,762 INFO L290 TraceCheckUtils]: 8: Hoare triple {42172#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42176#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:14:57,763 INFO L290 TraceCheckUtils]: 7: Hoare triple {42168#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42172#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:14:57,763 INFO L290 TraceCheckUtils]: 6: Hoare triple {42122#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42168#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:14:57,763 INFO L290 TraceCheckUtils]: 5: Hoare triple {42122#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {42122#true} is VALID [2022-04-27 22:14:57,763 INFO L272 TraceCheckUtils]: 4: Hoare triple {42122#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,763 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42122#true} {42122#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,763 INFO L290 TraceCheckUtils]: 2: Hoare triple {42122#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,764 INFO L290 TraceCheckUtils]: 1: Hoare triple {42122#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42122#true} is VALID [2022-04-27 22:14:57,764 INFO L272 TraceCheckUtils]: 0: Hoare triple {42122#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42122#true} is VALID [2022-04-27 22:14:57,764 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 8 proven. 64 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-27 22:14:57,764 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [521925924] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:14:57,764 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:14:57,764 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 11, 11] total 31 [2022-04-27 22:14:57,764 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [539185601] [2022-04-27 22:14:57,764 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:14:57,765 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-27 22:14:57,765 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:14:57,765 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:14:57,810 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:14:57,810 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-27 22:14:57,810 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:14:57,810 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-27 22:14:57,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=869, Unknown=0, NotChecked=0, Total=930 [2022-04-27 22:14:57,810 INFO L87 Difference]: Start difference. First operand 749 states and 1080 transitions. Second operand has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:16:53,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:16:53,073 INFO L93 Difference]: Finished difference Result 1062 states and 1539 transitions. [2022-04-27 22:16:53,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 144 states. [2022-04-27 22:16:53,073 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-27 22:16:53,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:16:53,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:16:53,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 283 transitions. [2022-04-27 22:16:53,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:16:53,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 283 transitions. [2022-04-27 22:16:53,077 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 144 states and 283 transitions. [2022-04-27 22:16:55,032 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 283 edges. 283 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:16:55,062 INFO L225 Difference]: With dead ends: 1062 [2022-04-27 22:16:55,062 INFO L226 Difference]: Without dead ends: 941 [2022-04-27 22:16:55,064 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 253 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 170 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9823 ImplicationChecksByTransitivity, 50.2s TimeCoverageRelationStatistics Valid=2556, Invalid=26856, Unknown=0, NotChecked=0, Total=29412 [2022-04-27 22:16:55,064 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 190 mSDsluCounter, 132 mSDsCounter, 0 mSdLazyCounter, 3254 mSolverCounterSat, 406 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 29.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 190 SdHoareTripleChecker+Valid, 152 SdHoareTripleChecker+Invalid, 3660 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 406 IncrementalHoareTripleChecker+Valid, 3254 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 29.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:16:55,064 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [190 Valid, 152 Invalid, 3660 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [406 Valid, 3254 Invalid, 0 Unknown, 0 Unchecked, 29.1s Time] [2022-04-27 22:16:55,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 941 states. [2022-04-27 22:16:56,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 941 to 731. [2022-04-27 22:16:56,593 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:16:56,594 INFO L82 GeneralOperation]: Start isEquivalent. First operand 941 states. Second operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:16:56,595 INFO L74 IsIncluded]: Start isIncluded. First operand 941 states. Second operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:16:56,595 INFO L87 Difference]: Start difference. First operand 941 states. Second operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:16:56,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:16:56,629 INFO L93 Difference]: Finished difference Result 941 states and 1300 transitions. [2022-04-27 22:16:56,630 INFO L276 IsEmpty]: Start isEmpty. Operand 941 states and 1300 transitions. [2022-04-27 22:16:56,630 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:16:56,630 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:16:56,631 INFO L74 IsIncluded]: Start isIncluded. First operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 941 states. [2022-04-27 22:16:56,631 INFO L87 Difference]: Start difference. First operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 941 states. [2022-04-27 22:16:56,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:16:56,656 INFO L93 Difference]: Finished difference Result 941 states and 1300 transitions. [2022-04-27 22:16:56,656 INFO L276 IsEmpty]: Start isEmpty. Operand 941 states and 1300 transitions. [2022-04-27 22:16:56,657 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:16:56,657 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:16:56,657 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:16:56,657 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:16:56,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:16:56,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1045 transitions. [2022-04-27 22:16:56,674 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1045 transitions. Word has length 41 [2022-04-27 22:16:56,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:16:56,674 INFO L495 AbstractCegarLoop]: Abstraction has 731 states and 1045 transitions. [2022-04-27 22:16:56,674 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:16:56,674 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1045 transitions. [2022-04-27 22:16:56,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-04-27 22:16:56,675 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:16:56,675 INFO L195 NwaCegarLoop]: trace histogram [11, 9, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:16:56,691 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Forceful destruction successful, exit code 0 [2022-04-27 22:16:56,887 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,30 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:16:56,887 INFO L420 AbstractCegarLoop]: === Iteration 35 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:16:56,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:16:56,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1409959931, now seen corresponding path program 8 times [2022-04-27 22:16:56,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:16:56,888 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [548643919] [2022-04-27 22:16:56,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:16:56,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:16:56,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:16:57,240 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:16:57,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:16:57,243 INFO L290 TraceCheckUtils]: 0: Hoare triple {46686#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46659#true} is VALID [2022-04-27 22:16:57,243 INFO L290 TraceCheckUtils]: 1: Hoare triple {46659#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,244 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {46659#true} {46659#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,244 INFO L272 TraceCheckUtils]: 0: Hoare triple {46659#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46686#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:16:57,244 INFO L290 TraceCheckUtils]: 1: Hoare triple {46686#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46659#true} is VALID [2022-04-27 22:16:57,244 INFO L290 TraceCheckUtils]: 2: Hoare triple {46659#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,244 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46659#true} {46659#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,244 INFO L272 TraceCheckUtils]: 4: Hoare triple {46659#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,245 INFO L290 TraceCheckUtils]: 5: Hoare triple {46659#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {46664#(= main_~y~0 0)} is VALID [2022-04-27 22:16:57,245 INFO L290 TraceCheckUtils]: 6: Hoare triple {46664#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46665#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:16:57,245 INFO L290 TraceCheckUtils]: 7: Hoare triple {46665#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46666#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:16:57,246 INFO L290 TraceCheckUtils]: 8: Hoare triple {46666#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46667#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:16:57,247 INFO L290 TraceCheckUtils]: 9: Hoare triple {46667#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46668#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:16:57,247 INFO L290 TraceCheckUtils]: 10: Hoare triple {46668#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46669#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:16:57,248 INFO L290 TraceCheckUtils]: 11: Hoare triple {46669#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46670#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:16:57,248 INFO L290 TraceCheckUtils]: 12: Hoare triple {46670#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46671#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:16:57,249 INFO L290 TraceCheckUtils]: 13: Hoare triple {46671#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46672#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:16:57,249 INFO L290 TraceCheckUtils]: 14: Hoare triple {46672#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46673#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:16:57,250 INFO L290 TraceCheckUtils]: 15: Hoare triple {46673#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46674#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:16:57,250 INFO L290 TraceCheckUtils]: 16: Hoare triple {46674#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46675#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:16:57,251 INFO L290 TraceCheckUtils]: 17: Hoare triple {46675#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {46675#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:16:57,251 INFO L290 TraceCheckUtils]: 18: Hoare triple {46675#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {46676#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-27 22:16:57,251 INFO L290 TraceCheckUtils]: 19: Hoare triple {46676#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46677#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-27 22:16:57,252 INFO L290 TraceCheckUtils]: 20: Hoare triple {46677#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46678#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 22:16:57,252 INFO L290 TraceCheckUtils]: 21: Hoare triple {46678#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46679#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:16:57,253 INFO L290 TraceCheckUtils]: 22: Hoare triple {46679#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46680#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:16:57,253 INFO L290 TraceCheckUtils]: 23: Hoare triple {46680#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46681#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:16:57,254 INFO L290 TraceCheckUtils]: 24: Hoare triple {46681#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46682#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:16:57,254 INFO L290 TraceCheckUtils]: 25: Hoare triple {46682#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46683#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:16:57,255 INFO L290 TraceCheckUtils]: 26: Hoare triple {46683#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46684#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:16:57,255 INFO L290 TraceCheckUtils]: 27: Hoare triple {46684#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46685#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-27 22:16:57,256 INFO L290 TraceCheckUtils]: 28: Hoare triple {46685#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,256 INFO L290 TraceCheckUtils]: 29: Hoare triple {46660#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46660#false} is VALID [2022-04-27 22:16:57,256 INFO L290 TraceCheckUtils]: 30: Hoare triple {46660#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46660#false} is VALID [2022-04-27 22:16:57,256 INFO L290 TraceCheckUtils]: 31: Hoare triple {46660#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46660#false} is VALID [2022-04-27 22:16:57,256 INFO L290 TraceCheckUtils]: 32: Hoare triple {46660#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46660#false} is VALID [2022-04-27 22:16:57,256 INFO L290 TraceCheckUtils]: 33: Hoare triple {46660#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,256 INFO L290 TraceCheckUtils]: 34: Hoare triple {46660#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,256 INFO L290 TraceCheckUtils]: 35: Hoare triple {46660#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {46660#false} is VALID [2022-04-27 22:16:57,256 INFO L290 TraceCheckUtils]: 36: Hoare triple {46660#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,257 INFO L272 TraceCheckUtils]: 37: Hoare triple {46660#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {46660#false} is VALID [2022-04-27 22:16:57,257 INFO L290 TraceCheckUtils]: 38: Hoare triple {46660#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {46660#false} is VALID [2022-04-27 22:16:57,257 INFO L290 TraceCheckUtils]: 39: Hoare triple {46660#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,257 INFO L290 TraceCheckUtils]: 40: Hoare triple {46660#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,257 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-27 22:16:57,257 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:16:57,257 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [548643919] [2022-04-27 22:16:57,257 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [548643919] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:16:57,257 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [943066054] [2022-04-27 22:16:57,257 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:16:57,257 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:16:57,258 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:16:57,258 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:16:57,260 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-04-27 22:16:57,305 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:16:57,306 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:16:57,306 INFO L263 TraceCheckSpWp]: Trace formula consists of 186 conjuncts, 42 conjunts are in the unsatisfiable core [2022-04-27 22:16:57,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:16:57,315 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:16:57,711 INFO L272 TraceCheckUtils]: 0: Hoare triple {46659#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,711 INFO L290 TraceCheckUtils]: 1: Hoare triple {46659#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46659#true} is VALID [2022-04-27 22:16:57,711 INFO L290 TraceCheckUtils]: 2: Hoare triple {46659#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,711 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46659#true} {46659#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,711 INFO L272 TraceCheckUtils]: 4: Hoare triple {46659#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,711 INFO L290 TraceCheckUtils]: 5: Hoare triple {46659#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {46659#true} is VALID [2022-04-27 22:16:57,711 INFO L290 TraceCheckUtils]: 6: Hoare triple {46659#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46659#true} is VALID [2022-04-27 22:16:57,711 INFO L290 TraceCheckUtils]: 7: Hoare triple {46659#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46659#true} is VALID [2022-04-27 22:16:57,712 INFO L290 TraceCheckUtils]: 8: Hoare triple {46659#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46714#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:16:57,713 INFO L290 TraceCheckUtils]: 9: Hoare triple {46714#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46718#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:16:57,713 INFO L290 TraceCheckUtils]: 10: Hoare triple {46718#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46722#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:16:57,714 INFO L290 TraceCheckUtils]: 11: Hoare triple {46722#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46726#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:16:57,714 INFO L290 TraceCheckUtils]: 12: Hoare triple {46726#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46730#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:16:57,715 INFO L290 TraceCheckUtils]: 13: Hoare triple {46730#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46734#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 22:16:57,716 INFO L290 TraceCheckUtils]: 14: Hoare triple {46734#(< 0 (mod (+ main_~x~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46738#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 22:16:57,716 INFO L290 TraceCheckUtils]: 15: Hoare triple {46738#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46742#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:16:57,717 INFO L290 TraceCheckUtils]: 16: Hoare triple {46742#(< 0 (mod (+ main_~x~0 8) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-27 22:16:57,717 INFO L290 TraceCheckUtils]: 17: Hoare triple {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-27 22:16:57,718 INFO L290 TraceCheckUtils]: 18: Hoare triple {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-27 22:16:57,718 INFO L290 TraceCheckUtils]: 19: Hoare triple {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46742#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:16:57,719 INFO L290 TraceCheckUtils]: 20: Hoare triple {46742#(< 0 (mod (+ main_~x~0 8) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46738#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 22:16:57,719 INFO L290 TraceCheckUtils]: 21: Hoare triple {46738#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46734#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 22:16:57,720 INFO L290 TraceCheckUtils]: 22: Hoare triple {46734#(< 0 (mod (+ main_~x~0 6) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46730#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:16:57,721 INFO L290 TraceCheckUtils]: 23: Hoare triple {46730#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46726#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:16:57,721 INFO L290 TraceCheckUtils]: 24: Hoare triple {46726#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46722#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:16:57,722 INFO L290 TraceCheckUtils]: 25: Hoare triple {46722#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46718#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:16:57,723 INFO L290 TraceCheckUtils]: 26: Hoare triple {46718#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46714#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:16:57,723 INFO L290 TraceCheckUtils]: 27: Hoare triple {46714#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,723 INFO L290 TraceCheckUtils]: 28: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,724 INFO L290 TraceCheckUtils]: 29: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,724 INFO L290 TraceCheckUtils]: 30: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,724 INFO L290 TraceCheckUtils]: 31: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,724 INFO L290 TraceCheckUtils]: 32: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,725 INFO L290 TraceCheckUtils]: 33: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,725 INFO L290 TraceCheckUtils]: 34: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,725 INFO L290 TraceCheckUtils]: 35: Hoare triple {46660#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {46660#false} is VALID [2022-04-27 22:16:57,725 INFO L290 TraceCheckUtils]: 36: Hoare triple {46660#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,725 INFO L272 TraceCheckUtils]: 37: Hoare triple {46660#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {46660#false} is VALID [2022-04-27 22:16:57,725 INFO L290 TraceCheckUtils]: 38: Hoare triple {46660#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {46660#false} is VALID [2022-04-27 22:16:57,725 INFO L290 TraceCheckUtils]: 39: Hoare triple {46660#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,725 INFO L290 TraceCheckUtils]: 40: Hoare triple {46660#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,726 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 27 proven. 81 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-04-27 22:16:57,726 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:16:57,849 INFO L290 TraceCheckUtils]: 40: Hoare triple {46660#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,849 INFO L290 TraceCheckUtils]: 39: Hoare triple {46660#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,849 INFO L290 TraceCheckUtils]: 38: Hoare triple {46660#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {46660#false} is VALID [2022-04-27 22:16:57,849 INFO L272 TraceCheckUtils]: 37: Hoare triple {46660#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {46660#false} is VALID [2022-04-27 22:16:57,849 INFO L290 TraceCheckUtils]: 36: Hoare triple {46660#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,849 INFO L290 TraceCheckUtils]: 35: Hoare triple {46660#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {46660#false} is VALID [2022-04-27 22:16:57,849 INFO L290 TraceCheckUtils]: 34: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {46660#false} is VALID [2022-04-27 22:16:57,850 INFO L290 TraceCheckUtils]: 33: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,850 INFO L290 TraceCheckUtils]: 32: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,850 INFO L290 TraceCheckUtils]: 31: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,850 INFO L290 TraceCheckUtils]: 30: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,851 INFO L290 TraceCheckUtils]: 29: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,851 INFO L290 TraceCheckUtils]: 28: Hoare triple {46780#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,852 INFO L290 TraceCheckUtils]: 27: Hoare triple {46714#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46780#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:16:57,852 INFO L290 TraceCheckUtils]: 26: Hoare triple {46718#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46714#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:16:57,853 INFO L290 TraceCheckUtils]: 25: Hoare triple {46722#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46718#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:16:57,853 INFO L290 TraceCheckUtils]: 24: Hoare triple {46726#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46722#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:16:57,854 INFO L290 TraceCheckUtils]: 23: Hoare triple {46730#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46726#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:16:57,855 INFO L290 TraceCheckUtils]: 22: Hoare triple {46734#(< 0 (mod (+ main_~x~0 6) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46730#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:16:57,855 INFO L290 TraceCheckUtils]: 21: Hoare triple {46738#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46734#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 22:16:57,856 INFO L290 TraceCheckUtils]: 20: Hoare triple {46742#(< 0 (mod (+ main_~x~0 8) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46738#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 22:16:57,856 INFO L290 TraceCheckUtils]: 19: Hoare triple {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46742#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:16:57,857 INFO L290 TraceCheckUtils]: 18: Hoare triple {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-27 22:16:57,857 INFO L290 TraceCheckUtils]: 17: Hoare triple {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-27 22:16:57,858 INFO L290 TraceCheckUtils]: 16: Hoare triple {46742#(< 0 (mod (+ main_~x~0 8) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46746#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-27 22:16:57,858 INFO L290 TraceCheckUtils]: 15: Hoare triple {46738#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46742#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:16:57,859 INFO L290 TraceCheckUtils]: 14: Hoare triple {46734#(< 0 (mod (+ main_~x~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46738#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 22:16:57,859 INFO L290 TraceCheckUtils]: 13: Hoare triple {46730#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46734#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 22:16:57,860 INFO L290 TraceCheckUtils]: 12: Hoare triple {46726#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46730#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:16:57,860 INFO L290 TraceCheckUtils]: 11: Hoare triple {46722#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46726#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:16:57,861 INFO L290 TraceCheckUtils]: 10: Hoare triple {46718#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46722#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:16:57,862 INFO L290 TraceCheckUtils]: 9: Hoare triple {46714#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46718#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:16:57,862 INFO L290 TraceCheckUtils]: 8: Hoare triple {46659#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46714#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:16:57,862 INFO L290 TraceCheckUtils]: 7: Hoare triple {46659#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46659#true} is VALID [2022-04-27 22:16:57,862 INFO L290 TraceCheckUtils]: 6: Hoare triple {46659#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46659#true} is VALID [2022-04-27 22:16:57,862 INFO L290 TraceCheckUtils]: 5: Hoare triple {46659#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {46659#true} is VALID [2022-04-27 22:16:57,862 INFO L272 TraceCheckUtils]: 4: Hoare triple {46659#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,863 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46659#true} {46659#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,863 INFO L290 TraceCheckUtils]: 2: Hoare triple {46659#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {46659#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46659#true} is VALID [2022-04-27 22:16:57,863 INFO L272 TraceCheckUtils]: 0: Hoare triple {46659#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46659#true} is VALID [2022-04-27 22:16:57,863 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 27 proven. 81 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-04-27 22:16:57,863 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [943066054] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:16:57,863 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:16:57,863 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 12, 12] total 35 [2022-04-27 22:16:57,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1820897596] [2022-04-27 22:16:57,863 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:16:57,864 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 1.7428571428571429) internal successors, (61), 34 states have internal predecessors, (61), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-27 22:16:57,864 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:16:57,864 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 35 states have (on average 1.7428571428571429) internal successors, (61), 34 states have internal predecessors, (61), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:16:57,914 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:16:57,914 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-27 22:16:57,914 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:16:57,914 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-27 22:16:57,915 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=1114, Unknown=0, NotChecked=0, Total=1190 [2022-04-27 22:16:57,915 INFO L87 Difference]: Start difference. First operand 731 states and 1045 transitions. Second operand has 35 states, 35 states have (on average 1.7428571428571429) internal successors, (61), 34 states have internal predecessors, (61), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:18:52,496 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.22s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []