/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops/invert_string-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 21:05:32,076 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 21:05:32,104 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 21:05:32,141 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 21:05:32,141 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 21:05:32,142 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 21:05:32,146 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 21:05:32,148 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 21:05:32,150 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 21:05:32,153 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 21:05:32,154 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 21:05:32,155 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 21:05:32,155 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 21:05:32,157 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 21:05:32,158 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 21:05:32,163 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 21:05:32,164 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 21:05:32,164 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 21:05:32,165 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 21:05:32,166 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 21:05:32,167 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 21:05:32,168 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 21:05:32,169 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 21:05:32,169 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 21:05:32,170 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 21:05:32,176 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 21:05:32,183 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 21:05:32,183 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 21:05:32,184 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 21:05:32,185 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 21:05:32,203 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 21:05:32,203 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 21:05:32,204 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 21:05:32,204 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 21:05:32,204 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 21:05:32,204 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 21:05:32,204 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 21:05:32,204 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 21:05:32,204 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 21:05:32,205 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 21:05:32,205 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 21:05:32,205 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 21:05:32,205 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 21:05:32,205 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 21:05:32,205 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 21:05:32,205 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 21:05:32,205 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 21:05:32,205 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 21:05:32,206 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 21:05:32,206 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:05:32,206 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 21:05:32,206 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 21:05:32,206 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 21:05:32,206 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 21:05:32,206 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 21:05:32,206 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 21:05:32,206 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 21:05:32,207 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 21:05:32,228 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 21:05:32,228 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 21:05:32,426 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 21:05:32,450 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 21:05:32,452 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 21:05:32,453 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 21:05:32,455 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 21:05:32,456 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/invert_string-1.c [2022-04-27 21:05:32,496 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1dca1a7a1/59b6a3de7a944f25bd95d156711a2689/FLAGa27ccce58 [2022-04-27 21:05:32,846 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 21:05:32,846 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-1.c [2022-04-27 21:05:32,850 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1dca1a7a1/59b6a3de7a944f25bd95d156711a2689/FLAGa27ccce58 [2022-04-27 21:05:32,862 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1dca1a7a1/59b6a3de7a944f25bd95d156711a2689 [2022-04-27 21:05:32,864 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 21:05:32,865 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 21:05:32,867 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 21:05:32,867 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 21:05:32,870 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 21:05:32,870 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:05:32" (1/1) ... [2022-04-27 21:05:32,871 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@70df1ca2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:32, skipping insertion in model container [2022-04-27 21:05:32,871 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:05:32" (1/1) ... [2022-04-27 21:05:32,876 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 21:05:32,886 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 21:05:33,038 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-1.c[352,365] [2022-04-27 21:05:33,075 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:05:33,082 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 21:05:33,092 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-1.c[352,365] [2022-04-27 21:05:33,108 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:05:33,118 INFO L208 MainTranslator]: Completed translation [2022-04-27 21:05:33,118 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:33 WrapperNode [2022-04-27 21:05:33,123 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 21:05:33,124 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 21:05:33,125 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 21:05:33,125 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 21:05:33,132 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:33" (1/1) ... [2022-04-27 21:05:33,132 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:33" (1/1) ... [2022-04-27 21:05:33,138 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:33" (1/1) ... [2022-04-27 21:05:33,138 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:33" (1/1) ... [2022-04-27 21:05:33,147 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:33" (1/1) ... [2022-04-27 21:05:33,153 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:33" (1/1) ... [2022-04-27 21:05:33,156 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:33" (1/1) ... [2022-04-27 21:05:33,160 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 21:05:33,161 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 21:05:33,161 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 21:05:33,161 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 21:05:33,162 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:33" (1/1) ... [2022-04-27 21:05:33,173 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:05:33,180 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:05:33,201 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 21:05:33,212 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 21:05:33,234 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 21:05:33,234 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 21:05:33,234 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 21:05:33,234 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 21:05:33,234 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 21:05:33,235 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 21:05:33,235 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 21:05:33,235 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 21:05:33,236 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 21:05:33,314 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 21:05:33,316 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 21:05:33,519 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 21:05:33,523 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 21:05:33,523 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-27 21:05:33,524 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:05:33 BoogieIcfgContainer [2022-04-27 21:05:33,524 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 21:05:33,525 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 21:05:33,525 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 21:05:33,540 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 21:05:33,542 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:05:33" (1/1) ... [2022-04-27 21:05:33,543 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 21:05:33,574 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:05:33 BasicIcfg [2022-04-27 21:05:33,574 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 21:05:33,576 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 21:05:33,576 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 21:05:33,590 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 21:05:33,590 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 09:05:32" (1/4) ... [2022-04-27 21:05:33,591 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@683dcdd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:05:33, skipping insertion in model container [2022-04-27 21:05:33,591 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:33" (2/4) ... [2022-04-27 21:05:33,591 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@683dcdd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:05:33, skipping insertion in model container [2022-04-27 21:05:33,591 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:05:33" (3/4) ... [2022-04-27 21:05:33,591 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@683dcdd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 09:05:33, skipping insertion in model container [2022-04-27 21:05:33,591 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:05:33" (4/4) ... [2022-04-27 21:05:33,592 INFO L111 eAbstractionObserver]: Analyzing ICFG invert_string-1.cqvasr [2022-04-27 21:05:33,603 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 21:05:33,604 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 21:05:33,644 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 21:05:33,650 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@3d80daef, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@546c6ffd [2022-04-27 21:05:33,650 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 21:05:33,656 INFO L276 IsEmpty]: Start isEmpty. Operand has 29 states, 21 states have (on average 1.4285714285714286) internal successors, (30), 22 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:33,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 21:05:33,660 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:33,661 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:33,661 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:33,666 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:33,667 INFO L85 PathProgramCache]: Analyzing trace with hash 1459888189, now seen corresponding path program 1 times [2022-04-27 21:05:33,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:33,675 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202157807] [2022-04-27 21:05:33,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:33,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:33,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:33,811 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:33,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:33,830 INFO L290 TraceCheckUtils]: 0: Hoare triple {37#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32#true} is VALID [2022-04-27 21:05:33,830 INFO L290 TraceCheckUtils]: 1: Hoare triple {32#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-27 21:05:33,830 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {32#true} {32#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-27 21:05:33,832 INFO L272 TraceCheckUtils]: 0: Hoare triple {32#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {37#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:33,832 INFO L290 TraceCheckUtils]: 1: Hoare triple {37#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32#true} is VALID [2022-04-27 21:05:33,832 INFO L290 TraceCheckUtils]: 2: Hoare triple {32#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-27 21:05:33,833 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32#true} {32#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-27 21:05:33,833 INFO L272 TraceCheckUtils]: 4: Hoare triple {32#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#true} is VALID [2022-04-27 21:05:33,833 INFO L290 TraceCheckUtils]: 5: Hoare triple {32#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {32#true} is VALID [2022-04-27 21:05:33,834 INFO L290 TraceCheckUtils]: 6: Hoare triple {32#true} [83] L17-->L17-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-27 21:05:33,834 INFO L290 TraceCheckUtils]: 7: Hoare triple {33#false} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {33#false} is VALID [2022-04-27 21:05:33,834 INFO L290 TraceCheckUtils]: 8: Hoare triple {33#false} [86] L22-3-->L22-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-27 21:05:33,834 INFO L290 TraceCheckUtils]: 9: Hoare triple {33#false} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {33#false} is VALID [2022-04-27 21:05:33,834 INFO L290 TraceCheckUtils]: 10: Hoare triple {33#false} [91] L29-3-->L29-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-27 21:05:33,835 INFO L290 TraceCheckUtils]: 11: Hoare triple {33#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {33#false} is VALID [2022-04-27 21:05:33,835 INFO L290 TraceCheckUtils]: 12: Hoare triple {33#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {33#false} is VALID [2022-04-27 21:05:33,835 INFO L272 TraceCheckUtils]: 13: Hoare triple {33#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {33#false} is VALID [2022-04-27 21:05:33,835 INFO L290 TraceCheckUtils]: 14: Hoare triple {33#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {33#false} is VALID [2022-04-27 21:05:33,836 INFO L290 TraceCheckUtils]: 15: Hoare triple {33#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-27 21:05:33,836 INFO L290 TraceCheckUtils]: 16: Hoare triple {33#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#false} is VALID [2022-04-27 21:05:33,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:33,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:33,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202157807] [2022-04-27 21:05:33,837 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [202157807] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:05:33,837 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:05:33,837 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 21:05:33,838 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1249033986] [2022-04-27 21:05:33,839 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:05:33,842 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 21:05:33,843 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:33,845 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:33,885 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:33,885 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 21:05:33,885 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:33,904 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 21:05:33,905 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:05:33,908 INFO L87 Difference]: Start difference. First operand has 29 states, 21 states have (on average 1.4285714285714286) internal successors, (30), 22 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:34,025 INFO L93 Difference]: Finished difference Result 51 states and 65 transitions. [2022-04-27 21:05:34,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 21:05:34,026 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 21:05:34,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:34,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 65 transitions. [2022-04-27 21:05:34,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 65 transitions. [2022-04-27 21:05:34,038 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 65 transitions. [2022-04-27 21:05:34,098 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:34,103 INFO L225 Difference]: With dead ends: 51 [2022-04-27 21:05:34,104 INFO L226 Difference]: Without dead ends: 24 [2022-04-27 21:05:34,106 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:05:34,108 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 22 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:34,109 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 33 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:05:34,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-04-27 21:05:34,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2022-04-27 21:05:34,131 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:34,131 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,132 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,132 INFO L87 Difference]: Start difference. First operand 24 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:34,134 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-27 21:05:34,135 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-27 21:05:34,135 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:34,135 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:34,135 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-27 21:05:34,136 INFO L87 Difference]: Start difference. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-27 21:05:34,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:34,138 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-27 21:05:34,138 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-27 21:05:34,138 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:34,138 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:34,138 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:34,139 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:34,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2022-04-27 21:05:34,141 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 17 [2022-04-27 21:05:34,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:34,142 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2022-04-27 21:05:34,142 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,142 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-27 21:05:34,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 21:05:34,142 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:34,143 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:34,143 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 21:05:34,143 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:34,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:34,143 INFO L85 PathProgramCache]: Analyzing trace with hash -1257013952, now seen corresponding path program 1 times [2022-04-27 21:05:34,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:34,144 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [104778688] [2022-04-27 21:05:34,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:34,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:34,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:34,283 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:34,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:34,305 INFO L290 TraceCheckUtils]: 0: Hoare triple {193#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {186#true} is VALID [2022-04-27 21:05:34,306 INFO L290 TraceCheckUtils]: 1: Hoare triple {186#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {186#true} is VALID [2022-04-27 21:05:34,306 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {186#true} {186#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {186#true} is VALID [2022-04-27 21:05:34,306 INFO L272 TraceCheckUtils]: 0: Hoare triple {186#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {193#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:34,307 INFO L290 TraceCheckUtils]: 1: Hoare triple {193#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {186#true} is VALID [2022-04-27 21:05:34,307 INFO L290 TraceCheckUtils]: 2: Hoare triple {186#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {186#true} is VALID [2022-04-27 21:05:34,307 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {186#true} {186#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {186#true} is VALID [2022-04-27 21:05:34,307 INFO L272 TraceCheckUtils]: 4: Hoare triple {186#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {186#true} is VALID [2022-04-27 21:05:34,308 INFO L290 TraceCheckUtils]: 5: Hoare triple {186#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {186#true} is VALID [2022-04-27 21:05:34,309 INFO L290 TraceCheckUtils]: 6: Hoare triple {186#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {191#(<= 1 main_~MAX~0)} is VALID [2022-04-27 21:05:34,310 INFO L290 TraceCheckUtils]: 7: Hoare triple {191#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {192#(and (<= 1 main_~MAX~0) (= main_~i~0 0))} is VALID [2022-04-27 21:05:34,311 INFO L290 TraceCheckUtils]: 8: Hoare triple {192#(and (<= 1 main_~MAX~0) (= main_~i~0 0))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {187#false} is VALID [2022-04-27 21:05:34,311 INFO L290 TraceCheckUtils]: 9: Hoare triple {187#false} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {187#false} is VALID [2022-04-27 21:05:34,311 INFO L290 TraceCheckUtils]: 10: Hoare triple {187#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {187#false} is VALID [2022-04-27 21:05:34,311 INFO L290 TraceCheckUtils]: 11: Hoare triple {187#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {187#false} is VALID [2022-04-27 21:05:34,311 INFO L290 TraceCheckUtils]: 12: Hoare triple {187#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {187#false} is VALID [2022-04-27 21:05:34,312 INFO L272 TraceCheckUtils]: 13: Hoare triple {187#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {187#false} is VALID [2022-04-27 21:05:34,312 INFO L290 TraceCheckUtils]: 14: Hoare triple {187#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {187#false} is VALID [2022-04-27 21:05:34,312 INFO L290 TraceCheckUtils]: 15: Hoare triple {187#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {187#false} is VALID [2022-04-27 21:05:34,312 INFO L290 TraceCheckUtils]: 16: Hoare triple {187#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187#false} is VALID [2022-04-27 21:05:34,313 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:34,313 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:34,313 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [104778688] [2022-04-27 21:05:34,313 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [104778688] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:05:34,313 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:05:34,313 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 21:05:34,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [471272706] [2022-04-27 21:05:34,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:05:34,314 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 21:05:34,315 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:34,315 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,327 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:34,327 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 21:05:34,327 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:34,328 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 21:05:34,332 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-27 21:05:34,333 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:34,490 INFO L93 Difference]: Finished difference Result 44 states and 49 transitions. [2022-04-27 21:05:34,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 21:05:34,491 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 21:05:34,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:34,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 49 transitions. [2022-04-27 21:05:34,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 49 transitions. [2022-04-27 21:05:34,498 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 49 transitions. [2022-04-27 21:05:34,534 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:34,535 INFO L225 Difference]: With dead ends: 44 [2022-04-27 21:05:34,536 INFO L226 Difference]: Without dead ends: 30 [2022-04-27 21:05:34,537 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-04-27 21:05:34,539 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 36 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:34,540 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [36 Valid, 29 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:05:34,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-27 21:05:34,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 25. [2022-04-27 21:05:34,551 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:34,552 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,553 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,554 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:34,557 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2022-04-27 21:05:34,557 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 33 transitions. [2022-04-27 21:05:34,557 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:34,557 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:34,558 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 30 states. [2022-04-27 21:05:34,558 INFO L87 Difference]: Start difference. First operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 30 states. [2022-04-27 21:05:34,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:34,560 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2022-04-27 21:05:34,560 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 33 transitions. [2022-04-27 21:05:34,561 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:34,562 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:34,562 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:34,562 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:34,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2022-04-27 21:05:34,566 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 27 transitions. Word has length 17 [2022-04-27 21:05:34,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:34,566 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 27 transitions. [2022-04-27 21:05:34,566 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,567 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-27 21:05:34,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 21:05:34,567 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:34,567 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:34,567 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 21:05:34,567 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:34,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:34,568 INFO L85 PathProgramCache]: Analyzing trace with hash 313528638, now seen corresponding path program 1 times [2022-04-27 21:05:34,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:34,569 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2075480547] [2022-04-27 21:05:34,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:34,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:34,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:34,630 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:34,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:34,645 INFO L290 TraceCheckUtils]: 0: Hoare triple {362#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {355#true} is VALID [2022-04-27 21:05:34,645 INFO L290 TraceCheckUtils]: 1: Hoare triple {355#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 21:05:34,646 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {355#true} {355#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 21:05:34,647 INFO L272 TraceCheckUtils]: 0: Hoare triple {355#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {362#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:34,648 INFO L290 TraceCheckUtils]: 1: Hoare triple {362#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {355#true} is VALID [2022-04-27 21:05:34,648 INFO L290 TraceCheckUtils]: 2: Hoare triple {355#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 21:05:34,648 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {355#true} {355#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 21:05:34,648 INFO L272 TraceCheckUtils]: 4: Hoare triple {355#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {355#true} is VALID [2022-04-27 21:05:34,648 INFO L290 TraceCheckUtils]: 5: Hoare triple {355#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {355#true} is VALID [2022-04-27 21:05:34,649 INFO L290 TraceCheckUtils]: 6: Hoare triple {355#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {360#(<= 1 main_~MAX~0)} is VALID [2022-04-27 21:05:34,650 INFO L290 TraceCheckUtils]: 7: Hoare triple {360#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {360#(<= 1 main_~MAX~0)} is VALID [2022-04-27 21:05:34,650 INFO L290 TraceCheckUtils]: 8: Hoare triple {360#(<= 1 main_~MAX~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {360#(<= 1 main_~MAX~0)} is VALID [2022-04-27 21:05:34,651 INFO L290 TraceCheckUtils]: 9: Hoare triple {360#(<= 1 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {360#(<= 1 main_~MAX~0)} is VALID [2022-04-27 21:05:34,651 INFO L290 TraceCheckUtils]: 10: Hoare triple {360#(<= 1 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {360#(<= 1 main_~MAX~0)} is VALID [2022-04-27 21:05:34,652 INFO L290 TraceCheckUtils]: 11: Hoare triple {360#(<= 1 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {361#(<= 0 main_~i~0)} is VALID [2022-04-27 21:05:34,653 INFO L290 TraceCheckUtils]: 12: Hoare triple {361#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 21:05:34,653 INFO L290 TraceCheckUtils]: 13: Hoare triple {356#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {356#false} is VALID [2022-04-27 21:05:34,653 INFO L290 TraceCheckUtils]: 14: Hoare triple {356#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {356#false} is VALID [2022-04-27 21:05:34,653 INFO L272 TraceCheckUtils]: 15: Hoare triple {356#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {356#false} is VALID [2022-04-27 21:05:34,653 INFO L290 TraceCheckUtils]: 16: Hoare triple {356#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {356#false} is VALID [2022-04-27 21:05:34,654 INFO L290 TraceCheckUtils]: 17: Hoare triple {356#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 21:05:34,654 INFO L290 TraceCheckUtils]: 18: Hoare triple {356#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {356#false} is VALID [2022-04-27 21:05:34,654 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 21:05:34,655 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:34,655 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2075480547] [2022-04-27 21:05:34,655 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2075480547] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:05:34,655 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:05:34,655 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 21:05:34,655 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2009793810] [2022-04-27 21:05:34,656 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:05:34,656 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 21:05:34,656 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:34,657 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,671 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:34,672 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 21:05:34,672 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:34,672 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 21:05:34,672 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 21:05:34,673 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. Second operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:34,811 INFO L93 Difference]: Finished difference Result 37 states and 40 transitions. [2022-04-27 21:05:34,811 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 21:05:34,812 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 21:05:34,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:34,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 39 transitions. [2022-04-27 21:05:34,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 39 transitions. [2022-04-27 21:05:34,815 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 39 transitions. [2022-04-27 21:05:34,843 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:34,844 INFO L225 Difference]: With dead ends: 37 [2022-04-27 21:05:34,844 INFO L226 Difference]: Without dead ends: 26 [2022-04-27 21:05:34,844 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-27 21:05:34,852 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 27 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:34,854 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 27 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:05:34,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-27 21:05:34,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2022-04-27 21:05:34,868 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:34,869 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,869 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,870 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:34,874 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-27 21:05:34,874 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-27 21:05:34,876 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:34,876 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:34,877 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 26 states. [2022-04-27 21:05:34,877 INFO L87 Difference]: Start difference. First operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 26 states. [2022-04-27 21:05:34,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:34,880 INFO L93 Difference]: Finished difference Result 26 states and 28 transitions. [2022-04-27 21:05:34,880 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-27 21:05:34,880 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:34,880 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:34,880 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:34,880 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:34,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 20 states have (on average 1.15) internal successors, (23), 20 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:05:34,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 28 transitions. [2022-04-27 21:05:34,882 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 28 transitions. Word has length 19 [2022-04-27 21:05:34,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:34,882 INFO L495 AbstractCegarLoop]: Abstraction has 26 states and 28 transitions. [2022-04-27 21:05:34,882 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:34,882 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 28 transitions. [2022-04-27 21:05:34,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 21:05:34,883 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:34,883 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:34,883 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-27 21:05:34,883 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:34,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:34,883 INFO L85 PathProgramCache]: Analyzing trace with hash -617930468, now seen corresponding path program 1 times [2022-04-27 21:05:34,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:34,884 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398246129] [2022-04-27 21:05:34,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:34,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:34,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:35,255 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:35,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:35,264 INFO L290 TraceCheckUtils]: 0: Hoare triple {524#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {509#true} is VALID [2022-04-27 21:05:35,264 INFO L290 TraceCheckUtils]: 1: Hoare triple {509#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:35,264 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {509#true} {509#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:35,265 INFO L272 TraceCheckUtils]: 0: Hoare triple {509#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {524#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:35,265 INFO L290 TraceCheckUtils]: 1: Hoare triple {524#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {509#true} is VALID [2022-04-27 21:05:35,265 INFO L290 TraceCheckUtils]: 2: Hoare triple {509#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:35,266 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {509#true} {509#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:35,266 INFO L272 TraceCheckUtils]: 4: Hoare triple {509#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:35,266 INFO L290 TraceCheckUtils]: 5: Hoare triple {509#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {509#true} is VALID [2022-04-27 21:05:35,266 INFO L290 TraceCheckUtils]: 6: Hoare triple {509#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {514#(<= 1 main_~MAX~0)} is VALID [2022-04-27 21:05:35,267 INFO L290 TraceCheckUtils]: 7: Hoare triple {514#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {515#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:35,268 INFO L290 TraceCheckUtils]: 8: Hoare triple {515#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {515#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:35,268 INFO L290 TraceCheckUtils]: 9: Hoare triple {515#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {516#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:35,272 INFO L290 TraceCheckUtils]: 10: Hoare triple {516#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {517#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:35,273 INFO L290 TraceCheckUtils]: 11: Hoare triple {517#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {518#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:35,273 INFO L290 TraceCheckUtils]: 12: Hoare triple {518#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:35,274 INFO L290 TraceCheckUtils]: 13: Hoare triple {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:35,274 INFO L290 TraceCheckUtils]: 14: Hoare triple {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:35,275 INFO L290 TraceCheckUtils]: 15: Hoare triple {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {520#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:35,276 INFO L290 TraceCheckUtils]: 16: Hoare triple {520#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {521#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 21:05:35,277 INFO L272 TraceCheckUtils]: 17: Hoare triple {521#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {522#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:05:35,277 INFO L290 TraceCheckUtils]: 18: Hoare triple {522#(not (= |__VERIFIER_assert_#in~cond| 0))} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {523#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:05:35,277 INFO L290 TraceCheckUtils]: 19: Hoare triple {523#(not (= __VERIFIER_assert_~cond 0))} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {510#false} is VALID [2022-04-27 21:05:35,278 INFO L290 TraceCheckUtils]: 20: Hoare triple {510#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {510#false} is VALID [2022-04-27 21:05:35,278 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:35,278 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:35,278 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [398246129] [2022-04-27 21:05:35,278 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [398246129] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:05:35,278 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1260953801] [2022-04-27 21:05:35,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:35,279 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:35,279 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:05:35,280 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:05:35,302 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 21:05:35,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:35,345 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-27 21:05:35,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:35,369 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:05:35,453 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-27 21:05:35,632 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 15 [2022-04-27 21:05:35,793 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 10 [2022-04-27 21:05:35,837 INFO L272 TraceCheckUtils]: 0: Hoare triple {509#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:35,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {509#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {509#true} is VALID [2022-04-27 21:05:35,838 INFO L290 TraceCheckUtils]: 2: Hoare triple {509#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:35,838 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {509#true} {509#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:35,838 INFO L272 TraceCheckUtils]: 4: Hoare triple {509#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:35,839 INFO L290 TraceCheckUtils]: 5: Hoare triple {509#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {509#true} is VALID [2022-04-27 21:05:35,842 INFO L290 TraceCheckUtils]: 6: Hoare triple {509#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {514#(<= 1 main_~MAX~0)} is VALID [2022-04-27 21:05:35,844 INFO L290 TraceCheckUtils]: 7: Hoare triple {514#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {549#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:35,844 INFO L290 TraceCheckUtils]: 8: Hoare triple {549#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {549#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:35,845 INFO L290 TraceCheckUtils]: 9: Hoare triple {549#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (<= main_~i~0 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {516#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:35,846 INFO L290 TraceCheckUtils]: 10: Hoare triple {516#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {517#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:35,846 INFO L290 TraceCheckUtils]: 11: Hoare triple {517#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {518#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:35,847 INFO L290 TraceCheckUtils]: 12: Hoare triple {518#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:35,848 INFO L290 TraceCheckUtils]: 13: Hoare triple {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:35,848 INFO L290 TraceCheckUtils]: 14: Hoare triple {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:35,853 INFO L290 TraceCheckUtils]: 15: Hoare triple {519#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) 0) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 1))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {520#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:35,854 INFO L290 TraceCheckUtils]: 16: Hoare triple {520#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~j~0 |main_~#str2~0.offset|) 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {521#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 21:05:35,855 INFO L272 TraceCheckUtils]: 17: Hoare triple {521#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {580#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:05:35,855 INFO L290 TraceCheckUtils]: 18: Hoare triple {580#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {584#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:05:35,856 INFO L290 TraceCheckUtils]: 19: Hoare triple {584#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {510#false} is VALID [2022-04-27 21:05:35,856 INFO L290 TraceCheckUtils]: 20: Hoare triple {510#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {510#false} is VALID [2022-04-27 21:05:35,856 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:35,857 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:05:35,957 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-27 21:05:35,957 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 26 [2022-04-27 21:05:35,967 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2022-04-27 21:05:35,983 INFO L356 Elim1Store]: treesize reduction 4, result has 63.6 percent of original size [2022-04-27 21:05:35,983 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 29 [2022-04-27 21:05:36,283 INFO L290 TraceCheckUtils]: 20: Hoare triple {510#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {510#false} is VALID [2022-04-27 21:05:36,284 INFO L290 TraceCheckUtils]: 19: Hoare triple {584#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {510#false} is VALID [2022-04-27 21:05:36,284 INFO L290 TraceCheckUtils]: 18: Hoare triple {580#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {584#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:05:36,285 INFO L272 TraceCheckUtils]: 17: Hoare triple {521#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {580#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:05:36,286 INFO L290 TraceCheckUtils]: 16: Hoare triple {603#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {521#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 21:05:36,286 INFO L290 TraceCheckUtils]: 15: Hoare triple {607#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {603#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-27 21:05:36,289 INFO L290 TraceCheckUtils]: 14: Hoare triple {607#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {607#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 21:05:36,290 INFO L290 TraceCheckUtils]: 13: Hoare triple {607#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {607#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 21:05:36,292 INFO L290 TraceCheckUtils]: 12: Hoare triple {617#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 (+ main_~j~0 1))) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 (+ main_~j~0 1))))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {607#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 21:05:36,294 INFO L290 TraceCheckUtils]: 11: Hoare triple {621#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1)))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {617#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 (+ main_~j~0 1))) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 (+ main_~j~0 1))))} is VALID [2022-04-27 21:05:36,294 INFO L290 TraceCheckUtils]: 10: Hoare triple {625#(or (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))) (< main_~i~0 main_~MAX~0))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {621#(and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1)))} is VALID [2022-04-27 21:05:36,296 INFO L290 TraceCheckUtils]: 9: Hoare triple {629#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {625#(or (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))) (< main_~i~0 main_~MAX~0))} is VALID [2022-04-27 21:05:36,297 INFO L290 TraceCheckUtils]: 8: Hoare triple {629#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {629#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} is VALID [2022-04-27 21:05:36,304 INFO L290 TraceCheckUtils]: 7: Hoare triple {514#(<= 1 main_~MAX~0)} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {629#(or (< (+ main_~i~0 1) main_~MAX~0) (and (or (= (+ main_~MAX~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)) (= main_~MAX~0 1)) (or (= |main_~#str1~0.base| |main_~#str2~0.base|) (= main_~MAX~0 1))))} is VALID [2022-04-27 21:05:36,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {509#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {514#(<= 1 main_~MAX~0)} is VALID [2022-04-27 21:05:36,305 INFO L290 TraceCheckUtils]: 5: Hoare triple {509#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {509#true} is VALID [2022-04-27 21:05:36,305 INFO L272 TraceCheckUtils]: 4: Hoare triple {509#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:36,305 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {509#true} {509#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:36,305 INFO L290 TraceCheckUtils]: 2: Hoare triple {509#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:36,305 INFO L290 TraceCheckUtils]: 1: Hoare triple {509#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {509#true} is VALID [2022-04-27 21:05:36,305 INFO L272 TraceCheckUtils]: 0: Hoare triple {509#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {509#true} is VALID [2022-04-27 21:05:36,306 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:36,306 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1260953801] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:05:36,306 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:05:36,306 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 22 [2022-04-27 21:05:36,306 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527879928] [2022-04-27 21:05:36,306 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:05:36,307 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 21:05:36,307 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:36,307 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:36,332 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:36,333 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 21:05:36,333 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:36,333 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 21:05:36,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=388, Unknown=0, NotChecked=0, Total=462 [2022-04-27 21:05:36,334 INFO L87 Difference]: Start difference. First operand 26 states and 28 transitions. Second operand has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:37,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:37,350 INFO L93 Difference]: Finished difference Result 54 states and 60 transitions. [2022-04-27 21:05:37,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-27 21:05:37,350 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 21:05:37,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:37,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:37,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 60 transitions. [2022-04-27 21:05:37,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:37,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 60 transitions. [2022-04-27 21:05:37,354 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 60 transitions. [2022-04-27 21:05:37,424 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:37,426 INFO L225 Difference]: With dead ends: 54 [2022-04-27 21:05:37,426 INFO L226 Difference]: Without dead ends: 52 [2022-04-27 21:05:37,427 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 30 SyntacticMatches, 5 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 316 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=287, Invalid=1119, Unknown=0, NotChecked=0, Total=1406 [2022-04-27 21:05:37,427 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 81 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 260 mSolverCounterSat, 100 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 81 SdHoareTripleChecker+Valid, 56 SdHoareTripleChecker+Invalid, 360 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 100 IncrementalHoareTripleChecker+Valid, 260 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:37,427 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [81 Valid, 56 Invalid, 360 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [100 Valid, 260 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 21:05:37,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2022-04-27 21:05:37,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 39. [2022-04-27 21:05:37,448 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:37,448 INFO L82 GeneralOperation]: Start isEquivalent. First operand 52 states. Second operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:37,448 INFO L74 IsIncluded]: Start isIncluded. First operand 52 states. Second operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:37,448 INFO L87 Difference]: Start difference. First operand 52 states. Second operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:37,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:37,450 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2022-04-27 21:05:37,450 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 58 transitions. [2022-04-27 21:05:37,450 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:37,450 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:37,451 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 52 states. [2022-04-27 21:05:37,451 INFO L87 Difference]: Start difference. First operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 52 states. [2022-04-27 21:05:37,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:37,452 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2022-04-27 21:05:37,453 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 58 transitions. [2022-04-27 21:05:37,453 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:37,453 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:37,453 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:37,453 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:37,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 32 states have internal predecessors, (36), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:37,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 43 transitions. [2022-04-27 21:05:37,454 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 43 transitions. Word has length 21 [2022-04-27 21:05:37,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:37,455 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 43 transitions. [2022-04-27 21:05:37,455 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 21 states have (on average 1.5714285714285714) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:37,455 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 43 transitions. [2022-04-27 21:05:37,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 21:05:37,455 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:37,456 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:37,475 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 21:05:37,671 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:37,672 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:37,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:37,672 INFO L85 PathProgramCache]: Analyzing trace with hash 809600538, now seen corresponding path program 2 times [2022-04-27 21:05:37,672 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:37,672 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1086301875] [2022-04-27 21:05:37,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:37,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:37,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:37,746 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:37,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:37,751 INFO L290 TraceCheckUtils]: 0: Hoare triple {936#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {927#true} is VALID [2022-04-27 21:05:37,751 INFO L290 TraceCheckUtils]: 1: Hoare triple {927#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,751 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {927#true} {927#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,752 INFO L272 TraceCheckUtils]: 0: Hoare triple {927#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {936#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:37,752 INFO L290 TraceCheckUtils]: 1: Hoare triple {936#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {927#true} is VALID [2022-04-27 21:05:37,752 INFO L290 TraceCheckUtils]: 2: Hoare triple {927#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,752 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {927#true} {927#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,752 INFO L272 TraceCheckUtils]: 4: Hoare triple {927#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,752 INFO L290 TraceCheckUtils]: 5: Hoare triple {927#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {927#true} is VALID [2022-04-27 21:05:37,753 INFO L290 TraceCheckUtils]: 6: Hoare triple {927#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,758 INFO L290 TraceCheckUtils]: 7: Hoare triple {927#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {932#(= main_~i~0 0)} is VALID [2022-04-27 21:05:37,759 INFO L290 TraceCheckUtils]: 8: Hoare triple {932#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {932#(= main_~i~0 0)} is VALID [2022-04-27 21:05:37,759 INFO L290 TraceCheckUtils]: 9: Hoare triple {932#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {933#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:37,760 INFO L290 TraceCheckUtils]: 10: Hoare triple {933#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {934#(<= 2 main_~MAX~0)} is VALID [2022-04-27 21:05:37,760 INFO L290 TraceCheckUtils]: 11: Hoare triple {934#(<= 2 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {934#(<= 2 main_~MAX~0)} is VALID [2022-04-27 21:05:37,760 INFO L290 TraceCheckUtils]: 12: Hoare triple {934#(<= 2 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {934#(<= 2 main_~MAX~0)} is VALID [2022-04-27 21:05:37,761 INFO L290 TraceCheckUtils]: 13: Hoare triple {934#(<= 2 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {933#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:37,761 INFO L290 TraceCheckUtils]: 14: Hoare triple {933#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {933#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:37,762 INFO L290 TraceCheckUtils]: 15: Hoare triple {933#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {935#(<= 0 main_~i~0)} is VALID [2022-04-27 21:05:37,762 INFO L290 TraceCheckUtils]: 16: Hoare triple {935#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {928#false} is VALID [2022-04-27 21:05:37,762 INFO L290 TraceCheckUtils]: 17: Hoare triple {928#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {928#false} is VALID [2022-04-27 21:05:37,762 INFO L290 TraceCheckUtils]: 18: Hoare triple {928#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {928#false} is VALID [2022-04-27 21:05:37,762 INFO L272 TraceCheckUtils]: 19: Hoare triple {928#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {928#false} is VALID [2022-04-27 21:05:37,762 INFO L290 TraceCheckUtils]: 20: Hoare triple {928#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {928#false} is VALID [2022-04-27 21:05:37,763 INFO L290 TraceCheckUtils]: 21: Hoare triple {928#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {928#false} is VALID [2022-04-27 21:05:37,763 INFO L290 TraceCheckUtils]: 22: Hoare triple {928#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {928#false} is VALID [2022-04-27 21:05:37,763 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:37,763 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:37,763 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1086301875] [2022-04-27 21:05:37,763 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1086301875] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:05:37,763 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [610790211] [2022-04-27 21:05:37,763 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:05:37,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:37,764 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:05:37,764 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:05:37,766 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 21:05:37,811 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:05:37,811 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:05:37,812 INFO L263 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-27 21:05:37,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:37,822 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:05:37,901 INFO L272 TraceCheckUtils]: 0: Hoare triple {927#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,901 INFO L290 TraceCheckUtils]: 1: Hoare triple {927#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {927#true} is VALID [2022-04-27 21:05:37,902 INFO L290 TraceCheckUtils]: 2: Hoare triple {927#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,930 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {927#true} {927#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,931 INFO L272 TraceCheckUtils]: 4: Hoare triple {927#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,931 INFO L290 TraceCheckUtils]: 5: Hoare triple {927#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {927#true} is VALID [2022-04-27 21:05:37,931 INFO L290 TraceCheckUtils]: 6: Hoare triple {927#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:37,941 INFO L290 TraceCheckUtils]: 7: Hoare triple {927#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {935#(<= 0 main_~i~0)} is VALID [2022-04-27 21:05:37,942 INFO L290 TraceCheckUtils]: 8: Hoare triple {935#(<= 0 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {935#(<= 0 main_~i~0)} is VALID [2022-04-27 21:05:37,942 INFO L290 TraceCheckUtils]: 9: Hoare triple {935#(<= 0 main_~i~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {933#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:37,943 INFO L290 TraceCheckUtils]: 10: Hoare triple {933#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {934#(<= 2 main_~MAX~0)} is VALID [2022-04-27 21:05:37,943 INFO L290 TraceCheckUtils]: 11: Hoare triple {934#(<= 2 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {934#(<= 2 main_~MAX~0)} is VALID [2022-04-27 21:05:37,943 INFO L290 TraceCheckUtils]: 12: Hoare triple {934#(<= 2 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {934#(<= 2 main_~MAX~0)} is VALID [2022-04-27 21:05:37,944 INFO L290 TraceCheckUtils]: 13: Hoare triple {934#(<= 2 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {933#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:37,944 INFO L290 TraceCheckUtils]: 14: Hoare triple {933#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {933#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:37,944 INFO L290 TraceCheckUtils]: 15: Hoare triple {933#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {935#(<= 0 main_~i~0)} is VALID [2022-04-27 21:05:37,945 INFO L290 TraceCheckUtils]: 16: Hoare triple {935#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {928#false} is VALID [2022-04-27 21:05:37,946 INFO L290 TraceCheckUtils]: 17: Hoare triple {928#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {928#false} is VALID [2022-04-27 21:05:37,946 INFO L290 TraceCheckUtils]: 18: Hoare triple {928#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {928#false} is VALID [2022-04-27 21:05:37,946 INFO L272 TraceCheckUtils]: 19: Hoare triple {928#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {928#false} is VALID [2022-04-27 21:05:37,946 INFO L290 TraceCheckUtils]: 20: Hoare triple {928#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {928#false} is VALID [2022-04-27 21:05:37,946 INFO L290 TraceCheckUtils]: 21: Hoare triple {928#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {928#false} is VALID [2022-04-27 21:05:37,946 INFO L290 TraceCheckUtils]: 22: Hoare triple {928#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {928#false} is VALID [2022-04-27 21:05:37,946 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:37,946 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:05:38,026 INFO L290 TraceCheckUtils]: 22: Hoare triple {928#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {928#false} is VALID [2022-04-27 21:05:38,026 INFO L290 TraceCheckUtils]: 21: Hoare triple {928#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {928#false} is VALID [2022-04-27 21:05:38,026 INFO L290 TraceCheckUtils]: 20: Hoare triple {928#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {928#false} is VALID [2022-04-27 21:05:38,027 INFO L272 TraceCheckUtils]: 19: Hoare triple {928#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {928#false} is VALID [2022-04-27 21:05:38,027 INFO L290 TraceCheckUtils]: 18: Hoare triple {928#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {928#false} is VALID [2022-04-27 21:05:38,027 INFO L290 TraceCheckUtils]: 17: Hoare triple {928#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {928#false} is VALID [2022-04-27 21:05:38,028 INFO L290 TraceCheckUtils]: 16: Hoare triple {935#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {928#false} is VALID [2022-04-27 21:05:38,028 INFO L290 TraceCheckUtils]: 15: Hoare triple {933#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {935#(<= 0 main_~i~0)} is VALID [2022-04-27 21:05:38,030 INFO L290 TraceCheckUtils]: 14: Hoare triple {933#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {933#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:38,031 INFO L290 TraceCheckUtils]: 13: Hoare triple {934#(<= 2 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {933#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:38,032 INFO L290 TraceCheckUtils]: 12: Hoare triple {934#(<= 2 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {934#(<= 2 main_~MAX~0)} is VALID [2022-04-27 21:05:38,032 INFO L290 TraceCheckUtils]: 11: Hoare triple {934#(<= 2 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {934#(<= 2 main_~MAX~0)} is VALID [2022-04-27 21:05:38,033 INFO L290 TraceCheckUtils]: 10: Hoare triple {933#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {934#(<= 2 main_~MAX~0)} is VALID [2022-04-27 21:05:38,033 INFO L290 TraceCheckUtils]: 9: Hoare triple {935#(<= 0 main_~i~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {933#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:38,033 INFO L290 TraceCheckUtils]: 8: Hoare triple {935#(<= 0 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {935#(<= 0 main_~i~0)} is VALID [2022-04-27 21:05:38,034 INFO L290 TraceCheckUtils]: 7: Hoare triple {927#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {935#(<= 0 main_~i~0)} is VALID [2022-04-27 21:05:38,034 INFO L290 TraceCheckUtils]: 6: Hoare triple {927#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:38,034 INFO L290 TraceCheckUtils]: 5: Hoare triple {927#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {927#true} is VALID [2022-04-27 21:05:38,034 INFO L272 TraceCheckUtils]: 4: Hoare triple {927#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:38,034 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {927#true} {927#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:38,034 INFO L290 TraceCheckUtils]: 2: Hoare triple {927#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:38,035 INFO L290 TraceCheckUtils]: 1: Hoare triple {927#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {927#true} is VALID [2022-04-27 21:05:38,035 INFO L272 TraceCheckUtils]: 0: Hoare triple {927#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {927#true} is VALID [2022-04-27 21:05:38,035 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:38,035 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [610790211] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:05:38,035 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:05:38,035 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 7 [2022-04-27 21:05:38,035 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1999670359] [2022-04-27 21:05:38,035 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:05:38,036 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 21:05:38,036 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:38,036 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:38,052 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:38,052 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 21:05:38,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:38,053 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 21:05:38,053 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-27 21:05:38,053 INFO L87 Difference]: Start difference. First operand 39 states and 43 transitions. Second operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:38,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:38,351 INFO L93 Difference]: Finished difference Result 59 states and 65 transitions. [2022-04-27 21:05:38,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 21:05:38,351 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 21:05:38,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:38,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:38,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 61 transitions. [2022-04-27 21:05:38,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:38,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 61 transitions. [2022-04-27 21:05:38,354 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 61 transitions. [2022-04-27 21:05:38,402 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:38,403 INFO L225 Difference]: With dead ends: 59 [2022-04-27 21:05:38,404 INFO L226 Difference]: Without dead ends: 48 [2022-04-27 21:05:38,404 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2022-04-27 21:05:38,404 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 33 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 119 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 119 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:38,405 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 46 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 119 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:05:38,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-27 21:05:38,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 41. [2022-04-27 21:05:38,432 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:38,432 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:38,432 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:38,433 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:38,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:38,434 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2022-04-27 21:05:38,434 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2022-04-27 21:05:38,434 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:38,434 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:38,434 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 48 states. [2022-04-27 21:05:38,435 INFO L87 Difference]: Start difference. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 48 states. [2022-04-27 21:05:38,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:38,436 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2022-04-27 21:05:38,436 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2022-04-27 21:05:38,436 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:38,437 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:38,437 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:38,437 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:38,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:38,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2022-04-27 21:05:38,438 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 23 [2022-04-27 21:05:38,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:38,438 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-04-27 21:05:38,438 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:38,438 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2022-04-27 21:05:38,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 21:05:38,439 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:38,439 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:38,461 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 21:05:38,655 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:38,656 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:38,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:38,656 INFO L85 PathProgramCache]: Analyzing trace with hash -634204424, now seen corresponding path program 3 times [2022-04-27 21:05:38,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:38,656 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1812811938] [2022-04-27 21:05:38,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:38,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:38,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:38,968 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:38,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:38,976 INFO L290 TraceCheckUtils]: 0: Hoare triple {1343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1326#true} is VALID [2022-04-27 21:05:38,980 INFO L290 TraceCheckUtils]: 1: Hoare triple {1326#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:38,981 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1326#true} {1326#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:38,981 INFO L272 TraceCheckUtils]: 0: Hoare triple {1326#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:38,982 INFO L290 TraceCheckUtils]: 1: Hoare triple {1343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1326#true} is VALID [2022-04-27 21:05:38,982 INFO L290 TraceCheckUtils]: 2: Hoare triple {1326#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:38,982 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1326#true} {1326#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:38,982 INFO L272 TraceCheckUtils]: 4: Hoare triple {1326#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:38,982 INFO L290 TraceCheckUtils]: 5: Hoare triple {1326#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1326#true} is VALID [2022-04-27 21:05:38,982 INFO L290 TraceCheckUtils]: 6: Hoare triple {1326#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:38,983 INFO L290 TraceCheckUtils]: 7: Hoare triple {1326#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1331#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:38,983 INFO L290 TraceCheckUtils]: 8: Hoare triple {1331#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1331#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:38,984 INFO L290 TraceCheckUtils]: 9: Hoare triple {1331#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1332#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-27 21:05:38,984 INFO L290 TraceCheckUtils]: 10: Hoare triple {1332#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1333#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:38,985 INFO L290 TraceCheckUtils]: 11: Hoare triple {1333#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1334#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-27 21:05:38,985 INFO L290 TraceCheckUtils]: 12: Hoare triple {1334#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1335#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 21:05:38,986 INFO L290 TraceCheckUtils]: 13: Hoare triple {1335#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1336#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 21:05:38,986 INFO L290 TraceCheckUtils]: 14: Hoare triple {1336#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1337#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} is VALID [2022-04-27 21:05:38,987 INFO L290 TraceCheckUtils]: 15: Hoare triple {1337#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1337#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} is VALID [2022-04-27 21:05:38,987 INFO L290 TraceCheckUtils]: 16: Hoare triple {1337#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (<= main_~j~0 1))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1338#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-27 21:05:38,988 INFO L290 TraceCheckUtils]: 17: Hoare triple {1338#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1338#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-27 21:05:38,988 INFO L290 TraceCheckUtils]: 18: Hoare triple {1338#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1338#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-27 21:05:38,989 INFO L290 TraceCheckUtils]: 19: Hoare triple {1338#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~MAX~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2) (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1339#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1))} is VALID [2022-04-27 21:05:38,989 INFO L290 TraceCheckUtils]: 20: Hoare triple {1339#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1340#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 21:05:38,990 INFO L272 TraceCheckUtils]: 21: Hoare triple {1340#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1341#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:05:38,990 INFO L290 TraceCheckUtils]: 22: Hoare triple {1341#(not (= |__VERIFIER_assert_#in~cond| 0))} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1342#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:05:38,990 INFO L290 TraceCheckUtils]: 23: Hoare triple {1342#(not (= __VERIFIER_assert_~cond 0))} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1327#false} is VALID [2022-04-27 21:05:38,991 INFO L290 TraceCheckUtils]: 24: Hoare triple {1327#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1327#false} is VALID [2022-04-27 21:05:38,991 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:38,991 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:38,991 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1812811938] [2022-04-27 21:05:38,991 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1812811938] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:05:38,991 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1870864116] [2022-04-27 21:05:38,991 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:05:38,991 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:38,992 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:05:38,992 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:05:38,993 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 21:05:39,037 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 21:05:39,038 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:05:39,039 INFO L263 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-27 21:05:39,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:39,056 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:05:39,075 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-27 21:05:39,261 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-27 21:05:39,318 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-04-27 21:05:39,600 INFO L356 Elim1Store]: treesize reduction 9, result has 25.0 percent of original size [2022-04-27 21:05:39,601 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 13 [2022-04-27 21:05:39,696 INFO L272 TraceCheckUtils]: 0: Hoare triple {1326#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:39,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {1326#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1326#true} is VALID [2022-04-27 21:05:39,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {1326#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:39,696 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1326#true} {1326#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:39,697 INFO L272 TraceCheckUtils]: 4: Hoare triple {1326#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:39,697 INFO L290 TraceCheckUtils]: 5: Hoare triple {1326#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1326#true} is VALID [2022-04-27 21:05:39,697 INFO L290 TraceCheckUtils]: 6: Hoare triple {1326#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:39,697 INFO L290 TraceCheckUtils]: 7: Hoare triple {1326#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1368#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:39,698 INFO L290 TraceCheckUtils]: 8: Hoare triple {1368#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1368#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:39,698 INFO L290 TraceCheckUtils]: 9: Hoare triple {1368#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1375#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-27 21:05:39,699 INFO L290 TraceCheckUtils]: 10: Hoare triple {1375#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1379#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0) (< main_~i~0 main_~MAX~0))} is VALID [2022-04-27 21:05:39,699 INFO L290 TraceCheckUtils]: 11: Hoare triple {1379#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0) (< main_~i~0 main_~MAX~0))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1383#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-27 21:05:39,700 INFO L290 TraceCheckUtils]: 12: Hoare triple {1383#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1387#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 21:05:39,700 INFO L290 TraceCheckUtils]: 13: Hoare triple {1387#(and (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1391#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 21:05:39,701 INFO L290 TraceCheckUtils]: 14: Hoare triple {1391#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1395#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 21:05:39,701 INFO L290 TraceCheckUtils]: 15: Hoare triple {1395#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1395#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 21:05:39,702 INFO L290 TraceCheckUtils]: 16: Hoare triple {1395#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1402#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 21:05:39,702 INFO L290 TraceCheckUtils]: 17: Hoare triple {1402#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1402#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 21:05:39,703 INFO L290 TraceCheckUtils]: 18: Hoare triple {1402#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1402#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} is VALID [2022-04-27 21:05:39,704 INFO L290 TraceCheckUtils]: 19: Hoare triple {1402#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 1 main_~MAX~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~MAX~0 2))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1412#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 0 main_~j~0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 1))} is VALID [2022-04-27 21:05:39,704 INFO L290 TraceCheckUtils]: 20: Hoare triple {1412#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< 0 main_~j~0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1340#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 21:05:39,705 INFO L272 TraceCheckUtils]: 21: Hoare triple {1340#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1419#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:05:39,705 INFO L290 TraceCheckUtils]: 22: Hoare triple {1419#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1423#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:05:39,706 INFO L290 TraceCheckUtils]: 23: Hoare triple {1423#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1327#false} is VALID [2022-04-27 21:05:39,706 INFO L290 TraceCheckUtils]: 24: Hoare triple {1327#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1327#false} is VALID [2022-04-27 21:05:39,706 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:39,706 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:05:41,085 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 108 [2022-04-27 21:05:41,127 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-27 21:05:41,128 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 201 treesize of output 179 [2022-04-27 21:05:41,510 INFO L290 TraceCheckUtils]: 24: Hoare triple {1327#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1327#false} is VALID [2022-04-27 21:05:41,511 INFO L290 TraceCheckUtils]: 23: Hoare triple {1423#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1327#false} is VALID [2022-04-27 21:05:41,514 INFO L290 TraceCheckUtils]: 22: Hoare triple {1419#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1423#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:05:41,515 INFO L272 TraceCheckUtils]: 21: Hoare triple {1340#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1419#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:05:41,516 INFO L290 TraceCheckUtils]: 20: Hoare triple {1442#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1340#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 21:05:41,516 INFO L290 TraceCheckUtils]: 19: Hoare triple {1446#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1442#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-27 21:05:41,517 INFO L290 TraceCheckUtils]: 18: Hoare triple {1446#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1446#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 21:05:41,517 INFO L290 TraceCheckUtils]: 17: Hoare triple {1446#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1446#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 21:05:42,074 WARN L290 TraceCheckUtils]: 16: Hoare triple {1456#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1446#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is UNKNOWN [2022-04-27 21:05:42,076 INFO L290 TraceCheckUtils]: 15: Hoare triple {1456#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1456#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-27 21:05:42,077 INFO L290 TraceCheckUtils]: 14: Hoare triple {1463#(= main_~MAX~0 (+ main_~j~0 2))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1456#(forall ((|main_~#str2~0.offset| Int)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))} is VALID [2022-04-27 21:05:42,078 INFO L290 TraceCheckUtils]: 13: Hoare triple {1467#(= main_~MAX~0 2)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1463#(= main_~MAX~0 (+ main_~j~0 2))} is VALID [2022-04-27 21:05:42,078 INFO L290 TraceCheckUtils]: 12: Hoare triple {1471#(or (= main_~MAX~0 2) (< main_~i~0 main_~MAX~0))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1467#(= main_~MAX~0 2)} is VALID [2022-04-27 21:05:42,078 INFO L290 TraceCheckUtils]: 11: Hoare triple {1475#(or (< (+ main_~i~0 1) main_~MAX~0) (= main_~MAX~0 2))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1471#(or (= main_~MAX~0 2) (< main_~i~0 main_~MAX~0))} is VALID [2022-04-27 21:05:42,079 INFO L290 TraceCheckUtils]: 10: Hoare triple {1479#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1475#(or (< (+ main_~i~0 1) main_~MAX~0) (= main_~MAX~0 2))} is VALID [2022-04-27 21:05:42,079 INFO L290 TraceCheckUtils]: 9: Hoare triple {1483#(and (<= main_~i~0 0) (<= 0 main_~i~0))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1479#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:05:42,080 INFO L290 TraceCheckUtils]: 8: Hoare triple {1483#(and (<= main_~i~0 0) (<= 0 main_~i~0))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1483#(and (<= main_~i~0 0) (<= 0 main_~i~0))} is VALID [2022-04-27 21:05:42,080 INFO L290 TraceCheckUtils]: 7: Hoare triple {1326#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1483#(and (<= main_~i~0 0) (<= 0 main_~i~0))} is VALID [2022-04-27 21:05:42,080 INFO L290 TraceCheckUtils]: 6: Hoare triple {1326#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:42,080 INFO L290 TraceCheckUtils]: 5: Hoare triple {1326#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1326#true} is VALID [2022-04-27 21:05:42,081 INFO L272 TraceCheckUtils]: 4: Hoare triple {1326#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:42,081 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1326#true} {1326#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:42,081 INFO L290 TraceCheckUtils]: 2: Hoare triple {1326#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:42,081 INFO L290 TraceCheckUtils]: 1: Hoare triple {1326#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1326#true} is VALID [2022-04-27 21:05:42,081 INFO L272 TraceCheckUtils]: 0: Hoare triple {1326#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1326#true} is VALID [2022-04-27 21:05:42,081 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:42,081 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1870864116] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:05:42,081 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:05:42,081 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 35 [2022-04-27 21:05:42,082 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [153944427] [2022-04-27 21:05:42,082 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:05:42,082 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 21:05:42,082 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:42,083 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:42,617 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 57 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:42,617 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-27 21:05:42,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:42,617 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-27 21:05:42,618 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1047, Unknown=2, NotChecked=0, Total=1190 [2022-04-27 21:05:42,618 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:44,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:44,987 INFO L93 Difference]: Finished difference Result 80 states and 90 transitions. [2022-04-27 21:05:44,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-27 21:05:44,987 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 21:05:44,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:44,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:44,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 77 transitions. [2022-04-27 21:05:44,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:44,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 77 transitions. [2022-04-27 21:05:44,993 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 77 transitions. [2022-04-27 21:05:45,057 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:45,058 INFO L225 Difference]: With dead ends: 80 [2022-04-27 21:05:45,058 INFO L226 Difference]: Without dead ends: 78 [2022-04-27 21:05:45,060 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 854 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=560, Invalid=3098, Unknown=2, NotChecked=0, Total=3660 [2022-04-27 21:05:45,062 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 72 mSDsluCounter, 93 mSDsCounter, 0 mSdLazyCounter, 856 mSolverCounterSat, 120 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 72 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 1024 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 120 IncrementalHoareTripleChecker+Valid, 856 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 48 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:45,062 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [72 Valid, 113 Invalid, 1024 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [120 Valid, 856 Invalid, 0 Unknown, 48 Unchecked, 0.8s Time] [2022-04-27 21:05:45,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-04-27 21:05:45,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 46. [2022-04-27 21:05:45,101 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:45,101 INFO L82 GeneralOperation]: Start isEquivalent. First operand 78 states. Second operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:45,101 INFO L74 IsIncluded]: Start isIncluded. First operand 78 states. Second operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:45,101 INFO L87 Difference]: Start difference. First operand 78 states. Second operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:45,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:45,103 INFO L93 Difference]: Finished difference Result 78 states and 88 transitions. [2022-04-27 21:05:45,104 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 88 transitions. [2022-04-27 21:05:45,104 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:45,104 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:45,104 INFO L74 IsIncluded]: Start isIncluded. First operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 78 states. [2022-04-27 21:05:45,104 INFO L87 Difference]: Start difference. First operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 78 states. [2022-04-27 21:05:45,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:45,106 INFO L93 Difference]: Finished difference Result 78 states and 88 transitions. [2022-04-27 21:05:45,106 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 88 transitions. [2022-04-27 21:05:45,107 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:45,107 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:45,107 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:45,107 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:45,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 39 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:45,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 51 transitions. [2022-04-27 21:05:45,108 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 51 transitions. Word has length 25 [2022-04-27 21:05:45,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:45,108 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 51 transitions. [2022-04-27 21:05:45,108 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 1.5294117647058822) internal successors, (52), 32 states have internal predecessors, (52), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:45,109 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2022-04-27 21:05:45,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 21:05:45,109 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:45,109 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:45,128 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 21:05:45,323 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:45,323 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:45,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:45,324 INFO L85 PathProgramCache]: Analyzing trace with hash 1131578614, now seen corresponding path program 4 times [2022-04-27 21:05:45,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:45,324 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471071135] [2022-04-27 21:05:45,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:45,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:45,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:45,399 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:45,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:45,403 INFO L290 TraceCheckUtils]: 0: Hoare triple {1911#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1901#true} is VALID [2022-04-27 21:05:45,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {1901#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:45,404 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1901#true} {1901#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:45,404 INFO L272 TraceCheckUtils]: 0: Hoare triple {1901#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1911#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:45,405 INFO L290 TraceCheckUtils]: 1: Hoare triple {1911#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1901#true} is VALID [2022-04-27 21:05:45,405 INFO L290 TraceCheckUtils]: 2: Hoare triple {1901#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:45,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1901#true} {1901#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:45,405 INFO L272 TraceCheckUtils]: 4: Hoare triple {1901#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:45,405 INFO L290 TraceCheckUtils]: 5: Hoare triple {1901#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1901#true} is VALID [2022-04-27 21:05:45,405 INFO L290 TraceCheckUtils]: 6: Hoare triple {1901#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:45,405 INFO L290 TraceCheckUtils]: 7: Hoare triple {1901#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1906#(= main_~i~0 0)} is VALID [2022-04-27 21:05:45,406 INFO L290 TraceCheckUtils]: 8: Hoare triple {1906#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1906#(= main_~i~0 0)} is VALID [2022-04-27 21:05:45,406 INFO L290 TraceCheckUtils]: 9: Hoare triple {1906#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1907#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:45,406 INFO L290 TraceCheckUtils]: 10: Hoare triple {1907#(<= 1 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1907#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:45,407 INFO L290 TraceCheckUtils]: 11: Hoare triple {1907#(<= 1 main_~i~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1908#(<= 2 main_~i~0)} is VALID [2022-04-27 21:05:45,407 INFO L290 TraceCheckUtils]: 12: Hoare triple {1908#(<= 2 main_~i~0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1909#(<= 3 main_~MAX~0)} is VALID [2022-04-27 21:05:45,407 INFO L290 TraceCheckUtils]: 13: Hoare triple {1909#(<= 3 main_~MAX~0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1909#(<= 3 main_~MAX~0)} is VALID [2022-04-27 21:05:45,408 INFO L290 TraceCheckUtils]: 14: Hoare triple {1909#(<= 3 main_~MAX~0)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1909#(<= 3 main_~MAX~0)} is VALID [2022-04-27 21:05:45,408 INFO L290 TraceCheckUtils]: 15: Hoare triple {1909#(<= 3 main_~MAX~0)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1908#(<= 2 main_~i~0)} is VALID [2022-04-27 21:05:45,408 INFO L290 TraceCheckUtils]: 16: Hoare triple {1908#(<= 2 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1908#(<= 2 main_~i~0)} is VALID [2022-04-27 21:05:45,409 INFO L290 TraceCheckUtils]: 17: Hoare triple {1908#(<= 2 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1907#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:45,409 INFO L290 TraceCheckUtils]: 18: Hoare triple {1907#(<= 1 main_~i~0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1907#(<= 1 main_~i~0)} is VALID [2022-04-27 21:05:45,409 INFO L290 TraceCheckUtils]: 19: Hoare triple {1907#(<= 1 main_~i~0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1910#(<= 0 main_~i~0)} is VALID [2022-04-27 21:05:45,410 INFO L290 TraceCheckUtils]: 20: Hoare triple {1910#(<= 0 main_~i~0)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1902#false} is VALID [2022-04-27 21:05:45,410 INFO L290 TraceCheckUtils]: 21: Hoare triple {1902#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1902#false} is VALID [2022-04-27 21:05:45,410 INFO L290 TraceCheckUtils]: 22: Hoare triple {1902#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1902#false} is VALID [2022-04-27 21:05:45,410 INFO L272 TraceCheckUtils]: 23: Hoare triple {1902#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1902#false} is VALID [2022-04-27 21:05:45,410 INFO L290 TraceCheckUtils]: 24: Hoare triple {1902#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1902#false} is VALID [2022-04-27 21:05:45,410 INFO L290 TraceCheckUtils]: 25: Hoare triple {1902#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1902#false} is VALID [2022-04-27 21:05:45,410 INFO L290 TraceCheckUtils]: 26: Hoare triple {1902#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1902#false} is VALID [2022-04-27 21:05:45,411 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:45,411 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:45,411 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1471071135] [2022-04-27 21:05:45,411 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1471071135] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:05:45,411 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [54651521] [2022-04-27 21:05:45,411 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:05:45,411 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:45,411 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:05:45,415 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:05:45,416 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 21:05:45,457 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:05:45,457 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:05:45,458 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-27 21:05:45,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:45,484 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:05:45,510 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-27 21:05:45,632 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-04-27 21:05:45,930 INFO L356 Elim1Store]: treesize reduction 9, result has 25.0 percent of original size [2022-04-27 21:05:45,931 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 13 [2022-04-27 21:05:46,002 INFO L272 TraceCheckUtils]: 0: Hoare triple {1901#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,003 INFO L290 TraceCheckUtils]: 1: Hoare triple {1901#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1901#true} is VALID [2022-04-27 21:05:46,003 INFO L290 TraceCheckUtils]: 2: Hoare triple {1901#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,003 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1901#true} {1901#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,003 INFO L272 TraceCheckUtils]: 4: Hoare triple {1901#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,003 INFO L290 TraceCheckUtils]: 5: Hoare triple {1901#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1901#true} is VALID [2022-04-27 21:05:46,003 INFO L290 TraceCheckUtils]: 6: Hoare triple {1901#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,004 INFO L290 TraceCheckUtils]: 7: Hoare triple {1901#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,005 INFO L290 TraceCheckUtils]: 8: Hoare triple {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,005 INFO L290 TraceCheckUtils]: 9: Hoare triple {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,006 INFO L290 TraceCheckUtils]: 10: Hoare triple {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,006 INFO L290 TraceCheckUtils]: 11: Hoare triple {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,007 INFO L290 TraceCheckUtils]: 12: Hoare triple {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,007 INFO L290 TraceCheckUtils]: 13: Hoare triple {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,007 INFO L290 TraceCheckUtils]: 14: Hoare triple {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,008 INFO L290 TraceCheckUtils]: 15: Hoare triple {1936#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1961#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,008 INFO L290 TraceCheckUtils]: 16: Hoare triple {1961#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1965#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,009 INFO L290 TraceCheckUtils]: 17: Hoare triple {1965#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 (+ (- 1) main_~MAX~0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1969#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,010 INFO L290 TraceCheckUtils]: 18: Hoare triple {1969#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {1973#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,010 INFO L290 TraceCheckUtils]: 19: Hoare triple {1973#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~MAX~0) (+ main_~i~0 1)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {1977#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= main_~MAX~0 (+ main_~i~0 3)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,011 INFO L290 TraceCheckUtils]: 20: Hoare triple {1977#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= main_~MAX~0 (+ main_~i~0 3)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {1981#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< main_~MAX~0 3) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,012 INFO L290 TraceCheckUtils]: 21: Hoare triple {1981#(and (<= 2 main_~MAX~0) (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< main_~MAX~0 3) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1985#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (< main_~j~0 2) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-27 21:05:46,012 INFO L290 TraceCheckUtils]: 22: Hoare triple {1985#(and (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 1 main_~j~0) (= |main_~#str1~0.offset| 0) (< main_~j~0 2) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1989#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 21:05:46,013 INFO L272 TraceCheckUtils]: 23: Hoare triple {1989#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1993#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:05:46,013 INFO L290 TraceCheckUtils]: 24: Hoare triple {1993#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1997#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:05:46,014 INFO L290 TraceCheckUtils]: 25: Hoare triple {1997#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1902#false} is VALID [2022-04-27 21:05:46,014 INFO L290 TraceCheckUtils]: 26: Hoare triple {1902#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1902#false} is VALID [2022-04-27 21:05:46,014 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 21:05:46,014 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:05:46,171 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-27 21:05:46,172 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 26 [2022-04-27 21:05:46,192 INFO L356 Elim1Store]: treesize reduction 4, result has 63.6 percent of original size [2022-04-27 21:05:46,192 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 29 [2022-04-27 21:05:46,208 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2022-04-27 21:05:46,345 INFO L290 TraceCheckUtils]: 26: Hoare triple {1902#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1902#false} is VALID [2022-04-27 21:05:46,346 INFO L290 TraceCheckUtils]: 25: Hoare triple {1997#(<= 1 __VERIFIER_assert_~cond)} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1902#false} is VALID [2022-04-27 21:05:46,346 INFO L290 TraceCheckUtils]: 24: Hoare triple {1993#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1997#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:05:46,347 INFO L272 TraceCheckUtils]: 23: Hoare triple {1989#(= |main_#t~mem12| |main_#t~mem11|)} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {1993#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:05:46,347 INFO L290 TraceCheckUtils]: 22: Hoare triple {2016#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {1989#(= |main_#t~mem12| |main_#t~mem11|)} is VALID [2022-04-27 21:05:46,348 INFO L290 TraceCheckUtils]: 21: Hoare triple {2020#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2016#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-27 21:05:46,348 INFO L290 TraceCheckUtils]: 20: Hoare triple {2024#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 0 main_~i~0))} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2020#(= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|)))} is VALID [2022-04-27 21:05:46,349 INFO L290 TraceCheckUtils]: 19: Hoare triple {2028#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 1 main_~i~0))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2024#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 0 main_~i~0))} is VALID [2022-04-27 21:05:46,349 INFO L290 TraceCheckUtils]: 18: Hoare triple {2032#(or (not (<= 0 main_~i~0)) (<= 1 main_~i~0) (= main_~MAX~0 (+ main_~j~0 1)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2028#(or (= (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~MAX~0 |main_~#str2~0.offset|))) (<= 1 main_~i~0))} is VALID [2022-04-27 21:05:46,350 INFO L290 TraceCheckUtils]: 17: Hoare triple {2036#(or (<= 2 main_~i~0) (not (<= 1 main_~i~0)) (= main_~MAX~0 (+ main_~j~0 1)))} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2032#(or (not (<= 0 main_~i~0)) (<= 1 main_~i~0) (= main_~MAX~0 (+ main_~j~0 1)))} is VALID [2022-04-27 21:05:46,350 INFO L290 TraceCheckUtils]: 16: Hoare triple {2040#(or (<= 2 main_~i~0) (= main_~MAX~0 (+ main_~j~0 2)) (not (<= 1 main_~i~0)))} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2036#(or (<= 2 main_~i~0) (not (<= 1 main_~i~0)) (= main_~MAX~0 (+ main_~j~0 1)))} is VALID [2022-04-27 21:05:46,351 INFO L290 TraceCheckUtils]: 15: Hoare triple {1901#true} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2040#(or (<= 2 main_~i~0) (= main_~MAX~0 (+ main_~j~0 2)) (not (<= 1 main_~i~0)))} is VALID [2022-04-27 21:05:46,351 INFO L290 TraceCheckUtils]: 14: Hoare triple {1901#true} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,351 INFO L290 TraceCheckUtils]: 13: Hoare triple {1901#true} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1901#true} is VALID [2022-04-27 21:05:46,351 INFO L290 TraceCheckUtils]: 12: Hoare triple {1901#true} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1901#true} is VALID [2022-04-27 21:05:46,351 INFO L290 TraceCheckUtils]: 11: Hoare triple {1901#true} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1901#true} is VALID [2022-04-27 21:05:46,351 INFO L290 TraceCheckUtils]: 10: Hoare triple {1901#true} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1901#true} is VALID [2022-04-27 21:05:46,351 INFO L290 TraceCheckUtils]: 9: Hoare triple {1901#true} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {1901#true} is VALID [2022-04-27 21:05:46,352 INFO L290 TraceCheckUtils]: 8: Hoare triple {1901#true} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {1901#true} is VALID [2022-04-27 21:05:46,352 INFO L290 TraceCheckUtils]: 7: Hoare triple {1901#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {1901#true} is VALID [2022-04-27 21:05:46,352 INFO L290 TraceCheckUtils]: 6: Hoare triple {1901#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,352 INFO L290 TraceCheckUtils]: 5: Hoare triple {1901#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {1901#true} is VALID [2022-04-27 21:05:46,352 INFO L272 TraceCheckUtils]: 4: Hoare triple {1901#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,352 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1901#true} {1901#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,352 INFO L290 TraceCheckUtils]: 2: Hoare triple {1901#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,352 INFO L290 TraceCheckUtils]: 1: Hoare triple {1901#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1901#true} is VALID [2022-04-27 21:05:46,352 INFO L272 TraceCheckUtils]: 0: Hoare triple {1901#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1901#true} is VALID [2022-04-27 21:05:46,353 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 21:05:46,353 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [54651521] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:05:46,353 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:05:46,353 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 12] total 26 [2022-04-27 21:05:46,353 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1771564897] [2022-04-27 21:05:46,353 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:05:46,353 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 21:05:46,354 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:46,354 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:46,388 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:46,388 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-27 21:05:46,388 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:46,388 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-27 21:05:46,389 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=556, Unknown=0, NotChecked=0, Total=650 [2022-04-27 21:05:46,389 INFO L87 Difference]: Start difference. First operand 46 states and 51 transitions. Second operand has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:49,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:49,921 INFO L93 Difference]: Finished difference Result 125 states and 144 transitions. [2022-04-27 21:05:49,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2022-04-27 21:05:49,921 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 21:05:49,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:49,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:49,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 135 transitions. [2022-04-27 21:05:49,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:49,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 135 transitions. [2022-04-27 21:05:49,927 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 52 states and 135 transitions. [2022-04-27 21:05:50,038 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 135 edges. 135 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:50,041 INFO L225 Difference]: With dead ends: 125 [2022-04-27 21:05:50,041 INFO L226 Difference]: Without dead ends: 111 [2022-04-27 21:05:50,042 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1387 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=935, Invalid=4615, Unknown=0, NotChecked=0, Total=5550 [2022-04-27 21:05:50,043 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 95 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 1001 mSolverCounterSat, 202 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 95 SdHoareTripleChecker+Valid, 97 SdHoareTripleChecker+Invalid, 1203 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 202 IncrementalHoareTripleChecker+Valid, 1001 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:50,043 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [95 Valid, 97 Invalid, 1203 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [202 Valid, 1001 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-04-27 21:05:50,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2022-04-27 21:05:50,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 71. [2022-04-27 21:05:50,132 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:50,132 INFO L82 GeneralOperation]: Start isEquivalent. First operand 111 states. Second operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:50,133 INFO L74 IsIncluded]: Start isIncluded. First operand 111 states. Second operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:50,133 INFO L87 Difference]: Start difference. First operand 111 states. Second operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:50,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:50,135 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-04-27 21:05:50,136 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2022-04-27 21:05:50,136 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:50,136 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:50,136 INFO L74 IsIncluded]: Start isIncluded. First operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 111 states. [2022-04-27 21:05:50,136 INFO L87 Difference]: Start difference. First operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 111 states. [2022-04-27 21:05:50,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:50,139 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-04-27 21:05:50,139 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2022-04-27 21:05:50,139 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:50,139 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:50,139 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:50,139 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:50,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 59 states have (on average 1.1694915254237288) internal successors, (69), 62 states have internal predecessors, (69), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:50,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 81 transitions. [2022-04-27 21:05:50,141 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 81 transitions. Word has length 27 [2022-04-27 21:05:50,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:50,141 INFO L495 AbstractCegarLoop]: Abstraction has 71 states and 81 transitions. [2022-04-27 21:05:50,141 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:50,141 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 81 transitions. [2022-04-27 21:05:50,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 21:05:50,142 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:50,142 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:50,158 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 21:05:50,357 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:50,358 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:50,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:50,358 INFO L85 PathProgramCache]: Analyzing trace with hash -468461934, now seen corresponding path program 1 times [2022-04-27 21:05:50,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:50,358 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651262597] [2022-04-27 21:05:50,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:50,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:50,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:50,408 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:50,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:50,413 INFO L290 TraceCheckUtils]: 0: Hoare triple {2712#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2698#true} is VALID [2022-04-27 21:05:50,413 INFO L290 TraceCheckUtils]: 1: Hoare triple {2698#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,413 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2698#true} {2698#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,413 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 17 [2022-04-27 21:05:50,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:50,417 INFO L290 TraceCheckUtils]: 0: Hoare triple {2698#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2698#true} is VALID [2022-04-27 21:05:50,418 INFO L290 TraceCheckUtils]: 1: Hoare triple {2698#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,418 INFO L290 TraceCheckUtils]: 2: Hoare triple {2698#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2698#true} {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:50,419 INFO L272 TraceCheckUtils]: 0: Hoare triple {2698#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2712#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:50,419 INFO L290 TraceCheckUtils]: 1: Hoare triple {2712#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2698#true} is VALID [2022-04-27 21:05:50,419 INFO L290 TraceCheckUtils]: 2: Hoare triple {2698#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,419 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2698#true} {2698#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,419 INFO L272 TraceCheckUtils]: 4: Hoare triple {2698#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,420 INFO L290 TraceCheckUtils]: 5: Hoare triple {2698#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2698#true} is VALID [2022-04-27 21:05:50,420 INFO L290 TraceCheckUtils]: 6: Hoare triple {2698#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,421 INFO L290 TraceCheckUtils]: 7: Hoare triple {2698#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2703#(= main_~i~0 0)} is VALID [2022-04-27 21:05:50,421 INFO L290 TraceCheckUtils]: 8: Hoare triple {2703#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2703#(= main_~i~0 0)} is VALID [2022-04-27 21:05:50,422 INFO L290 TraceCheckUtils]: 9: Hoare triple {2703#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2704#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:50,422 INFO L290 TraceCheckUtils]: 10: Hoare triple {2704#(<= main_~i~0 1)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,422 INFO L290 TraceCheckUtils]: 11: Hoare triple {2705#(<= main_~MAX~0 1)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,423 INFO L290 TraceCheckUtils]: 12: Hoare triple {2705#(<= main_~MAX~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,424 INFO L290 TraceCheckUtils]: 13: Hoare triple {2705#(<= main_~MAX~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,424 INFO L290 TraceCheckUtils]: 14: Hoare triple {2705#(<= main_~MAX~0 1)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,424 INFO L290 TraceCheckUtils]: 15: Hoare triple {2705#(<= main_~MAX~0 1)} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:50,425 INFO L290 TraceCheckUtils]: 16: Hoare triple {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:50,425 INFO L272 TraceCheckUtils]: 17: Hoare triple {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2698#true} is VALID [2022-04-27 21:05:50,425 INFO L290 TraceCheckUtils]: 18: Hoare triple {2698#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2698#true} is VALID [2022-04-27 21:05:50,425 INFO L290 TraceCheckUtils]: 19: Hoare triple {2698#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,425 INFO L290 TraceCheckUtils]: 20: Hoare triple {2698#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,426 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {2698#true} {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:50,426 INFO L290 TraceCheckUtils]: 22: Hoare triple {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [102] L36-1-->L35-2: Formula: (= (+ v_main_~j~0_4 1) v_main_~j~0_5) InVars {main_~j~0=v_main_~j~0_5} OutVars{main_#t~mem12=|v_main_#t~mem12_3|, main_#t~post13=|v_main_#t~post13_1|, main_~j~0=v_main_~j~0_4, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem12, main_~j~0, main_#t~mem11, main_#t~post13] {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:50,427 INFO L290 TraceCheckUtils]: 23: Hoare triple {2706#(and (= main_~i~0 0) (<= main_~MAX~0 1))} [104] L35-2-->L35-3: Formula: (= v_main_~i~0_10 (+ v_main_~i~0_11 1)) InVars {main_~i~0=v_main_~i~0_11} OutVars{main_~i~0=v_main_~i~0_10, main_#t~post10=|v_main_#t~post10_1|} AuxVars[] AssignedVars[main_#t~post10, main_~i~0] {2711#(<= main_~MAX~0 main_~i~0)} is VALID [2022-04-27 21:05:50,427 INFO L290 TraceCheckUtils]: 24: Hoare triple {2711#(<= main_~MAX~0 main_~i~0)} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2699#false} is VALID [2022-04-27 21:05:50,427 INFO L272 TraceCheckUtils]: 25: Hoare triple {2699#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2699#false} is VALID [2022-04-27 21:05:50,427 INFO L290 TraceCheckUtils]: 26: Hoare triple {2699#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2699#false} is VALID [2022-04-27 21:05:50,427 INFO L290 TraceCheckUtils]: 27: Hoare triple {2699#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2699#false} is VALID [2022-04-27 21:05:50,427 INFO L290 TraceCheckUtils]: 28: Hoare triple {2699#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2699#false} is VALID [2022-04-27 21:05:50,428 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 21:05:50,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:50,428 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651262597] [2022-04-27 21:05:50,428 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [651262597] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:05:50,428 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [211040123] [2022-04-27 21:05:50,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:50,428 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:50,428 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:05:50,429 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:05:50,430 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 21:05:50,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:50,471 INFO L263 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-27 21:05:50,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:50,479 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:05:50,620 INFO L272 TraceCheckUtils]: 0: Hoare triple {2698#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,621 INFO L290 TraceCheckUtils]: 1: Hoare triple {2698#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2698#true} is VALID [2022-04-27 21:05:50,621 INFO L290 TraceCheckUtils]: 2: Hoare triple {2698#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,621 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2698#true} {2698#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,621 INFO L272 TraceCheckUtils]: 4: Hoare triple {2698#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,621 INFO L290 TraceCheckUtils]: 5: Hoare triple {2698#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2698#true} is VALID [2022-04-27 21:05:50,621 INFO L290 TraceCheckUtils]: 6: Hoare triple {2698#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,622 INFO L290 TraceCheckUtils]: 7: Hoare triple {2698#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2737#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:50,622 INFO L290 TraceCheckUtils]: 8: Hoare triple {2737#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2737#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:50,622 INFO L290 TraceCheckUtils]: 9: Hoare triple {2737#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2704#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:50,623 INFO L290 TraceCheckUtils]: 10: Hoare triple {2704#(<= main_~i~0 1)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,623 INFO L290 TraceCheckUtils]: 11: Hoare triple {2705#(<= main_~MAX~0 1)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,623 INFO L290 TraceCheckUtils]: 12: Hoare triple {2705#(<= main_~MAX~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,624 INFO L290 TraceCheckUtils]: 13: Hoare triple {2705#(<= main_~MAX~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,624 INFO L290 TraceCheckUtils]: 14: Hoare triple {2705#(<= main_~MAX~0 1)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,624 INFO L290 TraceCheckUtils]: 15: Hoare triple {2705#(<= main_~MAX~0 1)} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2762#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:50,625 INFO L290 TraceCheckUtils]: 16: Hoare triple {2762#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2762#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:50,625 INFO L272 TraceCheckUtils]: 17: Hoare triple {2762#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2698#true} is VALID [2022-04-27 21:05:50,625 INFO L290 TraceCheckUtils]: 18: Hoare triple {2698#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2698#true} is VALID [2022-04-27 21:05:50,625 INFO L290 TraceCheckUtils]: 19: Hoare triple {2698#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,625 INFO L290 TraceCheckUtils]: 20: Hoare triple {2698#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,626 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {2698#true} {2762#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2762#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:50,626 INFO L290 TraceCheckUtils]: 22: Hoare triple {2762#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [102] L36-1-->L35-2: Formula: (= (+ v_main_~j~0_4 1) v_main_~j~0_5) InVars {main_~j~0=v_main_~j~0_5} OutVars{main_#t~mem12=|v_main_#t~mem12_3|, main_#t~post13=|v_main_#t~post13_1|, main_~j~0=v_main_~j~0_4, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem12, main_~j~0, main_#t~mem11, main_#t~post13] {2762#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} is VALID [2022-04-27 21:05:50,626 INFO L290 TraceCheckUtils]: 23: Hoare triple {2762#(and (<= 0 main_~i~0) (<= main_~MAX~0 1))} [104] L35-2-->L35-3: Formula: (= v_main_~i~0_10 (+ v_main_~i~0_11 1)) InVars {main_~i~0=v_main_~i~0_11} OutVars{main_~i~0=v_main_~i~0_10, main_#t~post10=|v_main_#t~post10_1|} AuxVars[] AssignedVars[main_#t~post10, main_~i~0] {2787#(and (<= main_~MAX~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:05:50,627 INFO L290 TraceCheckUtils]: 24: Hoare triple {2787#(and (<= main_~MAX~0 1) (<= 1 main_~i~0))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2699#false} is VALID [2022-04-27 21:05:50,627 INFO L272 TraceCheckUtils]: 25: Hoare triple {2699#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2699#false} is VALID [2022-04-27 21:05:50,627 INFO L290 TraceCheckUtils]: 26: Hoare triple {2699#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2699#false} is VALID [2022-04-27 21:05:50,627 INFO L290 TraceCheckUtils]: 27: Hoare triple {2699#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2699#false} is VALID [2022-04-27 21:05:50,627 INFO L290 TraceCheckUtils]: 28: Hoare triple {2699#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2699#false} is VALID [2022-04-27 21:05:50,627 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 21:05:50,627 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:05:50,751 INFO L290 TraceCheckUtils]: 28: Hoare triple {2699#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2699#false} is VALID [2022-04-27 21:05:50,751 INFO L290 TraceCheckUtils]: 27: Hoare triple {2699#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2699#false} is VALID [2022-04-27 21:05:50,751 INFO L290 TraceCheckUtils]: 26: Hoare triple {2699#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2699#false} is VALID [2022-04-27 21:05:50,751 INFO L272 TraceCheckUtils]: 25: Hoare triple {2699#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2699#false} is VALID [2022-04-27 21:05:50,752 INFO L290 TraceCheckUtils]: 24: Hoare triple {2711#(<= main_~MAX~0 main_~i~0)} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2699#false} is VALID [2022-04-27 21:05:50,752 INFO L290 TraceCheckUtils]: 23: Hoare triple {2818#(<= main_~MAX~0 (+ main_~i~0 1))} [104] L35-2-->L35-3: Formula: (= v_main_~i~0_10 (+ v_main_~i~0_11 1)) InVars {main_~i~0=v_main_~i~0_11} OutVars{main_~i~0=v_main_~i~0_10, main_#t~post10=|v_main_#t~post10_1|} AuxVars[] AssignedVars[main_#t~post10, main_~i~0] {2711#(<= main_~MAX~0 main_~i~0)} is VALID [2022-04-27 21:05:50,752 INFO L290 TraceCheckUtils]: 22: Hoare triple {2818#(<= main_~MAX~0 (+ main_~i~0 1))} [102] L36-1-->L35-2: Formula: (= (+ v_main_~j~0_4 1) v_main_~j~0_5) InVars {main_~j~0=v_main_~j~0_5} OutVars{main_#t~mem12=|v_main_#t~mem12_3|, main_#t~post13=|v_main_#t~post13_1|, main_~j~0=v_main_~j~0_4, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem12, main_~j~0, main_#t~mem11, main_#t~post13] {2818#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-27 21:05:50,753 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {2698#true} {2818#(<= main_~MAX~0 (+ main_~i~0 1))} [112] __VERIFIER_assertEXIT-->L36-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2818#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-27 21:05:50,753 INFO L290 TraceCheckUtils]: 20: Hoare triple {2698#true} [109] L7-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,753 INFO L290 TraceCheckUtils]: 19: Hoare triple {2698#true} [106] L7-->L7-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,753 INFO L290 TraceCheckUtils]: 18: Hoare triple {2698#true} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2698#true} is VALID [2022-04-27 21:05:50,753 INFO L272 TraceCheckUtils]: 17: Hoare triple {2818#(<= main_~MAX~0 (+ main_~i~0 1))} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {2698#true} is VALID [2022-04-27 21:05:50,754 INFO L290 TraceCheckUtils]: 16: Hoare triple {2818#(<= main_~MAX~0 (+ main_~i~0 1))} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {2818#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-27 21:05:50,754 INFO L290 TraceCheckUtils]: 15: Hoare triple {2705#(<= main_~MAX~0 1)} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2818#(<= main_~MAX~0 (+ main_~i~0 1))} is VALID [2022-04-27 21:05:50,754 INFO L290 TraceCheckUtils]: 14: Hoare triple {2705#(<= main_~MAX~0 1)} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,755 INFO L290 TraceCheckUtils]: 13: Hoare triple {2705#(<= main_~MAX~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,755 INFO L290 TraceCheckUtils]: 12: Hoare triple {2705#(<= main_~MAX~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,755 INFO L290 TraceCheckUtils]: 11: Hoare triple {2705#(<= main_~MAX~0 1)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,756 INFO L290 TraceCheckUtils]: 10: Hoare triple {2704#(<= main_~i~0 1)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {2705#(<= main_~MAX~0 1)} is VALID [2022-04-27 21:05:50,756 INFO L290 TraceCheckUtils]: 9: Hoare triple {2737#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {2704#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:50,756 INFO L290 TraceCheckUtils]: 8: Hoare triple {2737#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {2737#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:50,757 INFO L290 TraceCheckUtils]: 7: Hoare triple {2698#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {2737#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:50,757 INFO L290 TraceCheckUtils]: 6: Hoare triple {2698#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,757 INFO L290 TraceCheckUtils]: 5: Hoare triple {2698#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {2698#true} is VALID [2022-04-27 21:05:50,757 INFO L272 TraceCheckUtils]: 4: Hoare triple {2698#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,757 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2698#true} {2698#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,757 INFO L290 TraceCheckUtils]: 2: Hoare triple {2698#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,757 INFO L290 TraceCheckUtils]: 1: Hoare triple {2698#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2698#true} is VALID [2022-04-27 21:05:50,757 INFO L272 TraceCheckUtils]: 0: Hoare triple {2698#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2698#true} is VALID [2022-04-27 21:05:50,758 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 21:05:50,758 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [211040123] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:05:50,758 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:05:50,758 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 12 [2022-04-27 21:05:50,758 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [945547668] [2022-04-27 21:05:50,758 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:05:50,758 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 29 [2022-04-27 21:05:50,759 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:50,759 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:05:50,792 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:50,792 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-27 21:05:50,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:50,792 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-27 21:05:50,792 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2022-04-27 21:05:50,792 INFO L87 Difference]: Start difference. First operand 71 states and 81 transitions. Second operand has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:05:51,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:51,282 INFO L93 Difference]: Finished difference Result 111 states and 129 transitions. [2022-04-27 21:05:51,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-27 21:05:51,283 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 29 [2022-04-27 21:05:51,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:51,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:05:51,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 65 transitions. [2022-04-27 21:05:51,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:05:51,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 65 transitions. [2022-04-27 21:05:51,289 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 65 transitions. [2022-04-27 21:05:51,336 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:51,337 INFO L225 Difference]: With dead ends: 111 [2022-04-27 21:05:51,337 INFO L226 Difference]: Without dead ends: 75 [2022-04-27 21:05:51,338 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 57 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=123, Invalid=339, Unknown=0, NotChecked=0, Total=462 [2022-04-27 21:05:51,338 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 50 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 173 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:51,338 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [51 Valid, 42 Invalid, 173 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:05:51,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-04-27 21:05:51,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 67. [2022-04-27 21:05:51,425 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:51,425 INFO L82 GeneralOperation]: Start isEquivalent. First operand 75 states. Second operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:51,425 INFO L74 IsIncluded]: Start isIncluded. First operand 75 states. Second operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:51,426 INFO L87 Difference]: Start difference. First operand 75 states. Second operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:51,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:51,427 INFO L93 Difference]: Finished difference Result 75 states and 85 transitions. [2022-04-27 21:05:51,427 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 85 transitions. [2022-04-27 21:05:51,428 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:51,428 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:51,428 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 75 states. [2022-04-27 21:05:51,428 INFO L87 Difference]: Start difference. First operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 75 states. [2022-04-27 21:05:51,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:51,430 INFO L93 Difference]: Finished difference Result 75 states and 85 transitions. [2022-04-27 21:05:51,430 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 85 transitions. [2022-04-27 21:05:51,430 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:51,430 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:51,430 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:51,430 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:51,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 55 states have (on average 1.1454545454545455) internal successors, (63), 58 states have internal predecessors, (63), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:51,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 75 transitions. [2022-04-27 21:05:51,432 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 75 transitions. Word has length 29 [2022-04-27 21:05:51,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:51,432 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 75 transitions. [2022-04-27 21:05:51,433 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 3.0) internal successors, (36), 11 states have internal predecessors, (36), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:05:51,433 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 75 transitions. [2022-04-27 21:05:51,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 21:05:51,433 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:51,433 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:51,451 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 21:05:51,647 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:51,647 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:51,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:51,648 INFO L85 PathProgramCache]: Analyzing trace with hash -812414670, now seen corresponding path program 5 times [2022-04-27 21:05:51,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:51,648 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1567827238] [2022-04-27 21:05:51,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:51,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:51,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:51,720 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:51,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:51,734 INFO L290 TraceCheckUtils]: 0: Hoare triple {3333#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3321#true} is VALID [2022-04-27 21:05:51,734 INFO L290 TraceCheckUtils]: 1: Hoare triple {3321#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,734 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3321#true} {3321#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,734 INFO L272 TraceCheckUtils]: 0: Hoare triple {3321#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3333#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:51,735 INFO L290 TraceCheckUtils]: 1: Hoare triple {3333#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3321#true} is VALID [2022-04-27 21:05:51,735 INFO L290 TraceCheckUtils]: 2: Hoare triple {3321#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,735 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3321#true} {3321#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,735 INFO L272 TraceCheckUtils]: 4: Hoare triple {3321#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,735 INFO L290 TraceCheckUtils]: 5: Hoare triple {3321#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {3321#true} is VALID [2022-04-27 21:05:51,735 INFO L290 TraceCheckUtils]: 6: Hoare triple {3321#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,735 INFO L290 TraceCheckUtils]: 7: Hoare triple {3321#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {3326#(= main_~i~0 0)} is VALID [2022-04-27 21:05:51,736 INFO L290 TraceCheckUtils]: 8: Hoare triple {3326#(= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {3326#(= main_~i~0 0)} is VALID [2022-04-27 21:05:51,736 INFO L290 TraceCheckUtils]: 9: Hoare triple {3326#(= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:51,736 INFO L290 TraceCheckUtils]: 10: Hoare triple {3327#(<= main_~i~0 1)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:51,737 INFO L290 TraceCheckUtils]: 11: Hoare triple {3327#(<= main_~i~0 1)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:51,737 INFO L290 TraceCheckUtils]: 12: Hoare triple {3328#(<= main_~i~0 2)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:51,737 INFO L290 TraceCheckUtils]: 13: Hoare triple {3328#(<= main_~i~0 2)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {3329#(<= main_~i~0 3)} is VALID [2022-04-27 21:05:51,738 INFO L290 TraceCheckUtils]: 14: Hoare triple {3329#(<= main_~i~0 3)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {3330#(<= main_~MAX~0 3)} is VALID [2022-04-27 21:05:51,738 INFO L290 TraceCheckUtils]: 15: Hoare triple {3330#(<= main_~MAX~0 3)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:51,739 INFO L290 TraceCheckUtils]: 16: Hoare triple {3328#(<= main_~i~0 2)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:51,739 INFO L290 TraceCheckUtils]: 17: Hoare triple {3328#(<= main_~i~0 2)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:51,739 INFO L290 TraceCheckUtils]: 18: Hoare triple {3327#(<= main_~i~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:51,740 INFO L290 TraceCheckUtils]: 19: Hoare triple {3327#(<= main_~i~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3331#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:51,740 INFO L290 TraceCheckUtils]: 20: Hoare triple {3331#(<= main_~i~0 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3331#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:51,740 INFO L290 TraceCheckUtils]: 21: Hoare triple {3331#(<= main_~i~0 0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3332#(<= (+ main_~i~0 1) 0)} is VALID [2022-04-27 21:05:51,741 INFO L290 TraceCheckUtils]: 22: Hoare triple {3332#(<= (+ main_~i~0 1) 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3322#false} is VALID [2022-04-27 21:05:51,741 INFO L290 TraceCheckUtils]: 23: Hoare triple {3322#false} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3322#false} is VALID [2022-04-27 21:05:51,741 INFO L290 TraceCheckUtils]: 24: Hoare triple {3322#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {3322#false} is VALID [2022-04-27 21:05:51,741 INFO L290 TraceCheckUtils]: 25: Hoare triple {3322#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {3322#false} is VALID [2022-04-27 21:05:51,741 INFO L290 TraceCheckUtils]: 26: Hoare triple {3322#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {3322#false} is VALID [2022-04-27 21:05:51,741 INFO L272 TraceCheckUtils]: 27: Hoare triple {3322#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {3322#false} is VALID [2022-04-27 21:05:51,741 INFO L290 TraceCheckUtils]: 28: Hoare triple {3322#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3322#false} is VALID [2022-04-27 21:05:51,741 INFO L290 TraceCheckUtils]: 29: Hoare triple {3322#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3322#false} is VALID [2022-04-27 21:05:51,741 INFO L290 TraceCheckUtils]: 30: Hoare triple {3322#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3322#false} is VALID [2022-04-27 21:05:51,742 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:51,742 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:51,742 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1567827238] [2022-04-27 21:05:51,742 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1567827238] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:05:51,742 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1276304818] [2022-04-27 21:05:51,742 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 21:05:51,742 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:51,742 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:05:51,743 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:05:51,744 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 21:05:51,799 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-27 21:05:51,799 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:05:51,800 INFO L263 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-27 21:05:51,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:51,808 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:05:51,906 INFO L272 TraceCheckUtils]: 0: Hoare triple {3321#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,906 INFO L290 TraceCheckUtils]: 1: Hoare triple {3321#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3321#true} is VALID [2022-04-27 21:05:51,906 INFO L290 TraceCheckUtils]: 2: Hoare triple {3321#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,906 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3321#true} {3321#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,906 INFO L272 TraceCheckUtils]: 4: Hoare triple {3321#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,906 INFO L290 TraceCheckUtils]: 5: Hoare triple {3321#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {3321#true} is VALID [2022-04-27 21:05:51,906 INFO L290 TraceCheckUtils]: 6: Hoare triple {3321#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:51,907 INFO L290 TraceCheckUtils]: 7: Hoare triple {3321#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {3331#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:51,907 INFO L290 TraceCheckUtils]: 8: Hoare triple {3331#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {3331#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:51,908 INFO L290 TraceCheckUtils]: 9: Hoare triple {3331#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:51,908 INFO L290 TraceCheckUtils]: 10: Hoare triple {3327#(<= main_~i~0 1)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:51,908 INFO L290 TraceCheckUtils]: 11: Hoare triple {3327#(<= main_~i~0 1)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:51,910 INFO L290 TraceCheckUtils]: 12: Hoare triple {3328#(<= main_~i~0 2)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:51,914 INFO L290 TraceCheckUtils]: 13: Hoare triple {3328#(<= main_~i~0 2)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {3329#(<= main_~i~0 3)} is VALID [2022-04-27 21:05:51,915 INFO L290 TraceCheckUtils]: 14: Hoare triple {3329#(<= main_~i~0 3)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {3330#(<= main_~MAX~0 3)} is VALID [2022-04-27 21:05:51,916 INFO L290 TraceCheckUtils]: 15: Hoare triple {3330#(<= main_~MAX~0 3)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:51,916 INFO L290 TraceCheckUtils]: 16: Hoare triple {3328#(<= main_~i~0 2)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:51,916 INFO L290 TraceCheckUtils]: 17: Hoare triple {3328#(<= main_~i~0 2)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:51,917 INFO L290 TraceCheckUtils]: 18: Hoare triple {3327#(<= main_~i~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:51,917 INFO L290 TraceCheckUtils]: 19: Hoare triple {3327#(<= main_~i~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3331#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:51,917 INFO L290 TraceCheckUtils]: 20: Hoare triple {3331#(<= main_~i~0 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3331#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:51,918 INFO L290 TraceCheckUtils]: 21: Hoare triple {3331#(<= main_~i~0 0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3332#(<= (+ main_~i~0 1) 0)} is VALID [2022-04-27 21:05:51,918 INFO L290 TraceCheckUtils]: 22: Hoare triple {3332#(<= (+ main_~i~0 1) 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3322#false} is VALID [2022-04-27 21:05:51,918 INFO L290 TraceCheckUtils]: 23: Hoare triple {3322#false} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3322#false} is VALID [2022-04-27 21:05:51,918 INFO L290 TraceCheckUtils]: 24: Hoare triple {3322#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {3322#false} is VALID [2022-04-27 21:05:51,918 INFO L290 TraceCheckUtils]: 25: Hoare triple {3322#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {3322#false} is VALID [2022-04-27 21:05:51,919 INFO L290 TraceCheckUtils]: 26: Hoare triple {3322#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {3322#false} is VALID [2022-04-27 21:05:51,919 INFO L272 TraceCheckUtils]: 27: Hoare triple {3322#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {3322#false} is VALID [2022-04-27 21:05:51,919 INFO L290 TraceCheckUtils]: 28: Hoare triple {3322#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3322#false} is VALID [2022-04-27 21:05:51,919 INFO L290 TraceCheckUtils]: 29: Hoare triple {3322#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3322#false} is VALID [2022-04-27 21:05:51,919 INFO L290 TraceCheckUtils]: 30: Hoare triple {3322#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3322#false} is VALID [2022-04-27 21:05:51,919 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:51,919 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:05:52,024 INFO L290 TraceCheckUtils]: 30: Hoare triple {3322#false} [107] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3322#false} is VALID [2022-04-27 21:05:52,024 INFO L290 TraceCheckUtils]: 29: Hoare triple {3322#false} [105] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3322#false} is VALID [2022-04-27 21:05:52,024 INFO L290 TraceCheckUtils]: 28: Hoare triple {3322#false} [103] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3322#false} is VALID [2022-04-27 21:05:52,024 INFO L272 TraceCheckUtils]: 27: Hoare triple {3322#false} [100] L36-->__VERIFIER_assertENTRY: Formula: (= (ite (= |v_main_#t~mem12_4| |v_main_#t~mem11_4|) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_#t~mem12=|v_main_#t~mem12_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_#t~mem12, __VERIFIER_assert_#in~cond, main_#t~mem11] {3322#false} is VALID [2022-04-27 21:05:52,024 INFO L290 TraceCheckUtils]: 26: Hoare triple {3322#false} [98] L35-3-->L36: Formula: (and (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_7)) |v_main_#t~mem11_1|) (= (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_3)) |v_main_#t~mem12_1|) (< v_main_~i~0_7 v_main_~MAX~0_7)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} OutVars{main_#t~mem12=|v_main_#t~mem12_1|, main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_1|, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_7, main_~MAX~0=v_main_~MAX~0_7} AuxVars[] AssignedVars[main_#t~mem12, main_#t~mem11] {3322#false} is VALID [2022-04-27 21:05:52,024 INFO L290 TraceCheckUtils]: 25: Hoare triple {3322#false} [94] L29-4-->L35-3: Formula: (and (= v_main_~j~0_1 (+ (- 1) v_main_~MAX~0_3)) (= v_main_~i~0_3 0)) InVars {main_~MAX~0=v_main_~MAX~0_3} OutVars{main_~i~0=v_main_~i~0_3, main_~MAX~0=v_main_~MAX~0_3, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {3322#false} is VALID [2022-04-27 21:05:52,024 INFO L290 TraceCheckUtils]: 24: Hoare triple {3322#false} [92] L29-3-->L29-4: Formula: (not (<= 0 v_main_~i~0_15)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_15} AuxVars[] AssignedVars[] {3322#false} is VALID [2022-04-27 21:05:52,024 INFO L290 TraceCheckUtils]: 23: Hoare triple {3322#false} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3322#false} is VALID [2022-04-27 21:05:52,025 INFO L290 TraceCheckUtils]: 22: Hoare triple {3332#(<= (+ main_~i~0 1) 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3322#false} is VALID [2022-04-27 21:05:52,025 INFO L290 TraceCheckUtils]: 21: Hoare triple {3331#(<= main_~i~0 0)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3332#(<= (+ main_~i~0 1) 0)} is VALID [2022-04-27 21:05:52,026 INFO L290 TraceCheckUtils]: 20: Hoare triple {3331#(<= main_~i~0 0)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3331#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:52,026 INFO L290 TraceCheckUtils]: 19: Hoare triple {3327#(<= main_~i~0 1)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3331#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:52,026 INFO L290 TraceCheckUtils]: 18: Hoare triple {3327#(<= main_~i~0 1)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:52,026 INFO L290 TraceCheckUtils]: 17: Hoare triple {3328#(<= main_~i~0 2)} [95] L29-2-->L29-3: Formula: (= v_main_~i~0_2 (+ v_main_~i~0_1 1)) InVars {main_~i~0=v_main_~i~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post7] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:52,027 INFO L290 TraceCheckUtils]: 16: Hoare triple {3328#(<= main_~i~0 2)} [93] L29-3-->L29-2: Formula: (and (= v_main_~j~0_7 (+ v_main_~j~0_8 1)) (<= 0 v_main_~i~0_16) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_8) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) |v_main_~#str1~0.offset_7|))) |v_#memory_int_6|)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_8, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_16, main_#t~mem8=|v_main_#t~mem8_1|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~j~0, #memory_int, main_#t~mem8, main_#t~post9] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:52,027 INFO L290 TraceCheckUtils]: 15: Hoare triple {3330#(<= main_~MAX~0 3)} [89] L22-4-->L29-3: Formula: (and (= v_main_~j~0_6 0) (= v_main_~i~0_14 (+ (- 1) v_main_~MAX~0_10)) (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| (- 1) v_main_~MAX~0_10) 0)) |v_#memory_int_4|)) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~MAX~0=v_main_~MAX~0_10} OutVars{main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_6, main_~i~0=v_main_~i~0_14, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~MAX~0=v_main_~MAX~0_10} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:52,027 INFO L290 TraceCheckUtils]: 14: Hoare triple {3329#(<= main_~i~0 3)} [87] L22-3-->L22-4: Formula: (not (< v_main_~i~0_8 v_main_~MAX~0_8)) InVars {main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} OutVars{main_~i~0=v_main_~i~0_8, main_~MAX~0=v_main_~MAX~0_8} AuxVars[] AssignedVars[] {3330#(<= main_~MAX~0 3)} is VALID [2022-04-27 21:05:52,028 INFO L290 TraceCheckUtils]: 13: Hoare triple {3328#(<= main_~i~0 2)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {3329#(<= main_~i~0 3)} is VALID [2022-04-27 21:05:52,028 INFO L290 TraceCheckUtils]: 12: Hoare triple {3328#(<= main_~i~0 2)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:52,028 INFO L290 TraceCheckUtils]: 11: Hoare triple {3327#(<= main_~i~0 1)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {3328#(<= main_~i~0 2)} is VALID [2022-04-27 21:05:52,029 INFO L290 TraceCheckUtils]: 10: Hoare triple {3327#(<= main_~i~0 1)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:52,029 INFO L290 TraceCheckUtils]: 9: Hoare triple {3331#(<= main_~i~0 0)} [90] L22-2-->L22-3: Formula: (= v_main_~i~0_12 (+ v_main_~i~0_13 1)) InVars {main_~i~0=v_main_~i~0_13} OutVars{main_~i~0=v_main_~i~0_12, main_#t~post5=|v_main_#t~post5_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post5] {3327#(<= main_~i~0 1)} is VALID [2022-04-27 21:05:52,029 INFO L290 TraceCheckUtils]: 8: Hoare triple {3331#(<= main_~i~0 0)} [88] L22-3-->L22-2: Formula: (and (<= |v_main_#t~nondet6_2| 127) (<= 0 (+ |v_main_#t~nondet6_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_9) |v_main_#t~nondet6_2|)) |v_#memory_int_2|) (< v_main_~i~0_9 v_main_~MAX~0_9)) InVars {main_#t~nondet6=|v_main_#t~nondet6_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~MAX~0=v_main_~MAX~0_9} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_9, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, main_~MAX~0=v_main_~MAX~0_9} AuxVars[] AssignedVars[main_#t~nondet6, #memory_int] {3331#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:52,030 INFO L290 TraceCheckUtils]: 7: Hoare triple {3321#true} [85] L17-2-->L22-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= 0 v_main_~cont~0_1) (= |v_#length_1| (store (store |v_#length_3| |v_main_~#str1~0.base_1| v_main_~MAX~0_5) |v_main_~#str2~0.base_1| v_main_~MAX~0_5)) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (= v_main_~i~0_4 0) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, main_~MAX~0=v_main_~MAX~0_5, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_2, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_4, main_~#str1~0.base=|v_main_~#str1~0.base_1|, main_~cont~0=v_main_~cont~0_1, #length=|v_#length_1|, main_~MAX~0=v_main_~MAX~0_5} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, main_~cont~0, #length] {3331#(<= main_~i~0 0)} is VALID [2022-04-27 21:05:52,030 INFO L290 TraceCheckUtils]: 6: Hoare triple {3321#true} [84] L17-->L17-2: Formula: (< 0 v_main_~MAX~0_4) InVars {main_~MAX~0=v_main_~MAX~0_4} OutVars{main_~MAX~0=v_main_~MAX~0_4} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:52,030 INFO L290 TraceCheckUtils]: 5: Hoare triple {3321#true} [81] mainENTRY-->L17: Formula: (= (let ((.cse0 (mod |v_main_#t~nondet4_2| 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296)))) v_main_~MAX~0_1) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~MAX~0=v_main_~MAX~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~MAX~0] {3321#true} is VALID [2022-04-27 21:05:52,030 INFO L272 TraceCheckUtils]: 4: Hoare triple {3321#true} [78] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:52,030 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3321#true} {3321#true} [110] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:52,030 INFO L290 TraceCheckUtils]: 2: Hoare triple {3321#true} [82] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:52,030 INFO L290 TraceCheckUtils]: 1: Hoare triple {3321#true} [79] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3321#true} is VALID [2022-04-27 21:05:52,030 INFO L272 TraceCheckUtils]: 0: Hoare triple {3321#true} [77] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3321#true} is VALID [2022-04-27 21:05:52,030 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 16 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:52,031 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1276304818] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:05:52,031 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:05:52,031 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 10 [2022-04-27 21:05:52,031 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346658980] [2022-04-27 21:05:52,031 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:05:52,031 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 21:05:52,032 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:52,032 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:52,051 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:52,051 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 21:05:52,051 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:52,052 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 21:05:52,052 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2022-04-27 21:05:52,052 INFO L87 Difference]: Start difference. First operand 67 states and 75 transitions. Second operand has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:52,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:52,598 INFO L93 Difference]: Finished difference Result 128 states and 146 transitions. [2022-04-27 21:05:52,598 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-27 21:05:52,598 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 21:05:52,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:52,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:52,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 98 transitions. [2022-04-27 21:05:52,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:52,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 98 transitions. [2022-04-27 21:05:52,601 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 98 transitions. [2022-04-27 21:05:52,672 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:52,673 INFO L225 Difference]: With dead ends: 128 [2022-04-27 21:05:52,673 INFO L226 Difference]: Without dead ends: 106 [2022-04-27 21:05:52,674 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 65 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=146, Invalid=274, Unknown=0, NotChecked=0, Total=420 [2022-04-27 21:05:52,674 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 91 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 84 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 92 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 202 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 84 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:52,674 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [92 Valid, 32 Invalid, 202 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [84 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:05:52,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-04-27 21:05:52,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 75. [2022-04-27 21:05:52,777 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:52,778 INFO L82 GeneralOperation]: Start isEquivalent. First operand 106 states. Second operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:52,778 INFO L74 IsIncluded]: Start isIncluded. First operand 106 states. Second operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:52,778 INFO L87 Difference]: Start difference. First operand 106 states. Second operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:52,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:52,780 INFO L93 Difference]: Finished difference Result 106 states and 120 transitions. [2022-04-27 21:05:52,781 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 120 transitions. [2022-04-27 21:05:52,781 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:52,781 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:52,781 INFO L74 IsIncluded]: Start isIncluded. First operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 106 states. [2022-04-27 21:05:52,781 INFO L87 Difference]: Start difference. First operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 106 states. [2022-04-27 21:05:52,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:52,783 INFO L93 Difference]: Finished difference Result 106 states and 120 transitions. [2022-04-27 21:05:52,783 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 120 transitions. [2022-04-27 21:05:52,784 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:52,784 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:52,784 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:52,784 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:52,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 63 states have (on average 1.1111111111111112) internal successors, (70), 66 states have internal predecessors, (70), 7 states have call successors, (7), 5 states have call predecessors, (7), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:05:52,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 82 transitions. [2022-04-27 21:05:52,786 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 82 transitions. Word has length 31 [2022-04-27 21:05:52,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:52,786 INFO L495 AbstractCegarLoop]: Abstraction has 75 states and 82 transitions. [2022-04-27 21:05:52,786 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.1) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:52,786 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 82 transitions. [2022-04-27 21:05:52,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 21:05:52,786 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:52,786 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:52,805 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 21:05:53,003 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:53,003 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:53,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:53,004 INFO L85 PathProgramCache]: Analyzing trace with hash -1779570578, now seen corresponding path program 2 times [2022-04-27 21:05:53,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:53,004 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1394191884] [2022-04-27 21:05:53,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:53,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:53,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-04-27 21:05:53,070 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-04-27 21:05:53,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-04-27 21:05:53,094 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-04-27 21:05:53,094 INFO L271 BasicCegarLoop]: Counterexample is feasible [2022-04-27 21:05:53,095 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-04-27 21:05:53,096 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-27 21:05:53,098 INFO L356 BasicCegarLoop]: Path program histogram: [5, 2, 1, 1, 1] [2022-04-27 21:05:53,101 INFO L176 ceAbstractionStarter]: Computing trace abstraction results [2022-04-27 21:05:53,135 WARN L170 areAnnotationChecker]: ULTIMATE.startENTRY has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: ULTIMATE.initENTRY has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: mainENTRY has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: __VERIFIER_assertENTRY has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: ULTIMATE.initFINAL has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L17 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L17 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L7 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L7 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: ULTIMATE.initEXIT has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L17-2 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L8 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L8 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L7-2 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L-1 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L22-3 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L22-3 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L22-3 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: __VERIFIER_assertEXIT has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L22-4 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L22-2 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L36-1 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L29-3 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L29-3 has no Hoare annotation [2022-04-27 21:05:53,136 WARN L170 areAnnotationChecker]: L29-3 has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: L35-2 has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: L29-4 has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: L29-2 has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: L35-3 has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: L35-3 has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: L35-3 has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: L35-4 has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: L36 has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: mainFINAL has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: mainEXIT has no Hoare annotation [2022-04-27 21:05:53,137 WARN L170 areAnnotationChecker]: ULTIMATE.startFINAL has no Hoare annotation [2022-04-27 21:05:53,137 INFO L163 areAnnotationChecker]: CFG has 0 edges. 0 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [2022-04-27 21:05:53,137 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 09:05:53 BasicIcfg [2022-04-27 21:05:53,137 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-04-27 21:05:53,138 INFO L158 Benchmark]: Toolchain (without parser) took 20273.22ms. Allocated memory was 228.6MB in the beginning and 359.7MB in the end (delta: 131.1MB). Free memory was 177.1MB in the beginning and 328.0MB in the end (delta: -150.9MB). There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 21:05:53,138 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 228.6MB. Free memory is still 193.7MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 21:05:53,139 INFO L158 Benchmark]: CACSL2BoogieTranslator took 256.59ms. Allocated memory is still 228.6MB. Free memory was 176.9MB in the beginning and 203.3MB in the end (delta: -26.4MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2022-04-27 21:05:53,139 INFO L158 Benchmark]: Boogie Preprocessor took 35.63ms. Allocated memory is still 228.6MB. Free memory was 203.3MB in the beginning and 201.4MB in the end (delta: 1.8MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-04-27 21:05:53,139 INFO L158 Benchmark]: RCFGBuilder took 363.32ms. Allocated memory is still 228.6MB. Free memory was 201.4MB in the beginning and 188.8MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2022-04-27 21:05:53,139 INFO L158 Benchmark]: IcfgTransformer took 49.66ms. Allocated memory is still 228.6MB. Free memory was 188.8MB in the beginning and 187.3MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-27 21:05:53,139 INFO L158 Benchmark]: TraceAbstraction took 19561.99ms. Allocated memory was 228.6MB in the beginning and 359.7MB in the end (delta: 131.1MB). Free memory was 186.7MB in the beginning and 328.0MB in the end (delta: -141.3MB). There was no memory consumed. Max. memory is 8.0GB. [2022-04-27 21:05:53,140 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 228.6MB. Free memory is still 193.7MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 256.59ms. Allocated memory is still 228.6MB. Free memory was 176.9MB in the beginning and 203.3MB in the end (delta: -26.4MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * Boogie Preprocessor took 35.63ms. Allocated memory is still 228.6MB. Free memory was 203.3MB in the beginning and 201.4MB in the end (delta: 1.8MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 363.32ms. Allocated memory is still 228.6MB. Free memory was 201.4MB in the beginning and 188.8MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * IcfgTransformer took 49.66ms. Allocated memory is still 228.6MB. Free memory was 188.8MB in the beginning and 187.3MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * TraceAbstraction took 19561.99ms. Allocated memory was 228.6MB in the beginning and 359.7MB in the end (delta: 131.1MB). Free memory was 186.7MB in the beginning and 328.0MB in the end (delta: -141.3MB). There was no memory consumed. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 8]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L16] int MAX = __VERIFIER_nondet_uint(); [L17] COND FALSE !(!(MAX > 0)) VAL [MAX=2] [L18] char str1[MAX], str2[MAX]; [L19] int cont, i, j; [L20] cont = 0 [L22] i=0 VAL [cont=0, i=0, MAX=2, str1={5:0}, str2={4:0}] [L22] COND TRUE i= 0 [L30] EXPR str1[0] [L30] str2[j] = str1[0] [L31] j++ VAL [cont=0, i=1, j=1, MAX=2, str1={5:0}, str2={4:0}] [L29] i-- VAL [cont=0, i=0, j=1, MAX=2, str1={5:0}, str2={4:0}] [L29] COND TRUE i >= 0 [L30] EXPR str1[0] [L30] str2[j] = str1[0] [L31] j++ VAL [cont=0, i=0, j=2, MAX=2, str1={5:0}, str2={4:0}] [L29] i-- VAL [cont=0, i=-1, j=2, MAX=2, str1={5:0}, str2={4:0}] [L29] COND FALSE !(i >= 0) VAL [cont=0, i=-1, j=2, MAX=2, str1={5:0}, str2={4:0}] [L34] j = MAX-1 [L35] i=0 VAL [cont=0, i=0, j=1, MAX=2, str1={5:0}, str2={4:0}] [L35] COND TRUE i