/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loop-lit/mcmillan2006.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 21:42:03,829 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 21:42:03,830 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 21:42:03,859 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-27 21:42:03,867 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 21:42:03,871 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 21:42:03,871 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 21:42:03,872 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 21:42:03,872 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 21:42:03,873 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 21:42:03,874 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 21:42:03,875 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 21:42:03,876 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 21:42:03,876 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 21:42:03,877 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 21:42:03,877 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 21:42:03,878 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 21:42:03,880 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 21:42:03,890 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 21:42:03,890 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 21:42:03,894 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 21:42:03,895 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 21:42:03,909 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 21:42:03,910 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 21:42:03,910 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 21:42:03,910 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 21:42:03,911 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 21:42:03,911 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 21:42:03,911 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 21:42:03,911 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 21:42:03,911 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 21:42:03,911 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 21:42:03,911 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 21:42:03,911 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 21:42:03,911 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 21:42:03,911 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 21:42:03,911 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 21:42:03,912 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 21:42:03,912 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 21:42:03,912 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 21:42:03,912 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 21:42:03,912 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:42:03,912 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 21:42:03,912 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 21:42:03,912 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 21:42:03,912 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 21:42:03,912 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 21:42:03,913 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 21:42:03,913 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 21:42:03,913 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 21:42:03,913 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 21:42:03,913 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 21:42:04,080 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 21:42:04,093 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 21:42:04,095 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 21:42:04,095 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 21:42:04,104 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 21:42:04,104 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-lit/mcmillan2006.i [2022-04-27 21:42:04,149 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/adf8e15ec/a564f5dce92b4d9fbea6a197462d8ce0/FLAG7b262b0bf [2022-04-27 21:42:04,496 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 21:42:04,496 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i [2022-04-27 21:42:04,500 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/adf8e15ec/a564f5dce92b4d9fbea6a197462d8ce0/FLAG7b262b0bf [2022-04-27 21:42:04,924 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/adf8e15ec/a564f5dce92b4d9fbea6a197462d8ce0 [2022-04-27 21:42:04,925 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 21:42:04,926 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 21:42:04,928 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 21:42:04,928 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 21:42:04,930 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 21:42:04,931 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:42:04" (1/1) ... [2022-04-27 21:42:04,932 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@14216472 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:04, skipping insertion in model container [2022-04-27 21:42:04,932 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:42:04" (1/1) ... [2022-04-27 21:42:04,937 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 21:42:04,948 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 21:42:05,063 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i[1009,1022] [2022-04-27 21:42:05,071 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:42:05,076 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 21:42:05,084 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i[1009,1022] [2022-04-27 21:42:05,087 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:42:05,095 INFO L208 MainTranslator]: Completed translation [2022-04-27 21:42:05,096 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:05 WrapperNode [2022-04-27 21:42:05,096 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 21:42:05,096 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 21:42:05,097 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 21:42:05,097 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 21:42:05,107 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:05" (1/1) ... [2022-04-27 21:42:05,107 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:05" (1/1) ... [2022-04-27 21:42:05,111 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:05" (1/1) ... [2022-04-27 21:42:05,111 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:05" (1/1) ... [2022-04-27 21:42:05,117 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:05" (1/1) ... [2022-04-27 21:42:05,120 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:05" (1/1) ... [2022-04-27 21:42:05,120 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:05" (1/1) ... [2022-04-27 21:42:05,124 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 21:42:05,125 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 21:42:05,125 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 21:42:05,125 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 21:42:05,126 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:05" (1/1) ... [2022-04-27 21:42:05,132 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:42:05,142 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:42:05,150 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 21:42:05,152 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 21:42:05,175 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 21:42:05,175 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 21:42:05,175 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 21:42:05,175 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-27 21:42:05,176 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 21:42:05,176 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 21:42:05,176 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-27 21:42:05,176 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 21:42:05,176 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 21:42:05,176 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_perror_fail [2022-04-27 21:42:05,176 INFO L130 BoogieDeclarations]: Found specification of procedure __assert [2022-04-27 21:42:05,176 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 21:42:05,176 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 21:42:05,176 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-27 21:42:05,176 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 21:42:05,176 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-27 21:42:05,177 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 21:42:05,177 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-27 21:42:05,177 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 21:42:05,177 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 21:42:05,177 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 21:42:05,177 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 21:42:05,177 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 21:42:05,177 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 21:42:05,220 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 21:42:05,221 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 21:42:05,368 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 21:42:05,383 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 21:42:05,383 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-27 21:42:05,386 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:42:05 BoogieIcfgContainer [2022-04-27 21:42:05,386 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 21:42:05,387 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 21:42:05,387 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 21:42:05,387 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 21:42:05,389 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:42:05" (1/1) ... [2022-04-27 21:42:05,392 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 21:42:05,412 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:42:05 BasicIcfg [2022-04-27 21:42:05,412 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 21:42:05,413 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 21:42:05,414 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 21:42:05,416 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 21:42:05,416 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 09:42:04" (1/4) ... [2022-04-27 21:42:05,432 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4b76b6d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:42:05, skipping insertion in model container [2022-04-27 21:42:05,433 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:42:05" (2/4) ... [2022-04-27 21:42:05,433 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4b76b6d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:42:05, skipping insertion in model container [2022-04-27 21:42:05,433 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:42:05" (3/4) ... [2022-04-27 21:42:05,433 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4b76b6d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 09:42:05, skipping insertion in model container [2022-04-27 21:42:05,433 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:42:05" (4/4) ... [2022-04-27 21:42:05,434 INFO L111 eAbstractionObserver]: Analyzing ICFG mcmillan2006.iqvasr [2022-04-27 21:42:05,443 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 21:42:05,444 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 21:42:05,479 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 21:42:05,483 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@12ea3d3c, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@39daad2 [2022-04-27 21:42:05,483 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 21:42:05,488 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:42:05,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 21:42:05,493 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:42:05,494 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:42:05,494 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:42:05,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:42:05,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1476197606, now seen corresponding path program 1 times [2022-04-27 21:42:05,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:42:05,503 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [362996012] [2022-04-27 21:42:05,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:05,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:42:05,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:05,667 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:42:05,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:05,681 INFO L290 TraceCheckUtils]: 0: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-27 21:42:05,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {28#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 21:42:05,682 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28#true} {28#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 21:42:05,684 INFO L272 TraceCheckUtils]: 0: Hoare triple {28#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:42:05,686 INFO L290 TraceCheckUtils]: 1: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-27 21:42:05,686 INFO L290 TraceCheckUtils]: 2: Hoare triple {28#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 21:42:05,686 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28#true} {28#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 21:42:05,686 INFO L272 TraceCheckUtils]: 4: Hoare triple {28#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-27 21:42:05,686 INFO L290 TraceCheckUtils]: 5: Hoare triple {28#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {28#true} is VALID [2022-04-27 21:42:05,687 INFO L290 TraceCheckUtils]: 6: Hoare triple {28#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {28#true} is VALID [2022-04-27 21:42:05,689 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#true} [82] L30-3-->L30-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 21:42:05,689 INFO L290 TraceCheckUtils]: 8: Hoare triple {29#false} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {29#false} is VALID [2022-04-27 21:42:05,689 INFO L290 TraceCheckUtils]: 9: Hoare triple {29#false} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {29#false} is VALID [2022-04-27 21:42:05,690 INFO L272 TraceCheckUtils]: 10: Hoare triple {29#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {29#false} is VALID [2022-04-27 21:42:05,690 INFO L290 TraceCheckUtils]: 11: Hoare triple {29#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29#false} is VALID [2022-04-27 21:42:05,690 INFO L290 TraceCheckUtils]: 12: Hoare triple {29#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 21:42:05,691 INFO L290 TraceCheckUtils]: 13: Hoare triple {29#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-27 21:42:05,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:05,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:42:05,692 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [362996012] [2022-04-27 21:42:05,692 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [362996012] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:42:05,692 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:42:05,692 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 21:42:05,695 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1757326303] [2022-04-27 21:42:05,695 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:42:05,699 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:42:05,700 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:42:05,702 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:05,725 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:05,725 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 21:42:05,726 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:42:05,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 21:42:05,759 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:42:05,760 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:05,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:05,831 INFO L93 Difference]: Finished difference Result 41 states and 49 transitions. [2022-04-27 21:42:05,831 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 21:42:05,832 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:42:05,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:42:05,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:05,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 49 transitions. [2022-04-27 21:42:05,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:05,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 49 transitions. [2022-04-27 21:42:05,847 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 49 transitions. [2022-04-27 21:42:05,898 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:05,906 INFO L225 Difference]: With dead ends: 41 [2022-04-27 21:42:05,906 INFO L226 Difference]: Without dead ends: 20 [2022-04-27 21:42:05,908 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:42:05,911 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 18 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:42:05,912 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 29 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:42:05,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-04-27 21:42:05,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-04-27 21:42:05,932 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:42:05,933 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:42:05,934 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:42:05,934 INFO L87 Difference]: Start difference. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:42:05,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:05,942 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-04-27 21:42:05,942 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-27 21:42:05,942 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:05,942 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:05,942 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 20 states. [2022-04-27 21:42:05,943 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 20 states. [2022-04-27 21:42:05,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:05,945 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-04-27 21:42:05,946 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-27 21:42:05,948 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:05,948 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:05,951 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:42:05,951 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:42:05,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:42:05,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 21 transitions. [2022-04-27 21:42:05,954 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 21 transitions. Word has length 14 [2022-04-27 21:42:05,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:42:05,954 INFO L495 AbstractCegarLoop]: Abstraction has 20 states and 21 transitions. [2022-04-27 21:42:05,955 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:05,955 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-27 21:42:05,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 21:42:05,955 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:42:05,956 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:42:05,956 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 21:42:05,956 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:42:05,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:42:05,957 INFO L85 PathProgramCache]: Analyzing trace with hash -1931266009, now seen corresponding path program 1 times [2022-04-27 21:42:05,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:42:05,957 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1485157004] [2022-04-27 21:42:05,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:05,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:42:05,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:06,055 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:42:06,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:06,071 INFO L290 TraceCheckUtils]: 0: Hoare triple {164#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {156#true} is VALID [2022-04-27 21:42:06,072 INFO L290 TraceCheckUtils]: 1: Hoare triple {156#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-27 21:42:06,072 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {156#true} {156#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-27 21:42:06,073 INFO L272 TraceCheckUtils]: 0: Hoare triple {156#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {164#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:42:06,073 INFO L290 TraceCheckUtils]: 1: Hoare triple {164#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {156#true} is VALID [2022-04-27 21:42:06,073 INFO L290 TraceCheckUtils]: 2: Hoare triple {156#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-27 21:42:06,074 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {156#true} {156#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-27 21:42:06,074 INFO L272 TraceCheckUtils]: 4: Hoare triple {156#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {156#true} is VALID [2022-04-27 21:42:06,074 INFO L290 TraceCheckUtils]: 5: Hoare triple {156#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {156#true} is VALID [2022-04-27 21:42:06,074 INFO L290 TraceCheckUtils]: 6: Hoare triple {156#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {161#(= main_~i~0 0)} is VALID [2022-04-27 21:42:06,075 INFO L290 TraceCheckUtils]: 7: Hoare triple {161#(= main_~i~0 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {162#(<= main_~n~0 0)} is VALID [2022-04-27 21:42:06,075 INFO L290 TraceCheckUtils]: 8: Hoare triple {162#(<= main_~n~0 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {163#(and (<= main_~n~0 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:06,076 INFO L290 TraceCheckUtils]: 9: Hoare triple {163#(and (<= main_~n~0 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {157#false} is VALID [2022-04-27 21:42:06,076 INFO L272 TraceCheckUtils]: 10: Hoare triple {157#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {157#false} is VALID [2022-04-27 21:42:06,076 INFO L290 TraceCheckUtils]: 11: Hoare triple {157#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {157#false} is VALID [2022-04-27 21:42:06,076 INFO L290 TraceCheckUtils]: 12: Hoare triple {157#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {157#false} is VALID [2022-04-27 21:42:06,077 INFO L290 TraceCheckUtils]: 13: Hoare triple {157#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {157#false} is VALID [2022-04-27 21:42:06,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:06,077 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:42:06,077 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1485157004] [2022-04-27 21:42:06,077 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1485157004] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:42:06,077 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:42:06,077 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-27 21:42:06,077 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [839325344] [2022-04-27 21:42:06,078 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:42:06,078 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:42:06,079 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:42:06,079 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:06,092 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:06,092 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 21:42:06,092 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:42:06,093 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 21:42:06,096 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-04-27 21:42:06,096 INFO L87 Difference]: Start difference. First operand 20 states and 21 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:06,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:06,223 INFO L93 Difference]: Finished difference Result 34 states and 36 transitions. [2022-04-27 21:42:06,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-27 21:42:06,223 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:42:06,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:42:06,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:06,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 36 transitions. [2022-04-27 21:42:06,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:06,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 36 transitions. [2022-04-27 21:42:06,231 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 36 transitions. [2022-04-27 21:42:06,257 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:06,259 INFO L225 Difference]: With dead ends: 34 [2022-04-27 21:42:06,259 INFO L226 Difference]: Without dead ends: 22 [2022-04-27 21:42:06,260 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2022-04-27 21:42:06,262 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 21 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:42:06,262 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 29 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:42:06,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-27 21:42:06,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2022-04-27 21:42:06,267 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:42:06,267 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:42:06,267 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:42:06,267 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:42:06,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:06,269 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2022-04-27 21:42:06,269 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2022-04-27 21:42:06,269 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:06,270 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:06,270 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-27 21:42:06,270 INFO L87 Difference]: Start difference. First operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-27 21:42:06,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:06,271 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2022-04-27 21:42:06,272 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2022-04-27 21:42:06,272 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:06,272 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:06,272 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:42:06,272 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:42:06,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 21:42:06,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 22 transitions. [2022-04-27 21:42:06,275 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 22 transitions. Word has length 14 [2022-04-27 21:42:06,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:42:06,275 INFO L495 AbstractCegarLoop]: Abstraction has 21 states and 22 transitions. [2022-04-27 21:42:06,276 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:06,277 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 22 transitions. [2022-04-27 21:42:06,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 21:42:06,277 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:42:06,278 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:42:06,278 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 21:42:06,278 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:42:06,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:42:06,278 INFO L85 PathProgramCache]: Analyzing trace with hash -1791050651, now seen corresponding path program 1 times [2022-04-27 21:42:06,279 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:42:06,279 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1410674119] [2022-04-27 21:42:06,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:06,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:42:06,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:06,458 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:42:06,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:06,468 INFO L290 TraceCheckUtils]: 0: Hoare triple {306#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-27 21:42:06,469 INFO L290 TraceCheckUtils]: 1: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,469 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,469 INFO L272 TraceCheckUtils]: 0: Hoare triple {294#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {306#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:42:06,470 INFO L290 TraceCheckUtils]: 1: Hoare triple {306#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-27 21:42:06,470 INFO L290 TraceCheckUtils]: 2: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,470 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,471 INFO L272 TraceCheckUtils]: 4: Hoare triple {294#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,471 INFO L290 TraceCheckUtils]: 5: Hoare triple {294#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {294#true} is VALID [2022-04-27 21:42:06,472 INFO L290 TraceCheckUtils]: 6: Hoare triple {294#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-27 21:42:06,473 INFO L290 TraceCheckUtils]: 7: Hoare triple {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {300#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-27 21:42:06,475 INFO L290 TraceCheckUtils]: 8: Hoare triple {300#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= main_~x~0.offset 0) (= main_~i~0 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-27 21:42:06,476 INFO L290 TraceCheckUtils]: 9: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-27 21:42:06,477 INFO L290 TraceCheckUtils]: 10: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:06,480 INFO L290 TraceCheckUtils]: 11: Hoare triple {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {303#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:06,480 INFO L272 TraceCheckUtils]: 12: Hoare triple {303#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {304#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:42:06,481 INFO L290 TraceCheckUtils]: 13: Hoare triple {304#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {305#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:42:06,481 INFO L290 TraceCheckUtils]: 14: Hoare triple {305#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-27 21:42:06,482 INFO L290 TraceCheckUtils]: 15: Hoare triple {295#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-27 21:42:06,482 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:06,482 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:42:06,482 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1410674119] [2022-04-27 21:42:06,483 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1410674119] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:42:06,483 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1095259293] [2022-04-27 21:42:06,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:06,483 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:06,483 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:42:06,485 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:42:06,511 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 21:42:06,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:06,553 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-27 21:42:06,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:06,565 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:42:06,643 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-04-27 21:42:06,712 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-04-27 21:42:06,755 INFO L272 TraceCheckUtils]: 0: Hoare triple {294#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {294#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-27 21:42:06,755 INFO L290 TraceCheckUtils]: 2: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {294#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {294#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {294#true} is VALID [2022-04-27 21:42:06,757 INFO L290 TraceCheckUtils]: 6: Hoare triple {294#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-27 21:42:06,758 INFO L290 TraceCheckUtils]: 7: Hoare triple {299#(and (= main_~x~0.offset 0) (= main_~i~0 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-27 21:42:06,759 INFO L290 TraceCheckUtils]: 8: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-27 21:42:06,759 INFO L290 TraceCheckUtils]: 9: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-27 21:42:06,760 INFO L290 TraceCheckUtils]: 10: Hoare triple {301#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:06,760 INFO L290 TraceCheckUtils]: 11: Hoare triple {302#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {303#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:06,761 INFO L272 TraceCheckUtils]: 12: Hoare triple {303#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {346#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:42:06,761 INFO L290 TraceCheckUtils]: 13: Hoare triple {346#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {350#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:42:06,761 INFO L290 TraceCheckUtils]: 14: Hoare triple {350#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-27 21:42:06,762 INFO L290 TraceCheckUtils]: 15: Hoare triple {295#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-27 21:42:06,762 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:06,762 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:42:06,859 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-04-27 21:42:06,863 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2022-04-27 21:42:06,894 INFO L290 TraceCheckUtils]: 15: Hoare triple {295#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-27 21:42:06,894 INFO L290 TraceCheckUtils]: 14: Hoare triple {350#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {295#false} is VALID [2022-04-27 21:42:06,895 INFO L290 TraceCheckUtils]: 13: Hoare triple {346#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {350#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:42:06,895 INFO L272 TraceCheckUtils]: 12: Hoare triple {303#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {346#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:42:06,896 INFO L290 TraceCheckUtils]: 11: Hoare triple {369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {303#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:06,896 INFO L290 TraceCheckUtils]: 10: Hoare triple {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:42:06,898 INFO L290 TraceCheckUtils]: 9: Hoare triple {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-27 21:42:06,898 INFO L290 TraceCheckUtils]: 8: Hoare triple {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-27 21:42:06,898 INFO L290 TraceCheckUtils]: 7: Hoare triple {383#(= 0 (* main_~i~0 4))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {373#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-27 21:42:06,899 INFO L290 TraceCheckUtils]: 6: Hoare triple {294#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {383#(= 0 (* main_~i~0 4))} is VALID [2022-04-27 21:42:06,899 INFO L290 TraceCheckUtils]: 5: Hoare triple {294#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {294#true} is VALID [2022-04-27 21:42:06,899 INFO L272 TraceCheckUtils]: 4: Hoare triple {294#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,899 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {294#true} {294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,899 INFO L290 TraceCheckUtils]: 2: Hoare triple {294#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,900 INFO L290 TraceCheckUtils]: 1: Hoare triple {294#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {294#true} is VALID [2022-04-27 21:42:06,900 INFO L272 TraceCheckUtils]: 0: Hoare triple {294#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {294#true} is VALID [2022-04-27 21:42:06,900 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:06,900 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1095259293] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:42:06,900 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:42:06,900 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 15 [2022-04-27 21:42:06,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531437252] [2022-04-27 21:42:06,900 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:42:06,901 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 21:42:06,901 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:42:06,901 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:06,918 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:06,918 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 21:42:06,919 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:42:06,919 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 21:42:06,919 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-27 21:42:06,919 INFO L87 Difference]: Start difference. First operand 21 states and 22 transitions. Second operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:07,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:07,275 INFO L93 Difference]: Finished difference Result 32 states and 33 transitions. [2022-04-27 21:42:07,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 21:42:07,275 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 21:42:07,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:42:07,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:07,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 33 transitions. [2022-04-27 21:42:07,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:07,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 33 transitions. [2022-04-27 21:42:07,278 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 33 transitions. [2022-04-27 21:42:07,303 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:07,304 INFO L225 Difference]: With dead ends: 32 [2022-04-27 21:42:07,304 INFO L226 Difference]: Without dead ends: 30 [2022-04-27 21:42:07,304 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 26 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=412, Unknown=0, NotChecked=0, Total=506 [2022-04-27 21:42:07,305 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 41 mSDsluCounter, 40 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 156 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:42:07,305 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [41 Valid, 54 Invalid, 156 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:42:07,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-27 21:42:07,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 27. [2022-04-27 21:42:07,308 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:42:07,308 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:42:07,308 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:42:07,309 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:42:07,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:07,310 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-27 21:42:07,310 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-27 21:42:07,310 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:07,310 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:07,310 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-27 21:42:07,310 INFO L87 Difference]: Start difference. First operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-27 21:42:07,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:07,311 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-27 21:42:07,311 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-27 21:42:07,312 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:07,312 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:07,312 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:42:07,312 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:42:07,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:42:07,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2022-04-27 21:42:07,313 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 16 [2022-04-27 21:42:07,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:42:07,313 INFO L495 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-04-27 21:42:07,313 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:42:07,313 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2022-04-27 21:42:07,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-27 21:42:07,314 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:42:07,314 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:42:07,330 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 21:42:07,527 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:07,527 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:42:07,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:42:07,527 INFO L85 PathProgramCache]: Analyzing trace with hash 1619165115, now seen corresponding path program 1 times [2022-04-27 21:42:07,527 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:42:07,528 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2008800302] [2022-04-27 21:42:07,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:07,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:42:07,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:07,594 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:42:07,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:07,602 INFO L290 TraceCheckUtils]: 0: Hoare triple {580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-27 21:42:07,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,603 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,603 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-04-27 21:42:07,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:07,614 INFO L290 TraceCheckUtils]: 0: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-27 21:42:07,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-27 21:42:07,616 INFO L272 TraceCheckUtils]: 0: Hoare triple {566#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:42:07,616 INFO L290 TraceCheckUtils]: 1: Hoare triple {580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-27 21:42:07,616 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,616 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,616 INFO L272 TraceCheckUtils]: 4: Hoare triple {566#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,623 INFO L290 TraceCheckUtils]: 5: Hoare triple {566#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {566#true} is VALID [2022-04-27 21:42:07,623 INFO L290 TraceCheckUtils]: 6: Hoare triple {566#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {571#(= main_~i~0 0)} is VALID [2022-04-27 21:42:07,624 INFO L290 TraceCheckUtils]: 7: Hoare triple {571#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {571#(= main_~i~0 0)} is VALID [2022-04-27 21:42:07,624 INFO L290 TraceCheckUtils]: 8: Hoare triple {571#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {572#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:07,625 INFO L290 TraceCheckUtils]: 9: Hoare triple {572#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {573#(<= main_~n~0 1)} is VALID [2022-04-27 21:42:07,625 INFO L290 TraceCheckUtils]: 10: Hoare triple {573#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-27 21:42:07,626 INFO L290 TraceCheckUtils]: 11: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-27 21:42:07,626 INFO L272 TraceCheckUtils]: 12: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {566#true} is VALID [2022-04-27 21:42:07,626 INFO L290 TraceCheckUtils]: 13: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-27 21:42:07,626 INFO L290 TraceCheckUtils]: 14: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,626 INFO L290 TraceCheckUtils]: 15: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,630 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {566#true} {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-27 21:42:07,630 INFO L290 TraceCheckUtils]: 17: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {574#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-27 21:42:07,631 INFO L290 TraceCheckUtils]: 18: Hoare triple {574#(and (<= main_~n~0 1) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {579#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:42:07,632 INFO L290 TraceCheckUtils]: 19: Hoare triple {579#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {567#false} is VALID [2022-04-27 21:42:07,632 INFO L272 TraceCheckUtils]: 20: Hoare triple {567#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {567#false} is VALID [2022-04-27 21:42:07,632 INFO L290 TraceCheckUtils]: 21: Hoare triple {567#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {567#false} is VALID [2022-04-27 21:42:07,632 INFO L290 TraceCheckUtils]: 22: Hoare triple {567#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-27 21:42:07,632 INFO L290 TraceCheckUtils]: 23: Hoare triple {567#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-27 21:42:07,632 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:07,632 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:42:07,632 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2008800302] [2022-04-27 21:42:07,633 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2008800302] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:42:07,633 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1590021122] [2022-04-27 21:42:07,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:07,633 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:07,633 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:42:07,634 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:42:07,635 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 21:42:07,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:07,668 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-27 21:42:07,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:07,679 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:42:07,832 INFO L272 TraceCheckUtils]: 0: Hoare triple {566#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,832 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-27 21:42:07,832 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,832 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,832 INFO L272 TraceCheckUtils]: 4: Hoare triple {566#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,833 INFO L290 TraceCheckUtils]: 5: Hoare triple {566#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {566#true} is VALID [2022-04-27 21:42:07,839 INFO L290 TraceCheckUtils]: 6: Hoare triple {566#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {602#(<= main_~i~0 0)} is VALID [2022-04-27 21:42:07,840 INFO L290 TraceCheckUtils]: 7: Hoare triple {602#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {602#(<= main_~i~0 0)} is VALID [2022-04-27 21:42:07,840 INFO L290 TraceCheckUtils]: 8: Hoare triple {602#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {572#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:07,841 INFO L290 TraceCheckUtils]: 9: Hoare triple {572#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {573#(<= main_~n~0 1)} is VALID [2022-04-27 21:42:07,841 INFO L290 TraceCheckUtils]: 10: Hoare triple {573#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-27 21:42:07,841 INFO L290 TraceCheckUtils]: 11: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-27 21:42:07,842 INFO L272 TraceCheckUtils]: 12: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {566#true} is VALID [2022-04-27 21:42:07,842 INFO L290 TraceCheckUtils]: 13: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-27 21:42:07,842 INFO L290 TraceCheckUtils]: 14: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,842 INFO L290 TraceCheckUtils]: 15: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,842 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {566#true} {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-27 21:42:07,843 INFO L290 TraceCheckUtils]: 17: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-27 21:42:07,843 INFO L290 TraceCheckUtils]: 18: Hoare triple {615#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {640#(and (<= 1 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-27 21:42:07,845 INFO L290 TraceCheckUtils]: 19: Hoare triple {640#(and (<= 1 main_~i~1) (<= main_~n~0 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {567#false} is VALID [2022-04-27 21:42:07,845 INFO L272 TraceCheckUtils]: 20: Hoare triple {567#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {567#false} is VALID [2022-04-27 21:42:07,845 INFO L290 TraceCheckUtils]: 21: Hoare triple {567#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {567#false} is VALID [2022-04-27 21:42:07,845 INFO L290 TraceCheckUtils]: 22: Hoare triple {567#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-27 21:42:07,845 INFO L290 TraceCheckUtils]: 23: Hoare triple {567#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-27 21:42:07,845 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:07,845 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:42:07,987 INFO L290 TraceCheckUtils]: 23: Hoare triple {567#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-27 21:42:07,987 INFO L290 TraceCheckUtils]: 22: Hoare triple {567#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {567#false} is VALID [2022-04-27 21:42:07,987 INFO L290 TraceCheckUtils]: 21: Hoare triple {567#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {567#false} is VALID [2022-04-27 21:42:07,987 INFO L272 TraceCheckUtils]: 20: Hoare triple {567#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {567#false} is VALID [2022-04-27 21:42:07,988 INFO L290 TraceCheckUtils]: 19: Hoare triple {579#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {567#false} is VALID [2022-04-27 21:42:07,989 INFO L290 TraceCheckUtils]: 18: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {579#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:42:07,989 INFO L290 TraceCheckUtils]: 17: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:07,989 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {566#true} {671#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:07,990 INFO L290 TraceCheckUtils]: 15: Hoare triple {566#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,990 INFO L290 TraceCheckUtils]: 14: Hoare triple {566#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,990 INFO L290 TraceCheckUtils]: 13: Hoare triple {566#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {566#true} is VALID [2022-04-27 21:42:07,990 INFO L272 TraceCheckUtils]: 12: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {566#true} is VALID [2022-04-27 21:42:07,990 INFO L290 TraceCheckUtils]: 11: Hoare triple {671#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:07,990 INFO L290 TraceCheckUtils]: 10: Hoare triple {573#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {671#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:07,991 INFO L290 TraceCheckUtils]: 9: Hoare triple {572#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {573#(<= main_~n~0 1)} is VALID [2022-04-27 21:42:07,991 INFO L290 TraceCheckUtils]: 8: Hoare triple {602#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {572#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:07,992 INFO L290 TraceCheckUtils]: 7: Hoare triple {602#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {602#(<= main_~i~0 0)} is VALID [2022-04-27 21:42:07,992 INFO L290 TraceCheckUtils]: 6: Hoare triple {566#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {602#(<= main_~i~0 0)} is VALID [2022-04-27 21:42:07,992 INFO L290 TraceCheckUtils]: 5: Hoare triple {566#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {566#true} is VALID [2022-04-27 21:42:07,992 INFO L272 TraceCheckUtils]: 4: Hoare triple {566#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,992 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {566#true} {566#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,992 INFO L290 TraceCheckUtils]: 2: Hoare triple {566#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,993 INFO L290 TraceCheckUtils]: 1: Hoare triple {566#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {566#true} is VALID [2022-04-27 21:42:07,993 INFO L272 TraceCheckUtils]: 0: Hoare triple {566#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {566#true} is VALID [2022-04-27 21:42:07,993 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:07,993 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1590021122] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:42:07,993 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:42:07,993 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 12 [2022-04-27 21:42:07,993 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164091300] [2022-04-27 21:42:07,993 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:42:07,994 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 24 [2022-04-27 21:42:07,994 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:42:07,994 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:08,023 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:08,024 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-27 21:42:08,024 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:42:08,024 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-27 21:42:08,024 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-04-27 21:42:08,024 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:08,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:08,250 INFO L93 Difference]: Finished difference Result 46 states and 49 transitions. [2022-04-27 21:42:08,250 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 21:42:08,251 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 24 [2022-04-27 21:42:08,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:42:08,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:08,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 43 transitions. [2022-04-27 21:42:08,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:08,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 43 transitions. [2022-04-27 21:42:08,254 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 43 transitions. [2022-04-27 21:42:08,294 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:08,295 INFO L225 Difference]: With dead ends: 46 [2022-04-27 21:42:08,295 INFO L226 Difference]: Without dead ends: 30 [2022-04-27 21:42:08,295 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2022-04-27 21:42:08,296 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 29 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 105 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:42:08,297 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 42 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 105 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:42:08,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-27 21:42:08,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2022-04-27 21:42:08,317 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:42:08,317 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:42:08,317 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:42:08,317 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:42:08,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:08,319 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-27 21:42:08,319 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-27 21:42:08,319 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:08,319 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:08,319 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-27 21:42:08,319 INFO L87 Difference]: Start difference. First operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-27 21:42:08,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:08,321 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-27 21:42:08,321 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-27 21:42:08,321 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:08,321 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:08,321 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:42:08,321 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:42:08,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:42:08,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2022-04-27 21:42:08,322 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 30 transitions. Word has length 24 [2022-04-27 21:42:08,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:42:08,322 INFO L495 AbstractCegarLoop]: Abstraction has 29 states and 30 transitions. [2022-04-27 21:42:08,322 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:08,322 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 30 transitions. [2022-04-27 21:42:08,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 21:42:08,323 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:42:08,323 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:42:08,341 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 21:42:08,531 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 21:42:08,531 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:42:08,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:42:08,532 INFO L85 PathProgramCache]: Analyzing trace with hash -290697607, now seen corresponding path program 2 times [2022-04-27 21:42:08,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:42:08,532 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1831022908] [2022-04-27 21:42:08,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:08,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:42:08,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:08,641 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:42:08,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:08,647 INFO L290 TraceCheckUtils]: 0: Hoare triple {923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-27 21:42:08,647 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:08,647 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:08,647 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-04-27 21:42:08,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:08,652 INFO L290 TraceCheckUtils]: 0: Hoare triple {905#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {905#true} is VALID [2022-04-27 21:42:08,652 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:08,652 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:08,653 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:08,653 INFO L272 TraceCheckUtils]: 0: Hoare triple {905#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:42:08,653 INFO L290 TraceCheckUtils]: 1: Hoare triple {923#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-27 21:42:08,653 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:08,653 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:08,654 INFO L272 TraceCheckUtils]: 4: Hoare triple {905#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:08,654 INFO L290 TraceCheckUtils]: 5: Hoare triple {905#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {905#true} is VALID [2022-04-27 21:42:08,654 INFO L290 TraceCheckUtils]: 6: Hoare triple {905#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {910#(= main_~i~0 0)} is VALID [2022-04-27 21:42:08,654 INFO L290 TraceCheckUtils]: 7: Hoare triple {910#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {910#(= main_~i~0 0)} is VALID [2022-04-27 21:42:08,655 INFO L290 TraceCheckUtils]: 8: Hoare triple {910#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:08,655 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {912#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:08,656 INFO L290 TraceCheckUtils]: 10: Hoare triple {912#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 21:42:08,656 INFO L290 TraceCheckUtils]: 11: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 21:42:08,656 INFO L290 TraceCheckUtils]: 12: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:08,657 INFO L290 TraceCheckUtils]: 13: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:08,657 INFO L272 TraceCheckUtils]: 14: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {905#true} is VALID [2022-04-27 21:42:08,657 INFO L290 TraceCheckUtils]: 15: Hoare triple {905#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {905#true} is VALID [2022-04-27 21:42:08,657 INFO L290 TraceCheckUtils]: 16: Hoare triple {905#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:08,657 INFO L290 TraceCheckUtils]: 17: Hoare triple {905#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:08,659 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {905#true} {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:08,660 INFO L290 TraceCheckUtils]: 19: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:08,660 INFO L290 TraceCheckUtils]: 20: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:42:08,660 INFO L290 TraceCheckUtils]: 21: Hoare triple {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {920#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:08,661 INFO L272 TraceCheckUtils]: 22: Hoare triple {920#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {921#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:42:08,661 INFO L290 TraceCheckUtils]: 23: Hoare triple {921#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {922#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:42:08,661 INFO L290 TraceCheckUtils]: 24: Hoare triple {922#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-27 21:42:08,661 INFO L290 TraceCheckUtils]: 25: Hoare triple {906#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-27 21:42:08,662 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:08,662 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:42:08,662 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1831022908] [2022-04-27 21:42:08,662 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1831022908] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:42:08,662 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [665307611] [2022-04-27 21:42:08,662 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:42:08,662 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:08,662 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:42:08,663 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:42:08,664 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 21:42:08,701 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:42:08,702 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:42:08,702 INFO L263 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-27 21:42:08,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:08,711 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:42:08,776 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:42:11,053 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:42:11,088 INFO L272 TraceCheckUtils]: 0: Hoare triple {905#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:11,089 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-27 21:42:11,092 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:11,092 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:11,092 INFO L272 TraceCheckUtils]: 4: Hoare triple {905#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:11,092 INFO L290 TraceCheckUtils]: 5: Hoare triple {905#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {905#true} is VALID [2022-04-27 21:42:11,092 INFO L290 TraceCheckUtils]: 6: Hoare triple {905#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {910#(= main_~i~0 0)} is VALID [2022-04-27 21:42:11,093 INFO L290 TraceCheckUtils]: 7: Hoare triple {910#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {910#(= main_~i~0 0)} is VALID [2022-04-27 21:42:11,093 INFO L290 TraceCheckUtils]: 8: Hoare triple {910#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:11,093 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 21:42:11,094 INFO L290 TraceCheckUtils]: 10: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 21:42:11,094 INFO L290 TraceCheckUtils]: 11: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 21:42:11,094 INFO L290 TraceCheckUtils]: 12: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:11,095 INFO L290 TraceCheckUtils]: 13: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:11,099 INFO L272 TraceCheckUtils]: 14: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-27 21:42:11,100 INFO L290 TraceCheckUtils]: 15: Hoare triple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-27 21:42:11,100 INFO L290 TraceCheckUtils]: 16: Hoare triple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-27 21:42:11,100 INFO L290 TraceCheckUtils]: 17: Hoare triple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-27 21:42:11,101 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {969#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:11,101 INFO L290 TraceCheckUtils]: 19: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:11,102 INFO L290 TraceCheckUtils]: 20: Hoare triple {914#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {988#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:42:11,102 INFO L290 TraceCheckUtils]: 21: Hoare triple {988#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {920#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:11,102 INFO L272 TraceCheckUtils]: 22: Hoare triple {920#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {995#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:42:11,103 INFO L290 TraceCheckUtils]: 23: Hoare triple {995#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {999#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:42:11,103 INFO L290 TraceCheckUtils]: 24: Hoare triple {999#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-27 21:42:11,103 INFO L290 TraceCheckUtils]: 25: Hoare triple {906#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-27 21:42:11,103 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:11,103 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:42:13,258 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:42:13,263 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:42:13,303 INFO L290 TraceCheckUtils]: 25: Hoare triple {906#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-27 21:42:13,303 INFO L290 TraceCheckUtils]: 24: Hoare triple {999#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {906#false} is VALID [2022-04-27 21:42:13,303 INFO L290 TraceCheckUtils]: 23: Hoare triple {995#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {999#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:42:13,304 INFO L272 TraceCheckUtils]: 22: Hoare triple {920#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {995#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:42:13,304 INFO L290 TraceCheckUtils]: 21: Hoare triple {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {920#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:13,305 INFO L290 TraceCheckUtils]: 20: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {919#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:42:13,305 INFO L290 TraceCheckUtils]: 19: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:13,306 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {905#true} {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:13,306 INFO L290 TraceCheckUtils]: 17: Hoare triple {905#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:13,306 INFO L290 TraceCheckUtils]: 16: Hoare triple {905#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:13,306 INFO L290 TraceCheckUtils]: 15: Hoare triple {905#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {905#true} is VALID [2022-04-27 21:42:13,306 INFO L272 TraceCheckUtils]: 14: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {905#true} is VALID [2022-04-27 21:42:13,307 INFO L290 TraceCheckUtils]: 13: Hoare triple {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:13,308 INFO L290 TraceCheckUtils]: 12: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1021#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:13,308 INFO L290 TraceCheckUtils]: 11: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 21:42:13,308 INFO L290 TraceCheckUtils]: 10: Hoare triple {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 21:42:13,309 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {913#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-27 21:42:13,309 INFO L290 TraceCheckUtils]: 8: Hoare triple {910#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {911#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:13,310 INFO L290 TraceCheckUtils]: 7: Hoare triple {910#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {910#(= main_~i~0 0)} is VALID [2022-04-27 21:42:13,310 INFO L290 TraceCheckUtils]: 6: Hoare triple {905#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {910#(= main_~i~0 0)} is VALID [2022-04-27 21:42:13,310 INFO L290 TraceCheckUtils]: 5: Hoare triple {905#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {905#true} is VALID [2022-04-27 21:42:13,310 INFO L272 TraceCheckUtils]: 4: Hoare triple {905#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:13,310 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {905#true} {905#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:13,310 INFO L290 TraceCheckUtils]: 2: Hoare triple {905#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:13,310 INFO L290 TraceCheckUtils]: 1: Hoare triple {905#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {905#true} is VALID [2022-04-27 21:42:13,310 INFO L272 TraceCheckUtils]: 0: Hoare triple {905#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {905#true} is VALID [2022-04-27 21:42:13,311 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:42:13,311 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [665307611] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:42:13,311 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:42:13,311 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 17 [2022-04-27 21:42:13,311 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [500920676] [2022-04-27 21:42:13,311 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:42:13,312 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 26 [2022-04-27 21:42:13,312 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:42:13,312 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-27 21:42:13,349 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:13,349 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-27 21:42:13,349 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:42:13,349 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-27 21:42:13,349 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=227, Unknown=2, NotChecked=0, Total=272 [2022-04-27 21:42:13,349 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. Second operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-27 21:42:13,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:13,897 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-27 21:42:13,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-27 21:42:13,898 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 26 [2022-04-27 21:42:13,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:42:13,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-27 21:42:13,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 43 transitions. [2022-04-27 21:42:13,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-27 21:42:13,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 43 transitions. [2022-04-27 21:42:13,901 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 43 transitions. [2022-04-27 21:42:13,936 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:13,936 INFO L225 Difference]: With dead ends: 42 [2022-04-27 21:42:13,936 INFO L226 Difference]: Without dead ends: 40 [2022-04-27 21:42:13,937 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 6 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=118, Invalid=636, Unknown=2, NotChecked=0, Total=756 [2022-04-27 21:42:13,937 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 42 mSDsluCounter, 61 mSDsCounter, 0 mSdLazyCounter, 230 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 296 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 230 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 46 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:42:13,937 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 80 Invalid, 296 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 230 Invalid, 0 Unknown, 46 Unchecked, 0.2s Time] [2022-04-27 21:42:13,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-27 21:42:13,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 37. [2022-04-27 21:42:13,943 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:42:13,944 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:13,944 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:13,944 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:13,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:13,946 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-27 21:42:13,946 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-27 21:42:13,946 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:13,946 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:13,946 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-27 21:42:13,946 INFO L87 Difference]: Start difference. First operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-27 21:42:13,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:13,948 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-27 21:42:13,948 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-27 21:42:13,948 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:13,948 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:13,948 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:42:13,948 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:42:13,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:13,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 38 transitions. [2022-04-27 21:42:13,949 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 38 transitions. Word has length 26 [2022-04-27 21:42:13,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:42:13,949 INFO L495 AbstractCegarLoop]: Abstraction has 37 states and 38 transitions. [2022-04-27 21:42:13,949 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-27 21:42:13,949 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 38 transitions. [2022-04-27 21:42:13,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 21:42:13,950 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:42:13,950 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:42:13,966 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 21:42:14,159 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:14,159 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:42:14,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:42:14,160 INFO L85 PathProgramCache]: Analyzing trace with hash -1718174257, now seen corresponding path program 3 times [2022-04-27 21:42:14,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:42:14,160 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930497213] [2022-04-27 21:42:14,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:14,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:42:14,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:14,246 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:42:14,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:14,253 INFO L290 TraceCheckUtils]: 0: Hoare triple {1318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-27 21:42:14,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,253 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,254 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-04-27 21:42:14,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:14,263 INFO L290 TraceCheckUtils]: 0: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-27 21:42:14,264 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,264 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,266 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-27 21:42:14,266 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 21:42:14,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:14,273 INFO L290 TraceCheckUtils]: 0: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-27 21:42:14,273 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,273 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,273 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1312#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:14,274 INFO L272 TraceCheckUtils]: 0: Hoare triple {1298#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:42:14,274 INFO L290 TraceCheckUtils]: 1: Hoare triple {1318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-27 21:42:14,274 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,274 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,274 INFO L272 TraceCheckUtils]: 4: Hoare triple {1298#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,274 INFO L290 TraceCheckUtils]: 5: Hoare triple {1298#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1298#true} is VALID [2022-04-27 21:42:14,274 INFO L290 TraceCheckUtils]: 6: Hoare triple {1298#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1303#(= main_~i~0 0)} is VALID [2022-04-27 21:42:14,275 INFO L290 TraceCheckUtils]: 7: Hoare triple {1303#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1303#(= main_~i~0 0)} is VALID [2022-04-27 21:42:14,275 INFO L290 TraceCheckUtils]: 8: Hoare triple {1303#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1304#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:14,275 INFO L290 TraceCheckUtils]: 9: Hoare triple {1304#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1304#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:14,276 INFO L290 TraceCheckUtils]: 10: Hoare triple {1304#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1305#(<= main_~i~0 2)} is VALID [2022-04-27 21:42:14,276 INFO L290 TraceCheckUtils]: 11: Hoare triple {1305#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1306#(<= main_~n~0 2)} is VALID [2022-04-27 21:42:14,276 INFO L290 TraceCheckUtils]: 12: Hoare triple {1306#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-27 21:42:14,277 INFO L290 TraceCheckUtils]: 13: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-27 21:42:14,277 INFO L272 TraceCheckUtils]: 14: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-27 21:42:14,277 INFO L290 TraceCheckUtils]: 15: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-27 21:42:14,277 INFO L290 TraceCheckUtils]: 16: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,277 INFO L290 TraceCheckUtils]: 17: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,277 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1298#true} {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-27 21:42:14,278 INFO L290 TraceCheckUtils]: 19: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-27 21:42:14,278 INFO L290 TraceCheckUtils]: 20: Hoare triple {1307#(and (<= main_~n~0 2) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:14,278 INFO L290 TraceCheckUtils]: 21: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:14,278 INFO L272 TraceCheckUtils]: 22: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-27 21:42:14,278 INFO L290 TraceCheckUtils]: 23: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-27 21:42:14,278 INFO L290 TraceCheckUtils]: 24: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,279 INFO L290 TraceCheckUtils]: 25: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,279 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1298#true} {1312#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:14,279 INFO L290 TraceCheckUtils]: 27: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:14,280 INFO L290 TraceCheckUtils]: 28: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1317#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:42:14,280 INFO L290 TraceCheckUtils]: 29: Hoare triple {1317#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1299#false} is VALID [2022-04-27 21:42:14,280 INFO L272 TraceCheckUtils]: 30: Hoare triple {1299#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1299#false} is VALID [2022-04-27 21:42:14,280 INFO L290 TraceCheckUtils]: 31: Hoare triple {1299#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1299#false} is VALID [2022-04-27 21:42:14,280 INFO L290 TraceCheckUtils]: 32: Hoare triple {1299#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-27 21:42:14,280 INFO L290 TraceCheckUtils]: 33: Hoare triple {1299#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-27 21:42:14,281 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:42:14,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:42:14,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930497213] [2022-04-27 21:42:14,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1930497213] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:42:14,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1854865209] [2022-04-27 21:42:14,282 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:42:14,282 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:14,282 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:42:14,283 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:42:14,284 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 21:42:14,324 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 21:42:14,324 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:42:14,325 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-27 21:42:14,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:14,335 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:42:14,539 INFO L272 TraceCheckUtils]: 0: Hoare triple {1298#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,539 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-27 21:42:14,539 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,539 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,539 INFO L272 TraceCheckUtils]: 4: Hoare triple {1298#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,539 INFO L290 TraceCheckUtils]: 5: Hoare triple {1298#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1298#true} is VALID [2022-04-27 21:42:14,540 INFO L290 TraceCheckUtils]: 6: Hoare triple {1298#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1340#(<= main_~i~0 0)} is VALID [2022-04-27 21:42:14,540 INFO L290 TraceCheckUtils]: 7: Hoare triple {1340#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1340#(<= main_~i~0 0)} is VALID [2022-04-27 21:42:14,540 INFO L290 TraceCheckUtils]: 8: Hoare triple {1340#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1304#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:14,542 INFO L290 TraceCheckUtils]: 9: Hoare triple {1304#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1304#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:14,542 INFO L290 TraceCheckUtils]: 10: Hoare triple {1304#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1305#(<= main_~i~0 2)} is VALID [2022-04-27 21:42:14,542 INFO L290 TraceCheckUtils]: 11: Hoare triple {1305#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1306#(<= main_~n~0 2)} is VALID [2022-04-27 21:42:14,543 INFO L290 TraceCheckUtils]: 12: Hoare triple {1306#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-27 21:42:14,543 INFO L290 TraceCheckUtils]: 13: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-27 21:42:14,544 INFO L272 TraceCheckUtils]: 14: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-27 21:42:14,544 INFO L290 TraceCheckUtils]: 15: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-27 21:42:14,544 INFO L290 TraceCheckUtils]: 16: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,544 INFO L290 TraceCheckUtils]: 17: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,544 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1298#true} {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-27 21:42:14,545 INFO L290 TraceCheckUtils]: 19: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-27 21:42:14,545 INFO L290 TraceCheckUtils]: 20: Hoare triple {1359#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-27 21:42:14,546 INFO L290 TraceCheckUtils]: 21: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-27 21:42:14,547 INFO L272 TraceCheckUtils]: 22: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-27 21:42:14,547 INFO L290 TraceCheckUtils]: 23: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-27 21:42:14,547 INFO L290 TraceCheckUtils]: 24: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,547 INFO L290 TraceCheckUtils]: 25: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,547 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1298#true} {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-27 21:42:14,548 INFO L290 TraceCheckUtils]: 27: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-27 21:42:14,548 INFO L290 TraceCheckUtils]: 28: Hoare triple {1384#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1409#(and (<= main_~n~0 2) (<= 2 main_~i~1))} is VALID [2022-04-27 21:42:14,549 INFO L290 TraceCheckUtils]: 29: Hoare triple {1409#(and (<= main_~n~0 2) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1299#false} is VALID [2022-04-27 21:42:14,549 INFO L272 TraceCheckUtils]: 30: Hoare triple {1299#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1299#false} is VALID [2022-04-27 21:42:14,549 INFO L290 TraceCheckUtils]: 31: Hoare triple {1299#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1299#false} is VALID [2022-04-27 21:42:14,549 INFO L290 TraceCheckUtils]: 32: Hoare triple {1299#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-27 21:42:14,549 INFO L290 TraceCheckUtils]: 33: Hoare triple {1299#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-27 21:42:14,549 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:42:14,549 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:42:14,698 INFO L290 TraceCheckUtils]: 33: Hoare triple {1299#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-27 21:42:14,699 INFO L290 TraceCheckUtils]: 32: Hoare triple {1299#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1299#false} is VALID [2022-04-27 21:42:14,699 INFO L290 TraceCheckUtils]: 31: Hoare triple {1299#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1299#false} is VALID [2022-04-27 21:42:14,699 INFO L272 TraceCheckUtils]: 30: Hoare triple {1299#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1299#false} is VALID [2022-04-27 21:42:14,699 INFO L290 TraceCheckUtils]: 29: Hoare triple {1317#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1299#false} is VALID [2022-04-27 21:42:14,700 INFO L290 TraceCheckUtils]: 28: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1317#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:42:14,700 INFO L290 TraceCheckUtils]: 27: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:14,701 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1298#true} {1312#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:14,701 INFO L290 TraceCheckUtils]: 25: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,701 INFO L290 TraceCheckUtils]: 24: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,701 INFO L290 TraceCheckUtils]: 23: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-27 21:42:14,701 INFO L272 TraceCheckUtils]: 22: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-27 21:42:14,701 INFO L290 TraceCheckUtils]: 21: Hoare triple {1312#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:14,702 INFO L290 TraceCheckUtils]: 20: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1312#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:42:14,702 INFO L290 TraceCheckUtils]: 19: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:42:14,703 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1298#true} {1464#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:42:14,703 INFO L290 TraceCheckUtils]: 17: Hoare triple {1298#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,703 INFO L290 TraceCheckUtils]: 16: Hoare triple {1298#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,703 INFO L290 TraceCheckUtils]: 15: Hoare triple {1298#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1298#true} is VALID [2022-04-27 21:42:14,704 INFO L272 TraceCheckUtils]: 14: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1298#true} is VALID [2022-04-27 21:42:14,704 INFO L290 TraceCheckUtils]: 13: Hoare triple {1464#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:42:14,705 INFO L290 TraceCheckUtils]: 12: Hoare triple {1306#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1464#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:42:14,706 INFO L290 TraceCheckUtils]: 11: Hoare triple {1305#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1306#(<= main_~n~0 2)} is VALID [2022-04-27 21:42:14,706 INFO L290 TraceCheckUtils]: 10: Hoare triple {1304#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1305#(<= main_~i~0 2)} is VALID [2022-04-27 21:42:14,707 INFO L290 TraceCheckUtils]: 9: Hoare triple {1304#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1304#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:14,707 INFO L290 TraceCheckUtils]: 8: Hoare triple {1340#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1304#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:14,707 INFO L290 TraceCheckUtils]: 7: Hoare triple {1340#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1340#(<= main_~i~0 0)} is VALID [2022-04-27 21:42:14,708 INFO L290 TraceCheckUtils]: 6: Hoare triple {1298#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1340#(<= main_~i~0 0)} is VALID [2022-04-27 21:42:14,708 INFO L290 TraceCheckUtils]: 5: Hoare triple {1298#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1298#true} is VALID [2022-04-27 21:42:14,708 INFO L272 TraceCheckUtils]: 4: Hoare triple {1298#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,708 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1298#true} {1298#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,708 INFO L290 TraceCheckUtils]: 2: Hoare triple {1298#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,708 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1298#true} is VALID [2022-04-27 21:42:14,708 INFO L272 TraceCheckUtils]: 0: Hoare triple {1298#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1298#true} is VALID [2022-04-27 21:42:14,708 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:42:14,709 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1854865209] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:42:14,709 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:42:14,709 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 15 [2022-04-27 21:42:14,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1910882452] [2022-04-27 21:42:14,709 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:42:14,711 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 34 [2022-04-27 21:42:14,711 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:42:14,712 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:42:14,741 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:14,741 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 21:42:14,741 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:42:14,741 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 21:42:14,741 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2022-04-27 21:42:14,742 INFO L87 Difference]: Start difference. First operand 37 states and 38 transitions. Second operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:42:15,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:15,101 INFO L93 Difference]: Finished difference Result 60 states and 64 transitions. [2022-04-27 21:42:15,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 21:42:15,101 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 34 [2022-04-27 21:42:15,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:42:15,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:42:15,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-27 21:42:15,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:42:15,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-27 21:42:15,104 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-27 21:42:15,143 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:15,144 INFO L225 Difference]: With dead ends: 60 [2022-04-27 21:42:15,144 INFO L226 Difference]: Without dead ends: 40 [2022-04-27 21:42:15,144 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=351, Unknown=0, NotChecked=0, Total=462 [2022-04-27 21:42:15,145 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 36 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:42:15,146 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [37 Valid, 54 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:42:15,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-27 21:42:15,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2022-04-27 21:42:15,157 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:42:15,157 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:15,157 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:15,157 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:15,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:15,158 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-27 21:42:15,158 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-27 21:42:15,159 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:15,159 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:15,159 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-27 21:42:15,159 INFO L87 Difference]: Start difference. First operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-27 21:42:15,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:15,161 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-27 21:42:15,161 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-27 21:42:15,162 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:15,162 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:15,162 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:42:15,162 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:42:15,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:15,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 40 transitions. [2022-04-27 21:42:15,163 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 40 transitions. Word has length 34 [2022-04-27 21:42:15,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:42:15,163 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 40 transitions. [2022-04-27 21:42:15,163 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:42:15,163 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 40 transitions. [2022-04-27 21:42:15,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-27 21:42:15,164 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:42:15,164 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:42:15,184 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 21:42:15,379 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:15,379 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:42:15,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:42:15,380 INFO L85 PathProgramCache]: Analyzing trace with hash -770459891, now seen corresponding path program 4 times [2022-04-27 21:42:15,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:42:15,380 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1932596079] [2022-04-27 21:42:15,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:15,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:42:15,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:15,531 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:42:15,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:15,536 INFO L290 TraceCheckUtils]: 0: Hoare triple {1786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1762#true} is VALID [2022-04-27 21:42:15,536 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,536 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1762#true} {1762#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,536 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 21:42:15,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:15,539 INFO L290 TraceCheckUtils]: 0: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-27 21:42:15,539 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,539 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,540 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:15,540 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-27 21:42:15,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:15,545 INFO L290 TraceCheckUtils]: 0: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-27 21:42:15,545 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,545 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,545 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:15,546 INFO L272 TraceCheckUtils]: 0: Hoare triple {1762#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:42:15,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {1786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1762#true} is VALID [2022-04-27 21:42:15,548 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,549 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1762#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,549 INFO L272 TraceCheckUtils]: 4: Hoare triple {1762#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,549 INFO L290 TraceCheckUtils]: 5: Hoare triple {1762#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1762#true} is VALID [2022-04-27 21:42:15,550 INFO L290 TraceCheckUtils]: 6: Hoare triple {1762#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1767#(= main_~i~0 0)} is VALID [2022-04-27 21:42:15,550 INFO L290 TraceCheckUtils]: 7: Hoare triple {1767#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1767#(= main_~i~0 0)} is VALID [2022-04-27 21:42:15,550 INFO L290 TraceCheckUtils]: 8: Hoare triple {1767#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:15,551 INFO L290 TraceCheckUtils]: 9: Hoare triple {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:15,551 INFO L290 TraceCheckUtils]: 10: Hoare triple {1768#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1769#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:15,552 INFO L290 TraceCheckUtils]: 11: Hoare triple {1769#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1770#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:15,552 INFO L290 TraceCheckUtils]: 12: Hoare triple {1770#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:15,552 INFO L290 TraceCheckUtils]: 13: Hoare triple {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:15,553 INFO L290 TraceCheckUtils]: 14: Hoare triple {1771#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:15,553 INFO L290 TraceCheckUtils]: 15: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:15,553 INFO L272 TraceCheckUtils]: 16: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1762#true} is VALID [2022-04-27 21:42:15,553 INFO L290 TraceCheckUtils]: 17: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-27 21:42:15,553 INFO L290 TraceCheckUtils]: 18: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,553 INFO L290 TraceCheckUtils]: 19: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,554 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1762#true} {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:15,554 INFO L290 TraceCheckUtils]: 21: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:15,554 INFO L290 TraceCheckUtils]: 22: Hoare triple {1772#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:15,555 INFO L290 TraceCheckUtils]: 23: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:15,555 INFO L272 TraceCheckUtils]: 24: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1762#true} is VALID [2022-04-27 21:42:15,555 INFO L290 TraceCheckUtils]: 25: Hoare triple {1762#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1762#true} is VALID [2022-04-27 21:42:15,555 INFO L290 TraceCheckUtils]: 26: Hoare triple {1762#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,555 INFO L290 TraceCheckUtils]: 27: Hoare triple {1762#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:15,555 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {1762#true} {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:15,556 INFO L290 TraceCheckUtils]: 29: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:15,556 INFO L290 TraceCheckUtils]: 30: Hoare triple {1777#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1782#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:42:15,557 INFO L290 TraceCheckUtils]: 31: Hoare triple {1782#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1783#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:15,557 INFO L272 TraceCheckUtils]: 32: Hoare triple {1783#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1784#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:42:15,557 INFO L290 TraceCheckUtils]: 33: Hoare triple {1784#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1785#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:42:15,558 INFO L290 TraceCheckUtils]: 34: Hoare triple {1785#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-27 21:42:15,558 INFO L290 TraceCheckUtils]: 35: Hoare triple {1763#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-27 21:42:15,558 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 4 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:42:15,558 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:42:15,558 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1932596079] [2022-04-27 21:42:15,558 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1932596079] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:42:15,558 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1074259313] [2022-04-27 21:42:15,558 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:42:15,558 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:15,558 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:42:15,559 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:42:15,560 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 21:42:15,602 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:42:15,602 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:42:15,603 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 21:42:15,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:15,615 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:42:15,702 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:42:17,679 INFO L356 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2022-04-27 21:42:17,680 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2022-04-27 21:42:17,752 INFO L272 TraceCheckUtils]: 0: Hoare triple {1762#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:17,752 INFO L290 TraceCheckUtils]: 1: Hoare triple {1762#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1762#true} is VALID [2022-04-27 21:42:17,752 INFO L290 TraceCheckUtils]: 2: Hoare triple {1762#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:17,753 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1762#true} {1762#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:17,753 INFO L272 TraceCheckUtils]: 4: Hoare triple {1762#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#true} is VALID [2022-04-27 21:42:17,753 INFO L290 TraceCheckUtils]: 5: Hoare triple {1762#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1762#true} is VALID [2022-04-27 21:42:17,753 INFO L290 TraceCheckUtils]: 6: Hoare triple {1762#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1808#(<= main_~i~0 0)} is VALID [2022-04-27 21:42:17,753 INFO L290 TraceCheckUtils]: 7: Hoare triple {1808#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1808#(<= main_~i~0 0)} is VALID [2022-04-27 21:42:17,754 INFO L290 TraceCheckUtils]: 8: Hoare triple {1808#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1815#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:17,754 INFO L290 TraceCheckUtils]: 9: Hoare triple {1815#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1815#(<= main_~i~0 1)} is VALID [2022-04-27 21:42:17,759 INFO L290 TraceCheckUtils]: 10: Hoare triple {1815#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1822#(<= main_~i~0 2)} is VALID [2022-04-27 21:42:17,760 INFO L290 TraceCheckUtils]: 11: Hoare triple {1822#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1826#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:17,762 INFO L290 TraceCheckUtils]: 12: Hoare triple {1826#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1830#(exists ((v_main_~i~0_22 Int)) (and (<= main_~i~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} is VALID [2022-04-27 21:42:17,762 INFO L290 TraceCheckUtils]: 13: Hoare triple {1830#(exists ((v_main_~i~0_22 Int)) (and (<= main_~i~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1834#(exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} is VALID [2022-04-27 21:42:17,763 INFO L290 TraceCheckUtils]: 14: Hoare triple {1834#(exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 21:42:17,764 INFO L290 TraceCheckUtils]: 15: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 21:42:17,771 INFO L272 TraceCheckUtils]: 16: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 21:42:17,771 INFO L290 TraceCheckUtils]: 17: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 21:42:17,772 INFO L290 TraceCheckUtils]: 18: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 21:42:17,772 INFO L290 TraceCheckUtils]: 19: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 21:42:17,773 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 21:42:17,773 INFO L290 TraceCheckUtils]: 21: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 21:42:17,774 INFO L290 TraceCheckUtils]: 22: Hoare triple {1838#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 21:42:17,775 INFO L290 TraceCheckUtils]: 23: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 21:42:17,782 INFO L272 TraceCheckUtils]: 24: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 21:42:17,782 INFO L290 TraceCheckUtils]: 25: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 21:42:17,782 INFO L290 TraceCheckUtils]: 26: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 21:42:17,783 INFO L290 TraceCheckUtils]: 27: Hoare triple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-27 21:42:17,783 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {1845#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 21:42:17,784 INFO L290 TraceCheckUtils]: 29: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-27 21:42:17,785 INFO L290 TraceCheckUtils]: 30: Hoare triple {1864#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1889#(and (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))) (<= 2 main_~i~1))} is VALID [2022-04-27 21:42:17,785 INFO L290 TraceCheckUtils]: 31: Hoare triple {1889#(and (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1783#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:17,786 INFO L272 TraceCheckUtils]: 32: Hoare triple {1783#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1896#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:42:17,786 INFO L290 TraceCheckUtils]: 33: Hoare triple {1896#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1900#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:42:17,786 INFO L290 TraceCheckUtils]: 34: Hoare triple {1900#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-27 21:42:17,787 INFO L290 TraceCheckUtils]: 35: Hoare triple {1763#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1763#false} is VALID [2022-04-27 21:42:17,787 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 15 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:42:17,787 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:42:18,053 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1074259313] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:42:18,053 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-27 21:42:18,054 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 26 [2022-04-27 21:42:18,058 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1795732921] [2022-04-27 21:42:18,059 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-27 21:42:18,060 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Word has length 36 [2022-04-27 21:42:18,060 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:42:18,060 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:42:18,133 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:18,133 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-27 21:42:18,133 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:42:18,133 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-27 21:42:18,134 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=663, Unknown=0, NotChecked=0, Total=756 [2022-04-27 21:42:18,134 INFO L87 Difference]: Start difference. First operand 39 states and 40 transitions. Second operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:42:20,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:20,745 INFO L93 Difference]: Finished difference Result 70 states and 72 transitions. [2022-04-27 21:42:20,745 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-27 21:42:20,745 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Word has length 36 [2022-04-27 21:42:20,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:42:20,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:42:20,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2022-04-27 21:42:20,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:42:20,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2022-04-27 21:42:20,749 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 59 transitions. [2022-04-27 21:42:24,848 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 57 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:24,850 INFO L225 Difference]: With dead ends: 70 [2022-04-27 21:42:24,850 INFO L226 Difference]: Without dead ends: 42 [2022-04-27 21:42:24,851 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 35 SyntacticMatches, 4 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 409 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=216, Invalid=1675, Unknown=1, NotChecked=0, Total=1892 [2022-04-27 21:42:24,851 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 24 mSDsluCounter, 124 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 152 SdHoareTripleChecker+Invalid, 294 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 140 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:42:24,851 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 152 Invalid, 294 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 144 Invalid, 0 Unknown, 140 Unchecked, 0.1s Time] [2022-04-27 21:42:24,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-27 21:42:24,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2022-04-27 21:42:24,860 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:42:24,861 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:24,861 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:24,861 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:24,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:24,863 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-27 21:42:24,863 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2022-04-27 21:42:24,863 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:24,863 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:24,864 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 42 states. [2022-04-27 21:42:24,864 INFO L87 Difference]: Start difference. First operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 42 states. [2022-04-27 21:42:24,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:24,865 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-27 21:42:24,866 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2022-04-27 21:42:24,866 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:24,866 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:24,866 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:42:24,866 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:42:24,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-27 21:42:24,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 42 transitions. [2022-04-27 21:42:24,867 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 42 transitions. Word has length 36 [2022-04-27 21:42:24,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:42:24,868 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 42 transitions. [2022-04-27 21:42:24,868 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:42:24,868 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 42 transitions. [2022-04-27 21:42:24,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-27 21:42:24,868 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:42:24,869 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:42:24,884 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 21:42:25,069 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:25,069 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:42:25,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:42:25,070 INFO L85 PathProgramCache]: Analyzing trace with hash -550020917, now seen corresponding path program 5 times [2022-04-27 21:42:25,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:42:25,070 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505774407] [2022-04-27 21:42:25,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:25,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:42:25,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:25,220 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:42:25,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:25,224 INFO L290 TraceCheckUtils]: 0: Hoare triple {2233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-27 21:42:25,224 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,224 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,224 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-27 21:42:25,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:25,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-27 21:42:25,230 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,230 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,231 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:25,231 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 21:42:25,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:25,240 INFO L290 TraceCheckUtils]: 0: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-27 21:42:25,240 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,240 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,241 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:25,241 INFO L272 TraceCheckUtils]: 0: Hoare triple {2208#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:42:25,241 INFO L290 TraceCheckUtils]: 1: Hoare triple {2233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-27 21:42:25,241 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,241 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,241 INFO L272 TraceCheckUtils]: 4: Hoare triple {2208#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,242 INFO L290 TraceCheckUtils]: 5: Hoare triple {2208#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2208#true} is VALID [2022-04-27 21:42:25,242 INFO L290 TraceCheckUtils]: 6: Hoare triple {2208#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2213#(= main_~i~0 0)} is VALID [2022-04-27 21:42:25,242 INFO L290 TraceCheckUtils]: 7: Hoare triple {2213#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2213#(= main_~i~0 0)} is VALID [2022-04-27 21:42:25,242 INFO L290 TraceCheckUtils]: 8: Hoare triple {2213#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:25,243 INFO L290 TraceCheckUtils]: 9: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:25,245 INFO L290 TraceCheckUtils]: 10: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:25,245 INFO L290 TraceCheckUtils]: 11: Hoare triple {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:25,246 INFO L290 TraceCheckUtils]: 12: Hoare triple {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 21:42:25,246 INFO L290 TraceCheckUtils]: 13: Hoare triple {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:25,247 INFO L290 TraceCheckUtils]: 14: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:25,247 INFO L290 TraceCheckUtils]: 15: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:25,247 INFO L290 TraceCheckUtils]: 16: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:25,248 INFO L290 TraceCheckUtils]: 17: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:25,248 INFO L272 TraceCheckUtils]: 18: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-27 21:42:25,248 INFO L290 TraceCheckUtils]: 19: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-27 21:42:25,248 INFO L290 TraceCheckUtils]: 20: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,248 INFO L290 TraceCheckUtils]: 21: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,248 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2208#true} {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:25,249 INFO L290 TraceCheckUtils]: 23: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:25,249 INFO L290 TraceCheckUtils]: 24: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:25,250 INFO L290 TraceCheckUtils]: 25: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:25,250 INFO L272 TraceCheckUtils]: 26: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-27 21:42:25,250 INFO L290 TraceCheckUtils]: 27: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-27 21:42:25,250 INFO L290 TraceCheckUtils]: 28: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,250 INFO L290 TraceCheckUtils]: 29: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:25,250 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2208#true} {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:25,251 INFO L290 TraceCheckUtils]: 31: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:25,251 INFO L290 TraceCheckUtils]: 32: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:42:25,252 INFO L290 TraceCheckUtils]: 33: Hoare triple {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2230#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:25,252 INFO L272 TraceCheckUtils]: 34: Hoare triple {2230#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2231#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:42:25,252 INFO L290 TraceCheckUtils]: 35: Hoare triple {2231#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2232#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:42:25,253 INFO L290 TraceCheckUtils]: 36: Hoare triple {2232#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-27 21:42:25,253 INFO L290 TraceCheckUtils]: 37: Hoare triple {2209#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-27 21:42:25,253 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:42:25,253 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:42:25,254 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505774407] [2022-04-27 21:42:25,254 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [505774407] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:42:25,254 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1507548137] [2022-04-27 21:42:25,254 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 21:42:25,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:25,254 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:42:25,255 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:42:25,256 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 21:42:25,297 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-27 21:42:25,297 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:42:25,298 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-27 21:42:25,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:25,311 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:42:25,356 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:42:25,560 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-27 21:42:25,560 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-27 21:42:33,940 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:42:33,983 INFO L272 TraceCheckUtils]: 0: Hoare triple {2208#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:33,983 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-27 21:42:33,983 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:33,983 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:33,983 INFO L272 TraceCheckUtils]: 4: Hoare triple {2208#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:33,983 INFO L290 TraceCheckUtils]: 5: Hoare triple {2208#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2208#true} is VALID [2022-04-27 21:42:33,984 INFO L290 TraceCheckUtils]: 6: Hoare triple {2208#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2213#(= main_~i~0 0)} is VALID [2022-04-27 21:42:33,984 INFO L290 TraceCheckUtils]: 7: Hoare triple {2213#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2213#(= main_~i~0 0)} is VALID [2022-04-27 21:42:33,984 INFO L290 TraceCheckUtils]: 8: Hoare triple {2213#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:33,985 INFO L290 TraceCheckUtils]: 9: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:33,985 INFO L290 TraceCheckUtils]: 10: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:33,986 INFO L290 TraceCheckUtils]: 11: Hoare triple {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:33,987 INFO L290 TraceCheckUtils]: 12: Hoare triple {2216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2273#(exists ((v_main_~i~0_25 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* v_main_~i~0_25 4) main_~x~0.offset)) 0) (<= v_main_~i~0_25 2) (<= (+ v_main_~i~0_25 1) main_~i~0) (<= 2 v_main_~i~0_25)))} is VALID [2022-04-27 21:42:33,988 INFO L290 TraceCheckUtils]: 13: Hoare triple {2273#(exists ((v_main_~i~0_25 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* v_main_~i~0_25 4) main_~x~0.offset)) 0) (<= v_main_~i~0_25 2) (<= (+ v_main_~i~0_25 1) main_~i~0) (<= 2 v_main_~i~0_25)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:33,988 INFO L290 TraceCheckUtils]: 14: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:33,988 INFO L290 TraceCheckUtils]: 15: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:33,989 INFO L290 TraceCheckUtils]: 16: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:33,989 INFO L290 TraceCheckUtils]: 17: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:33,990 INFO L272 TraceCheckUtils]: 18: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 21:42:33,990 INFO L290 TraceCheckUtils]: 19: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 21:42:33,990 INFO L290 TraceCheckUtils]: 20: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 21:42:33,991 INFO L290 TraceCheckUtils]: 21: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 21:42:33,995 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:33,996 INFO L290 TraceCheckUtils]: 23: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:33,996 INFO L290 TraceCheckUtils]: 24: Hoare triple {2219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:42:33,997 INFO L290 TraceCheckUtils]: 25: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:42:33,998 INFO L272 TraceCheckUtils]: 26: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 21:42:33,998 INFO L290 TraceCheckUtils]: 27: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 21:42:33,998 INFO L290 TraceCheckUtils]: 28: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 21:42:33,999 INFO L290 TraceCheckUtils]: 29: Hoare triple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-27 21:42:33,999 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2292#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:42:34,000 INFO L290 TraceCheckUtils]: 31: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:42:34,000 INFO L290 TraceCheckUtils]: 32: Hoare triple {2311#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2336#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} is VALID [2022-04-27 21:42:34,000 INFO L290 TraceCheckUtils]: 33: Hoare triple {2336#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2230#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:34,001 INFO L272 TraceCheckUtils]: 34: Hoare triple {2230#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:42:34,001 INFO L290 TraceCheckUtils]: 35: Hoare triple {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2347#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:42:34,002 INFO L290 TraceCheckUtils]: 36: Hoare triple {2347#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-27 21:42:34,002 INFO L290 TraceCheckUtils]: 37: Hoare triple {2209#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-27 21:42:34,002 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:42:34,002 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:42:36,225 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:42:36,229 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:42:36,277 INFO L290 TraceCheckUtils]: 37: Hoare triple {2209#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-27 21:42:36,278 INFO L290 TraceCheckUtils]: 36: Hoare triple {2347#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2209#false} is VALID [2022-04-27 21:42:36,278 INFO L290 TraceCheckUtils]: 35: Hoare triple {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2347#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:42:36,279 INFO L272 TraceCheckUtils]: 34: Hoare triple {2230#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2343#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:42:36,279 INFO L290 TraceCheckUtils]: 33: Hoare triple {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2230#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:36,279 INFO L290 TraceCheckUtils]: 32: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:42:36,280 INFO L290 TraceCheckUtils]: 31: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:36,280 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2208#true} {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:36,280 INFO L290 TraceCheckUtils]: 29: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:36,281 INFO L290 TraceCheckUtils]: 28: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:36,281 INFO L290 TraceCheckUtils]: 27: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-27 21:42:36,281 INFO L272 TraceCheckUtils]: 26: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-27 21:42:36,281 INFO L290 TraceCheckUtils]: 25: Hoare triple {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:36,282 INFO L290 TraceCheckUtils]: 24: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2224#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:36,282 INFO L290 TraceCheckUtils]: 23: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:36,282 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2208#true} {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:36,282 INFO L290 TraceCheckUtils]: 21: Hoare triple {2208#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:36,283 INFO L290 TraceCheckUtils]: 20: Hoare triple {2208#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:36,283 INFO L290 TraceCheckUtils]: 19: Hoare triple {2208#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2208#true} is VALID [2022-04-27 21:42:36,283 INFO L272 TraceCheckUtils]: 18: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2208#true} is VALID [2022-04-27 21:42:36,283 INFO L290 TraceCheckUtils]: 17: Hoare triple {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:36,283 INFO L290 TraceCheckUtils]: 16: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:36,284 INFO L290 TraceCheckUtils]: 15: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:36,284 INFO L290 TraceCheckUtils]: 14: Hoare triple {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:36,284 INFO L290 TraceCheckUtils]: 13: Hoare triple {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:36,285 INFO L290 TraceCheckUtils]: 12: Hoare triple {2430#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2217#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 21:42:36,285 INFO L290 TraceCheckUtils]: 11: Hoare triple {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2430#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 21:42:36,286 INFO L290 TraceCheckUtils]: 10: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2215#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:36,286 INFO L290 TraceCheckUtils]: 9: Hoare triple {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:36,286 INFO L290 TraceCheckUtils]: 8: Hoare triple {2213#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2214#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:36,287 INFO L290 TraceCheckUtils]: 7: Hoare triple {2213#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2213#(= main_~i~0 0)} is VALID [2022-04-27 21:42:36,287 INFO L290 TraceCheckUtils]: 6: Hoare triple {2208#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2213#(= main_~i~0 0)} is VALID [2022-04-27 21:42:36,287 INFO L290 TraceCheckUtils]: 5: Hoare triple {2208#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2208#true} is VALID [2022-04-27 21:42:36,287 INFO L272 TraceCheckUtils]: 4: Hoare triple {2208#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:36,287 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2208#true} {2208#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:36,287 INFO L290 TraceCheckUtils]: 2: Hoare triple {2208#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:36,287 INFO L290 TraceCheckUtils]: 1: Hoare triple {2208#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2208#true} is VALID [2022-04-27 21:42:36,287 INFO L272 TraceCheckUtils]: 0: Hoare triple {2208#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2208#true} is VALID [2022-04-27 21:42:36,287 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:42:36,288 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1507548137] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:42:36,288 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:42:36,288 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 23 [2022-04-27 21:42:36,288 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1744741630] [2022-04-27 21:42:36,288 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:42:36,288 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 38 [2022-04-27 21:42:36,289 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:42:36,289 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 21:42:36,330 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:36,330 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-27 21:42:36,330 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:42:36,330 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-27 21:42:36,330 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=436, Unknown=3, NotChecked=0, Total=506 [2022-04-27 21:42:36,331 INFO L87 Difference]: Start difference. First operand 41 states and 42 transitions. Second operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 21:42:37,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:37,352 INFO L93 Difference]: Finished difference Result 71 states and 73 transitions. [2022-04-27 21:42:37,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-27 21:42:37,352 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 38 [2022-04-27 21:42:37,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:42:37,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 21:42:37,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 56 transitions. [2022-04-27 21:42:37,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 21:42:37,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 56 transitions. [2022-04-27 21:42:37,355 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 56 transitions. [2022-04-27 21:42:37,400 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:37,401 INFO L225 Difference]: With dead ends: 71 [2022-04-27 21:42:37,401 INFO L226 Difference]: Without dead ends: 69 [2022-04-27 21:42:37,401 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 67 SyntacticMatches, 9 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 10.7s TimeCoverageRelationStatistics Valid=161, Invalid=1096, Unknown=3, NotChecked=0, Total=1260 [2022-04-27 21:42:37,402 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 47 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 377 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 377 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 75 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 21:42:37,402 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 109 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 377 Invalid, 0 Unknown, 75 Unchecked, 0.3s Time] [2022-04-27 21:42:37,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-27 21:42:37,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 52. [2022-04-27 21:42:37,413 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:42:37,413 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:42:37,413 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:42:37,413 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:42:37,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:37,415 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-27 21:42:37,415 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-27 21:42:37,415 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:37,415 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:37,415 INFO L74 IsIncluded]: Start isIncluded. First operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-27 21:42:37,415 INFO L87 Difference]: Start difference. First operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-27 21:42:37,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:37,417 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-27 21:42:37,417 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-27 21:42:37,417 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:37,417 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:37,417 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:42:37,417 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:42:37,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-27 21:42:37,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 54 transitions. [2022-04-27 21:42:37,418 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 54 transitions. Word has length 38 [2022-04-27 21:42:37,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:42:37,418 INFO L495 AbstractCegarLoop]: Abstraction has 52 states and 54 transitions. [2022-04-27 21:42:37,418 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 21:42:37,418 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 54 transitions. [2022-04-27 21:42:37,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-04-27 21:42:37,419 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:42:37,419 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:42:37,438 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 21:42:37,622 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:37,623 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:42:37,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:42:37,623 INFO L85 PathProgramCache]: Analyzing trace with hash 838435593, now seen corresponding path program 6 times [2022-04-27 21:42:37,623 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:42:37,623 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1597298454] [2022-04-27 21:42:37,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:37,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:42:37,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:37,809 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:42:37,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:37,816 INFO L290 TraceCheckUtils]: 0: Hoare triple {2834#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-27 21:42:37,816 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,816 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,816 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-27 21:42:37,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:37,819 INFO L290 TraceCheckUtils]: 0: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-27 21:42:37,819 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,820 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,820 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:37,820 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-27 21:42:37,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:37,823 INFO L290 TraceCheckUtils]: 0: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-27 21:42:37,823 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,823 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,823 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:37,824 INFO L272 TraceCheckUtils]: 0: Hoare triple {2808#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2834#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:42:37,824 INFO L290 TraceCheckUtils]: 1: Hoare triple {2834#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-27 21:42:37,824 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,824 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,824 INFO L272 TraceCheckUtils]: 4: Hoare triple {2808#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,824 INFO L290 TraceCheckUtils]: 5: Hoare triple {2808#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2808#true} is VALID [2022-04-27 21:42:37,824 INFO L290 TraceCheckUtils]: 6: Hoare triple {2808#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2813#(= main_~i~0 0)} is VALID [2022-04-27 21:42:37,825 INFO L290 TraceCheckUtils]: 7: Hoare triple {2813#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2813#(= main_~i~0 0)} is VALID [2022-04-27 21:42:37,825 INFO L290 TraceCheckUtils]: 8: Hoare triple {2813#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:37,826 INFO L290 TraceCheckUtils]: 9: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:37,826 INFO L290 TraceCheckUtils]: 10: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:37,827 INFO L290 TraceCheckUtils]: 11: Hoare triple {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:37,827 INFO L290 TraceCheckUtils]: 12: Hoare triple {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 21:42:37,828 INFO L290 TraceCheckUtils]: 13: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 21:42:37,828 INFO L290 TraceCheckUtils]: 14: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2818#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 21:42:37,829 INFO L290 TraceCheckUtils]: 15: Hoare triple {2818#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:37,829 INFO L290 TraceCheckUtils]: 16: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:37,829 INFO L290 TraceCheckUtils]: 17: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:37,830 INFO L290 TraceCheckUtils]: 18: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:37,830 INFO L290 TraceCheckUtils]: 19: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:37,830 INFO L272 TraceCheckUtils]: 20: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-27 21:42:37,830 INFO L290 TraceCheckUtils]: 21: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-27 21:42:37,830 INFO L290 TraceCheckUtils]: 22: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,830 INFO L290 TraceCheckUtils]: 23: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,831 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2808#true} {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:37,831 INFO L290 TraceCheckUtils]: 25: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:37,832 INFO L290 TraceCheckUtils]: 26: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:37,832 INFO L290 TraceCheckUtils]: 27: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:37,832 INFO L272 TraceCheckUtils]: 28: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-27 21:42:37,832 INFO L290 TraceCheckUtils]: 29: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-27 21:42:37,832 INFO L290 TraceCheckUtils]: 30: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,832 INFO L290 TraceCheckUtils]: 31: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:37,833 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2808#true} {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:37,833 INFO L290 TraceCheckUtils]: 33: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:37,834 INFO L290 TraceCheckUtils]: 34: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:42:37,834 INFO L290 TraceCheckUtils]: 35: Hoare triple {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2831#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:37,835 INFO L272 TraceCheckUtils]: 36: Hoare triple {2831#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2832#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:42:37,835 INFO L290 TraceCheckUtils]: 37: Hoare triple {2832#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2833#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:42:37,835 INFO L290 TraceCheckUtils]: 38: Hoare triple {2833#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-27 21:42:37,835 INFO L290 TraceCheckUtils]: 39: Hoare triple {2809#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-27 21:42:37,836 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:42:37,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:42:37,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1597298454] [2022-04-27 21:42:37,836 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1597298454] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:42:37,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [62345968] [2022-04-27 21:42:37,836 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 21:42:37,836 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:37,836 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:42:37,837 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:42:37,838 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 21:42:37,880 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-27 21:42:37,880 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:42:37,881 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-27 21:42:37,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:37,896 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:42:37,945 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:42:38,077 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 21:42:38,077 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 21:42:38,156 INFO L356 Elim1Store]: treesize reduction 25, result has 37.5 percent of original size [2022-04-27 21:42:38,156 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 30 [2022-04-27 21:42:46,608 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:42:46,649 INFO L272 TraceCheckUtils]: 0: Hoare triple {2808#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:46,649 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-27 21:42:46,649 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:46,649 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:46,649 INFO L272 TraceCheckUtils]: 4: Hoare triple {2808#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:46,649 INFO L290 TraceCheckUtils]: 5: Hoare triple {2808#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2808#true} is VALID [2022-04-27 21:42:46,650 INFO L290 TraceCheckUtils]: 6: Hoare triple {2808#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2813#(= main_~i~0 0)} is VALID [2022-04-27 21:42:46,650 INFO L290 TraceCheckUtils]: 7: Hoare triple {2813#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2813#(= main_~i~0 0)} is VALID [2022-04-27 21:42:46,650 INFO L290 TraceCheckUtils]: 8: Hoare triple {2813#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:46,651 INFO L290 TraceCheckUtils]: 9: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:46,651 INFO L290 TraceCheckUtils]: 10: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:46,652 INFO L290 TraceCheckUtils]: 11: Hoare triple {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:46,652 INFO L290 TraceCheckUtils]: 12: Hoare triple {2816#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 21:42:46,653 INFO L290 TraceCheckUtils]: 13: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} is VALID [2022-04-27 21:42:46,653 INFO L290 TraceCheckUtils]: 14: Hoare triple {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} is VALID [2022-04-27 21:42:46,654 INFO L290 TraceCheckUtils]: 15: Hoare triple {2877#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2884#(and (or (= 8 (* main_~i~0 4)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)) (< 3 main_~n~0))} is VALID [2022-04-27 21:42:46,654 INFO L290 TraceCheckUtils]: 16: Hoare triple {2884#(and (or (= 8 (* main_~i~0 4)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)) (< 3 main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2888#(and (or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= main_~i~0 3)) (< 3 main_~n~0))} is VALID [2022-04-27 21:42:46,654 INFO L290 TraceCheckUtils]: 17: Hoare triple {2888#(and (or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= main_~i~0 3)) (< 3 main_~n~0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:46,655 INFO L290 TraceCheckUtils]: 18: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:46,655 INFO L290 TraceCheckUtils]: 19: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:46,656 INFO L272 TraceCheckUtils]: 20: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 21:42:46,656 INFO L290 TraceCheckUtils]: 21: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 21:42:46,657 INFO L290 TraceCheckUtils]: 22: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 21:42:46,657 INFO L290 TraceCheckUtils]: 23: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 21:42:46,658 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:46,658 INFO L290 TraceCheckUtils]: 25: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:46,658 INFO L290 TraceCheckUtils]: 26: Hoare triple {2820#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 21:42:46,659 INFO L290 TraceCheckUtils]: 27: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 21:42:46,659 INFO L272 TraceCheckUtils]: 28: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 21:42:46,660 INFO L290 TraceCheckUtils]: 29: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 21:42:46,660 INFO L290 TraceCheckUtils]: 30: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 21:42:46,660 INFO L290 TraceCheckUtils]: 31: Hoare triple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-27 21:42:46,661 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2901#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 21:42:46,661 INFO L290 TraceCheckUtils]: 33: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-27 21:42:46,661 INFO L290 TraceCheckUtils]: 34: Hoare triple {2920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2945#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} is VALID [2022-04-27 21:42:46,662 INFO L290 TraceCheckUtils]: 35: Hoare triple {2945#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2831#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:46,662 INFO L272 TraceCheckUtils]: 36: Hoare triple {2831#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:42:46,662 INFO L290 TraceCheckUtils]: 37: Hoare triple {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2956#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:42:46,663 INFO L290 TraceCheckUtils]: 38: Hoare triple {2956#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-27 21:42:46,663 INFO L290 TraceCheckUtils]: 39: Hoare triple {2809#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-27 21:42:46,663 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:42:46,663 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:42:50,869 WARN L833 $PredicateComparison]: unable to prove that (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) is different from false [2022-04-27 21:42:51,126 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:42:51,131 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:42:51,191 INFO L290 TraceCheckUtils]: 39: Hoare triple {2809#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-27 21:42:51,192 INFO L290 TraceCheckUtils]: 38: Hoare triple {2956#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2809#false} is VALID [2022-04-27 21:42:51,192 INFO L290 TraceCheckUtils]: 37: Hoare triple {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2956#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:42:51,193 INFO L272 TraceCheckUtils]: 36: Hoare triple {2831#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2952#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:42:51,193 INFO L290 TraceCheckUtils]: 35: Hoare triple {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2831#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:51,194 INFO L290 TraceCheckUtils]: 34: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2830#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:42:51,194 INFO L290 TraceCheckUtils]: 33: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:51,195 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2808#true} {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:51,195 INFO L290 TraceCheckUtils]: 31: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:51,195 INFO L290 TraceCheckUtils]: 30: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:51,195 INFO L290 TraceCheckUtils]: 29: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-27 21:42:51,195 INFO L272 TraceCheckUtils]: 28: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-27 21:42:51,196 INFO L290 TraceCheckUtils]: 27: Hoare triple {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:51,196 INFO L290 TraceCheckUtils]: 26: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2825#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:51,197 INFO L290 TraceCheckUtils]: 25: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:51,197 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2808#true} {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:51,197 INFO L290 TraceCheckUtils]: 23: Hoare triple {2808#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:51,197 INFO L290 TraceCheckUtils]: 22: Hoare triple {2808#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:51,197 INFO L290 TraceCheckUtils]: 21: Hoare triple {2808#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2808#true} is VALID [2022-04-27 21:42:51,198 INFO L272 TraceCheckUtils]: 20: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2808#true} is VALID [2022-04-27 21:42:51,198 INFO L290 TraceCheckUtils]: 19: Hoare triple {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:51,198 INFO L290 TraceCheckUtils]: 18: Hoare triple {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3002#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:51,199 INFO L290 TraceCheckUtils]: 17: Hoare triple {3030#(or (< main_~i~0 main_~n~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-27 21:42:51,199 INFO L290 TraceCheckUtils]: 16: Hoare triple {3034#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< (+ main_~i~0 1) main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3030#(or (< main_~i~0 main_~n~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 21:42:51,200 INFO L290 TraceCheckUtils]: 15: Hoare triple {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3034#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< (+ main_~i~0 1) main_~n~0))} is VALID [2022-04-27 21:42:51,201 INFO L290 TraceCheckUtils]: 14: Hoare triple {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} is VALID [2022-04-27 21:42:51,202 INFO L290 TraceCheckUtils]: 13: Hoare triple {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3038#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} is VALID [2022-04-27 21:42:51,202 INFO L290 TraceCheckUtils]: 12: Hoare triple {3048#(and (<= 2 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2817#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-27 21:42:51,203 INFO L290 TraceCheckUtils]: 11: Hoare triple {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3048#(and (<= 2 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-27 21:42:51,203 INFO L290 TraceCheckUtils]: 10: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2815#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:51,204 INFO L290 TraceCheckUtils]: 9: Hoare triple {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:51,204 INFO L290 TraceCheckUtils]: 8: Hoare triple {2813#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2814#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:51,204 INFO L290 TraceCheckUtils]: 7: Hoare triple {2813#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2813#(= main_~i~0 0)} is VALID [2022-04-27 21:42:51,205 INFO L290 TraceCheckUtils]: 6: Hoare triple {2808#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2813#(= main_~i~0 0)} is VALID [2022-04-27 21:42:51,205 INFO L290 TraceCheckUtils]: 5: Hoare triple {2808#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2808#true} is VALID [2022-04-27 21:42:51,205 INFO L272 TraceCheckUtils]: 4: Hoare triple {2808#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:51,205 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2808#true} {2808#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:51,205 INFO L290 TraceCheckUtils]: 2: Hoare triple {2808#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:51,205 INFO L290 TraceCheckUtils]: 1: Hoare triple {2808#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2808#true} is VALID [2022-04-27 21:42:51,205 INFO L272 TraceCheckUtils]: 0: Hoare triple {2808#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2808#true} is VALID [2022-04-27 21:42:51,205 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 9 not checked. [2022-04-27 21:42:51,205 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [62345968] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:42:51,205 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:42:51,206 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 18, 17] total 29 [2022-04-27 21:42:51,207 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792857564] [2022-04-27 21:42:51,207 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:42:51,208 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 40 [2022-04-27 21:42:51,213 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:42:51,213 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 21:42:51,271 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:51,271 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-27 21:42:51,271 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:42:51,271 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-27 21:42:51,271 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=650, Unknown=4, NotChecked=52, Total=812 [2022-04-27 21:42:51,272 INFO L87 Difference]: Start difference. First operand 52 states and 54 transitions. Second operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 21:42:53,615 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (<= 3 c_main_~i~0) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 8)) 0) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-27 21:42:55,620 WARN L833 $PredicateComparison]: unable to prove that (and (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (<= 3 c_main_~i~0) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 8)) 0)) is different from false [2022-04-27 21:42:57,651 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ c_main_~x~0.offset 8))) (and (not (= (+ (* c_main_~i~0 4) c_main_~x~0.offset) .cse0)) (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (= (select (select |c_#memory_int| c_main_~x~0.base) .cse0) 0))) is different from false [2022-04-27 21:42:58,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:58,646 INFO L93 Difference]: Finished difference Result 80 states and 85 transitions. [2022-04-27 21:42:58,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-27 21:42:58,646 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 40 [2022-04-27 21:42:58,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:42:58,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 21:42:58,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 62 transitions. [2022-04-27 21:42:58,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 21:42:58,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 62 transitions. [2022-04-27 21:42:58,649 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 62 transitions. [2022-04-27 21:42:58,709 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:42:58,711 INFO L225 Difference]: With dead ends: 80 [2022-04-27 21:42:58,711 INFO L226 Difference]: Without dead ends: 78 [2022-04-27 21:42:58,712 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 66 SyntacticMatches, 10 SemanticMatches, 48 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 446 ImplicationChecksByTransitivity, 18.8s TimeCoverageRelationStatistics Valid=281, Invalid=1797, Unknown=8, NotChecked=364, Total=2450 [2022-04-27 21:42:58,714 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 80 mSDsluCounter, 118 mSDsCounter, 0 mSdLazyCounter, 468 mSolverCounterSat, 56 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 80 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 624 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 56 IncrementalHoareTripleChecker+Valid, 468 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 100 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 21:42:58,714 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [80 Valid, 142 Invalid, 624 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [56 Valid, 468 Invalid, 0 Unknown, 100 Unchecked, 0.4s Time] [2022-04-27 21:42:58,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-04-27 21:42:58,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 62. [2022-04-27 21:42:58,743 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:42:58,744 INFO L82 GeneralOperation]: Start isEquivalent. First operand 78 states. Second operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:42:58,745 INFO L74 IsIncluded]: Start isIncluded. First operand 78 states. Second operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:42:58,745 INFO L87 Difference]: Start difference. First operand 78 states. Second operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:42:58,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:58,752 INFO L93 Difference]: Finished difference Result 78 states and 83 transitions. [2022-04-27 21:42:58,752 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2022-04-27 21:42:58,752 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:58,752 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:58,752 INFO L74 IsIncluded]: Start isIncluded. First operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) Second operand 78 states. [2022-04-27 21:42:58,752 INFO L87 Difference]: Start difference. First operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) Second operand 78 states. [2022-04-27 21:42:58,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:42:58,754 INFO L93 Difference]: Finished difference Result 78 states and 83 transitions. [2022-04-27 21:42:58,754 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2022-04-27 21:42:58,754 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:42:58,754 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:42:58,754 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:42:58,754 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:42:58,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 47 states have (on average 1.0638297872340425) internal successors, (50), 49 states have internal predecessors, (50), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:42:58,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 65 transitions. [2022-04-27 21:42:58,760 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 65 transitions. Word has length 40 [2022-04-27 21:42:58,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:42:58,761 INFO L495 AbstractCegarLoop]: Abstraction has 62 states and 65 transitions. [2022-04-27 21:42:58,761 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-27 21:42:58,761 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 65 transitions. [2022-04-27 21:42:58,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-27 21:42:58,763 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:42:58,763 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:42:58,784 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-27 21:42:58,979 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:58,979 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:42:58,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:42:58,980 INFO L85 PathProgramCache]: Analyzing trace with hash -110930399, now seen corresponding path program 7 times [2022-04-27 21:42:58,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:42:58,980 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860314755] [2022-04-27 21:42:58,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:42:58,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:42:58,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:59,117 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:42:59,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:59,120 INFO L290 TraceCheckUtils]: 0: Hoare triple {3519#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-27 21:42:59,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,121 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,121 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-27 21:42:59,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:59,135 INFO L290 TraceCheckUtils]: 0: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-27 21:42:59,135 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,135 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,146 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:59,146 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 21:42:59,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:59,150 INFO L290 TraceCheckUtils]: 0: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-27 21:42:59,151 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,151 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,151 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:59,151 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 21:42:59,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:59,154 INFO L290 TraceCheckUtils]: 0: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-27 21:42:59,154 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,154 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,155 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:59,155 INFO L272 TraceCheckUtils]: 0: Hoare triple {3489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3519#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:42:59,155 INFO L290 TraceCheckUtils]: 1: Hoare triple {3519#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-27 21:42:59,155 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,155 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,156 INFO L272 TraceCheckUtils]: 4: Hoare triple {3489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,156 INFO L290 TraceCheckUtils]: 5: Hoare triple {3489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3489#true} is VALID [2022-04-27 21:42:59,156 INFO L290 TraceCheckUtils]: 6: Hoare triple {3489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3494#(= main_~i~0 0)} is VALID [2022-04-27 21:42:59,156 INFO L290 TraceCheckUtils]: 7: Hoare triple {3494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3494#(= main_~i~0 0)} is VALID [2022-04-27 21:42:59,157 INFO L290 TraceCheckUtils]: 8: Hoare triple {3494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:59,157 INFO L290 TraceCheckUtils]: 9: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:42:59,158 INFO L290 TraceCheckUtils]: 10: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:59,158 INFO L290 TraceCheckUtils]: 11: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:42:59,158 INFO L290 TraceCheckUtils]: 12: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:42:59,159 INFO L290 TraceCheckUtils]: 13: Hoare triple {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:42:59,159 INFO L290 TraceCheckUtils]: 14: Hoare triple {3498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:42:59,160 INFO L290 TraceCheckUtils]: 15: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:42:59,160 INFO L290 TraceCheckUtils]: 16: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:59,160 INFO L290 TraceCheckUtils]: 17: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:59,161 INFO L272 TraceCheckUtils]: 18: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-27 21:42:59,161 INFO L290 TraceCheckUtils]: 19: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-27 21:42:59,161 INFO L290 TraceCheckUtils]: 20: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,161 INFO L290 TraceCheckUtils]: 21: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,161 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3489#true} {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:59,162 INFO L290 TraceCheckUtils]: 23: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:42:59,162 INFO L290 TraceCheckUtils]: 24: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:59,162 INFO L290 TraceCheckUtils]: 25: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:59,162 INFO L272 TraceCheckUtils]: 26: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-27 21:42:59,163 INFO L290 TraceCheckUtils]: 27: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-27 21:42:59,163 INFO L290 TraceCheckUtils]: 28: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,163 INFO L290 TraceCheckUtils]: 29: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,163 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3489#true} {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:59,164 INFO L290 TraceCheckUtils]: 31: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:42:59,164 INFO L290 TraceCheckUtils]: 32: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:59,164 INFO L290 TraceCheckUtils]: 33: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:59,165 INFO L272 TraceCheckUtils]: 34: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-27 21:42:59,165 INFO L290 TraceCheckUtils]: 35: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-27 21:42:59,165 INFO L290 TraceCheckUtils]: 36: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,165 INFO L290 TraceCheckUtils]: 37: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:42:59,165 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3489#true} {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:59,166 INFO L290 TraceCheckUtils]: 39: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:42:59,166 INFO L290 TraceCheckUtils]: 40: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:42:59,167 INFO L290 TraceCheckUtils]: 41: Hoare triple {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3516#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:42:59,167 INFO L272 TraceCheckUtils]: 42: Hoare triple {3516#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3517#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:42:59,167 INFO L290 TraceCheckUtils]: 43: Hoare triple {3517#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3518#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:42:59,168 INFO L290 TraceCheckUtils]: 44: Hoare triple {3518#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-27 21:42:59,168 INFO L290 TraceCheckUtils]: 45: Hoare triple {3490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-27 21:42:59,168 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 34 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 21:42:59,168 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:42:59,168 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1860314755] [2022-04-27 21:42:59,168 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1860314755] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:42:59,168 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [746877521] [2022-04-27 21:42:59,168 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 21:42:59,168 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:42:59,168 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:42:59,169 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:42:59,170 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-27 21:42:59,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:59,209 INFO L263 TraceCheckSpWp]: Trace formula consists of 147 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-27 21:42:59,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:42:59,218 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:42:59,293 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:43:12,552 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:43:12,590 INFO L272 TraceCheckUtils]: 0: Hoare triple {3489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:12,590 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-27 21:43:12,590 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:12,590 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:12,590 INFO L272 TraceCheckUtils]: 4: Hoare triple {3489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:12,590 INFO L290 TraceCheckUtils]: 5: Hoare triple {3489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3489#true} is VALID [2022-04-27 21:43:12,591 INFO L290 TraceCheckUtils]: 6: Hoare triple {3489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3494#(= main_~i~0 0)} is VALID [2022-04-27 21:43:12,603 INFO L290 TraceCheckUtils]: 7: Hoare triple {3494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3494#(= main_~i~0 0)} is VALID [2022-04-27 21:43:12,603 INFO L290 TraceCheckUtils]: 8: Hoare triple {3494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:12,604 INFO L290 TraceCheckUtils]: 9: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:12,604 INFO L290 TraceCheckUtils]: 10: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:12,605 INFO L290 TraceCheckUtils]: 11: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:12,605 INFO L290 TraceCheckUtils]: 12: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:43:12,606 INFO L290 TraceCheckUtils]: 13: Hoare triple {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:12,606 INFO L290 TraceCheckUtils]: 14: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:12,606 INFO L290 TraceCheckUtils]: 15: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:12,606 INFO L290 TraceCheckUtils]: 16: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:12,607 INFO L290 TraceCheckUtils]: 17: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:12,608 INFO L272 TraceCheckUtils]: 18: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,608 INFO L290 TraceCheckUtils]: 19: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,608 INFO L290 TraceCheckUtils]: 20: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,609 INFO L290 TraceCheckUtils]: 21: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,609 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:12,609 INFO L290 TraceCheckUtils]: 23: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:12,610 INFO L290 TraceCheckUtils]: 24: Hoare triple {3500#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:43:12,610 INFO L290 TraceCheckUtils]: 25: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:43:12,611 INFO L272 TraceCheckUtils]: 26: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,611 INFO L290 TraceCheckUtils]: 27: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,611 INFO L290 TraceCheckUtils]: 28: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,612 INFO L290 TraceCheckUtils]: 29: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,612 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:43:12,613 INFO L290 TraceCheckUtils]: 31: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:43:12,613 INFO L290 TraceCheckUtils]: 32: Hoare triple {3596#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:43:12,613 INFO L290 TraceCheckUtils]: 33: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:43:12,614 INFO L272 TraceCheckUtils]: 34: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,614 INFO L290 TraceCheckUtils]: 35: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,615 INFO L290 TraceCheckUtils]: 36: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,615 INFO L290 TraceCheckUtils]: 37: Hoare triple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-27 21:43:12,615 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3577#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:43:12,619 INFO L290 TraceCheckUtils]: 39: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:43:12,619 INFO L290 TraceCheckUtils]: 40: Hoare triple {3621#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3646#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-27 21:43:12,620 INFO L290 TraceCheckUtils]: 41: Hoare triple {3646#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3516#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:43:12,620 INFO L272 TraceCheckUtils]: 42: Hoare triple {3516#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:43:12,620 INFO L290 TraceCheckUtils]: 43: Hoare triple {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3657#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:43:12,621 INFO L290 TraceCheckUtils]: 44: Hoare triple {3657#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-27 21:43:12,621 INFO L290 TraceCheckUtils]: 45: Hoare triple {3490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-27 21:43:12,621 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 21:43:12,621 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:43:14,773 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:43:14,777 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:43:14,839 INFO L290 TraceCheckUtils]: 45: Hoare triple {3490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-27 21:43:14,839 INFO L290 TraceCheckUtils]: 44: Hoare triple {3657#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3490#false} is VALID [2022-04-27 21:43:14,839 INFO L290 TraceCheckUtils]: 43: Hoare triple {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3657#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:43:14,840 INFO L272 TraceCheckUtils]: 42: Hoare triple {3516#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3653#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:43:14,840 INFO L290 TraceCheckUtils]: 41: Hoare triple {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3516#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:43:14,841 INFO L290 TraceCheckUtils]: 40: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3515#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:43:14,841 INFO L290 TraceCheckUtils]: 39: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:14,842 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3489#true} {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:14,842 INFO L290 TraceCheckUtils]: 37: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:14,842 INFO L290 TraceCheckUtils]: 36: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:14,842 INFO L290 TraceCheckUtils]: 35: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-27 21:43:14,842 INFO L272 TraceCheckUtils]: 34: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-27 21:43:14,842 INFO L290 TraceCheckUtils]: 33: Hoare triple {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:14,843 INFO L290 TraceCheckUtils]: 32: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:14,843 INFO L290 TraceCheckUtils]: 31: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:14,844 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3489#true} {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:14,844 INFO L290 TraceCheckUtils]: 29: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:14,844 INFO L290 TraceCheckUtils]: 28: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:14,844 INFO L290 TraceCheckUtils]: 27: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-27 21:43:14,844 INFO L272 TraceCheckUtils]: 26: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-27 21:43:14,844 INFO L290 TraceCheckUtils]: 25: Hoare triple {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:14,845 INFO L290 TraceCheckUtils]: 24: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3505#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:14,845 INFO L290 TraceCheckUtils]: 23: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:43:14,846 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3489#true} {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:43:14,846 INFO L290 TraceCheckUtils]: 21: Hoare triple {3489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:14,846 INFO L290 TraceCheckUtils]: 20: Hoare triple {3489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:14,846 INFO L290 TraceCheckUtils]: 19: Hoare triple {3489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3489#true} is VALID [2022-04-27 21:43:14,846 INFO L272 TraceCheckUtils]: 18: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3489#true} is VALID [2022-04-27 21:43:14,846 INFO L290 TraceCheckUtils]: 17: Hoare triple {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:43:14,846 INFO L290 TraceCheckUtils]: 16: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3727#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:43:14,847 INFO L290 TraceCheckUtils]: 15: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:14,847 INFO L290 TraceCheckUtils]: 14: Hoare triple {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:14,847 INFO L290 TraceCheckUtils]: 13: Hoare triple {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:14,848 INFO L290 TraceCheckUtils]: 12: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3497#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:43:14,848 INFO L290 TraceCheckUtils]: 11: Hoare triple {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:14,849 INFO L290 TraceCheckUtils]: 10: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:14,849 INFO L290 TraceCheckUtils]: 9: Hoare triple {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:14,849 INFO L290 TraceCheckUtils]: 8: Hoare triple {3494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:14,850 INFO L290 TraceCheckUtils]: 7: Hoare triple {3494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3494#(= main_~i~0 0)} is VALID [2022-04-27 21:43:14,850 INFO L290 TraceCheckUtils]: 6: Hoare triple {3489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3494#(= main_~i~0 0)} is VALID [2022-04-27 21:43:14,850 INFO L290 TraceCheckUtils]: 5: Hoare triple {3489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3489#true} is VALID [2022-04-27 21:43:14,850 INFO L272 TraceCheckUtils]: 4: Hoare triple {3489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:14,850 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3489#true} {3489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:14,850 INFO L290 TraceCheckUtils]: 2: Hoare triple {3489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:14,850 INFO L290 TraceCheckUtils]: 1: Hoare triple {3489#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3489#true} is VALID [2022-04-27 21:43:14,850 INFO L272 TraceCheckUtils]: 0: Hoare triple {3489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3489#true} is VALID [2022-04-27 21:43:14,850 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 34 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 21:43:14,850 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [746877521] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:43:14,851 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:43:14,851 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 14] total 23 [2022-04-27 21:43:14,851 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1388262218] [2022-04-27 21:43:14,851 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:43:14,851 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 46 [2022-04-27 21:43:14,852 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:43:14,852 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 21:43:14,902 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:43:14,902 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-27 21:43:14,902 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:43:14,902 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-27 21:43:14,903 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=441, Unknown=4, NotChecked=0, Total=506 [2022-04-27 21:43:14,903 INFO L87 Difference]: Start difference. First operand 62 states and 65 transitions. Second operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 21:43:15,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:43:15,730 INFO L93 Difference]: Finished difference Result 86 states and 88 transitions. [2022-04-27 21:43:15,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-27 21:43:15,730 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 46 [2022-04-27 21:43:15,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:43:15,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 21:43:15,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 60 transitions. [2022-04-27 21:43:15,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 21:43:15,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 60 transitions. [2022-04-27 21:43:15,732 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 60 transitions. [2022-04-27 21:43:15,789 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:43:15,790 INFO L225 Difference]: With dead ends: 86 [2022-04-27 21:43:15,790 INFO L226 Difference]: Without dead ends: 84 [2022-04-27 21:43:15,790 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 87 SyntacticMatches, 10 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 268 ImplicationChecksByTransitivity, 15.2s TimeCoverageRelationStatistics Valid=157, Invalid=1171, Unknown=4, NotChecked=0, Total=1332 [2022-04-27 21:43:15,791 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 50 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 439 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 123 SdHoareTripleChecker+Invalid, 527 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 439 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 73 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 21:43:15,791 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [51 Valid, 123 Invalid, 527 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 439 Invalid, 0 Unknown, 73 Unchecked, 0.3s Time] [2022-04-27 21:43:15,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-04-27 21:43:15,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 60. [2022-04-27 21:43:15,814 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:43:15,814 INFO L82 GeneralOperation]: Start isEquivalent. First operand 84 states. Second operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:43:15,814 INFO L74 IsIncluded]: Start isIncluded. First operand 84 states. Second operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:43:15,814 INFO L87 Difference]: Start difference. First operand 84 states. Second operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:43:15,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:43:15,816 INFO L93 Difference]: Finished difference Result 84 states and 86 transitions. [2022-04-27 21:43:15,816 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 86 transitions. [2022-04-27 21:43:15,816 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:43:15,816 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:43:15,816 INFO L74 IsIncluded]: Start isIncluded. First operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 84 states. [2022-04-27 21:43:15,816 INFO L87 Difference]: Start difference. First operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 84 states. [2022-04-27 21:43:15,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:43:15,817 INFO L93 Difference]: Finished difference Result 84 states and 86 transitions. [2022-04-27 21:43:15,817 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 86 transitions. [2022-04-27 21:43:15,817 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:43:15,817 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:43:15,817 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:43:15,817 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:43:15,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 46 states have (on average 1.065217391304348) internal successors, (49), 47 states have internal predecessors, (49), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:43:15,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2022-04-27 21:43:15,818 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 46 [2022-04-27 21:43:15,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:43:15,819 INFO L495 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2022-04-27 21:43:15,819 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 21:43:15,819 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2022-04-27 21:43:15,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-04-27 21:43:15,819 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:43:15,819 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:43:15,834 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-27 21:43:16,031 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-27 21:43:16,031 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:43:16,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:43:16,032 INFO L85 PathProgramCache]: Analyzing trace with hash -1930534305, now seen corresponding path program 8 times [2022-04-27 21:43:16,032 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:43:16,032 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [914225739] [2022-04-27 21:43:16,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:43:16,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:43:16,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:16,197 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:43:16,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:16,209 INFO L290 TraceCheckUtils]: 0: Hoare triple {4238#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-27 21:43:16,209 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,209 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,209 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-27 21:43:16,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:16,214 INFO L290 TraceCheckUtils]: 0: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-27 21:43:16,214 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,214 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,214 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:16,214 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-27 21:43:16,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:16,217 INFO L290 TraceCheckUtils]: 0: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-27 21:43:16,217 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,217 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,218 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:16,218 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-27 21:43:16,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:16,220 INFO L290 TraceCheckUtils]: 0: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-27 21:43:16,220 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,220 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:16,221 INFO L272 TraceCheckUtils]: 0: Hoare triple {4207#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4238#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:43:16,221 INFO L290 TraceCheckUtils]: 1: Hoare triple {4238#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-27 21:43:16,221 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,221 INFO L272 TraceCheckUtils]: 4: Hoare triple {4207#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,221 INFO L290 TraceCheckUtils]: 5: Hoare triple {4207#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4207#true} is VALID [2022-04-27 21:43:16,222 INFO L290 TraceCheckUtils]: 6: Hoare triple {4207#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4212#(= main_~i~0 0)} is VALID [2022-04-27 21:43:16,222 INFO L290 TraceCheckUtils]: 7: Hoare triple {4212#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4212#(= main_~i~0 0)} is VALID [2022-04-27 21:43:16,222 INFO L290 TraceCheckUtils]: 8: Hoare triple {4212#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:16,223 INFO L290 TraceCheckUtils]: 9: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:16,223 INFO L290 TraceCheckUtils]: 10: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:16,224 INFO L290 TraceCheckUtils]: 11: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:16,224 INFO L290 TraceCheckUtils]: 12: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:43:16,225 INFO L290 TraceCheckUtils]: 13: Hoare triple {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:43:16,225 INFO L290 TraceCheckUtils]: 14: Hoare triple {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-27 21:43:16,226 INFO L290 TraceCheckUtils]: 15: Hoare triple {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:16,226 INFO L290 TraceCheckUtils]: 16: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:16,226 INFO L290 TraceCheckUtils]: 17: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:16,227 INFO L290 TraceCheckUtils]: 18: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:16,227 INFO L290 TraceCheckUtils]: 19: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:16,227 INFO L272 TraceCheckUtils]: 20: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-27 21:43:16,227 INFO L290 TraceCheckUtils]: 21: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-27 21:43:16,227 INFO L290 TraceCheckUtils]: 22: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,227 INFO L290 TraceCheckUtils]: 23: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,228 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4207#true} {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:16,228 INFO L290 TraceCheckUtils]: 25: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:16,229 INFO L290 TraceCheckUtils]: 26: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:16,229 INFO L290 TraceCheckUtils]: 27: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:16,229 INFO L272 TraceCheckUtils]: 28: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-27 21:43:16,229 INFO L290 TraceCheckUtils]: 29: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-27 21:43:16,229 INFO L290 TraceCheckUtils]: 30: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,229 INFO L290 TraceCheckUtils]: 31: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,230 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4207#true} {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:16,230 INFO L290 TraceCheckUtils]: 33: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:16,230 INFO L290 TraceCheckUtils]: 34: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:16,231 INFO L290 TraceCheckUtils]: 35: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:16,231 INFO L272 TraceCheckUtils]: 36: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-27 21:43:16,231 INFO L290 TraceCheckUtils]: 37: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-27 21:43:16,231 INFO L290 TraceCheckUtils]: 38: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,231 INFO L290 TraceCheckUtils]: 39: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:16,232 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {4207#true} {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:16,232 INFO L290 TraceCheckUtils]: 41: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:16,232 INFO L290 TraceCheckUtils]: 42: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:43:16,233 INFO L290 TraceCheckUtils]: 43: Hoare triple {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4235#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:43:16,233 INFO L272 TraceCheckUtils]: 44: Hoare triple {4235#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4236#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:43:16,234 INFO L290 TraceCheckUtils]: 45: Hoare triple {4236#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4237#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:43:16,234 INFO L290 TraceCheckUtils]: 46: Hoare triple {4237#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-27 21:43:16,234 INFO L290 TraceCheckUtils]: 47: Hoare triple {4208#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-27 21:43:16,234 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 6 proven. 43 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 21:43:16,234 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:43:16,234 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [914225739] [2022-04-27 21:43:16,234 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [914225739] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:43:16,234 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1629279482] [2022-04-27 21:43:16,234 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:43:16,235 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:43:16,235 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:43:16,235 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:43:16,236 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-27 21:43:16,281 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:43:16,282 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:43:16,282 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-27 21:43:16,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:16,295 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:43:16,349 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:43:16,554 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-27 21:43:16,554 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-27 21:43:29,817 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:43:29,858 INFO L272 TraceCheckUtils]: 0: Hoare triple {4207#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:29,858 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-27 21:43:29,858 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:29,859 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:29,859 INFO L272 TraceCheckUtils]: 4: Hoare triple {4207#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:29,859 INFO L290 TraceCheckUtils]: 5: Hoare triple {4207#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4207#true} is VALID [2022-04-27 21:43:29,859 INFO L290 TraceCheckUtils]: 6: Hoare triple {4207#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4212#(= main_~i~0 0)} is VALID [2022-04-27 21:43:29,859 INFO L290 TraceCheckUtils]: 7: Hoare triple {4212#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4212#(= main_~i~0 0)} is VALID [2022-04-27 21:43:29,860 INFO L290 TraceCheckUtils]: 8: Hoare triple {4212#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:29,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:29,860 INFO L290 TraceCheckUtils]: 10: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:29,861 INFO L290 TraceCheckUtils]: 11: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:29,861 INFO L290 TraceCheckUtils]: 12: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:43:29,862 INFO L290 TraceCheckUtils]: 13: Hoare triple {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:43:29,863 INFO L290 TraceCheckUtils]: 14: Hoare triple {4216#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4284#(exists ((v_main_~i~0_53 Int)) (and (<= v_main_~i~0_53 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_53 4))) 0) (<= (+ v_main_~i~0_53 1) main_~i~0) (<= 3 v_main_~i~0_53)))} is VALID [2022-04-27 21:43:29,863 INFO L290 TraceCheckUtils]: 15: Hoare triple {4284#(exists ((v_main_~i~0_53 Int)) (and (<= v_main_~i~0_53 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_53 4))) 0) (<= (+ v_main_~i~0_53 1) main_~i~0) (<= 3 v_main_~i~0_53)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:29,864 INFO L290 TraceCheckUtils]: 16: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:29,864 INFO L290 TraceCheckUtils]: 17: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:29,864 INFO L290 TraceCheckUtils]: 18: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:29,865 INFO L290 TraceCheckUtils]: 19: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:29,865 INFO L272 TraceCheckUtils]: 20: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,866 INFO L290 TraceCheckUtils]: 21: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,866 INFO L290 TraceCheckUtils]: 22: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,866 INFO L290 TraceCheckUtils]: 23: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,867 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:29,867 INFO L290 TraceCheckUtils]: 25: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:29,867 INFO L290 TraceCheckUtils]: 26: Hoare triple {4219#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-27 21:43:29,868 INFO L290 TraceCheckUtils]: 27: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-27 21:43:29,868 INFO L272 TraceCheckUtils]: 28: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,869 INFO L290 TraceCheckUtils]: 29: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,869 INFO L290 TraceCheckUtils]: 30: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,869 INFO L290 TraceCheckUtils]: 31: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,870 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-27 21:43:29,870 INFO L290 TraceCheckUtils]: 33: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} is VALID [2022-04-27 21:43:29,870 INFO L290 TraceCheckUtils]: 34: Hoare triple {4322#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:43:29,871 INFO L290 TraceCheckUtils]: 35: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:43:29,872 INFO L272 TraceCheckUtils]: 36: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,872 INFO L290 TraceCheckUtils]: 37: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,872 INFO L290 TraceCheckUtils]: 38: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,872 INFO L290 TraceCheckUtils]: 39: Hoare triple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-27 21:43:29,873 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {4303#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 12 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:43:29,873 INFO L290 TraceCheckUtils]: 41: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:43:29,874 INFO L290 TraceCheckUtils]: 42: Hoare triple {4347#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4372#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:43:29,874 INFO L290 TraceCheckUtils]: 43: Hoare triple {4372#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4235#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:43:29,874 INFO L272 TraceCheckUtils]: 44: Hoare triple {4235#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:43:29,875 INFO L290 TraceCheckUtils]: 45: Hoare triple {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4383#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:43:29,875 INFO L290 TraceCheckUtils]: 46: Hoare triple {4383#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-27 21:43:29,875 INFO L290 TraceCheckUtils]: 47: Hoare triple {4208#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-27 21:43:29,875 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 21:43:29,875 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:43:32,100 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:43:32,104 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:43:32,168 INFO L290 TraceCheckUtils]: 47: Hoare triple {4208#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-27 21:43:32,168 INFO L290 TraceCheckUtils]: 46: Hoare triple {4383#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4208#false} is VALID [2022-04-27 21:43:32,169 INFO L290 TraceCheckUtils]: 45: Hoare triple {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4383#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:43:32,169 INFO L272 TraceCheckUtils]: 44: Hoare triple {4235#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4379#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:43:32,169 INFO L290 TraceCheckUtils]: 43: Hoare triple {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4235#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:43:32,170 INFO L290 TraceCheckUtils]: 42: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4234#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:43:32,170 INFO L290 TraceCheckUtils]: 41: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:32,171 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {4207#true} {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:32,171 INFO L290 TraceCheckUtils]: 39: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:32,171 INFO L290 TraceCheckUtils]: 38: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:32,171 INFO L290 TraceCheckUtils]: 37: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-27 21:43:32,171 INFO L272 TraceCheckUtils]: 36: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-27 21:43:32,172 INFO L290 TraceCheckUtils]: 35: Hoare triple {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:32,172 INFO L290 TraceCheckUtils]: 34: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4229#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:32,173 INFO L290 TraceCheckUtils]: 33: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:32,173 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {4207#true} {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:32,173 INFO L290 TraceCheckUtils]: 31: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:32,173 INFO L290 TraceCheckUtils]: 30: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:32,173 INFO L290 TraceCheckUtils]: 29: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-27 21:43:32,173 INFO L272 TraceCheckUtils]: 28: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-27 21:43:32,174 INFO L290 TraceCheckUtils]: 27: Hoare triple {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:32,174 INFO L290 TraceCheckUtils]: 26: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4224#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:32,175 INFO L290 TraceCheckUtils]: 25: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:43:32,175 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {4207#true} {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:43:32,175 INFO L290 TraceCheckUtils]: 23: Hoare triple {4207#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:32,175 INFO L290 TraceCheckUtils]: 22: Hoare triple {4207#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:32,175 INFO L290 TraceCheckUtils]: 21: Hoare triple {4207#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4207#true} is VALID [2022-04-27 21:43:32,175 INFO L272 TraceCheckUtils]: 20: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4207#true} is VALID [2022-04-27 21:43:32,176 INFO L290 TraceCheckUtils]: 19: Hoare triple {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:43:32,176 INFO L290 TraceCheckUtils]: 18: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4453#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:43:32,176 INFO L290 TraceCheckUtils]: 17: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:32,176 INFO L290 TraceCheckUtils]: 16: Hoare triple {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:32,177 INFO L290 TraceCheckUtils]: 15: Hoare triple {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4218#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:32,177 INFO L290 TraceCheckUtils]: 14: Hoare triple {4490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-27 21:43:32,178 INFO L290 TraceCheckUtils]: 13: Hoare triple {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} is VALID [2022-04-27 21:43:32,178 INFO L290 TraceCheckUtils]: 12: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4215#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:43:32,179 INFO L290 TraceCheckUtils]: 11: Hoare triple {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:32,179 INFO L290 TraceCheckUtils]: 10: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4214#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:32,179 INFO L290 TraceCheckUtils]: 9: Hoare triple {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:32,180 INFO L290 TraceCheckUtils]: 8: Hoare triple {4212#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4213#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:32,180 INFO L290 TraceCheckUtils]: 7: Hoare triple {4212#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4212#(= main_~i~0 0)} is VALID [2022-04-27 21:43:32,180 INFO L290 TraceCheckUtils]: 6: Hoare triple {4207#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4212#(= main_~i~0 0)} is VALID [2022-04-27 21:43:32,180 INFO L290 TraceCheckUtils]: 5: Hoare triple {4207#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4207#true} is VALID [2022-04-27 21:43:32,180 INFO L272 TraceCheckUtils]: 4: Hoare triple {4207#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:32,180 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4207#true} {4207#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:32,181 INFO L290 TraceCheckUtils]: 2: Hoare triple {4207#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:32,181 INFO L290 TraceCheckUtils]: 1: Hoare triple {4207#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4207#true} is VALID [2022-04-27 21:43:32,181 INFO L272 TraceCheckUtils]: 0: Hoare triple {4207#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4207#true} is VALID [2022-04-27 21:43:32,181 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 6 proven. 43 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 21:43:32,181 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1629279482] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:43:32,181 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:43:32,181 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 16] total 26 [2022-04-27 21:43:32,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952959442] [2022-04-27 21:43:32,181 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:43:32,182 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 48 [2022-04-27 21:43:32,182 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:43:32,182 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 21:43:32,229 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:43:32,229 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-27 21:43:32,229 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:43:32,229 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-27 21:43:32,229 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=570, Unknown=4, NotChecked=0, Total=650 [2022-04-27 21:43:32,230 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 21:43:33,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:43:33,684 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2022-04-27 21:43:33,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-27 21:43:33,684 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 48 [2022-04-27 21:43:33,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:43:33,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 21:43:33,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 68 transitions. [2022-04-27 21:43:33,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 21:43:33,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 68 transitions. [2022-04-27 21:43:33,687 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 68 transitions. [2022-04-27 21:43:33,742 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:43:33,744 INFO L225 Difference]: With dead ends: 115 [2022-04-27 21:43:33,744 INFO L226 Difference]: Without dead ends: 113 [2022-04-27 21:43:33,745 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 84 SyntacticMatches, 11 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 371 ImplicationChecksByTransitivity, 15.6s TimeCoverageRelationStatistics Valid=188, Invalid=1530, Unknown=4, NotChecked=0, Total=1722 [2022-04-27 21:43:33,745 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 41 mSDsluCounter, 144 mSDsCounter, 0 mSdLazyCounter, 591 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 168 SdHoareTripleChecker+Invalid, 731 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 591 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 113 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 21:43:33,745 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 168 Invalid, 731 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 591 Invalid, 0 Unknown, 113 Unchecked, 0.5s Time] [2022-04-27 21:43:33,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2022-04-27 21:43:33,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 83. [2022-04-27 21:43:33,775 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:43:33,775 INFO L82 GeneralOperation]: Start isEquivalent. First operand 113 states. Second operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:43:33,775 INFO L74 IsIncluded]: Start isIncluded. First operand 113 states. Second operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:43:33,777 INFO L87 Difference]: Start difference. First operand 113 states. Second operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:43:33,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:43:33,778 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2022-04-27 21:43:33,778 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2022-04-27 21:43:33,779 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:43:33,779 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:43:33,779 INFO L74 IsIncluded]: Start isIncluded. First operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 113 states. [2022-04-27 21:43:33,779 INFO L87 Difference]: Start difference. First operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 113 states. [2022-04-27 21:43:33,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:43:33,781 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2022-04-27 21:43:33,781 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2022-04-27 21:43:33,781 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:43:33,781 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:43:33,781 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:43:33,781 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:43:33,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 63 states have (on average 1.0634920634920635) internal successors, (67), 66 states have internal predecessors, (67), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:43:33,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 88 transitions. [2022-04-27 21:43:33,782 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 88 transitions. Word has length 48 [2022-04-27 21:43:33,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:43:33,782 INFO L495 AbstractCegarLoop]: Abstraction has 83 states and 88 transitions. [2022-04-27 21:43:33,783 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 2.16) internal successors, (54), 23 states have internal predecessors, (54), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-27 21:43:33,783 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 88 transitions. [2022-04-27 21:43:33,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-27 21:43:33,783 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:43:33,783 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:43:33,799 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-27 21:43:33,987 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:43:33,987 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:43:33,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:43:33,988 INFO L85 PathProgramCache]: Analyzing trace with hash 1776768797, now seen corresponding path program 9 times [2022-04-27 21:43:33,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:43:33,988 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [163694669] [2022-04-27 21:43:33,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:43:33,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:43:34,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:34,174 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:43:34,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:34,189 INFO L290 TraceCheckUtils]: 0: Hoare triple {5106#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-27 21:43:34,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,189 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,189 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 21:43:34,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:34,192 INFO L290 TraceCheckUtils]: 0: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-27 21:43:34,192 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,192 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,201 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:34,201 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-27 21:43:34,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:34,203 INFO L290 TraceCheckUtils]: 0: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-27 21:43:34,203 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,203 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,204 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:34,204 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-27 21:43:34,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:34,206 INFO L290 TraceCheckUtils]: 0: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-27 21:43:34,206 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,206 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,220 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:34,221 INFO L272 TraceCheckUtils]: 0: Hoare triple {5074#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5106#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:43:34,221 INFO L290 TraceCheckUtils]: 1: Hoare triple {5106#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-27 21:43:34,221 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,221 INFO L272 TraceCheckUtils]: 4: Hoare triple {5074#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,221 INFO L290 TraceCheckUtils]: 5: Hoare triple {5074#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5074#true} is VALID [2022-04-27 21:43:34,221 INFO L290 TraceCheckUtils]: 6: Hoare triple {5074#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5079#(= main_~i~0 0)} is VALID [2022-04-27 21:43:34,222 INFO L290 TraceCheckUtils]: 7: Hoare triple {5079#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5079#(= main_~i~0 0)} is VALID [2022-04-27 21:43:34,222 INFO L290 TraceCheckUtils]: 8: Hoare triple {5079#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:34,222 INFO L290 TraceCheckUtils]: 9: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:43:34,223 INFO L290 TraceCheckUtils]: 10: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:34,223 INFO L290 TraceCheckUtils]: 11: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:43:34,223 INFO L290 TraceCheckUtils]: 12: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:43:34,224 INFO L290 TraceCheckUtils]: 13: Hoare triple {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:43:34,224 INFO L290 TraceCheckUtils]: 14: Hoare triple {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} is VALID [2022-04-27 21:43:34,225 INFO L290 TraceCheckUtils]: 15: Hoare triple {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} is VALID [2022-04-27 21:43:34,225 INFO L290 TraceCheckUtils]: 16: Hoare triple {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-27 21:43:34,226 INFO L290 TraceCheckUtils]: 17: Hoare triple {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:34,226 INFO L290 TraceCheckUtils]: 18: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:34,226 INFO L290 TraceCheckUtils]: 19: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:43:34,227 INFO L290 TraceCheckUtils]: 20: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:34,227 INFO L290 TraceCheckUtils]: 21: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:34,227 INFO L272 TraceCheckUtils]: 22: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-27 21:43:34,227 INFO L290 TraceCheckUtils]: 23: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-27 21:43:34,227 INFO L290 TraceCheckUtils]: 24: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,227 INFO L290 TraceCheckUtils]: 25: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,228 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {5074#true} {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:34,228 INFO L290 TraceCheckUtils]: 27: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:43:34,228 INFO L290 TraceCheckUtils]: 28: Hoare triple {5087#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:34,229 INFO L290 TraceCheckUtils]: 29: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:34,229 INFO L272 TraceCheckUtils]: 30: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-27 21:43:34,229 INFO L290 TraceCheckUtils]: 31: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-27 21:43:34,229 INFO L290 TraceCheckUtils]: 32: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,229 INFO L290 TraceCheckUtils]: 33: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,230 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {5074#true} {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:34,230 INFO L290 TraceCheckUtils]: 35: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:43:34,230 INFO L290 TraceCheckUtils]: 36: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:34,231 INFO L290 TraceCheckUtils]: 37: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:34,231 INFO L272 TraceCheckUtils]: 38: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-27 21:43:34,231 INFO L290 TraceCheckUtils]: 39: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-27 21:43:34,231 INFO L290 TraceCheckUtils]: 40: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,231 INFO L290 TraceCheckUtils]: 41: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:43:34,231 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {5074#true} {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:34,232 INFO L290 TraceCheckUtils]: 43: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:43:34,232 INFO L290 TraceCheckUtils]: 44: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:43:34,233 INFO L290 TraceCheckUtils]: 45: Hoare triple {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5103#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:43:34,233 INFO L272 TraceCheckUtils]: 46: Hoare triple {5103#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5104#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:43:34,233 INFO L290 TraceCheckUtils]: 47: Hoare triple {5104#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5105#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:43:34,233 INFO L290 TraceCheckUtils]: 48: Hoare triple {5105#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-27 21:43:34,234 INFO L290 TraceCheckUtils]: 49: Hoare triple {5075#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-27 21:43:34,234 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-27 21:43:34,234 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:43:34,234 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [163694669] [2022-04-27 21:43:34,234 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [163694669] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:43:34,234 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1577527051] [2022-04-27 21:43:34,234 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:43:34,234 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:43:34,234 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:43:34,235 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:43:34,235 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-27 21:43:34,289 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-04-27 21:43:34,289 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:43:34,290 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-27 21:43:34,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:43:34,300 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:43:34,355 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:43:34,464 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 21:43:34,465 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 21:43:34,488 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 21:43:34,489 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 21:44:03,858 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:44:03,901 INFO L272 TraceCheckUtils]: 0: Hoare triple {5074#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:03,901 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-27 21:44:03,901 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:03,901 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:03,901 INFO L272 TraceCheckUtils]: 4: Hoare triple {5074#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:03,901 INFO L290 TraceCheckUtils]: 5: Hoare triple {5074#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5074#true} is VALID [2022-04-27 21:44:03,909 INFO L290 TraceCheckUtils]: 6: Hoare triple {5074#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5079#(= main_~i~0 0)} is VALID [2022-04-27 21:44:03,909 INFO L290 TraceCheckUtils]: 7: Hoare triple {5079#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5079#(= main_~i~0 0)} is VALID [2022-04-27 21:44:03,910 INFO L290 TraceCheckUtils]: 8: Hoare triple {5079#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:44:03,910 INFO L290 TraceCheckUtils]: 9: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:44:03,911 INFO L290 TraceCheckUtils]: 10: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:44:03,911 INFO L290 TraceCheckUtils]: 11: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:44:03,911 INFO L290 TraceCheckUtils]: 12: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:44:03,912 INFO L290 TraceCheckUtils]: 13: Hoare triple {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:44:03,912 INFO L290 TraceCheckUtils]: 14: Hoare triple {5083#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} is VALID [2022-04-27 21:44:03,913 INFO L290 TraceCheckUtils]: 15: Hoare triple {5084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:44:03,913 INFO L290 TraceCheckUtils]: 16: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:44:03,915 INFO L290 TraceCheckUtils]: 17: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:44:03,915 INFO L290 TraceCheckUtils]: 18: Hoare triple {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:44:03,916 INFO L290 TraceCheckUtils]: 19: Hoare triple {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:44:03,916 INFO L290 TraceCheckUtils]: 20: Hoare triple {5161#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-27 21:44:03,917 INFO L290 TraceCheckUtils]: 21: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-27 21:44:03,918 INFO L272 TraceCheckUtils]: 22: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-27 21:44:03,918 INFO L290 TraceCheckUtils]: 23: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-27 21:44:03,918 INFO L290 TraceCheckUtils]: 24: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-27 21:44:03,919 INFO L290 TraceCheckUtils]: 25: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-27 21:44:03,919 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-27 21:44:03,920 INFO L290 TraceCheckUtils]: 27: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} is VALID [2022-04-27 21:44:03,920 INFO L290 TraceCheckUtils]: 28: Hoare triple {5171#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:44:03,921 INFO L290 TraceCheckUtils]: 29: Hoare triple {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:44:05,923 WARN L272 TraceCheckUtils]: 30: Hoare triple {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is UNKNOWN [2022-04-27 21:44:05,924 INFO L290 TraceCheckUtils]: 31: Hoare triple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-27 21:44:05,925 INFO L290 TraceCheckUtils]: 32: Hoare triple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-27 21:44:05,925 INFO L290 TraceCheckUtils]: 33: Hoare triple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} is VALID [2022-04-27 21:44:05,926 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {5204#(exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0)))} {5197#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} is VALID [2022-04-27 21:44:07,928 WARN L290 TraceCheckUtils]: 35: Hoare triple {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} is UNKNOWN [2022-04-27 21:44:07,929 INFO L290 TraceCheckUtils]: 36: Hoare triple {5217#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (main_~i~0 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ v_main_~x~0.offset_BEFORE_CALL_26 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:44:07,930 INFO L290 TraceCheckUtils]: 37: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:44:07,931 INFO L272 TraceCheckUtils]: 38: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-27 21:44:07,931 INFO L290 TraceCheckUtils]: 39: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-27 21:44:07,932 INFO L290 TraceCheckUtils]: 40: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-27 21:44:07,932 INFO L290 TraceCheckUtils]: 41: Hoare triple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} is VALID [2022-04-27 21:44:07,933 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {5178#(exists ((v_main_~x~0.base_BEFORE_CALL_25 Int) (main_~i~0 Int) (v_main_~x~0.offset_BEFORE_CALL_25 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ v_main_~x~0.offset_BEFORE_CALL_25 (* main_~i~0 4))) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_25) (+ 12 v_main_~x~0.offset_BEFORE_CALL_25)) 0)))} {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:44:07,933 INFO L290 TraceCheckUtils]: 43: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:44:07,934 INFO L290 TraceCheckUtils]: 44: Hoare triple {5224#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (exists ((v_main_~x~0.base_BEFORE_CALL_26 Int) (v_main_~x~0.offset_BEFORE_CALL_26 Int) (v_main_~i~0_64 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ (* v_main_~i~0_64 4) v_main_~x~0.offset_BEFORE_CALL_26)) 0) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_26) (+ 12 v_main_~x~0.offset_BEFORE_CALL_26)) 0))) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5249#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:44:07,934 INFO L290 TraceCheckUtils]: 45: Hoare triple {5249#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5103#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:44:07,934 INFO L272 TraceCheckUtils]: 46: Hoare triple {5103#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5256#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:44:07,935 INFO L290 TraceCheckUtils]: 47: Hoare triple {5256#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5260#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:44:07,935 INFO L290 TraceCheckUtils]: 48: Hoare triple {5260#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-27 21:44:07,935 INFO L290 TraceCheckUtils]: 49: Hoare triple {5075#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-27 21:44:07,936 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 6 proven. 58 refuted. 4 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 21:44:07,936 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:44:12,450 WARN L833 $PredicateComparison]: unable to prove that (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) is different from false [2022-04-27 21:44:14,307 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:44:14,311 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:44:14,386 INFO L290 TraceCheckUtils]: 49: Hoare triple {5075#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-27 21:44:14,387 INFO L290 TraceCheckUtils]: 48: Hoare triple {5260#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5075#false} is VALID [2022-04-27 21:44:14,387 INFO L290 TraceCheckUtils]: 47: Hoare triple {5256#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5260#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:44:14,387 INFO L272 TraceCheckUtils]: 46: Hoare triple {5103#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5256#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:44:14,388 INFO L290 TraceCheckUtils]: 45: Hoare triple {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5103#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:44:14,388 INFO L290 TraceCheckUtils]: 44: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5102#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:44:14,389 INFO L290 TraceCheckUtils]: 43: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:44:14,389 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {5074#true} {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:44:14,389 INFO L290 TraceCheckUtils]: 41: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:14,389 INFO L290 TraceCheckUtils]: 40: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:14,389 INFO L290 TraceCheckUtils]: 39: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-27 21:44:14,389 INFO L272 TraceCheckUtils]: 38: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-27 21:44:14,390 INFO L290 TraceCheckUtils]: 37: Hoare triple {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:44:14,390 INFO L290 TraceCheckUtils]: 36: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5097#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:44:14,390 INFO L290 TraceCheckUtils]: 35: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:44:14,391 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {5074#true} {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:44:14,391 INFO L290 TraceCheckUtils]: 33: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:14,391 INFO L290 TraceCheckUtils]: 32: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:14,391 INFO L290 TraceCheckUtils]: 31: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-27 21:44:14,391 INFO L272 TraceCheckUtils]: 30: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-27 21:44:14,392 INFO L290 TraceCheckUtils]: 29: Hoare triple {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:44:14,392 INFO L290 TraceCheckUtils]: 28: Hoare triple {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5092#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:44:14,392 INFO L290 TraceCheckUtils]: 27: Hoare triple {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:44:14,393 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {5074#true} {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:44:14,393 INFO L290 TraceCheckUtils]: 25: Hoare triple {5074#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:14,393 INFO L290 TraceCheckUtils]: 24: Hoare triple {5074#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:14,393 INFO L290 TraceCheckUtils]: 23: Hoare triple {5074#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5074#true} is VALID [2022-04-27 21:44:14,393 INFO L272 TraceCheckUtils]: 22: Hoare triple {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5074#true} is VALID [2022-04-27 21:44:14,393 INFO L290 TraceCheckUtils]: 21: Hoare triple {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:44:14,394 INFO L290 TraceCheckUtils]: 20: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5330#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:44:14,394 INFO L290 TraceCheckUtils]: 19: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:44:14,394 INFO L290 TraceCheckUtils]: 18: Hoare triple {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:44:14,396 INFO L290 TraceCheckUtils]: 17: Hoare triple {5364#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5086#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-27 21:44:14,396 INFO L290 TraceCheckUtils]: 16: Hoare triple {5364#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5364#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:44:14,397 INFO L290 TraceCheckUtils]: 15: Hoare triple {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5364#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-27 21:44:14,397 INFO L290 TraceCheckUtils]: 14: Hoare triple {5374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5085#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (= (+ main_~x~0.offset 12) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-27 21:44:14,398 INFO L290 TraceCheckUtils]: 13: Hoare triple {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (not (<= main_~i~0 2)))} is VALID [2022-04-27 21:44:14,398 INFO L290 TraceCheckUtils]: 12: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5082#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:44:14,398 INFO L290 TraceCheckUtils]: 11: Hoare triple {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:44:14,399 INFO L290 TraceCheckUtils]: 10: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5081#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:44:14,399 INFO L290 TraceCheckUtils]: 9: Hoare triple {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:44:14,399 INFO L290 TraceCheckUtils]: 8: Hoare triple {5079#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5080#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:44:14,400 INFO L290 TraceCheckUtils]: 7: Hoare triple {5079#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5079#(= main_~i~0 0)} is VALID [2022-04-27 21:44:14,400 INFO L290 TraceCheckUtils]: 6: Hoare triple {5074#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5079#(= main_~i~0 0)} is VALID [2022-04-27 21:44:14,400 INFO L290 TraceCheckUtils]: 5: Hoare triple {5074#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5074#true} is VALID [2022-04-27 21:44:14,400 INFO L272 TraceCheckUtils]: 4: Hoare triple {5074#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:14,400 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5074#true} {5074#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:14,400 INFO L290 TraceCheckUtils]: 2: Hoare triple {5074#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:14,400 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5074#true} is VALID [2022-04-27 21:44:14,400 INFO L272 TraceCheckUtils]: 0: Hoare triple {5074#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#true} is VALID [2022-04-27 21:44:14,401 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 6 proven. 43 refuted. 0 times theorem prover too weak. 12 trivial. 11 not checked. [2022-04-27 21:44:14,401 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1577527051] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:44:14,401 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:44:14,401 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 20, 17] total 31 [2022-04-27 21:44:14,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [94072453] [2022-04-27 21:44:14,401 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:44:14,401 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) Word has length 50 [2022-04-27 21:44:14,402 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:44:14,402 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 21:44:32,791 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 77 inductive. 0 not inductive. 10 times theorem prover too weak to decide inductivity. [2022-04-27 21:44:32,791 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-27 21:44:32,791 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:44:32,792 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-27 21:44:32,792 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=742, Unknown=25, NotChecked=56, Total=930 [2022-04-27 21:44:32,792 INFO L87 Difference]: Start difference. First operand 83 states and 88 transitions. Second operand has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 21:44:35,284 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (<= 4 c_main_~i~0) (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 12)) 0) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-27 21:44:37,594 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ c_main_~x~0.offset 12))) (and (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) (= (select (select |c_#memory_int| c_main_~x~0.base) .cse0) 0) (not (= (+ (* c_main_~i~0 4) c_main_~x~0.offset) .cse0)))) is different from false [2022-04-27 21:44:37,957 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 12)) 0)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 12)) 0) (exists ((main_~i~0 Int)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4))) 0))) is different from false [2022-04-27 21:44:45,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:44:45,136 INFO L93 Difference]: Finished difference Result 122 states and 126 transitions. [2022-04-27 21:44:45,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-27 21:44:45,136 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) Word has length 50 [2022-04-27 21:44:45,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:44:45,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 21:44:45,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 71 transitions. [2022-04-27 21:44:45,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 21:44:45,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 71 transitions. [2022-04-27 21:44:45,138 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 71 transitions. [2022-04-27 21:44:56,615 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 64 inductive. 0 not inductive. 7 times theorem prover too weak to decide inductivity. [2022-04-27 21:44:56,617 INFO L225 Difference]: With dead ends: 122 [2022-04-27 21:44:56,618 INFO L226 Difference]: Without dead ends: 120 [2022-04-27 21:44:56,618 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 89 SyntacticMatches, 9 SemanticMatches, 45 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 405 ImplicationChecksByTransitivity, 38.6s TimeCoverageRelationStatistics Valid=211, Invalid=1580, Unknown=31, NotChecked=340, Total=2162 [2022-04-27 21:44:56,619 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 59 mSDsluCounter, 216 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 242 SdHoareTripleChecker+Invalid, 477 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 145 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:44:56,619 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 242 Invalid, 477 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 312 Invalid, 0 Unknown, 145 Unchecked, 0.2s Time] [2022-04-27 21:44:56,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-04-27 21:44:56,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 57. [2022-04-27 21:44:56,641 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:44:56,641 INFO L82 GeneralOperation]: Start isEquivalent. First operand 120 states. Second operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:44:56,641 INFO L74 IsIncluded]: Start isIncluded. First operand 120 states. Second operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:44:56,641 INFO L87 Difference]: Start difference. First operand 120 states. Second operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:44:56,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:44:56,644 INFO L93 Difference]: Finished difference Result 120 states and 124 transitions. [2022-04-27 21:44:56,644 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 124 transitions. [2022-04-27 21:44:56,644 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:44:56,644 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:44:56,644 INFO L74 IsIncluded]: Start isIncluded. First operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 120 states. [2022-04-27 21:44:56,644 INFO L87 Difference]: Start difference. First operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 120 states. [2022-04-27 21:44:56,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:44:56,646 INFO L93 Difference]: Finished difference Result 120 states and 124 transitions. [2022-04-27 21:44:56,646 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 124 transitions. [2022-04-27 21:44:56,647 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:44:56,647 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:44:56,647 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:44:56,647 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:44:56,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 44 states have internal predecessors, (45), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:44:56,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 58 transitions. [2022-04-27 21:44:56,648 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 58 transitions. Word has length 50 [2022-04-27 21:44:56,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:44:56,648 INFO L495 AbstractCegarLoop]: Abstraction has 57 states and 58 transitions. [2022-04-27 21:44:56,648 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 30 states have (on average 2.2333333333333334) internal successors, (67), 28 states have internal predecessors, (67), 9 states have call successors, (12), 6 states have call predecessors, (12), 3 states have return successors, (8), 8 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 21:44:56,648 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 58 transitions. [2022-04-27 21:44:56,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-27 21:44:56,648 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:44:56,648 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:44:56,666 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-27 21:44:56,848 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-27 21:44:56,849 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:44:56,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:44:56,849 INFO L85 PathProgramCache]: Analyzing trace with hash 692034935, now seen corresponding path program 10 times [2022-04-27 21:44:56,849 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:44:56,849 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [338219270] [2022-04-27 21:44:56,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:44:56,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:44:56,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:56,957 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:44:56,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:56,961 INFO L290 TraceCheckUtils]: 0: Hoare triple {5977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5945#true} is VALID [2022-04-27 21:44:56,961 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,961 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5945#true} {5945#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,961 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-27 21:44:56,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:56,966 INFO L290 TraceCheckUtils]: 0: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:56,966 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,966 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,967 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-27 21:44:56,967 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 21:44:56,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:56,970 INFO L290 TraceCheckUtils]: 0: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:56,970 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,970 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,970 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5961#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:44:56,970 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 21:44:56,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:56,973 INFO L290 TraceCheckUtils]: 0: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:56,973 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,973 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,973 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5966#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:44:56,973 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-27 21:44:56,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:56,975 INFO L290 TraceCheckUtils]: 0: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:56,975 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,975 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,976 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5971#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:44:56,976 INFO L272 TraceCheckUtils]: 0: Hoare triple {5945#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:44:56,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {5977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5945#true} is VALID [2022-04-27 21:44:56,976 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,976 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5945#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,976 INFO L272 TraceCheckUtils]: 4: Hoare triple {5945#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,977 INFO L290 TraceCheckUtils]: 5: Hoare triple {5945#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5945#true} is VALID [2022-04-27 21:44:56,977 INFO L290 TraceCheckUtils]: 6: Hoare triple {5945#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5950#(= main_~i~0 0)} is VALID [2022-04-27 21:44:56,977 INFO L290 TraceCheckUtils]: 7: Hoare triple {5950#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5950#(= main_~i~0 0)} is VALID [2022-04-27 21:44:56,977 INFO L290 TraceCheckUtils]: 8: Hoare triple {5950#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5951#(<= main_~i~0 1)} is VALID [2022-04-27 21:44:56,978 INFO L290 TraceCheckUtils]: 9: Hoare triple {5951#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5951#(<= main_~i~0 1)} is VALID [2022-04-27 21:44:56,978 INFO L290 TraceCheckUtils]: 10: Hoare triple {5951#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5952#(<= main_~i~0 2)} is VALID [2022-04-27 21:44:56,978 INFO L290 TraceCheckUtils]: 11: Hoare triple {5952#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5952#(<= main_~i~0 2)} is VALID [2022-04-27 21:44:56,979 INFO L290 TraceCheckUtils]: 12: Hoare triple {5952#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5953#(<= main_~i~0 3)} is VALID [2022-04-27 21:44:56,979 INFO L290 TraceCheckUtils]: 13: Hoare triple {5953#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5953#(<= main_~i~0 3)} is VALID [2022-04-27 21:44:56,979 INFO L290 TraceCheckUtils]: 14: Hoare triple {5953#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5954#(<= main_~i~0 4)} is VALID [2022-04-27 21:44:56,980 INFO L290 TraceCheckUtils]: 15: Hoare triple {5954#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5955#(<= main_~n~0 4)} is VALID [2022-04-27 21:44:56,980 INFO L290 TraceCheckUtils]: 16: Hoare triple {5955#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-27 21:44:56,980 INFO L290 TraceCheckUtils]: 17: Hoare triple {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-27 21:44:56,981 INFO L272 TraceCheckUtils]: 18: Hoare triple {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:56,981 INFO L290 TraceCheckUtils]: 19: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:56,981 INFO L290 TraceCheckUtils]: 20: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,981 INFO L290 TraceCheckUtils]: 21: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,981 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {5945#true} {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-27 21:44:56,981 INFO L290 TraceCheckUtils]: 23: Hoare triple {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-27 21:44:56,982 INFO L290 TraceCheckUtils]: 24: Hoare triple {5956#(and (<= main_~n~0 4) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:44:56,982 INFO L290 TraceCheckUtils]: 25: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:44:56,982 INFO L272 TraceCheckUtils]: 26: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:56,982 INFO L290 TraceCheckUtils]: 27: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:56,982 INFO L290 TraceCheckUtils]: 28: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,982 INFO L290 TraceCheckUtils]: 29: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,983 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {5945#true} {5961#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:44:56,983 INFO L290 TraceCheckUtils]: 31: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:44:56,983 INFO L290 TraceCheckUtils]: 32: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:44:56,984 INFO L290 TraceCheckUtils]: 33: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:44:56,984 INFO L272 TraceCheckUtils]: 34: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:56,984 INFO L290 TraceCheckUtils]: 35: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:56,984 INFO L290 TraceCheckUtils]: 36: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,984 INFO L290 TraceCheckUtils]: 37: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,984 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {5945#true} {5966#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:44:56,985 INFO L290 TraceCheckUtils]: 39: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:44:56,985 INFO L290 TraceCheckUtils]: 40: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:44:56,985 INFO L290 TraceCheckUtils]: 41: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:44:56,985 INFO L272 TraceCheckUtils]: 42: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:56,985 INFO L290 TraceCheckUtils]: 43: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:56,985 INFO L290 TraceCheckUtils]: 44: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,986 INFO L290 TraceCheckUtils]: 45: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:56,986 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {5945#true} {5971#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:44:56,986 INFO L290 TraceCheckUtils]: 47: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:44:56,987 INFO L290 TraceCheckUtils]: 48: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5976#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:44:56,987 INFO L290 TraceCheckUtils]: 49: Hoare triple {5976#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5946#false} is VALID [2022-04-27 21:44:56,987 INFO L272 TraceCheckUtils]: 50: Hoare triple {5946#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5946#false} is VALID [2022-04-27 21:44:56,987 INFO L290 TraceCheckUtils]: 51: Hoare triple {5946#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5946#false} is VALID [2022-04-27 21:44:56,987 INFO L290 TraceCheckUtils]: 52: Hoare triple {5946#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-27 21:44:56,987 INFO L290 TraceCheckUtils]: 53: Hoare triple {5946#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-27 21:44:56,987 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 27 proven. 29 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 21:44:56,987 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:44:56,987 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [338219270] [2022-04-27 21:44:56,988 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [338219270] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:44:56,988 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [914470426] [2022-04-27 21:44:56,988 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:44:56,988 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:44:56,988 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:44:56,990 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:44:56,991 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-27 21:44:57,043 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:44:57,043 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:44:57,044 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-27 21:44:57,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:57,056 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:44:57,376 INFO L272 TraceCheckUtils]: 0: Hoare triple {5945#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,376 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5945#true} is VALID [2022-04-27 21:44:57,377 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,377 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5945#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,377 INFO L272 TraceCheckUtils]: 4: Hoare triple {5945#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,377 INFO L290 TraceCheckUtils]: 5: Hoare triple {5945#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5945#true} is VALID [2022-04-27 21:44:57,377 INFO L290 TraceCheckUtils]: 6: Hoare triple {5945#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5999#(<= main_~i~0 0)} is VALID [2022-04-27 21:44:57,377 INFO L290 TraceCheckUtils]: 7: Hoare triple {5999#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5999#(<= main_~i~0 0)} is VALID [2022-04-27 21:44:57,378 INFO L290 TraceCheckUtils]: 8: Hoare triple {5999#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5951#(<= main_~i~0 1)} is VALID [2022-04-27 21:44:57,378 INFO L290 TraceCheckUtils]: 9: Hoare triple {5951#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5951#(<= main_~i~0 1)} is VALID [2022-04-27 21:44:57,378 INFO L290 TraceCheckUtils]: 10: Hoare triple {5951#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5952#(<= main_~i~0 2)} is VALID [2022-04-27 21:44:57,379 INFO L290 TraceCheckUtils]: 11: Hoare triple {5952#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5952#(<= main_~i~0 2)} is VALID [2022-04-27 21:44:57,379 INFO L290 TraceCheckUtils]: 12: Hoare triple {5952#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5953#(<= main_~i~0 3)} is VALID [2022-04-27 21:44:57,379 INFO L290 TraceCheckUtils]: 13: Hoare triple {5953#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5953#(<= main_~i~0 3)} is VALID [2022-04-27 21:44:57,380 INFO L290 TraceCheckUtils]: 14: Hoare triple {5953#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5954#(<= main_~i~0 4)} is VALID [2022-04-27 21:44:57,380 INFO L290 TraceCheckUtils]: 15: Hoare triple {5954#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5955#(<= main_~n~0 4)} is VALID [2022-04-27 21:44:57,380 INFO L290 TraceCheckUtils]: 16: Hoare triple {5955#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,381 INFO L290 TraceCheckUtils]: 17: Hoare triple {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,381 INFO L272 TraceCheckUtils]: 18: Hoare triple {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:57,381 INFO L290 TraceCheckUtils]: 19: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:57,381 INFO L290 TraceCheckUtils]: 20: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,381 INFO L290 TraceCheckUtils]: 21: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,381 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {5945#true} {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,382 INFO L290 TraceCheckUtils]: 23: Hoare triple {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,382 INFO L290 TraceCheckUtils]: 24: Hoare triple {6030#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,382 INFO L290 TraceCheckUtils]: 25: Hoare triple {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,383 INFO L272 TraceCheckUtils]: 26: Hoare triple {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:57,383 INFO L290 TraceCheckUtils]: 27: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:57,383 INFO L290 TraceCheckUtils]: 28: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,383 INFO L290 TraceCheckUtils]: 29: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,383 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {5945#true} {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,384 INFO L290 TraceCheckUtils]: 31: Hoare triple {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,384 INFO L290 TraceCheckUtils]: 32: Hoare triple {6055#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,385 INFO L290 TraceCheckUtils]: 33: Hoare triple {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,385 INFO L272 TraceCheckUtils]: 34: Hoare triple {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:57,385 INFO L290 TraceCheckUtils]: 35: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:57,385 INFO L290 TraceCheckUtils]: 36: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,385 INFO L290 TraceCheckUtils]: 37: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,385 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {5945#true} {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,386 INFO L290 TraceCheckUtils]: 39: Hoare triple {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,386 INFO L290 TraceCheckUtils]: 40: Hoare triple {6080#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,386 INFO L290 TraceCheckUtils]: 41: Hoare triple {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,386 INFO L272 TraceCheckUtils]: 42: Hoare triple {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:57,386 INFO L290 TraceCheckUtils]: 43: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:57,387 INFO L290 TraceCheckUtils]: 44: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,387 INFO L290 TraceCheckUtils]: 45: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,387 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {5945#true} {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,387 INFO L290 TraceCheckUtils]: 47: Hoare triple {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,388 INFO L290 TraceCheckUtils]: 48: Hoare triple {6105#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6130#(and (<= 4 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-27 21:44:57,388 INFO L290 TraceCheckUtils]: 49: Hoare triple {6130#(and (<= 4 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5946#false} is VALID [2022-04-27 21:44:57,388 INFO L272 TraceCheckUtils]: 50: Hoare triple {5946#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5946#false} is VALID [2022-04-27 21:44:57,388 INFO L290 TraceCheckUtils]: 51: Hoare triple {5946#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5946#false} is VALID [2022-04-27 21:44:57,388 INFO L290 TraceCheckUtils]: 52: Hoare triple {5946#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-27 21:44:57,388 INFO L290 TraceCheckUtils]: 53: Hoare triple {5946#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-27 21:44:57,389 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 21:44:57,389 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:44:57,608 INFO L290 TraceCheckUtils]: 53: Hoare triple {5946#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-27 21:44:57,608 INFO L290 TraceCheckUtils]: 52: Hoare triple {5946#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5946#false} is VALID [2022-04-27 21:44:57,609 INFO L290 TraceCheckUtils]: 51: Hoare triple {5946#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5946#false} is VALID [2022-04-27 21:44:57,609 INFO L272 TraceCheckUtils]: 50: Hoare triple {5946#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5946#false} is VALID [2022-04-27 21:44:57,609 INFO L290 TraceCheckUtils]: 49: Hoare triple {5976#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5946#false} is VALID [2022-04-27 21:44:57,609 INFO L290 TraceCheckUtils]: 48: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5976#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:44:57,610 INFO L290 TraceCheckUtils]: 47: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:44:57,610 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {5945#true} {5971#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:44:57,610 INFO L290 TraceCheckUtils]: 45: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,610 INFO L290 TraceCheckUtils]: 44: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,610 INFO L290 TraceCheckUtils]: 43: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:57,610 INFO L272 TraceCheckUtils]: 42: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:57,611 INFO L290 TraceCheckUtils]: 41: Hoare triple {5971#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:44:57,611 INFO L290 TraceCheckUtils]: 40: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5971#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:44:57,611 INFO L290 TraceCheckUtils]: 39: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:44:57,612 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {5945#true} {5966#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:44:57,612 INFO L290 TraceCheckUtils]: 37: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,612 INFO L290 TraceCheckUtils]: 36: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,612 INFO L290 TraceCheckUtils]: 35: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:57,612 INFO L272 TraceCheckUtils]: 34: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:57,612 INFO L290 TraceCheckUtils]: 33: Hoare triple {5966#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:44:57,613 INFO L290 TraceCheckUtils]: 32: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5966#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:44:57,613 INFO L290 TraceCheckUtils]: 31: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:44:57,613 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {5945#true} {5961#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:44:57,613 INFO L290 TraceCheckUtils]: 29: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,613 INFO L290 TraceCheckUtils]: 28: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,613 INFO L290 TraceCheckUtils]: 27: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:57,614 INFO L272 TraceCheckUtils]: 26: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:57,614 INFO L290 TraceCheckUtils]: 25: Hoare triple {5961#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:44:57,614 INFO L290 TraceCheckUtils]: 24: Hoare triple {6233#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5961#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:44:57,615 INFO L290 TraceCheckUtils]: 23: Hoare triple {6233#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6233#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:44:57,627 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {5945#true} {6233#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6233#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:44:57,627 INFO L290 TraceCheckUtils]: 21: Hoare triple {5945#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,627 INFO L290 TraceCheckUtils]: 20: Hoare triple {5945#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,627 INFO L290 TraceCheckUtils]: 19: Hoare triple {5945#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5945#true} is VALID [2022-04-27 21:44:57,627 INFO L272 TraceCheckUtils]: 18: Hoare triple {6233#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5945#true} is VALID [2022-04-27 21:44:57,628 INFO L290 TraceCheckUtils]: 17: Hoare triple {6233#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6233#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:44:57,628 INFO L290 TraceCheckUtils]: 16: Hoare triple {5955#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6233#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:44:57,629 INFO L290 TraceCheckUtils]: 15: Hoare triple {5954#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5955#(<= main_~n~0 4)} is VALID [2022-04-27 21:44:57,629 INFO L290 TraceCheckUtils]: 14: Hoare triple {5953#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5954#(<= main_~i~0 4)} is VALID [2022-04-27 21:44:57,629 INFO L290 TraceCheckUtils]: 13: Hoare triple {5953#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5953#(<= main_~i~0 3)} is VALID [2022-04-27 21:44:57,630 INFO L290 TraceCheckUtils]: 12: Hoare triple {5952#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5953#(<= main_~i~0 3)} is VALID [2022-04-27 21:44:57,630 INFO L290 TraceCheckUtils]: 11: Hoare triple {5952#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5952#(<= main_~i~0 2)} is VALID [2022-04-27 21:44:57,630 INFO L290 TraceCheckUtils]: 10: Hoare triple {5951#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5952#(<= main_~i~0 2)} is VALID [2022-04-27 21:44:57,630 INFO L290 TraceCheckUtils]: 9: Hoare triple {5951#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5951#(<= main_~i~0 1)} is VALID [2022-04-27 21:44:57,631 INFO L290 TraceCheckUtils]: 8: Hoare triple {5999#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5951#(<= main_~i~0 1)} is VALID [2022-04-27 21:44:57,631 INFO L290 TraceCheckUtils]: 7: Hoare triple {5999#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5999#(<= main_~i~0 0)} is VALID [2022-04-27 21:44:57,632 INFO L290 TraceCheckUtils]: 6: Hoare triple {5945#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5999#(<= main_~i~0 0)} is VALID [2022-04-27 21:44:57,632 INFO L290 TraceCheckUtils]: 5: Hoare triple {5945#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5945#true} is VALID [2022-04-27 21:44:57,632 INFO L272 TraceCheckUtils]: 4: Hoare triple {5945#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,632 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5945#true} {5945#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,632 INFO L290 TraceCheckUtils]: 2: Hoare triple {5945#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,632 INFO L290 TraceCheckUtils]: 1: Hoare triple {5945#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5945#true} is VALID [2022-04-27 21:44:57,632 INFO L272 TraceCheckUtils]: 0: Hoare triple {5945#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5945#true} is VALID [2022-04-27 21:44:57,632 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 21:44:57,632 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [914470426] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:44:57,632 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:44:57,632 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 21 [2022-04-27 21:44:57,632 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1895799082] [2022-04-27 21:44:57,632 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:44:57,633 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Word has length 54 [2022-04-27 21:44:57,633 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:44:57,633 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:44:57,678 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:44:57,678 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-27 21:44:57,679 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:44:57,679 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-27 21:44:57,679 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=323, Unknown=0, NotChecked=0, Total=420 [2022-04-27 21:44:57,679 INFO L87 Difference]: Start difference. First operand 57 states and 58 transitions. Second operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:44:58,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:44:58,201 INFO L93 Difference]: Finished difference Result 88 states and 94 transitions. [2022-04-27 21:44:58,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-27 21:44:58,201 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Word has length 54 [2022-04-27 21:44:58,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:44:58,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:44:58,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 64 transitions. [2022-04-27 21:44:58,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:44:58,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 64 transitions. [2022-04-27 21:44:58,203 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 64 transitions. [2022-04-27 21:44:58,252 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:44:58,253 INFO L225 Difference]: With dead ends: 88 [2022-04-27 21:44:58,253 INFO L226 Difference]: Without dead ends: 60 [2022-04-27 21:44:58,254 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 110 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 237 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=216, Invalid=776, Unknown=0, NotChecked=0, Total=992 [2022-04-27 21:44:58,254 INFO L413 NwaCegarLoop]: 21 mSDtfsCounter, 40 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 255 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 283 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 255 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:44:58,254 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [41 Valid, 68 Invalid, 283 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 255 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 21:44:58,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2022-04-27 21:44:58,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 59. [2022-04-27 21:44:58,278 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:44:58,279 INFO L82 GeneralOperation]: Start isEquivalent. First operand 60 states. Second operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:44:58,279 INFO L74 IsIncluded]: Start isIncluded. First operand 60 states. Second operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:44:58,279 INFO L87 Difference]: Start difference. First operand 60 states. Second operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:44:58,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:44:58,280 INFO L93 Difference]: Finished difference Result 60 states and 61 transitions. [2022-04-27 21:44:58,280 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 61 transitions. [2022-04-27 21:44:58,280 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:44:58,280 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:44:58,280 INFO L74 IsIncluded]: Start isIncluded. First operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 60 states. [2022-04-27 21:44:58,280 INFO L87 Difference]: Start difference. First operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 60 states. [2022-04-27 21:44:58,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:44:58,281 INFO L93 Difference]: Finished difference Result 60 states and 61 transitions. [2022-04-27 21:44:58,281 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 61 transitions. [2022-04-27 21:44:58,281 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:44:58,281 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:44:58,281 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:44:58,281 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:44:58,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 46 states have internal predecessors, (47), 7 states have call successors, (7), 7 states have call predecessors, (7), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-27 21:44:58,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 60 transitions. [2022-04-27 21:44:58,282 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 60 transitions. Word has length 54 [2022-04-27 21:44:58,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:44:58,282 INFO L495 AbstractCegarLoop]: Abstraction has 59 states and 60 transitions. [2022-04-27 21:44:58,282 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:44:58,282 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 60 transitions. [2022-04-27 21:44:58,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-27 21:44:58,293 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:44:58,294 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:44:58,311 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-27 21:44:58,495 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-27 21:44:58,495 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:44:58,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:44:58,496 INFO L85 PathProgramCache]: Analyzing trace with hash 529632181, now seen corresponding path program 11 times [2022-04-27 21:44:58,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:44:58,496 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124852948] [2022-04-27 21:44:58,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:44:58,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:44:58,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:58,688 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:44:58,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:58,691 INFO L290 TraceCheckUtils]: 0: Hoare triple {6695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6659#true} is VALID [2022-04-27 21:44:58,691 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,691 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6659#true} {6659#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,691 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-27 21:44:58,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:58,698 INFO L290 TraceCheckUtils]: 0: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:44:58,698 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,698 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,698 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:44:58,699 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-27 21:44:58,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:58,701 INFO L290 TraceCheckUtils]: 0: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:44:58,701 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,701 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,701 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:44:58,702 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-27 21:44:58,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:58,710 INFO L290 TraceCheckUtils]: 0: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:44:58,710 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,710 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,710 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:44:58,711 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-27 21:44:58,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:58,713 INFO L290 TraceCheckUtils]: 0: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:44:58,713 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,713 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,713 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:44:58,714 INFO L272 TraceCheckUtils]: 0: Hoare triple {6659#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:44:58,714 INFO L290 TraceCheckUtils]: 1: Hoare triple {6695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6659#true} is VALID [2022-04-27 21:44:58,714 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,714 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6659#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,714 INFO L272 TraceCheckUtils]: 4: Hoare triple {6659#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,714 INFO L290 TraceCheckUtils]: 5: Hoare triple {6659#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6659#true} is VALID [2022-04-27 21:44:58,714 INFO L290 TraceCheckUtils]: 6: Hoare triple {6659#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6664#(= main_~i~0 0)} is VALID [2022-04-27 21:44:58,715 INFO L290 TraceCheckUtils]: 7: Hoare triple {6664#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6664#(= main_~i~0 0)} is VALID [2022-04-27 21:44:58,715 INFO L290 TraceCheckUtils]: 8: Hoare triple {6664#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:44:58,716 INFO L290 TraceCheckUtils]: 9: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:44:58,716 INFO L290 TraceCheckUtils]: 10: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:44:58,716 INFO L290 TraceCheckUtils]: 11: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:44:58,717 INFO L290 TraceCheckUtils]: 12: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:44:58,717 INFO L290 TraceCheckUtils]: 13: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:44:58,718 INFO L290 TraceCheckUtils]: 14: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:44:58,718 INFO L290 TraceCheckUtils]: 15: Hoare triple {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6669#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:44:58,719 INFO L290 TraceCheckUtils]: 16: Hoare triple {6669#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 21:44:58,719 INFO L290 TraceCheckUtils]: 17: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 21:44:58,719 INFO L290 TraceCheckUtils]: 18: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:44:58,720 INFO L290 TraceCheckUtils]: 19: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:44:58,720 INFO L272 TraceCheckUtils]: 20: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-27 21:44:58,720 INFO L290 TraceCheckUtils]: 21: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:44:58,720 INFO L290 TraceCheckUtils]: 22: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,720 INFO L290 TraceCheckUtils]: 23: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,720 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {6659#true} {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:44:58,721 INFO L290 TraceCheckUtils]: 25: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:44:58,721 INFO L290 TraceCheckUtils]: 26: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:44:58,722 INFO L290 TraceCheckUtils]: 27: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:44:58,722 INFO L272 TraceCheckUtils]: 28: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-27 21:44:58,722 INFO L290 TraceCheckUtils]: 29: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:44:58,722 INFO L290 TraceCheckUtils]: 30: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,722 INFO L290 TraceCheckUtils]: 31: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,722 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {6659#true} {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:44:58,723 INFO L290 TraceCheckUtils]: 33: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:44:58,723 INFO L290 TraceCheckUtils]: 34: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:44:58,724 INFO L290 TraceCheckUtils]: 35: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:44:58,724 INFO L272 TraceCheckUtils]: 36: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-27 21:44:58,724 INFO L290 TraceCheckUtils]: 37: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:44:58,724 INFO L290 TraceCheckUtils]: 38: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,724 INFO L290 TraceCheckUtils]: 39: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,725 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {6659#true} {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:44:58,725 INFO L290 TraceCheckUtils]: 41: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:44:58,726 INFO L290 TraceCheckUtils]: 42: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:44:58,726 INFO L290 TraceCheckUtils]: 43: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:44:58,726 INFO L272 TraceCheckUtils]: 44: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-27 21:44:58,726 INFO L290 TraceCheckUtils]: 45: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:44:58,726 INFO L290 TraceCheckUtils]: 46: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,726 INFO L290 TraceCheckUtils]: 47: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:44:58,727 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {6659#true} {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:44:58,727 INFO L290 TraceCheckUtils]: 49: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:44:58,728 INFO L290 TraceCheckUtils]: 50: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6691#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:44:58,728 INFO L290 TraceCheckUtils]: 51: Hoare triple {6691#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6692#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:44:58,729 INFO L272 TraceCheckUtils]: 52: Hoare triple {6692#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6693#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:44:58,729 INFO L290 TraceCheckUtils]: 53: Hoare triple {6693#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6694#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:44:58,730 INFO L290 TraceCheckUtils]: 54: Hoare triple {6694#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-27 21:44:58,730 INFO L290 TraceCheckUtils]: 55: Hoare triple {6660#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-27 21:44:58,730 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 8 proven. 57 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 21:44:58,730 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:44:58,730 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124852948] [2022-04-27 21:44:58,730 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2124852948] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:44:58,730 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [351886459] [2022-04-27 21:44:58,730 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 21:44:58,730 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:44:58,730 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:44:58,731 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:44:58,732 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-27 21:44:58,788 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-04-27 21:44:58,788 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:44:58,789 INFO L263 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-27 21:44:58,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:44:58,799 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:44:58,888 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:45:31,583 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:45:31,629 INFO L272 TraceCheckUtils]: 0: Hoare triple {6659#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:31,629 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6659#true} is VALID [2022-04-27 21:45:31,629 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:31,629 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6659#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:31,629 INFO L272 TraceCheckUtils]: 4: Hoare triple {6659#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:31,629 INFO L290 TraceCheckUtils]: 5: Hoare triple {6659#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6659#true} is VALID [2022-04-27 21:45:31,629 INFO L290 TraceCheckUtils]: 6: Hoare triple {6659#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6664#(= main_~i~0 0)} is VALID [2022-04-27 21:45:31,630 INFO L290 TraceCheckUtils]: 7: Hoare triple {6664#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6664#(= main_~i~0 0)} is VALID [2022-04-27 21:45:31,630 INFO L290 TraceCheckUtils]: 8: Hoare triple {6664#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:45:31,631 INFO L290 TraceCheckUtils]: 9: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:45:31,631 INFO L290 TraceCheckUtils]: 10: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:45:31,631 INFO L290 TraceCheckUtils]: 11: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:45:31,632 INFO L290 TraceCheckUtils]: 12: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:45:31,632 INFO L290 TraceCheckUtils]: 13: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:45:31,632 INFO L290 TraceCheckUtils]: 14: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:45:31,633 INFO L290 TraceCheckUtils]: 15: Hoare triple {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 21:45:31,633 INFO L290 TraceCheckUtils]: 16: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 21:45:31,634 INFO L290 TraceCheckUtils]: 17: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 21:45:31,634 INFO L290 TraceCheckUtils]: 18: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:45:31,634 INFO L290 TraceCheckUtils]: 19: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:45:31,635 INFO L272 TraceCheckUtils]: 20: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,635 INFO L290 TraceCheckUtils]: 21: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,636 INFO L290 TraceCheckUtils]: 22: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,636 INFO L290 TraceCheckUtils]: 23: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,636 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:45:31,637 INFO L290 TraceCheckUtils]: 25: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:45:31,637 INFO L290 TraceCheckUtils]: 26: Hoare triple {6671#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,638 INFO L290 TraceCheckUtils]: 27: Hoare triple {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,638 INFO L272 TraceCheckUtils]: 28: Hoare triple {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,639 INFO L290 TraceCheckUtils]: 29: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,639 INFO L290 TraceCheckUtils]: 30: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,639 INFO L290 TraceCheckUtils]: 31: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,640 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,640 INFO L290 TraceCheckUtils]: 33: Hoare triple {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,640 INFO L290 TraceCheckUtils]: 34: Hoare triple {6778#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,641 INFO L290 TraceCheckUtils]: 35: Hoare triple {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,641 INFO L272 TraceCheckUtils]: 36: Hoare triple {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,642 INFO L290 TraceCheckUtils]: 37: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,642 INFO L290 TraceCheckUtils]: 38: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,642 INFO L290 TraceCheckUtils]: 39: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,643 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,643 INFO L290 TraceCheckUtils]: 41: Hoare triple {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,644 INFO L290 TraceCheckUtils]: 42: Hoare triple {6803#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,644 INFO L290 TraceCheckUtils]: 43: Hoare triple {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,645 INFO L272 TraceCheckUtils]: 44: Hoare triple {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,645 INFO L290 TraceCheckUtils]: 45: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,645 INFO L290 TraceCheckUtils]: 46: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,646 INFO L290 TraceCheckUtils]: 47: Hoare triple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} is VALID [2022-04-27 21:45:31,646 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {6759#(exists ((v_main_~x~0.base_BEFORE_CALL_31 Int) (v_main_~x~0.offset_BEFORE_CALL_31 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_31) (+ 16 v_main_~x~0.offset_BEFORE_CALL_31)) 0))} {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,647 INFO L290 TraceCheckUtils]: 49: Hoare triple {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,647 INFO L290 TraceCheckUtils]: 50: Hoare triple {6828#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6853#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-27 21:45:31,647 INFO L290 TraceCheckUtils]: 51: Hoare triple {6853#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6692#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:45:31,648 INFO L272 TraceCheckUtils]: 52: Hoare triple {6692#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6860#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:45:31,648 INFO L290 TraceCheckUtils]: 53: Hoare triple {6860#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6864#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:45:31,648 INFO L290 TraceCheckUtils]: 54: Hoare triple {6864#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-27 21:45:31,649 INFO L290 TraceCheckUtils]: 55: Hoare triple {6660#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-27 21:45:31,649 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 21:45:31,649 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:45:33,832 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:45:33,836 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:45:33,910 INFO L290 TraceCheckUtils]: 55: Hoare triple {6660#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-27 21:45:33,910 INFO L290 TraceCheckUtils]: 54: Hoare triple {6864#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6660#false} is VALID [2022-04-27 21:45:33,911 INFO L290 TraceCheckUtils]: 53: Hoare triple {6860#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6864#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:45:33,911 INFO L272 TraceCheckUtils]: 52: Hoare triple {6692#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6860#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:45:33,911 INFO L290 TraceCheckUtils]: 51: Hoare triple {6691#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6692#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:45:33,912 INFO L290 TraceCheckUtils]: 50: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6691#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:33,912 INFO L290 TraceCheckUtils]: 49: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:45:33,913 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {6659#true} {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:45:33,913 INFO L290 TraceCheckUtils]: 47: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,913 INFO L290 TraceCheckUtils]: 46: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,913 INFO L290 TraceCheckUtils]: 45: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:45:33,913 INFO L272 TraceCheckUtils]: 44: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-27 21:45:33,914 INFO L290 TraceCheckUtils]: 43: Hoare triple {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:45:33,914 INFO L290 TraceCheckUtils]: 42: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6686#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:45:33,914 INFO L290 TraceCheckUtils]: 41: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:45:33,915 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {6659#true} {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:45:33,915 INFO L290 TraceCheckUtils]: 39: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,915 INFO L290 TraceCheckUtils]: 38: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,915 INFO L290 TraceCheckUtils]: 37: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:45:33,915 INFO L272 TraceCheckUtils]: 36: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-27 21:45:33,915 INFO L290 TraceCheckUtils]: 35: Hoare triple {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:45:33,916 INFO L290 TraceCheckUtils]: 34: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6681#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:45:33,916 INFO L290 TraceCheckUtils]: 33: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:45:33,917 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {6659#true} {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:45:33,917 INFO L290 TraceCheckUtils]: 31: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,917 INFO L290 TraceCheckUtils]: 30: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,917 INFO L290 TraceCheckUtils]: 29: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:45:33,917 INFO L272 TraceCheckUtils]: 28: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-27 21:45:33,917 INFO L290 TraceCheckUtils]: 27: Hoare triple {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:45:33,918 INFO L290 TraceCheckUtils]: 26: Hoare triple {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6676#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:45:33,918 INFO L290 TraceCheckUtils]: 25: Hoare triple {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:33,919 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {6659#true} {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:33,919 INFO L290 TraceCheckUtils]: 23: Hoare triple {6659#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,919 INFO L290 TraceCheckUtils]: 22: Hoare triple {6659#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,919 INFO L290 TraceCheckUtils]: 21: Hoare triple {6659#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6659#true} is VALID [2022-04-27 21:45:33,919 INFO L272 TraceCheckUtils]: 20: Hoare triple {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6659#true} is VALID [2022-04-27 21:45:33,919 INFO L290 TraceCheckUtils]: 19: Hoare triple {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:33,920 INFO L290 TraceCheckUtils]: 18: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6958#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:33,920 INFO L290 TraceCheckUtils]: 17: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 21:45:33,920 INFO L290 TraceCheckUtils]: 16: Hoare triple {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 21:45:33,921 INFO L290 TraceCheckUtils]: 15: Hoare triple {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6670#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-27 21:45:33,921 INFO L290 TraceCheckUtils]: 14: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6668#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:45:33,922 INFO L290 TraceCheckUtils]: 13: Hoare triple {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:45:33,922 INFO L290 TraceCheckUtils]: 12: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6667#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:45:33,922 INFO L290 TraceCheckUtils]: 11: Hoare triple {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:45:33,923 INFO L290 TraceCheckUtils]: 10: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6666#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:45:33,923 INFO L290 TraceCheckUtils]: 9: Hoare triple {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:45:33,923 INFO L290 TraceCheckUtils]: 8: Hoare triple {6664#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6665#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:45:33,924 INFO L290 TraceCheckUtils]: 7: Hoare triple {6664#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6664#(= main_~i~0 0)} is VALID [2022-04-27 21:45:33,924 INFO L290 TraceCheckUtils]: 6: Hoare triple {6659#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6664#(= main_~i~0 0)} is VALID [2022-04-27 21:45:33,924 INFO L290 TraceCheckUtils]: 5: Hoare triple {6659#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6659#true} is VALID [2022-04-27 21:45:33,924 INFO L272 TraceCheckUtils]: 4: Hoare triple {6659#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,924 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6659#true} {6659#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,924 INFO L290 TraceCheckUtils]: 2: Hoare triple {6659#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,924 INFO L290 TraceCheckUtils]: 1: Hoare triple {6659#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6659#true} is VALID [2022-04-27 21:45:33,924 INFO L272 TraceCheckUtils]: 0: Hoare triple {6659#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6659#true} is VALID [2022-04-27 21:45:33,924 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 8 proven. 57 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 21:45:33,925 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [351886459] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:45:33,925 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:45:33,925 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 16] total 26 [2022-04-27 21:45:33,925 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1450732630] [2022-04-27 21:45:33,925 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:45:33,925 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 56 [2022-04-27 21:45:33,926 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:45:33,926 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 21:45:33,985 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:45:33,985 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-27 21:45:33,986 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:45:33,986 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-27 21:45:33,986 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=575, Unknown=5, NotChecked=0, Total=650 [2022-04-27 21:45:33,986 INFO L87 Difference]: Start difference. First operand 59 states and 60 transitions. Second operand has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 21:45:35,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:45:35,121 INFO L93 Difference]: Finished difference Result 72 states and 73 transitions. [2022-04-27 21:45:35,121 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-27 21:45:35,121 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 56 [2022-04-27 21:45:35,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:45:35,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 21:45:35,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 64 transitions. [2022-04-27 21:45:35,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 21:45:35,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 64 transitions. [2022-04-27 21:45:35,123 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 64 transitions. [2022-04-27 21:45:35,176 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:45:35,177 INFO L225 Difference]: With dead ends: 72 [2022-04-27 21:45:35,177 INFO L226 Difference]: Without dead ends: 70 [2022-04-27 21:45:35,177 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 103 SyntacticMatches, 12 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 376 ImplicationChecksByTransitivity, 34.6s TimeCoverageRelationStatistics Valid=184, Invalid=1617, Unknown=5, NotChecked=0, Total=1806 [2022-04-27 21:45:35,178 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 60 mSDsluCounter, 121 mSDsCounter, 0 mSdLazyCounter, 555 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 146 SdHoareTripleChecker+Invalid, 657 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 555 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 67 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 21:45:35,178 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [60 Valid, 146 Invalid, 657 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 555 Invalid, 0 Unknown, 67 Unchecked, 0.4s Time] [2022-04-27 21:45:35,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-04-27 21:45:35,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 67. [2022-04-27 21:45:35,214 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:45:35,214 INFO L82 GeneralOperation]: Start isEquivalent. First operand 70 states. Second operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:45:35,214 INFO L74 IsIncluded]: Start isIncluded. First operand 70 states. Second operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:45:35,214 INFO L87 Difference]: Start difference. First operand 70 states. Second operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:45:35,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:45:35,215 INFO L93 Difference]: Finished difference Result 70 states and 71 transitions. [2022-04-27 21:45:35,215 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 71 transitions. [2022-04-27 21:45:35,216 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:45:35,216 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:45:35,216 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 70 states. [2022-04-27 21:45:35,216 INFO L87 Difference]: Start difference. First operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 70 states. [2022-04-27 21:45:35,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:45:35,217 INFO L93 Difference]: Finished difference Result 70 states and 71 transitions. [2022-04-27 21:45:35,217 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 71 transitions. [2022-04-27 21:45:35,218 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:45:35,218 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:45:35,218 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:45:35,218 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:45:35,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 52 states have internal predecessors, (53), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:45:35,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 68 transitions. [2022-04-27 21:45:35,219 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 68 transitions. Word has length 56 [2022-04-27 21:45:35,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:45:35,219 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 68 transitions. [2022-04-27 21:45:35,219 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 2.32) internal successors, (58), 23 states have internal predecessors, (58), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-27 21:45:35,219 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 68 transitions. [2022-04-27 21:45:35,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-04-27 21:45:35,219 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:45:35,219 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:45:35,238 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-27 21:45:35,431 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-27 21:45:35,432 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:45:35,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:45:35,432 INFO L85 PathProgramCache]: Analyzing trace with hash 603520779, now seen corresponding path program 12 times [2022-04-27 21:45:35,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:45:35,432 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1147533882] [2022-04-27 21:45:35,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:45:35,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:45:35,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:35,564 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:45:35,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:35,570 INFO L290 TraceCheckUtils]: 0: Hoare triple {7447#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7409#true} is VALID [2022-04-27 21:45:35,570 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,570 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7409#true} {7409#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,570 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-27 21:45:35,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:35,573 INFO L290 TraceCheckUtils]: 0: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:35,573 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,573 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,575 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-27 21:45:35,575 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-27 21:45:35,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:35,583 INFO L290 TraceCheckUtils]: 0: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:35,583 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,583 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,583 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7426#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:45:35,584 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-27 21:45:35,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:35,600 INFO L290 TraceCheckUtils]: 0: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:35,600 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,600 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,601 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7431#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:45:35,601 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-27 21:45:35,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:35,604 INFO L290 TraceCheckUtils]: 0: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:35,605 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,605 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,605 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7436#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:45:35,605 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-27 21:45:35,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:35,608 INFO L290 TraceCheckUtils]: 0: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:35,608 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,608 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,609 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7441#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:45:35,609 INFO L272 TraceCheckUtils]: 0: Hoare triple {7409#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7447#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:45:35,609 INFO L290 TraceCheckUtils]: 1: Hoare triple {7447#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7409#true} is VALID [2022-04-27 21:45:35,609 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,609 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7409#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,609 INFO L272 TraceCheckUtils]: 4: Hoare triple {7409#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,609 INFO L290 TraceCheckUtils]: 5: Hoare triple {7409#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7409#true} is VALID [2022-04-27 21:45:35,610 INFO L290 TraceCheckUtils]: 6: Hoare triple {7409#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7414#(= main_~i~0 0)} is VALID [2022-04-27 21:45:35,610 INFO L290 TraceCheckUtils]: 7: Hoare triple {7414#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7414#(= main_~i~0 0)} is VALID [2022-04-27 21:45:35,610 INFO L290 TraceCheckUtils]: 8: Hoare triple {7414#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7415#(<= main_~i~0 1)} is VALID [2022-04-27 21:45:35,610 INFO L290 TraceCheckUtils]: 9: Hoare triple {7415#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7415#(<= main_~i~0 1)} is VALID [2022-04-27 21:45:35,611 INFO L290 TraceCheckUtils]: 10: Hoare triple {7415#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7416#(<= main_~i~0 2)} is VALID [2022-04-27 21:45:35,611 INFO L290 TraceCheckUtils]: 11: Hoare triple {7416#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7416#(<= main_~i~0 2)} is VALID [2022-04-27 21:45:35,611 INFO L290 TraceCheckUtils]: 12: Hoare triple {7416#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7417#(<= main_~i~0 3)} is VALID [2022-04-27 21:45:35,612 INFO L290 TraceCheckUtils]: 13: Hoare triple {7417#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7417#(<= main_~i~0 3)} is VALID [2022-04-27 21:45:35,612 INFO L290 TraceCheckUtils]: 14: Hoare triple {7417#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7418#(<= main_~i~0 4)} is VALID [2022-04-27 21:45:35,612 INFO L290 TraceCheckUtils]: 15: Hoare triple {7418#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7418#(<= main_~i~0 4)} is VALID [2022-04-27 21:45:35,613 INFO L290 TraceCheckUtils]: 16: Hoare triple {7418#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7419#(<= main_~i~0 5)} is VALID [2022-04-27 21:45:35,613 INFO L290 TraceCheckUtils]: 17: Hoare triple {7419#(<= main_~i~0 5)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7420#(<= main_~n~0 5)} is VALID [2022-04-27 21:45:35,613 INFO L290 TraceCheckUtils]: 18: Hoare triple {7420#(<= main_~n~0 5)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-27 21:45:35,614 INFO L290 TraceCheckUtils]: 19: Hoare triple {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-27 21:45:35,614 INFO L272 TraceCheckUtils]: 20: Hoare triple {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:35,614 INFO L290 TraceCheckUtils]: 21: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:35,614 INFO L290 TraceCheckUtils]: 22: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,614 INFO L290 TraceCheckUtils]: 23: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,614 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {7409#true} {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-27 21:45:35,615 INFO L290 TraceCheckUtils]: 25: Hoare triple {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} is VALID [2022-04-27 21:45:35,615 INFO L290 TraceCheckUtils]: 26: Hoare triple {7421#(and (<= main_~n~0 5) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:45:35,615 INFO L290 TraceCheckUtils]: 27: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:45:35,615 INFO L272 TraceCheckUtils]: 28: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:35,615 INFO L290 TraceCheckUtils]: 29: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:35,615 INFO L290 TraceCheckUtils]: 30: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,615 INFO L290 TraceCheckUtils]: 31: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,616 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {7409#true} {7426#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:45:35,616 INFO L290 TraceCheckUtils]: 33: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:45:35,616 INFO L290 TraceCheckUtils]: 34: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:45:35,617 INFO L290 TraceCheckUtils]: 35: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:45:35,617 INFO L272 TraceCheckUtils]: 36: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:35,617 INFO L290 TraceCheckUtils]: 37: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:35,617 INFO L290 TraceCheckUtils]: 38: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,617 INFO L290 TraceCheckUtils]: 39: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,617 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {7409#true} {7431#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:45:35,617 INFO L290 TraceCheckUtils]: 41: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:45:35,618 INFO L290 TraceCheckUtils]: 42: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:45:35,618 INFO L290 TraceCheckUtils]: 43: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:45:35,618 INFO L272 TraceCheckUtils]: 44: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:35,618 INFO L290 TraceCheckUtils]: 45: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:35,618 INFO L290 TraceCheckUtils]: 46: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,618 INFO L290 TraceCheckUtils]: 47: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,619 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {7409#true} {7436#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:45:35,619 INFO L290 TraceCheckUtils]: 49: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:45:35,620 INFO L290 TraceCheckUtils]: 50: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:45:35,620 INFO L290 TraceCheckUtils]: 51: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:45:35,620 INFO L272 TraceCheckUtils]: 52: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:35,620 INFO L290 TraceCheckUtils]: 53: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:35,620 INFO L290 TraceCheckUtils]: 54: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,620 INFO L290 TraceCheckUtils]: 55: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:35,621 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {7409#true} {7441#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:45:35,621 INFO L290 TraceCheckUtils]: 57: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:45:35,621 INFO L290 TraceCheckUtils]: 58: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7446#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:45:35,621 INFO L290 TraceCheckUtils]: 59: Hoare triple {7446#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7410#false} is VALID [2022-04-27 21:45:35,622 INFO L272 TraceCheckUtils]: 60: Hoare triple {7410#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7410#false} is VALID [2022-04-27 21:45:35,622 INFO L290 TraceCheckUtils]: 61: Hoare triple {7410#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7410#false} is VALID [2022-04-27 21:45:35,622 INFO L290 TraceCheckUtils]: 62: Hoare triple {7410#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-27 21:45:35,622 INFO L290 TraceCheckUtils]: 63: Hoare triple {7410#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-27 21:45:35,622 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 43 proven. 42 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:45:35,622 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:45:35,622 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1147533882] [2022-04-27 21:45:35,622 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1147533882] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:45:35,622 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2080287769] [2022-04-27 21:45:35,622 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 21:45:35,622 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:45:35,622 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:45:35,623 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:45:35,624 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-27 21:45:35,684 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2022-04-27 21:45:35,684 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:45:35,685 INFO L263 TraceCheckSpWp]: Trace formula consists of 184 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 21:45:35,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:35,699 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:45:36,106 INFO L272 TraceCheckUtils]: 0: Hoare triple {7409#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,106 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7409#true} is VALID [2022-04-27 21:45:36,106 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,106 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7409#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,106 INFO L272 TraceCheckUtils]: 4: Hoare triple {7409#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,106 INFO L290 TraceCheckUtils]: 5: Hoare triple {7409#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7409#true} is VALID [2022-04-27 21:45:36,107 INFO L290 TraceCheckUtils]: 6: Hoare triple {7409#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7469#(<= main_~i~0 0)} is VALID [2022-04-27 21:45:36,107 INFO L290 TraceCheckUtils]: 7: Hoare triple {7469#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7469#(<= main_~i~0 0)} is VALID [2022-04-27 21:45:36,108 INFO L290 TraceCheckUtils]: 8: Hoare triple {7469#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7415#(<= main_~i~0 1)} is VALID [2022-04-27 21:45:36,108 INFO L290 TraceCheckUtils]: 9: Hoare triple {7415#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7415#(<= main_~i~0 1)} is VALID [2022-04-27 21:45:36,108 INFO L290 TraceCheckUtils]: 10: Hoare triple {7415#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7416#(<= main_~i~0 2)} is VALID [2022-04-27 21:45:36,109 INFO L290 TraceCheckUtils]: 11: Hoare triple {7416#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7416#(<= main_~i~0 2)} is VALID [2022-04-27 21:45:36,109 INFO L290 TraceCheckUtils]: 12: Hoare triple {7416#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7417#(<= main_~i~0 3)} is VALID [2022-04-27 21:45:36,109 INFO L290 TraceCheckUtils]: 13: Hoare triple {7417#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7417#(<= main_~i~0 3)} is VALID [2022-04-27 21:45:36,110 INFO L290 TraceCheckUtils]: 14: Hoare triple {7417#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7418#(<= main_~i~0 4)} is VALID [2022-04-27 21:45:36,110 INFO L290 TraceCheckUtils]: 15: Hoare triple {7418#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7418#(<= main_~i~0 4)} is VALID [2022-04-27 21:45:36,110 INFO L290 TraceCheckUtils]: 16: Hoare triple {7418#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7419#(<= main_~i~0 5)} is VALID [2022-04-27 21:45:36,111 INFO L290 TraceCheckUtils]: 17: Hoare triple {7419#(<= main_~i~0 5)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7420#(<= main_~n~0 5)} is VALID [2022-04-27 21:45:36,111 INFO L290 TraceCheckUtils]: 18: Hoare triple {7420#(<= main_~n~0 5)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-27 21:45:36,111 INFO L290 TraceCheckUtils]: 19: Hoare triple {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-27 21:45:36,112 INFO L272 TraceCheckUtils]: 20: Hoare triple {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:36,112 INFO L290 TraceCheckUtils]: 21: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:36,112 INFO L290 TraceCheckUtils]: 22: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,112 INFO L290 TraceCheckUtils]: 23: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,112 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {7409#true} {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-27 21:45:36,112 INFO L290 TraceCheckUtils]: 25: Hoare triple {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-27 21:45:36,113 INFO L290 TraceCheckUtils]: 26: Hoare triple {7506#(and (<= 0 main_~i~1) (<= main_~n~0 5))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-27 21:45:36,113 INFO L290 TraceCheckUtils]: 27: Hoare triple {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-27 21:45:36,113 INFO L272 TraceCheckUtils]: 28: Hoare triple {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:36,113 INFO L290 TraceCheckUtils]: 29: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:36,113 INFO L290 TraceCheckUtils]: 30: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,114 INFO L290 TraceCheckUtils]: 31: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,114 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {7409#true} {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-27 21:45:36,114 INFO L290 TraceCheckUtils]: 33: Hoare triple {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-27 21:45:36,115 INFO L290 TraceCheckUtils]: 34: Hoare triple {7531#(and (<= 1 main_~i~1) (<= main_~n~0 5))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-27 21:45:36,115 INFO L290 TraceCheckUtils]: 35: Hoare triple {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-27 21:45:36,115 INFO L272 TraceCheckUtils]: 36: Hoare triple {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:36,115 INFO L290 TraceCheckUtils]: 37: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:36,115 INFO L290 TraceCheckUtils]: 38: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,115 INFO L290 TraceCheckUtils]: 39: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,116 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {7409#true} {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-27 21:45:36,116 INFO L290 TraceCheckUtils]: 41: Hoare triple {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} is VALID [2022-04-27 21:45:36,116 INFO L290 TraceCheckUtils]: 42: Hoare triple {7556#(and (<= main_~n~0 5) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-27 21:45:36,117 INFO L290 TraceCheckUtils]: 43: Hoare triple {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-27 21:45:36,117 INFO L272 TraceCheckUtils]: 44: Hoare triple {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:36,117 INFO L290 TraceCheckUtils]: 45: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:36,117 INFO L290 TraceCheckUtils]: 46: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,117 INFO L290 TraceCheckUtils]: 47: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,118 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {7409#true} {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-27 21:45:36,118 INFO L290 TraceCheckUtils]: 49: Hoare triple {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} is VALID [2022-04-27 21:45:36,118 INFO L290 TraceCheckUtils]: 50: Hoare triple {7581#(and (<= main_~n~0 5) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-27 21:45:36,119 INFO L290 TraceCheckUtils]: 51: Hoare triple {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-27 21:45:36,119 INFO L272 TraceCheckUtils]: 52: Hoare triple {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:36,119 INFO L290 TraceCheckUtils]: 53: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:36,119 INFO L290 TraceCheckUtils]: 54: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,119 INFO L290 TraceCheckUtils]: 55: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,119 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {7409#true} {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-27 21:45:36,120 INFO L290 TraceCheckUtils]: 57: Hoare triple {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} is VALID [2022-04-27 21:45:36,120 INFO L290 TraceCheckUtils]: 58: Hoare triple {7606#(and (<= main_~n~0 5) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7631#(and (<= 5 main_~i~1) (<= main_~n~0 5))} is VALID [2022-04-27 21:45:36,120 INFO L290 TraceCheckUtils]: 59: Hoare triple {7631#(and (<= 5 main_~i~1) (<= main_~n~0 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7410#false} is VALID [2022-04-27 21:45:36,120 INFO L272 TraceCheckUtils]: 60: Hoare triple {7410#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7410#false} is VALID [2022-04-27 21:45:36,121 INFO L290 TraceCheckUtils]: 61: Hoare triple {7410#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7410#false} is VALID [2022-04-27 21:45:36,121 INFO L290 TraceCheckUtils]: 62: Hoare triple {7410#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-27 21:45:36,121 INFO L290 TraceCheckUtils]: 63: Hoare triple {7410#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-27 21:45:36,121 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 60 proven. 25 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:45:36,121 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:45:36,422 INFO L290 TraceCheckUtils]: 63: Hoare triple {7410#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-27 21:45:36,422 INFO L290 TraceCheckUtils]: 62: Hoare triple {7410#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7410#false} is VALID [2022-04-27 21:45:36,422 INFO L290 TraceCheckUtils]: 61: Hoare triple {7410#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7410#false} is VALID [2022-04-27 21:45:36,422 INFO L272 TraceCheckUtils]: 60: Hoare triple {7410#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7410#false} is VALID [2022-04-27 21:45:36,423 INFO L290 TraceCheckUtils]: 59: Hoare triple {7446#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7410#false} is VALID [2022-04-27 21:45:36,423 INFO L290 TraceCheckUtils]: 58: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7446#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:45:36,424 INFO L290 TraceCheckUtils]: 57: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:45:36,424 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {7409#true} {7441#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:45:36,424 INFO L290 TraceCheckUtils]: 55: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,424 INFO L290 TraceCheckUtils]: 54: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,424 INFO L290 TraceCheckUtils]: 53: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:36,424 INFO L272 TraceCheckUtils]: 52: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:36,424 INFO L290 TraceCheckUtils]: 51: Hoare triple {7441#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:45:36,425 INFO L290 TraceCheckUtils]: 50: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7441#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:45:36,425 INFO L290 TraceCheckUtils]: 49: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:45:36,426 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {7409#true} {7436#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:45:36,426 INFO L290 TraceCheckUtils]: 47: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,426 INFO L290 TraceCheckUtils]: 46: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,426 INFO L290 TraceCheckUtils]: 45: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:36,426 INFO L272 TraceCheckUtils]: 44: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:36,426 INFO L290 TraceCheckUtils]: 43: Hoare triple {7436#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:45:36,427 INFO L290 TraceCheckUtils]: 42: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7436#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:45:36,427 INFO L290 TraceCheckUtils]: 41: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:45:36,428 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {7409#true} {7431#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:45:36,428 INFO L290 TraceCheckUtils]: 39: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,428 INFO L290 TraceCheckUtils]: 38: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,428 INFO L290 TraceCheckUtils]: 37: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:36,428 INFO L272 TraceCheckUtils]: 36: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:36,428 INFO L290 TraceCheckUtils]: 35: Hoare triple {7431#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:45:36,429 INFO L290 TraceCheckUtils]: 34: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7431#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:45:36,429 INFO L290 TraceCheckUtils]: 33: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:45:36,429 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {7409#true} {7426#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:45:36,429 INFO L290 TraceCheckUtils]: 31: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,429 INFO L290 TraceCheckUtils]: 30: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,430 INFO L290 TraceCheckUtils]: 29: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:36,430 INFO L272 TraceCheckUtils]: 28: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:36,430 INFO L290 TraceCheckUtils]: 27: Hoare triple {7426#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:45:36,430 INFO L290 TraceCheckUtils]: 26: Hoare triple {7758#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7426#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:45:36,431 INFO L290 TraceCheckUtils]: 25: Hoare triple {7758#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7758#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:45:36,431 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {7409#true} {7758#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7758#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:45:36,431 INFO L290 TraceCheckUtils]: 23: Hoare triple {7409#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,431 INFO L290 TraceCheckUtils]: 22: Hoare triple {7409#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,431 INFO L290 TraceCheckUtils]: 21: Hoare triple {7409#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7409#true} is VALID [2022-04-27 21:45:36,431 INFO L272 TraceCheckUtils]: 20: Hoare triple {7758#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7409#true} is VALID [2022-04-27 21:45:36,432 INFO L290 TraceCheckUtils]: 19: Hoare triple {7758#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7758#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:45:36,432 INFO L290 TraceCheckUtils]: 18: Hoare triple {7420#(<= main_~n~0 5)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7758#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:45:36,432 INFO L290 TraceCheckUtils]: 17: Hoare triple {7419#(<= main_~i~0 5)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7420#(<= main_~n~0 5)} is VALID [2022-04-27 21:45:36,433 INFO L290 TraceCheckUtils]: 16: Hoare triple {7418#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7419#(<= main_~i~0 5)} is VALID [2022-04-27 21:45:36,433 INFO L290 TraceCheckUtils]: 15: Hoare triple {7418#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7418#(<= main_~i~0 4)} is VALID [2022-04-27 21:45:36,434 INFO L290 TraceCheckUtils]: 14: Hoare triple {7417#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7418#(<= main_~i~0 4)} is VALID [2022-04-27 21:45:36,435 INFO L290 TraceCheckUtils]: 13: Hoare triple {7417#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7417#(<= main_~i~0 3)} is VALID [2022-04-27 21:45:36,436 INFO L290 TraceCheckUtils]: 12: Hoare triple {7416#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7417#(<= main_~i~0 3)} is VALID [2022-04-27 21:45:36,436 INFO L290 TraceCheckUtils]: 11: Hoare triple {7416#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7416#(<= main_~i~0 2)} is VALID [2022-04-27 21:45:36,436 INFO L290 TraceCheckUtils]: 10: Hoare triple {7415#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7416#(<= main_~i~0 2)} is VALID [2022-04-27 21:45:36,437 INFO L290 TraceCheckUtils]: 9: Hoare triple {7415#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7415#(<= main_~i~0 1)} is VALID [2022-04-27 21:45:36,437 INFO L290 TraceCheckUtils]: 8: Hoare triple {7469#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7415#(<= main_~i~0 1)} is VALID [2022-04-27 21:45:36,437 INFO L290 TraceCheckUtils]: 7: Hoare triple {7469#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7469#(<= main_~i~0 0)} is VALID [2022-04-27 21:45:36,438 INFO L290 TraceCheckUtils]: 6: Hoare triple {7409#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7469#(<= main_~i~0 0)} is VALID [2022-04-27 21:45:36,438 INFO L290 TraceCheckUtils]: 5: Hoare triple {7409#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7409#true} is VALID [2022-04-27 21:45:36,438 INFO L272 TraceCheckUtils]: 4: Hoare triple {7409#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,438 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7409#true} {7409#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,438 INFO L290 TraceCheckUtils]: 2: Hoare triple {7409#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {7409#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7409#true} is VALID [2022-04-27 21:45:36,438 INFO L272 TraceCheckUtils]: 0: Hoare triple {7409#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7409#true} is VALID [2022-04-27 21:45:36,438 INFO L134 CoverageAnalysis]: Checked inductivity of 125 backedges. 60 proven. 25 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:45:36,438 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2080287769] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:45:36,439 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:45:36,439 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15] total 24 [2022-04-27 21:45:36,439 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [317969158] [2022-04-27 21:45:36,439 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:45:36,439 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) Word has length 64 [2022-04-27 21:45:36,440 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:45:36,440 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-27 21:45:36,499 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:45:36,499 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-27 21:45:36,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:45:36,499 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-27 21:45:36,500 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=426, Unknown=0, NotChecked=0, Total=552 [2022-04-27 21:45:36,500 INFO L87 Difference]: Start difference. First operand 67 states and 68 transitions. Second operand has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-27 21:45:37,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:45:37,198 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2022-04-27 21:45:37,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-27 21:45:37,198 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) Word has length 64 [2022-04-27 21:45:37,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:45:37,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-27 21:45:37,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-27 21:45:37,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-27 21:45:37,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-27 21:45:37,201 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 71 transitions. [2022-04-27 21:45:37,256 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:45:37,256 INFO L225 Difference]: With dead ends: 102 [2022-04-27 21:45:37,257 INFO L226 Difference]: Without dead ends: 70 [2022-04-27 21:45:37,257 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 131 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 329 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=282, Invalid=1050, Unknown=0, NotChecked=0, Total=1332 [2022-04-27 21:45:37,258 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 42 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 337 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 21:45:37,258 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [43 Valid, 65 Invalid, 337 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 21:45:37,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-04-27 21:45:37,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 69. [2022-04-27 21:45:37,284 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:45:37,284 INFO L82 GeneralOperation]: Start isEquivalent. First operand 70 states. Second operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:45:37,284 INFO L74 IsIncluded]: Start isIncluded. First operand 70 states. Second operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:45:37,284 INFO L87 Difference]: Start difference. First operand 70 states. Second operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:45:37,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:45:37,285 INFO L93 Difference]: Finished difference Result 70 states and 71 transitions. [2022-04-27 21:45:37,285 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 71 transitions. [2022-04-27 21:45:37,286 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:45:37,286 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:45:37,286 INFO L74 IsIncluded]: Start isIncluded. First operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 70 states. [2022-04-27 21:45:37,286 INFO L87 Difference]: Start difference. First operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 70 states. [2022-04-27 21:45:37,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:45:37,287 INFO L93 Difference]: Finished difference Result 70 states and 71 transitions. [2022-04-27 21:45:37,287 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 71 transitions. [2022-04-27 21:45:37,287 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:45:37,287 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:45:37,287 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:45:37,287 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:45:37,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 54 states have internal predecessors, (55), 8 states have call successors, (8), 8 states have call predecessors, (8), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-27 21:45:37,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 70 transitions. [2022-04-27 21:45:37,288 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 70 transitions. Word has length 64 [2022-04-27 21:45:37,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:45:37,288 INFO L495 AbstractCegarLoop]: Abstraction has 69 states and 70 transitions. [2022-04-27 21:45:37,288 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 2.625) internal successors, (63), 23 states have internal predecessors, (63), 13 states have call successors, (15), 3 states have call predecessors, (15), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2022-04-27 21:45:37,288 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 70 transitions. [2022-04-27 21:45:37,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-04-27 21:45:37,289 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:45:37,289 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:45:37,321 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-27 21:45:37,501 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-27 21:45:37,501 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:45:37,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:45:37,501 INFO L85 PathProgramCache]: Analyzing trace with hash -694372407, now seen corresponding path program 13 times [2022-04-27 21:45:37,501 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:45:37,501 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [594774352] [2022-04-27 21:45:37,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:45:37,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:45:37,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:37,751 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:45:37,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:37,755 INFO L290 TraceCheckUtils]: 0: Hoare triple {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8248#true} is VALID [2022-04-27 21:45:37,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,755 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8248#true} {8248#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,755 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 21:45:37,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:37,759 INFO L290 TraceCheckUtils]: 0: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:45:37,759 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,759 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,760 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:45:37,760 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-27 21:45:37,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:37,762 INFO L290 TraceCheckUtils]: 0: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:45:37,762 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,762 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,763 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:37,763 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-27 21:45:37,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:37,765 INFO L290 TraceCheckUtils]: 0: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:45:37,765 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,765 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,766 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:45:37,766 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-27 21:45:37,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:37,768 INFO L290 TraceCheckUtils]: 0: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:45:37,768 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,768 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,768 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:45:37,768 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-27 21:45:37,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:37,770 INFO L290 TraceCheckUtils]: 0: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:45:37,770 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,770 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,771 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:45:37,771 INFO L272 TraceCheckUtils]: 0: Hoare triple {8248#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:45:37,771 INFO L290 TraceCheckUtils]: 1: Hoare triple {8290#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8248#true} is VALID [2022-04-27 21:45:37,776 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,776 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8248#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,776 INFO L272 TraceCheckUtils]: 4: Hoare triple {8248#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,776 INFO L290 TraceCheckUtils]: 5: Hoare triple {8248#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8248#true} is VALID [2022-04-27 21:45:37,777 INFO L290 TraceCheckUtils]: 6: Hoare triple {8248#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8253#(= main_~i~0 0)} is VALID [2022-04-27 21:45:37,777 INFO L290 TraceCheckUtils]: 7: Hoare triple {8253#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8253#(= main_~i~0 0)} is VALID [2022-04-27 21:45:37,777 INFO L290 TraceCheckUtils]: 8: Hoare triple {8253#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:45:37,778 INFO L290 TraceCheckUtils]: 9: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:45:37,778 INFO L290 TraceCheckUtils]: 10: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:45:37,778 INFO L290 TraceCheckUtils]: 11: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:45:37,779 INFO L290 TraceCheckUtils]: 12: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:45:37,779 INFO L290 TraceCheckUtils]: 13: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:45:37,780 INFO L290 TraceCheckUtils]: 14: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:45:37,780 INFO L290 TraceCheckUtils]: 15: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:45:37,780 INFO L290 TraceCheckUtils]: 16: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:45:37,781 INFO L290 TraceCheckUtils]: 17: Hoare triple {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8259#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:45:37,781 INFO L290 TraceCheckUtils]: 18: Hoare triple {8259#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:45:37,782 INFO L290 TraceCheckUtils]: 19: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:45:37,782 INFO L290 TraceCheckUtils]: 20: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:45:37,783 INFO L290 TraceCheckUtils]: 21: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:45:37,783 INFO L272 TraceCheckUtils]: 22: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-27 21:45:37,783 INFO L290 TraceCheckUtils]: 23: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:45:37,783 INFO L290 TraceCheckUtils]: 24: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,783 INFO L290 TraceCheckUtils]: 25: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,802 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {8248#true} {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:45:37,802 INFO L290 TraceCheckUtils]: 27: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:45:37,803 INFO L290 TraceCheckUtils]: 28: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:37,803 INFO L290 TraceCheckUtils]: 29: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:37,803 INFO L272 TraceCheckUtils]: 30: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-27 21:45:37,803 INFO L290 TraceCheckUtils]: 31: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:45:37,804 INFO L290 TraceCheckUtils]: 32: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,804 INFO L290 TraceCheckUtils]: 33: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,804 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {8248#true} {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:37,805 INFO L290 TraceCheckUtils]: 35: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:37,805 INFO L290 TraceCheckUtils]: 36: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:45:37,805 INFO L290 TraceCheckUtils]: 37: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:45:37,806 INFO L272 TraceCheckUtils]: 38: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-27 21:45:37,806 INFO L290 TraceCheckUtils]: 39: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:45:37,806 INFO L290 TraceCheckUtils]: 40: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,806 INFO L290 TraceCheckUtils]: 41: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,806 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {8248#true} {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:45:37,807 INFO L290 TraceCheckUtils]: 43: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:45:37,807 INFO L290 TraceCheckUtils]: 44: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:45:37,808 INFO L290 TraceCheckUtils]: 45: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:45:37,808 INFO L272 TraceCheckUtils]: 46: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-27 21:45:37,808 INFO L290 TraceCheckUtils]: 47: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:45:37,808 INFO L290 TraceCheckUtils]: 48: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,808 INFO L290 TraceCheckUtils]: 49: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,808 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {8248#true} {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:45:37,809 INFO L290 TraceCheckUtils]: 51: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:45:37,809 INFO L290 TraceCheckUtils]: 52: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:45:37,810 INFO L290 TraceCheckUtils]: 53: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:45:37,810 INFO L272 TraceCheckUtils]: 54: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-27 21:45:37,810 INFO L290 TraceCheckUtils]: 55: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:45:37,810 INFO L290 TraceCheckUtils]: 56: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,810 INFO L290 TraceCheckUtils]: 57: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:45:37,810 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {8248#true} {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:45:37,811 INFO L290 TraceCheckUtils]: 59: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:45:37,811 INFO L290 TraceCheckUtils]: 60: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8286#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:45:37,812 INFO L290 TraceCheckUtils]: 61: Hoare triple {8286#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8287#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:45:37,812 INFO L272 TraceCheckUtils]: 62: Hoare triple {8287#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8288#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:45:37,812 INFO L290 TraceCheckUtils]: 63: Hoare triple {8288#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8289#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:45:37,813 INFO L290 TraceCheckUtils]: 64: Hoare triple {8289#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-27 21:45:37,813 INFO L290 TraceCheckUtils]: 65: Hoare triple {8249#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-27 21:45:37,813 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 10 proven. 86 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:45:37,813 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:45:37,813 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [594774352] [2022-04-27 21:45:37,813 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [594774352] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:45:37,813 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [794764260] [2022-04-27 21:45:37,813 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 21:45:37,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:45:37,814 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:45:37,814 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:45:37,815 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-27 21:45:37,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:37,878 INFO L263 TraceCheckSpWp]: Trace formula consists of 191 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-27 21:45:37,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:45:37,890 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:45:37,995 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:46:28,908 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:46:28,958 INFO L272 TraceCheckUtils]: 0: Hoare triple {8248#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:28,958 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8248#true} is VALID [2022-04-27 21:46:28,958 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:28,958 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8248#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:28,958 INFO L272 TraceCheckUtils]: 4: Hoare triple {8248#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:28,958 INFO L290 TraceCheckUtils]: 5: Hoare triple {8248#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8248#true} is VALID [2022-04-27 21:46:28,959 INFO L290 TraceCheckUtils]: 6: Hoare triple {8248#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8253#(= main_~i~0 0)} is VALID [2022-04-27 21:46:28,959 INFO L290 TraceCheckUtils]: 7: Hoare triple {8253#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8253#(= main_~i~0 0)} is VALID [2022-04-27 21:46:28,959 INFO L290 TraceCheckUtils]: 8: Hoare triple {8253#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:46:28,960 INFO L290 TraceCheckUtils]: 9: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:46:28,960 INFO L290 TraceCheckUtils]: 10: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:46:28,960 INFO L290 TraceCheckUtils]: 11: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:46:28,961 INFO L290 TraceCheckUtils]: 12: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:46:28,961 INFO L290 TraceCheckUtils]: 13: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:46:28,962 INFO L290 TraceCheckUtils]: 14: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:46:28,962 INFO L290 TraceCheckUtils]: 15: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:46:28,962 INFO L290 TraceCheckUtils]: 16: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:46:28,963 INFO L290 TraceCheckUtils]: 17: Hoare triple {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:46:28,963 INFO L290 TraceCheckUtils]: 18: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:46:28,963 INFO L290 TraceCheckUtils]: 19: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:46:28,964 INFO L290 TraceCheckUtils]: 20: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:46:28,964 INFO L290 TraceCheckUtils]: 21: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:46:28,965 INFO L272 TraceCheckUtils]: 22: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,965 INFO L290 TraceCheckUtils]: 23: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,966 INFO L290 TraceCheckUtils]: 24: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,966 INFO L290 TraceCheckUtils]: 25: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,966 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:46:28,967 INFO L290 TraceCheckUtils]: 27: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:46:28,967 INFO L290 TraceCheckUtils]: 28: Hoare triple {8261#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:46:28,967 INFO L290 TraceCheckUtils]: 29: Hoare triple {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:46:28,968 INFO L272 TraceCheckUtils]: 30: Hoare triple {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,968 INFO L290 TraceCheckUtils]: 31: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,969 INFO L290 TraceCheckUtils]: 32: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,969 INFO L290 TraceCheckUtils]: 33: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,970 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:46:28,970 INFO L290 TraceCheckUtils]: 35: Hoare triple {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:46:28,970 INFO L290 TraceCheckUtils]: 36: Hoare triple {8379#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-27 21:46:28,971 INFO L290 TraceCheckUtils]: 37: Hoare triple {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-27 21:46:28,971 INFO L272 TraceCheckUtils]: 38: Hoare triple {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,972 INFO L290 TraceCheckUtils]: 39: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,972 INFO L290 TraceCheckUtils]: 40: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,972 INFO L290 TraceCheckUtils]: 41: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,973 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-27 21:46:28,973 INFO L290 TraceCheckUtils]: 43: Hoare triple {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-27 21:46:28,973 INFO L290 TraceCheckUtils]: 44: Hoare triple {8404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:46:28,974 INFO L290 TraceCheckUtils]: 45: Hoare triple {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:46:28,974 INFO L272 TraceCheckUtils]: 46: Hoare triple {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,975 INFO L290 TraceCheckUtils]: 47: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,975 INFO L290 TraceCheckUtils]: 48: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,975 INFO L290 TraceCheckUtils]: 49: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,976 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:46:28,976 INFO L290 TraceCheckUtils]: 51: Hoare triple {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:46:28,977 INFO L290 TraceCheckUtils]: 52: Hoare triple {8429#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:46:28,977 INFO L290 TraceCheckUtils]: 53: Hoare triple {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:46:28,978 INFO L272 TraceCheckUtils]: 54: Hoare triple {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,978 INFO L290 TraceCheckUtils]: 55: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,978 INFO L290 TraceCheckUtils]: 56: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,979 INFO L290 TraceCheckUtils]: 57: Hoare triple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} is VALID [2022-04-27 21:46:28,979 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {8360#(exists ((v_main_~x~0.offset_BEFORE_CALL_39 Int) (v_main_~x~0.base_BEFORE_CALL_39 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_39) (+ 20 v_main_~x~0.offset_BEFORE_CALL_39)) 0))} {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:46:28,980 INFO L290 TraceCheckUtils]: 59: Hoare triple {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:46:28,980 INFO L290 TraceCheckUtils]: 60: Hoare triple {8454#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ (- 2) main_~i~1) 3))} is VALID [2022-04-27 21:46:28,981 INFO L290 TraceCheckUtils]: 61: Hoare triple {8479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ (- 2) main_~i~1) 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8287#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:46:28,981 INFO L272 TraceCheckUtils]: 62: Hoare triple {8287#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8486#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:46:28,981 INFO L290 TraceCheckUtils]: 63: Hoare triple {8486#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8490#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:46:28,982 INFO L290 TraceCheckUtils]: 64: Hoare triple {8490#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-27 21:46:28,982 INFO L290 TraceCheckUtils]: 65: Hoare triple {8249#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-27 21:46:28,982 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 96 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:46:28,982 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:46:30,150 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:46:30,153 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:46:30,238 INFO L290 TraceCheckUtils]: 65: Hoare triple {8249#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-27 21:46:30,238 INFO L290 TraceCheckUtils]: 64: Hoare triple {8490#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8249#false} is VALID [2022-04-27 21:46:30,239 INFO L290 TraceCheckUtils]: 63: Hoare triple {8486#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8490#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:46:30,239 INFO L272 TraceCheckUtils]: 62: Hoare triple {8287#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8486#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:46:30,240 INFO L290 TraceCheckUtils]: 61: Hoare triple {8286#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8287#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:46:30,240 INFO L290 TraceCheckUtils]: 60: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8286#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:30,240 INFO L290 TraceCheckUtils]: 59: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:46:30,241 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {8248#true} {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:46:30,241 INFO L290 TraceCheckUtils]: 57: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,241 INFO L290 TraceCheckUtils]: 56: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,241 INFO L290 TraceCheckUtils]: 55: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:46:30,241 INFO L272 TraceCheckUtils]: 54: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-27 21:46:30,241 INFO L290 TraceCheckUtils]: 53: Hoare triple {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:46:30,242 INFO L290 TraceCheckUtils]: 52: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:46:30,242 INFO L290 TraceCheckUtils]: 51: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:46:30,243 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {8248#true} {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:46:30,243 INFO L290 TraceCheckUtils]: 49: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,243 INFO L290 TraceCheckUtils]: 48: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,243 INFO L290 TraceCheckUtils]: 47: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:46:30,243 INFO L272 TraceCheckUtils]: 46: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-27 21:46:30,243 INFO L290 TraceCheckUtils]: 45: Hoare triple {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:46:30,244 INFO L290 TraceCheckUtils]: 44: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8276#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:46:30,244 INFO L290 TraceCheckUtils]: 43: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:46:30,245 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {8248#true} {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:46:30,245 INFO L290 TraceCheckUtils]: 41: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,245 INFO L290 TraceCheckUtils]: 40: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,245 INFO L290 TraceCheckUtils]: 39: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:46:30,245 INFO L272 TraceCheckUtils]: 38: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-27 21:46:30,245 INFO L290 TraceCheckUtils]: 37: Hoare triple {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:46:30,246 INFO L290 TraceCheckUtils]: 36: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8271#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:46:30,246 INFO L290 TraceCheckUtils]: 35: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:30,247 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {8248#true} {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:30,247 INFO L290 TraceCheckUtils]: 33: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,247 INFO L290 TraceCheckUtils]: 32: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,247 INFO L290 TraceCheckUtils]: 31: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:46:30,247 INFO L272 TraceCheckUtils]: 30: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-27 21:46:30,247 INFO L290 TraceCheckUtils]: 29: Hoare triple {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:30,248 INFO L290 TraceCheckUtils]: 28: Hoare triple {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8266#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:30,248 INFO L290 TraceCheckUtils]: 27: Hoare triple {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:46:30,249 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {8248#true} {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:46:30,249 INFO L290 TraceCheckUtils]: 25: Hoare triple {8248#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,249 INFO L290 TraceCheckUtils]: 24: Hoare triple {8248#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,249 INFO L290 TraceCheckUtils]: 23: Hoare triple {8248#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8248#true} is VALID [2022-04-27 21:46:30,249 INFO L272 TraceCheckUtils]: 22: Hoare triple {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8248#true} is VALID [2022-04-27 21:46:30,249 INFO L290 TraceCheckUtils]: 21: Hoare triple {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:46:30,250 INFO L290 TraceCheckUtils]: 20: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8608#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:46:30,250 INFO L290 TraceCheckUtils]: 19: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:46:30,250 INFO L290 TraceCheckUtils]: 18: Hoare triple {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:46:30,251 INFO L290 TraceCheckUtils]: 17: Hoare triple {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8260#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:46:30,251 INFO L290 TraceCheckUtils]: 16: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8258#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:46:30,251 INFO L290 TraceCheckUtils]: 15: Hoare triple {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:46:30,252 INFO L290 TraceCheckUtils]: 14: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8257#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:46:30,252 INFO L290 TraceCheckUtils]: 13: Hoare triple {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:46:30,253 INFO L290 TraceCheckUtils]: 12: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8256#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:46:30,253 INFO L290 TraceCheckUtils]: 11: Hoare triple {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:46:30,253 INFO L290 TraceCheckUtils]: 10: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8255#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:46:30,254 INFO L290 TraceCheckUtils]: 9: Hoare triple {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:46:30,254 INFO L290 TraceCheckUtils]: 8: Hoare triple {8253#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8254#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:46:30,254 INFO L290 TraceCheckUtils]: 7: Hoare triple {8253#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8253#(= main_~i~0 0)} is VALID [2022-04-27 21:46:30,255 INFO L290 TraceCheckUtils]: 6: Hoare triple {8248#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8253#(= main_~i~0 0)} is VALID [2022-04-27 21:46:30,255 INFO L290 TraceCheckUtils]: 5: Hoare triple {8248#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8248#true} is VALID [2022-04-27 21:46:30,255 INFO L272 TraceCheckUtils]: 4: Hoare triple {8248#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,255 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8248#true} {8248#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,255 INFO L290 TraceCheckUtils]: 2: Hoare triple {8248#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,255 INFO L290 TraceCheckUtils]: 1: Hoare triple {8248#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8248#true} is VALID [2022-04-27 21:46:30,255 INFO L272 TraceCheckUtils]: 0: Hoare triple {8248#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8248#true} is VALID [2022-04-27 21:46:30,255 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 10 proven. 86 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:46:30,255 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [794764260] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:46:30,255 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:46:30,255 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 18] total 29 [2022-04-27 21:46:30,255 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [817653173] [2022-04-27 21:46:30,255 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:46:30,256 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 66 [2022-04-27 21:46:30,256 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:46:30,257 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:46:30,331 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:46:30,331 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-27 21:46:30,332 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:46:30,332 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-27 21:46:30,332 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=727, Unknown=6, NotChecked=0, Total=812 [2022-04-27 21:46:30,332 INFO L87 Difference]: Start difference. First operand 69 states and 70 transitions. Second operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:46:39,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:46:39,646 INFO L93 Difference]: Finished difference Result 122 states and 124 transitions. [2022-04-27 21:46:39,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-27 21:46:39,646 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 66 [2022-04-27 21:46:39,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:46:39,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:46:39,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 74 transitions. [2022-04-27 21:46:39,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:46:39,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 74 transitions. [2022-04-27 21:46:39,648 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 74 transitions. [2022-04-27 21:46:39,718 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:46:39,719 INFO L225 Difference]: With dead ends: 122 [2022-04-27 21:46:39,719 INFO L226 Difference]: Without dead ends: 120 [2022-04-27 21:46:39,720 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 126 SyntacticMatches, 14 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 531 ImplicationChecksByTransitivity, 59.7s TimeCoverageRelationStatistics Valid=219, Invalid=2221, Unknown=10, NotChecked=0, Total=2450 [2022-04-27 21:46:39,720 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 64 mSDsluCounter, 160 mSDsCounter, 0 mSdLazyCounter, 685 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 189 SdHoareTripleChecker+Invalid, 786 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 685 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 81 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 21:46:39,721 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [65 Valid, 189 Invalid, 786 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 685 Invalid, 0 Unknown, 81 Unchecked, 0.5s Time] [2022-04-27 21:46:39,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-04-27 21:46:39,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 80. [2022-04-27 21:46:39,754 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:46:39,754 INFO L82 GeneralOperation]: Start isEquivalent. First operand 120 states. Second operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 21:46:39,754 INFO L74 IsIncluded]: Start isIncluded. First operand 120 states. Second operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 21:46:39,755 INFO L87 Difference]: Start difference. First operand 120 states. Second operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 21:46:39,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:46:39,756 INFO L93 Difference]: Finished difference Result 120 states and 122 transitions. [2022-04-27 21:46:39,756 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 122 transitions. [2022-04-27 21:46:39,756 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:46:39,756 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:46:39,756 INFO L74 IsIncluded]: Start isIncluded. First operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) Second operand 120 states. [2022-04-27 21:46:39,757 INFO L87 Difference]: Start difference. First operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) Second operand 120 states. [2022-04-27 21:46:39,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:46:39,758 INFO L93 Difference]: Finished difference Result 120 states and 122 transitions. [2022-04-27 21:46:39,758 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 122 transitions. [2022-04-27 21:46:39,758 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:46:39,758 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:46:39,758 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:46:39,758 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:46:39,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 63 states have internal predecessors, (65), 9 states have call successors, (9), 9 states have call predecessors, (9), 8 states have return successors, (8), 7 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-27 21:46:39,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 82 transitions. [2022-04-27 21:46:39,760 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 82 transitions. Word has length 66 [2022-04-27 21:46:39,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:46:39,760 INFO L495 AbstractCegarLoop]: Abstraction has 80 states and 82 transitions. [2022-04-27 21:46:39,760 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:46:39,760 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 82 transitions. [2022-04-27 21:46:39,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-04-27 21:46:39,760 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:46:39,760 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:46:39,782 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-27 21:46:39,982 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:46:39,982 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:46:39,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:46:39,983 INFO L85 PathProgramCache]: Analyzing trace with hash 1865758983, now seen corresponding path program 14 times [2022-04-27 21:46:39,983 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:46:39,983 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803035462] [2022-04-27 21:46:39,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:46:39,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:46:40,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:46:40,223 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:46:40,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:46:40,225 INFO L290 TraceCheckUtils]: 0: Hoare triple {9308#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9265#true} is VALID [2022-04-27 21:46:40,226 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,226 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9265#true} {9265#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,226 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-27 21:46:40,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:46:40,228 INFO L290 TraceCheckUtils]: 0: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:46:40,228 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,228 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,229 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:46:40,229 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-27 21:46:40,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:46:40,236 INFO L290 TraceCheckUtils]: 0: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:46:40,237 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,237 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:40,238 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-27 21:46:40,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:46:40,240 INFO L290 TraceCheckUtils]: 0: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:46:40,240 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,240 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,241 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:46:40,241 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-27 21:46:40,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:46:40,243 INFO L290 TraceCheckUtils]: 0: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:46:40,243 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,243 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,244 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:46:40,244 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-27 21:46:40,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:46:40,246 INFO L290 TraceCheckUtils]: 0: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:46:40,246 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,246 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,247 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:46:40,248 INFO L272 TraceCheckUtils]: 0: Hoare triple {9265#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9308#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:46:40,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {9308#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9265#true} is VALID [2022-04-27 21:46:40,248 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,248 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9265#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,248 INFO L272 TraceCheckUtils]: 4: Hoare triple {9265#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,248 INFO L290 TraceCheckUtils]: 5: Hoare triple {9265#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9265#true} is VALID [2022-04-27 21:46:40,248 INFO L290 TraceCheckUtils]: 6: Hoare triple {9265#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9270#(= main_~i~0 0)} is VALID [2022-04-27 21:46:40,249 INFO L290 TraceCheckUtils]: 7: Hoare triple {9270#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9270#(= main_~i~0 0)} is VALID [2022-04-27 21:46:40,249 INFO L290 TraceCheckUtils]: 8: Hoare triple {9270#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:46:40,249 INFO L290 TraceCheckUtils]: 9: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:46:40,250 INFO L290 TraceCheckUtils]: 10: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:46:40,250 INFO L290 TraceCheckUtils]: 11: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:46:40,251 INFO L290 TraceCheckUtils]: 12: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:46:40,251 INFO L290 TraceCheckUtils]: 13: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:46:40,252 INFO L290 TraceCheckUtils]: 14: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:46:40,252 INFO L290 TraceCheckUtils]: 15: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:46:40,253 INFO L290 TraceCheckUtils]: 16: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:46:40,253 INFO L290 TraceCheckUtils]: 17: Hoare triple {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9276#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:46:40,254 INFO L290 TraceCheckUtils]: 18: Hoare triple {9276#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9277#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:46:40,255 INFO L290 TraceCheckUtils]: 19: Hoare triple {9277#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:46:40,255 INFO L290 TraceCheckUtils]: 20: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:46:40,255 INFO L290 TraceCheckUtils]: 21: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:46:40,256 INFO L290 TraceCheckUtils]: 22: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:46:40,256 INFO L290 TraceCheckUtils]: 23: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:46:40,256 INFO L272 TraceCheckUtils]: 24: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-27 21:46:40,256 INFO L290 TraceCheckUtils]: 25: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:46:40,256 INFO L290 TraceCheckUtils]: 26: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,256 INFO L290 TraceCheckUtils]: 27: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,257 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {9265#true} {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:46:40,257 INFO L290 TraceCheckUtils]: 29: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:46:40,258 INFO L290 TraceCheckUtils]: 30: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:40,258 INFO L290 TraceCheckUtils]: 31: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:40,258 INFO L272 TraceCheckUtils]: 32: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-27 21:46:40,258 INFO L290 TraceCheckUtils]: 33: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:46:40,258 INFO L290 TraceCheckUtils]: 34: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,258 INFO L290 TraceCheckUtils]: 35: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,259 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {9265#true} {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:40,259 INFO L290 TraceCheckUtils]: 37: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:40,260 INFO L290 TraceCheckUtils]: 38: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:46:40,260 INFO L290 TraceCheckUtils]: 39: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:46:40,261 INFO L272 TraceCheckUtils]: 40: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-27 21:46:40,261 INFO L290 TraceCheckUtils]: 41: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:46:40,261 INFO L290 TraceCheckUtils]: 42: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,261 INFO L290 TraceCheckUtils]: 43: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,261 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {9265#true} {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:46:40,262 INFO L290 TraceCheckUtils]: 45: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:46:40,262 INFO L290 TraceCheckUtils]: 46: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:46:40,263 INFO L290 TraceCheckUtils]: 47: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:46:40,263 INFO L272 TraceCheckUtils]: 48: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-27 21:46:40,263 INFO L290 TraceCheckUtils]: 49: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:46:40,263 INFO L290 TraceCheckUtils]: 50: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,263 INFO L290 TraceCheckUtils]: 51: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,264 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {9265#true} {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:46:40,264 INFO L290 TraceCheckUtils]: 53: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:46:40,264 INFO L290 TraceCheckUtils]: 54: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:46:40,265 INFO L290 TraceCheckUtils]: 55: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:46:40,265 INFO L272 TraceCheckUtils]: 56: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-27 21:46:40,265 INFO L290 TraceCheckUtils]: 57: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:46:40,265 INFO L290 TraceCheckUtils]: 58: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,265 INFO L290 TraceCheckUtils]: 59: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:46:40,266 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {9265#true} {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:46:40,266 INFO L290 TraceCheckUtils]: 61: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:46:40,267 INFO L290 TraceCheckUtils]: 62: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9304#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:46:40,267 INFO L290 TraceCheckUtils]: 63: Hoare triple {9304#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9305#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:46:40,268 INFO L272 TraceCheckUtils]: 64: Hoare triple {9305#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9306#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:46:40,268 INFO L290 TraceCheckUtils]: 65: Hoare triple {9306#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9307#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:46:40,268 INFO L290 TraceCheckUtils]: 66: Hoare triple {9307#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-27 21:46:40,268 INFO L290 TraceCheckUtils]: 67: Hoare triple {9266#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-27 21:46:40,269 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:46:40,269 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:46:40,269 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803035462] [2022-04-27 21:46:40,269 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1803035462] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:46:40,269 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1181766763] [2022-04-27 21:46:40,269 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:46:40,269 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:46:40,269 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:46:40,275 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:46:40,276 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-27 21:46:40,335 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:46:40,335 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:46:40,336 INFO L263 TraceCheckSpWp]: Trace formula consists of 198 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-27 21:46:40,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:46:40,351 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:46:40,446 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:46:40,653 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-27 21:46:40,653 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-27 21:47:31,595 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:47:31,646 INFO L272 TraceCheckUtils]: 0: Hoare triple {9265#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:31,646 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9265#true} is VALID [2022-04-27 21:47:31,646 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:31,646 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9265#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:31,646 INFO L272 TraceCheckUtils]: 4: Hoare triple {9265#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:31,646 INFO L290 TraceCheckUtils]: 5: Hoare triple {9265#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9265#true} is VALID [2022-04-27 21:47:31,647 INFO L290 TraceCheckUtils]: 6: Hoare triple {9265#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9270#(= main_~i~0 0)} is VALID [2022-04-27 21:47:31,647 INFO L290 TraceCheckUtils]: 7: Hoare triple {9270#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9270#(= main_~i~0 0)} is VALID [2022-04-27 21:47:31,647 INFO L290 TraceCheckUtils]: 8: Hoare triple {9270#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:47:31,648 INFO L290 TraceCheckUtils]: 9: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:47:31,648 INFO L290 TraceCheckUtils]: 10: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:47:31,649 INFO L290 TraceCheckUtils]: 11: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:47:31,649 INFO L290 TraceCheckUtils]: 12: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:47:31,649 INFO L290 TraceCheckUtils]: 13: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:47:31,650 INFO L290 TraceCheckUtils]: 14: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:47:31,650 INFO L290 TraceCheckUtils]: 15: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:47:31,651 INFO L290 TraceCheckUtils]: 16: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:47:31,651 INFO L290 TraceCheckUtils]: 17: Hoare triple {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9276#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:47:31,653 INFO L290 TraceCheckUtils]: 18: Hoare triple {9276#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9366#(exists ((v_main_~i~0_120 Int)) (and (<= 5 v_main_~i~0_120) (<= (+ v_main_~i~0_120 1) main_~i~0) (<= v_main_~i~0_120 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_120))) 0)))} is VALID [2022-04-27 21:47:31,653 INFO L290 TraceCheckUtils]: 19: Hoare triple {9366#(exists ((v_main_~i~0_120 Int)) (and (<= 5 v_main_~i~0_120) (<= (+ v_main_~i~0_120 1) main_~i~0) (<= v_main_~i~0_120 5) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_120))) 0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:47:31,653 INFO L290 TraceCheckUtils]: 20: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:47:31,654 INFO L290 TraceCheckUtils]: 21: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:47:31,654 INFO L290 TraceCheckUtils]: 22: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:47:31,654 INFO L290 TraceCheckUtils]: 23: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:47:31,656 INFO L272 TraceCheckUtils]: 24: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,656 INFO L290 TraceCheckUtils]: 25: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,657 INFO L290 TraceCheckUtils]: 26: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,657 INFO L290 TraceCheckUtils]: 27: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,657 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:47:31,658 INFO L290 TraceCheckUtils]: 29: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:47:31,658 INFO L290 TraceCheckUtils]: 30: Hoare triple {9279#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:47:31,659 INFO L290 TraceCheckUtils]: 31: Hoare triple {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:47:31,659 INFO L272 TraceCheckUtils]: 32: Hoare triple {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,660 INFO L290 TraceCheckUtils]: 33: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,660 INFO L290 TraceCheckUtils]: 34: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,661 INFO L290 TraceCheckUtils]: 35: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,661 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:47:31,661 INFO L290 TraceCheckUtils]: 37: Hoare triple {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:47:31,662 INFO L290 TraceCheckUtils]: 38: Hoare triple {9404#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:47:31,662 INFO L290 TraceCheckUtils]: 39: Hoare triple {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:47:31,663 INFO L272 TraceCheckUtils]: 40: Hoare triple {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,663 INFO L290 TraceCheckUtils]: 41: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,664 INFO L290 TraceCheckUtils]: 42: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,664 INFO L290 TraceCheckUtils]: 43: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,664 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:47:31,665 INFO L290 TraceCheckUtils]: 45: Hoare triple {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:47:31,665 INFO L290 TraceCheckUtils]: 46: Hoare triple {9429#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:47:31,666 INFO L290 TraceCheckUtils]: 47: Hoare triple {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:47:31,666 INFO L272 TraceCheckUtils]: 48: Hoare triple {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,667 INFO L290 TraceCheckUtils]: 49: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,667 INFO L290 TraceCheckUtils]: 50: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,667 INFO L290 TraceCheckUtils]: 51: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,668 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:47:31,668 INFO L290 TraceCheckUtils]: 53: Hoare triple {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:47:31,669 INFO L290 TraceCheckUtils]: 54: Hoare triple {9454#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-27 21:47:31,669 INFO L290 TraceCheckUtils]: 55: Hoare triple {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-27 21:47:31,670 INFO L272 TraceCheckUtils]: 56: Hoare triple {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,670 INFO L290 TraceCheckUtils]: 57: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,670 INFO L290 TraceCheckUtils]: 58: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,671 INFO L290 TraceCheckUtils]: 59: Hoare triple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} is VALID [2022-04-27 21:47:31,671 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {9385#(exists ((v_main_~x~0.base_BEFORE_CALL_49 Int) (v_main_~x~0.offset_BEFORE_CALL_49 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_49) (+ 20 v_main_~x~0.offset_BEFORE_CALL_49)) 0))} {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-27 21:47:31,672 INFO L290 TraceCheckUtils]: 61: Hoare triple {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-27 21:47:31,672 INFO L290 TraceCheckUtils]: 62: Hoare triple {9479#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9504#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} is VALID [2022-04-27 21:47:31,672 INFO L290 TraceCheckUtils]: 63: Hoare triple {9504#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9305#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:47:31,673 INFO L272 TraceCheckUtils]: 64: Hoare triple {9305#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9511#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:47:31,673 INFO L290 TraceCheckUtils]: 65: Hoare triple {9511#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9515#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:47:31,673 INFO L290 TraceCheckUtils]: 66: Hoare triple {9515#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-27 21:47:31,674 INFO L290 TraceCheckUtils]: 67: Hoare triple {9266#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-27 21:47:31,674 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 109 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:47:31,674 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:47:33,960 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:47:33,964 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:47:34,049 INFO L290 TraceCheckUtils]: 67: Hoare triple {9266#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-27 21:47:34,052 INFO L290 TraceCheckUtils]: 66: Hoare triple {9515#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9266#false} is VALID [2022-04-27 21:47:34,053 INFO L290 TraceCheckUtils]: 65: Hoare triple {9511#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9515#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:47:34,053 INFO L272 TraceCheckUtils]: 64: Hoare triple {9305#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9511#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:47:34,054 INFO L290 TraceCheckUtils]: 63: Hoare triple {9304#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9305#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:47:34,054 INFO L290 TraceCheckUtils]: 62: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9304#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:34,055 INFO L290 TraceCheckUtils]: 61: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:47:34,055 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {9265#true} {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:47:34,055 INFO L290 TraceCheckUtils]: 59: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,055 INFO L290 TraceCheckUtils]: 58: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,055 INFO L290 TraceCheckUtils]: 57: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:47:34,055 INFO L272 TraceCheckUtils]: 56: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-27 21:47:34,056 INFO L290 TraceCheckUtils]: 55: Hoare triple {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:47:34,056 INFO L290 TraceCheckUtils]: 54: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9299#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:47:34,057 INFO L290 TraceCheckUtils]: 53: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:47:34,057 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {9265#true} {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:47:34,057 INFO L290 TraceCheckUtils]: 51: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,057 INFO L290 TraceCheckUtils]: 50: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,057 INFO L290 TraceCheckUtils]: 49: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:47:34,057 INFO L272 TraceCheckUtils]: 48: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-27 21:47:34,058 INFO L290 TraceCheckUtils]: 47: Hoare triple {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:47:34,058 INFO L290 TraceCheckUtils]: 46: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9294#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:47:34,059 INFO L290 TraceCheckUtils]: 45: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:47:34,059 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {9265#true} {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:47:34,059 INFO L290 TraceCheckUtils]: 43: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,059 INFO L290 TraceCheckUtils]: 42: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,059 INFO L290 TraceCheckUtils]: 41: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:47:34,059 INFO L272 TraceCheckUtils]: 40: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-27 21:47:34,061 INFO L290 TraceCheckUtils]: 39: Hoare triple {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:47:34,062 INFO L290 TraceCheckUtils]: 38: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9289#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:47:34,062 INFO L290 TraceCheckUtils]: 37: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:34,063 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {9265#true} {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:34,063 INFO L290 TraceCheckUtils]: 35: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,063 INFO L290 TraceCheckUtils]: 34: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,063 INFO L290 TraceCheckUtils]: 33: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:47:34,063 INFO L272 TraceCheckUtils]: 32: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-27 21:47:34,064 INFO L290 TraceCheckUtils]: 31: Hoare triple {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:34,064 INFO L290 TraceCheckUtils]: 30: Hoare triple {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9284#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:34,064 INFO L290 TraceCheckUtils]: 29: Hoare triple {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:47:34,065 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {9265#true} {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:47:34,065 INFO L290 TraceCheckUtils]: 27: Hoare triple {9265#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,065 INFO L290 TraceCheckUtils]: 26: Hoare triple {9265#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,065 INFO L290 TraceCheckUtils]: 25: Hoare triple {9265#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9265#true} is VALID [2022-04-27 21:47:34,065 INFO L272 TraceCheckUtils]: 24: Hoare triple {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9265#true} is VALID [2022-04-27 21:47:34,065 INFO L290 TraceCheckUtils]: 23: Hoare triple {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:47:34,066 INFO L290 TraceCheckUtils]: 22: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9633#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:47:34,066 INFO L290 TraceCheckUtils]: 21: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:47:34,066 INFO L290 TraceCheckUtils]: 20: Hoare triple {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:47:34,067 INFO L290 TraceCheckUtils]: 19: Hoare triple {9277#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9278#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:47:34,067 INFO L290 TraceCheckUtils]: 18: Hoare triple {9670#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9277#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:47:34,068 INFO L290 TraceCheckUtils]: 17: Hoare triple {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9670#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} is VALID [2022-04-27 21:47:34,068 INFO L290 TraceCheckUtils]: 16: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9275#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:47:34,068 INFO L290 TraceCheckUtils]: 15: Hoare triple {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:47:34,069 INFO L290 TraceCheckUtils]: 14: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9274#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:47:34,069 INFO L290 TraceCheckUtils]: 13: Hoare triple {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:47:34,070 INFO L290 TraceCheckUtils]: 12: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9273#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:47:34,070 INFO L290 TraceCheckUtils]: 11: Hoare triple {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:47:34,070 INFO L290 TraceCheckUtils]: 10: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9272#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:47:34,071 INFO L290 TraceCheckUtils]: 9: Hoare triple {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:47:34,071 INFO L290 TraceCheckUtils]: 8: Hoare triple {9270#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9271#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:47:34,071 INFO L290 TraceCheckUtils]: 7: Hoare triple {9270#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9270#(= main_~i~0 0)} is VALID [2022-04-27 21:47:34,072 INFO L290 TraceCheckUtils]: 6: Hoare triple {9265#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9270#(= main_~i~0 0)} is VALID [2022-04-27 21:47:34,072 INFO L290 TraceCheckUtils]: 5: Hoare triple {9265#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9265#true} is VALID [2022-04-27 21:47:34,072 INFO L272 TraceCheckUtils]: 4: Hoare triple {9265#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,072 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9265#true} {9265#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,072 INFO L290 TraceCheckUtils]: 2: Hoare triple {9265#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,072 INFO L290 TraceCheckUtils]: 1: Hoare triple {9265#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9265#true} is VALID [2022-04-27 21:47:34,072 INFO L272 TraceCheckUtils]: 0: Hoare triple {9265#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9265#true} is VALID [2022-04-27 21:47:34,072 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:47:34,073 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1181766763] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:47:34,073 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:47:34,073 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 20] total 32 [2022-04-27 21:47:34,073 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [424426814] [2022-04-27 21:47:34,073 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:47:34,073 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 68 [2022-04-27 21:47:34,074 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:47:34,074 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:47:34,138 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:47:34,138 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-27 21:47:34,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:47:34,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-27 21:47:34,139 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=892, Unknown=6, NotChecked=0, Total=992 [2022-04-27 21:47:34,139 INFO L87 Difference]: Start difference. First operand 80 states and 82 transitions. Second operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:47:35,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:47:35,800 INFO L93 Difference]: Finished difference Result 156 states and 163 transitions. [2022-04-27 21:47:35,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-27 21:47:35,800 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 68 [2022-04-27 21:47:35,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:47:35,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:47:35,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 78 transitions. [2022-04-27 21:47:35,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:47:35,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 78 transitions. [2022-04-27 21:47:35,802 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 78 transitions. [2022-04-27 21:47:35,875 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:47:35,877 INFO L225 Difference]: With dead ends: 156 [2022-04-27 21:47:35,877 INFO L226 Difference]: Without dead ends: 154 [2022-04-27 21:47:35,877 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 128 SyntacticMatches, 15 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 553 ImplicationChecksByTransitivity, 53.1s TimeCoverageRelationStatistics Valid=227, Invalid=2317, Unknown=6, NotChecked=0, Total=2550 [2022-04-27 21:47:35,878 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 56 mSDsluCounter, 202 mSDsCounter, 0 mSdLazyCounter, 680 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 229 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 680 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 88 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 21:47:35,878 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [57 Valid, 229 Invalid, 791 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 680 Invalid, 0 Unknown, 88 Unchecked, 0.5s Time] [2022-04-27 21:47:35,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2022-04-27 21:47:35,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 127. [2022-04-27 21:47:35,928 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:47:35,928 INFO L82 GeneralOperation]: Start isEquivalent. First operand 154 states. Second operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 21:47:35,928 INFO L74 IsIncluded]: Start isIncluded. First operand 154 states. Second operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 21:47:35,928 INFO L87 Difference]: Start difference. First operand 154 states. Second operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 21:47:35,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:47:35,931 INFO L93 Difference]: Finished difference Result 154 states and 161 transitions. [2022-04-27 21:47:35,931 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 161 transitions. [2022-04-27 21:47:35,931 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:47:35,931 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:47:35,931 INFO L74 IsIncluded]: Start isIncluded. First operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) Second operand 154 states. [2022-04-27 21:47:35,931 INFO L87 Difference]: Start difference. First operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) Second operand 154 states. [2022-04-27 21:47:35,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:47:35,935 INFO L93 Difference]: Finished difference Result 154 states and 161 transitions. [2022-04-27 21:47:35,936 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 161 transitions. [2022-04-27 21:47:35,936 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:47:35,936 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:47:35,937 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:47:35,937 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:47:35,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 97 states have (on average 1.041237113402062) internal successors, (101), 100 states have internal predecessors, (101), 17 states have call successors, (17), 13 states have call predecessors, (17), 12 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 21:47:35,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 134 transitions. [2022-04-27 21:47:35,941 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 134 transitions. Word has length 68 [2022-04-27 21:47:35,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:47:35,941 INFO L495 AbstractCegarLoop]: Abstraction has 127 states and 134 transitions. [2022-04-27 21:47:35,942 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:47:35,942 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 134 transitions. [2022-04-27 21:47:35,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-04-27 21:47:35,942 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:47:35,942 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:47:35,971 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2022-04-27 21:47:36,157 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-27 21:47:36,157 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:47:36,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:47:36,158 INFO L85 PathProgramCache]: Analyzing trace with hash 1135764165, now seen corresponding path program 15 times [2022-04-27 21:47:36,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:47:36,158 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1755272960] [2022-04-27 21:47:36,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:47:36,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:47:36,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:47:36,406 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:47:36,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:47:36,420 INFO L290 TraceCheckUtils]: 0: Hoare triple {10523#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10479#true} is VALID [2022-04-27 21:47:36,420 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,420 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10479#true} {10479#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,421 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 21:47:36,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:47:36,423 INFO L290 TraceCheckUtils]: 0: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:47:36,423 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,423 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,424 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:47:36,424 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 21:47:36,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:47:36,426 INFO L290 TraceCheckUtils]: 0: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:47:36,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,426 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,427 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:36,427 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-27 21:47:36,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:47:36,429 INFO L290 TraceCheckUtils]: 0: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:47:36,429 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,429 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,430 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:47:36,430 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-27 21:47:36,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:47:36,434 INFO L290 TraceCheckUtils]: 0: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:47:36,434 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,434 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,435 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:47:36,435 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-27 21:47:36,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:47:36,438 INFO L290 TraceCheckUtils]: 0: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:47:36,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,438 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,438 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:47:36,439 INFO L272 TraceCheckUtils]: 0: Hoare triple {10479#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10523#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:47:36,439 INFO L290 TraceCheckUtils]: 1: Hoare triple {10523#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10479#true} is VALID [2022-04-27 21:47:36,439 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,439 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10479#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,439 INFO L272 TraceCheckUtils]: 4: Hoare triple {10479#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,439 INFO L290 TraceCheckUtils]: 5: Hoare triple {10479#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {10479#true} is VALID [2022-04-27 21:47:36,439 INFO L290 TraceCheckUtils]: 6: Hoare triple {10479#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {10484#(= main_~i~0 0)} is VALID [2022-04-27 21:47:36,440 INFO L290 TraceCheckUtils]: 7: Hoare triple {10484#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10484#(= main_~i~0 0)} is VALID [2022-04-27 21:47:36,440 INFO L290 TraceCheckUtils]: 8: Hoare triple {10484#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:47:36,440 INFO L290 TraceCheckUtils]: 9: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:47:36,441 INFO L290 TraceCheckUtils]: 10: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:47:36,441 INFO L290 TraceCheckUtils]: 11: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:47:36,442 INFO L290 TraceCheckUtils]: 12: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:47:36,442 INFO L290 TraceCheckUtils]: 13: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:47:36,442 INFO L290 TraceCheckUtils]: 14: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:47:36,443 INFO L290 TraceCheckUtils]: 15: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:47:36,443 INFO L290 TraceCheckUtils]: 16: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:47:36,444 INFO L290 TraceCheckUtils]: 17: Hoare triple {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:47:36,444 INFO L290 TraceCheckUtils]: 18: Hoare triple {10490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 21:47:36,445 INFO L290 TraceCheckUtils]: 19: Hoare triple {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 21:47:36,446 INFO L290 TraceCheckUtils]: 20: Hoare triple {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10492#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:47:36,446 INFO L290 TraceCheckUtils]: 21: Hoare triple {10492#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:47:36,446 INFO L290 TraceCheckUtils]: 22: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:47:36,447 INFO L290 TraceCheckUtils]: 23: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:47:36,447 INFO L290 TraceCheckUtils]: 24: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:47:36,447 INFO L290 TraceCheckUtils]: 25: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:47:36,447 INFO L272 TraceCheckUtils]: 26: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-27 21:47:36,448 INFO L290 TraceCheckUtils]: 27: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:47:36,448 INFO L290 TraceCheckUtils]: 28: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,448 INFO L290 TraceCheckUtils]: 29: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,448 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10479#true} {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:47:36,448 INFO L290 TraceCheckUtils]: 31: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:47:36,449 INFO L290 TraceCheckUtils]: 32: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:36,449 INFO L290 TraceCheckUtils]: 33: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:36,449 INFO L272 TraceCheckUtils]: 34: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-27 21:47:36,449 INFO L290 TraceCheckUtils]: 35: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:47:36,449 INFO L290 TraceCheckUtils]: 36: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,449 INFO L290 TraceCheckUtils]: 37: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,450 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {10479#true} {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:36,450 INFO L290 TraceCheckUtils]: 39: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:36,451 INFO L290 TraceCheckUtils]: 40: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:47:36,451 INFO L290 TraceCheckUtils]: 41: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:47:36,451 INFO L272 TraceCheckUtils]: 42: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-27 21:47:36,451 INFO L290 TraceCheckUtils]: 43: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:47:36,451 INFO L290 TraceCheckUtils]: 44: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,451 INFO L290 TraceCheckUtils]: 45: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,452 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {10479#true} {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:47:36,452 INFO L290 TraceCheckUtils]: 47: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:47:36,453 INFO L290 TraceCheckUtils]: 48: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:47:36,453 INFO L290 TraceCheckUtils]: 49: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:47:36,453 INFO L272 TraceCheckUtils]: 50: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-27 21:47:36,453 INFO L290 TraceCheckUtils]: 51: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:47:36,453 INFO L290 TraceCheckUtils]: 52: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,453 INFO L290 TraceCheckUtils]: 53: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,454 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {10479#true} {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:47:36,454 INFO L290 TraceCheckUtils]: 55: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:47:36,455 INFO L290 TraceCheckUtils]: 56: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:47:36,455 INFO L290 TraceCheckUtils]: 57: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:47:36,455 INFO L272 TraceCheckUtils]: 58: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-27 21:47:36,455 INFO L290 TraceCheckUtils]: 59: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:47:36,455 INFO L290 TraceCheckUtils]: 60: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,455 INFO L290 TraceCheckUtils]: 61: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:47:36,456 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {10479#true} {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:47:36,456 INFO L290 TraceCheckUtils]: 63: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:47:36,456 INFO L290 TraceCheckUtils]: 64: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10519#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:47:36,457 INFO L290 TraceCheckUtils]: 65: Hoare triple {10519#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10520#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:47:36,457 INFO L272 TraceCheckUtils]: 66: Hoare triple {10520#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10521#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:47:36,458 INFO L290 TraceCheckUtils]: 67: Hoare triple {10521#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10522#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:47:36,458 INFO L290 TraceCheckUtils]: 68: Hoare triple {10522#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-27 21:47:36,458 INFO L290 TraceCheckUtils]: 69: Hoare triple {10480#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-27 21:47:36,458 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 10 proven. 114 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:47:36,459 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:47:36,459 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1755272960] [2022-04-27 21:47:36,459 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1755272960] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:47:36,459 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1046128704] [2022-04-27 21:47:36,459 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:47:36,459 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:47:36,459 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:47:36,461 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:47:36,461 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-27 21:47:36,548 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-04-27 21:47:36,548 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:47:36,549 INFO L263 TraceCheckSpWp]: Trace formula consists of 205 conjuncts, 40 conjunts are in the unsatisfiable core [2022-04-27 21:47:36,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:47:36,568 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:47:36,654 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:47:36,769 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 21:47:36,769 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 21:47:36,793 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-27 21:47:36,793 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-27 21:48:30,810 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:48:30,856 INFO L272 TraceCheckUtils]: 0: Hoare triple {10479#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:30,856 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10479#true} is VALID [2022-04-27 21:48:30,856 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:30,856 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10479#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:30,856 INFO L272 TraceCheckUtils]: 4: Hoare triple {10479#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:30,856 INFO L290 TraceCheckUtils]: 5: Hoare triple {10479#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {10479#true} is VALID [2022-04-27 21:48:30,857 INFO L290 TraceCheckUtils]: 6: Hoare triple {10479#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {10484#(= main_~i~0 0)} is VALID [2022-04-27 21:48:30,857 INFO L290 TraceCheckUtils]: 7: Hoare triple {10484#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10484#(= main_~i~0 0)} is VALID [2022-04-27 21:48:30,857 INFO L290 TraceCheckUtils]: 8: Hoare triple {10484#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:48:30,858 INFO L290 TraceCheckUtils]: 9: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:48:30,858 INFO L290 TraceCheckUtils]: 10: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:48:30,858 INFO L290 TraceCheckUtils]: 11: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:48:30,859 INFO L290 TraceCheckUtils]: 12: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:48:30,859 INFO L290 TraceCheckUtils]: 13: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:48:30,859 INFO L290 TraceCheckUtils]: 14: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:48:30,860 INFO L290 TraceCheckUtils]: 15: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:48:30,860 INFO L290 TraceCheckUtils]: 16: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:48:30,861 INFO L290 TraceCheckUtils]: 17: Hoare triple {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:48:30,861 INFO L290 TraceCheckUtils]: 18: Hoare triple {10490#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-27 21:48:30,862 INFO L290 TraceCheckUtils]: 19: Hoare triple {10491#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:48:30,862 INFO L290 TraceCheckUtils]: 20: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:48:30,863 INFO L290 TraceCheckUtils]: 21: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:48:30,863 INFO L290 TraceCheckUtils]: 22: Hoare triple {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:48:30,864 INFO L290 TraceCheckUtils]: 23: Hoare triple {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} is VALID [2022-04-27 21:48:30,864 INFO L290 TraceCheckUtils]: 24: Hoare triple {10590#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (exists ((main_~i~0 Int)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:48:30,864 INFO L290 TraceCheckUtils]: 25: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:48:30,865 INFO L272 TraceCheckUtils]: 26: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,865 INFO L290 TraceCheckUtils]: 27: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,866 INFO L290 TraceCheckUtils]: 28: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,866 INFO L290 TraceCheckUtils]: 29: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,866 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:48:30,867 INFO L290 TraceCheckUtils]: 31: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:48:30,867 INFO L290 TraceCheckUtils]: 32: Hoare triple {10494#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10625#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:48:30,868 INFO L290 TraceCheckUtils]: 33: Hoare triple {10625#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10625#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:48:30,868 INFO L272 TraceCheckUtils]: 34: Hoare triple {10625#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,868 INFO L290 TraceCheckUtils]: 35: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,869 INFO L290 TraceCheckUtils]: 36: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,869 INFO L290 TraceCheckUtils]: 37: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,869 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} {10625#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10625#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:48:30,870 INFO L290 TraceCheckUtils]: 39: Hoare triple {10625#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10625#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:48:30,870 INFO L290 TraceCheckUtils]: 40: Hoare triple {10625#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10650#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,871 INFO L290 TraceCheckUtils]: 41: Hoare triple {10650#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10650#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,871 INFO L272 TraceCheckUtils]: 42: Hoare triple {10650#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,871 INFO L290 TraceCheckUtils]: 43: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,872 INFO L290 TraceCheckUtils]: 44: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,877 INFO L290 TraceCheckUtils]: 45: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,878 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} {10650#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10650#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,878 INFO L290 TraceCheckUtils]: 47: Hoare triple {10650#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10650#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,878 INFO L290 TraceCheckUtils]: 48: Hoare triple {10650#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10675#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,879 INFO L290 TraceCheckUtils]: 49: Hoare triple {10675#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10675#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,879 INFO L272 TraceCheckUtils]: 50: Hoare triple {10675#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,880 INFO L290 TraceCheckUtils]: 51: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,880 INFO L290 TraceCheckUtils]: 52: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,880 INFO L290 TraceCheckUtils]: 53: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,881 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} {10675#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10675#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,881 INFO L290 TraceCheckUtils]: 55: Hoare triple {10675#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10675#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,881 INFO L290 TraceCheckUtils]: 56: Hoare triple {10675#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10700#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,882 INFO L290 TraceCheckUtils]: 57: Hoare triple {10700#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10700#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,882 INFO L272 TraceCheckUtils]: 58: Hoare triple {10700#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,883 INFO L290 TraceCheckUtils]: 59: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,883 INFO L290 TraceCheckUtils]: 60: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,883 INFO L290 TraceCheckUtils]: 61: Hoare triple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} is VALID [2022-04-27 21:48:30,884 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {10606#(exists ((v_main_~x~0.base_BEFORE_CALL_59 Int) (v_main_~x~0.offset_BEFORE_CALL_59 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_59) (+ 20 v_main_~x~0.offset_BEFORE_CALL_59)) 0))} {10700#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10700#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,884 INFO L290 TraceCheckUtils]: 63: Hoare triple {10700#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10700#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:30,884 INFO L290 TraceCheckUtils]: 64: Hoare triple {10700#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} is VALID [2022-04-27 21:48:30,885 INFO L290 TraceCheckUtils]: 65: Hoare triple {10725#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10520#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:48:30,885 INFO L272 TraceCheckUtils]: 66: Hoare triple {10520#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10732#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:48:30,885 INFO L290 TraceCheckUtils]: 67: Hoare triple {10732#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10736#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:48:30,886 INFO L290 TraceCheckUtils]: 68: Hoare triple {10736#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-27 21:48:30,886 INFO L290 TraceCheckUtils]: 69: Hoare triple {10480#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-27 21:48:30,886 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 2 proven. 122 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-27 21:48:30,886 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:48:33,479 WARN L833 $PredicateComparison]: unable to prove that (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 20)) 0)) is different from false [2022-04-27 21:48:33,793 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:48:33,797 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:48:33,883 INFO L290 TraceCheckUtils]: 69: Hoare triple {10480#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-27 21:48:33,883 INFO L290 TraceCheckUtils]: 68: Hoare triple {10736#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10480#false} is VALID [2022-04-27 21:48:33,884 INFO L290 TraceCheckUtils]: 67: Hoare triple {10732#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10736#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:48:33,884 INFO L272 TraceCheckUtils]: 66: Hoare triple {10520#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10732#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:48:33,884 INFO L290 TraceCheckUtils]: 65: Hoare triple {10519#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10520#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:48:33,885 INFO L290 TraceCheckUtils]: 64: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10519#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:33,885 INFO L290 TraceCheckUtils]: 63: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:48:33,886 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {10479#true} {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:48:33,886 INFO L290 TraceCheckUtils]: 61: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,886 INFO L290 TraceCheckUtils]: 60: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,886 INFO L290 TraceCheckUtils]: 59: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:48:33,886 INFO L272 TraceCheckUtils]: 58: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-27 21:48:33,886 INFO L290 TraceCheckUtils]: 57: Hoare triple {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:48:33,887 INFO L290 TraceCheckUtils]: 56: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10514#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:48:33,887 INFO L290 TraceCheckUtils]: 55: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:48:33,888 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {10479#true} {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:48:33,888 INFO L290 TraceCheckUtils]: 53: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,888 INFO L290 TraceCheckUtils]: 52: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,888 INFO L290 TraceCheckUtils]: 51: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:48:33,888 INFO L272 TraceCheckUtils]: 50: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-27 21:48:33,888 INFO L290 TraceCheckUtils]: 49: Hoare triple {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:48:33,889 INFO L290 TraceCheckUtils]: 48: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10509#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:48:33,889 INFO L290 TraceCheckUtils]: 47: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:48:33,890 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {10479#true} {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:48:33,890 INFO L290 TraceCheckUtils]: 45: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,890 INFO L290 TraceCheckUtils]: 44: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,890 INFO L290 TraceCheckUtils]: 43: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:48:33,890 INFO L272 TraceCheckUtils]: 42: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-27 21:48:33,890 INFO L290 TraceCheckUtils]: 41: Hoare triple {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:48:33,891 INFO L290 TraceCheckUtils]: 40: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10504#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:48:33,891 INFO L290 TraceCheckUtils]: 39: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:33,892 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {10479#true} {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:33,892 INFO L290 TraceCheckUtils]: 37: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,892 INFO L290 TraceCheckUtils]: 36: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,892 INFO L290 TraceCheckUtils]: 35: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:48:33,892 INFO L272 TraceCheckUtils]: 34: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-27 21:48:33,893 INFO L290 TraceCheckUtils]: 33: Hoare triple {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:33,893 INFO L290 TraceCheckUtils]: 32: Hoare triple {10854#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10499#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:33,894 INFO L290 TraceCheckUtils]: 31: Hoare triple {10854#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10854#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:48:33,894 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10479#true} {10854#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10854#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:48:33,894 INFO L290 TraceCheckUtils]: 29: Hoare triple {10479#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,894 INFO L290 TraceCheckUtils]: 28: Hoare triple {10479#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,894 INFO L290 TraceCheckUtils]: 27: Hoare triple {10479#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10479#true} is VALID [2022-04-27 21:48:33,894 INFO L272 TraceCheckUtils]: 26: Hoare triple {10854#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10479#true} is VALID [2022-04-27 21:48:33,895 INFO L290 TraceCheckUtils]: 25: Hoare triple {10854#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10854#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:48:33,895 INFO L290 TraceCheckUtils]: 24: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {10854#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:48:33,896 INFO L290 TraceCheckUtils]: 23: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:48:33,896 INFO L290 TraceCheckUtils]: 22: Hoare triple {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:48:33,897 INFO L290 TraceCheckUtils]: 21: Hoare triple {10888#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-27 21:48:33,898 INFO L290 TraceCheckUtils]: 20: Hoare triple {10888#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 20)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10888#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:33,898 INFO L290 TraceCheckUtils]: 19: Hoare triple {10492#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10888#(forall ((main_~i~0 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) 0) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:33,899 INFO L290 TraceCheckUtils]: 18: Hoare triple {10898#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10492#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-27 21:48:33,899 INFO L290 TraceCheckUtils]: 17: Hoare triple {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10898#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} is VALID [2022-04-27 21:48:33,900 INFO L290 TraceCheckUtils]: 16: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10489#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:48:33,900 INFO L290 TraceCheckUtils]: 15: Hoare triple {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:48:33,901 INFO L290 TraceCheckUtils]: 14: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10488#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:48:33,901 INFO L290 TraceCheckUtils]: 13: Hoare triple {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:48:33,902 INFO L290 TraceCheckUtils]: 12: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10487#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:48:33,902 INFO L290 TraceCheckUtils]: 11: Hoare triple {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:48:33,903 INFO L290 TraceCheckUtils]: 10: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10486#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:48:33,903 INFO L290 TraceCheckUtils]: 9: Hoare triple {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:48:33,903 INFO L290 TraceCheckUtils]: 8: Hoare triple {10484#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10485#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:48:33,904 INFO L290 TraceCheckUtils]: 7: Hoare triple {10484#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10484#(= main_~i~0 0)} is VALID [2022-04-27 21:48:33,904 INFO L290 TraceCheckUtils]: 6: Hoare triple {10479#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {10484#(= main_~i~0 0)} is VALID [2022-04-27 21:48:33,904 INFO L290 TraceCheckUtils]: 5: Hoare triple {10479#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {10479#true} is VALID [2022-04-27 21:48:33,904 INFO L272 TraceCheckUtils]: 4: Hoare triple {10479#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,904 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10479#true} {10479#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,904 INFO L290 TraceCheckUtils]: 2: Hoare triple {10479#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,904 INFO L290 TraceCheckUtils]: 1: Hoare triple {10479#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10479#true} is VALID [2022-04-27 21:48:33,904 INFO L272 TraceCheckUtils]: 0: Hoare triple {10479#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10479#true} is VALID [2022-04-27 21:48:33,905 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 15 not checked. [2022-04-27 21:48:33,905 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1046128704] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:48:33,905 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:48:33,905 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 21] total 34 [2022-04-27 21:48:33,905 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1435006374] [2022-04-27 21:48:33,905 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:48:33,906 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 33 states have (on average 2.3636363636363638) internal successors, (78), 31 states have internal predecessors, (78), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 70 [2022-04-27 21:48:33,907 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:48:33,907 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 33 states have (on average 2.3636363636363638) internal successors, (78), 31 states have internal predecessors, (78), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:48:33,980 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:48:33,980 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-27 21:48:33,980 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:48:33,980 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-27 21:48:33,981 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=942, Unknown=14, NotChecked=62, Total=1122 [2022-04-27 21:48:33,981 INFO L87 Difference]: Start difference. First operand 127 states and 134 transitions. Second operand has 34 states, 33 states have (on average 2.3636363636363638) internal successors, (78), 31 states have internal predecessors, (78), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:48:34,813 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 20)) 0) (<= 6 c_main_~i~0) (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 20)) 0)) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-27 21:48:35,462 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ c_main_~x~0.offset 20))) (and (= (select (select |c_#memory_int| c_main_~x~0.base) .cse0) 0) (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 20)) 0)) (not (= .cse0 (+ (* c_main_~i~0 4) c_main_~x~0.offset))))) is different from false [2022-04-27 21:48:36,173 WARN L833 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 20)) 0) (forall ((main_~i~0 Int)) (= (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) 0) (+ c_main_~x~0.offset 20)) 0)) (exists ((main_~i~0 Int)) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4))) 0))) is different from false [2022-04-27 21:48:47,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:48:47,495 INFO L93 Difference]: Finished difference Result 157 states and 165 transitions. [2022-04-27 21:48:47,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2022-04-27 21:48:47,496 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 33 states have (on average 2.3636363636363638) internal successors, (78), 31 states have internal predecessors, (78), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 70 [2022-04-27 21:48:47,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:48:47,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 33 states have (on average 2.3636363636363638) internal successors, (78), 31 states have internal predecessors, (78), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:48:47,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 86 transitions. [2022-04-27 21:48:47,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 33 states have (on average 2.3636363636363638) internal successors, (78), 31 states have internal predecessors, (78), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:48:47,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 86 transitions. [2022-04-27 21:48:47,499 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 37 states and 86 transitions. [2022-04-27 21:48:47,788 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 85 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 21:48:47,790 INFO L225 Difference]: With dead ends: 157 [2022-04-27 21:48:47,791 INFO L226 Difference]: Without dead ends: 155 [2022-04-27 21:48:47,792 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 130 SyntacticMatches, 16 SemanticMatches, 59 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 724 ImplicationChecksByTransitivity, 68.0s TimeCoverageRelationStatistics Valid=284, Invalid=2896, Unknown=28, NotChecked=452, Total=3660 [2022-04-27 21:48:47,792 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 75 mSDsluCounter, 156 mSDsCounter, 0 mSdLazyCounter, 710 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 76 SdHoareTripleChecker+Valid, 183 SdHoareTripleChecker+Invalid, 944 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 710 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 203 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 21:48:47,792 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [76 Valid, 183 Invalid, 944 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 710 Invalid, 0 Unknown, 203 Unchecked, 0.5s Time] [2022-04-27 21:48:47,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2022-04-27 21:48:47,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 143. [2022-04-27 21:48:47,848 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:48:47,848 INFO L82 GeneralOperation]: Start isEquivalent. First operand 155 states. Second operand has 143 states, 109 states have (on average 1.036697247706422) internal successors, (113), 112 states have internal predecessors, (113), 19 states have call successors, (19), 15 states have call predecessors, (19), 14 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 21:48:47,848 INFO L74 IsIncluded]: Start isIncluded. First operand 155 states. Second operand has 143 states, 109 states have (on average 1.036697247706422) internal successors, (113), 112 states have internal predecessors, (113), 19 states have call successors, (19), 15 states have call predecessors, (19), 14 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 21:48:47,848 INFO L87 Difference]: Start difference. First operand 155 states. Second operand has 143 states, 109 states have (on average 1.036697247706422) internal successors, (113), 112 states have internal predecessors, (113), 19 states have call successors, (19), 15 states have call predecessors, (19), 14 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 21:48:47,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:48:47,850 INFO L93 Difference]: Finished difference Result 155 states and 163 transitions. [2022-04-27 21:48:47,850 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 163 transitions. [2022-04-27 21:48:47,851 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:48:47,851 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:48:47,851 INFO L74 IsIncluded]: Start isIncluded. First operand has 143 states, 109 states have (on average 1.036697247706422) internal successors, (113), 112 states have internal predecessors, (113), 19 states have call successors, (19), 15 states have call predecessors, (19), 14 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) Second operand 155 states. [2022-04-27 21:48:47,851 INFO L87 Difference]: Start difference. First operand has 143 states, 109 states have (on average 1.036697247706422) internal successors, (113), 112 states have internal predecessors, (113), 19 states have call successors, (19), 15 states have call predecessors, (19), 14 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) Second operand 155 states. [2022-04-27 21:48:47,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:48:47,854 INFO L93 Difference]: Finished difference Result 155 states and 163 transitions. [2022-04-27 21:48:47,854 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 163 transitions. [2022-04-27 21:48:47,854 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:48:47,854 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:48:47,854 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:48:47,854 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:48:47,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 109 states have (on average 1.036697247706422) internal successors, (113), 112 states have internal predecessors, (113), 19 states have call successors, (19), 15 states have call predecessors, (19), 14 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 21:48:47,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 150 transitions. [2022-04-27 21:48:47,857 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 150 transitions. Word has length 70 [2022-04-27 21:48:47,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:48:47,858 INFO L495 AbstractCegarLoop]: Abstraction has 143 states and 150 transitions. [2022-04-27 21:48:47,858 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 33 states have (on average 2.3636363636363638) internal successors, (78), 31 states have internal predecessors, (78), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-27 21:48:47,858 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 150 transitions. [2022-04-27 21:48:47,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-04-27 21:48:47,858 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:48:47,858 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:48:47,876 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-27 21:48:48,067 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-27 21:48:48,067 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:48:48,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:48:48,068 INFO L85 PathProgramCache]: Analyzing trace with hash -126822625, now seen corresponding path program 16 times [2022-04-27 21:48:48,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:48:48,068 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215256976] [2022-04-27 21:48:48,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:48:48,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:48:48,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:48,208 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:48:48,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:48,211 INFO L290 TraceCheckUtils]: 0: Hoare triple {11792#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11748#true} is VALID [2022-04-27 21:48:48,211 INFO L290 TraceCheckUtils]: 1: Hoare triple {11748#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,211 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11748#true} {11748#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,211 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 21:48:48,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:48,213 INFO L290 TraceCheckUtils]: 0: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,213 INFO L290 TraceCheckUtils]: 1: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,213 INFO L290 TraceCheckUtils]: 2: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,214 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11748#true} {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-27 21:48:48,214 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-27 21:48:48,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:48,216 INFO L290 TraceCheckUtils]: 0: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,216 INFO L290 TraceCheckUtils]: 1: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,216 INFO L290 TraceCheckUtils]: 2: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,216 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11748#true} {11766#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11766#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:48:48,216 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-27 21:48:48,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:48,218 INFO L290 TraceCheckUtils]: 0: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,218 INFO L290 TraceCheckUtils]: 1: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,218 INFO L290 TraceCheckUtils]: 2: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,219 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11748#true} {11771#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11771#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:48:48,219 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-27 21:48:48,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:48,221 INFO L290 TraceCheckUtils]: 0: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,221 INFO L290 TraceCheckUtils]: 1: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,221 INFO L290 TraceCheckUtils]: 2: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11748#true} {11776#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11776#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:48:48,222 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-27 21:48:48,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:48,224 INFO L290 TraceCheckUtils]: 0: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,224 INFO L290 TraceCheckUtils]: 1: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,224 INFO L290 TraceCheckUtils]: 2: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,224 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11748#true} {11781#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11781#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:48:48,224 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-04-27 21:48:48,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:48,226 INFO L290 TraceCheckUtils]: 0: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,226 INFO L290 TraceCheckUtils]: 1: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,226 INFO L290 TraceCheckUtils]: 2: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,227 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11748#true} {11786#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11786#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:48:48,227 INFO L272 TraceCheckUtils]: 0: Hoare triple {11748#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11792#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:48:48,227 INFO L290 TraceCheckUtils]: 1: Hoare triple {11792#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11748#true} is VALID [2022-04-27 21:48:48,227 INFO L290 TraceCheckUtils]: 2: Hoare triple {11748#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,227 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11748#true} {11748#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,227 INFO L272 TraceCheckUtils]: 4: Hoare triple {11748#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,227 INFO L290 TraceCheckUtils]: 5: Hoare triple {11748#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11748#true} is VALID [2022-04-27 21:48:48,228 INFO L290 TraceCheckUtils]: 6: Hoare triple {11748#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11753#(= main_~i~0 0)} is VALID [2022-04-27 21:48:48,228 INFO L290 TraceCheckUtils]: 7: Hoare triple {11753#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11753#(= main_~i~0 0)} is VALID [2022-04-27 21:48:48,228 INFO L290 TraceCheckUtils]: 8: Hoare triple {11753#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11754#(<= main_~i~0 1)} is VALID [2022-04-27 21:48:48,229 INFO L290 TraceCheckUtils]: 9: Hoare triple {11754#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11754#(<= main_~i~0 1)} is VALID [2022-04-27 21:48:48,229 INFO L290 TraceCheckUtils]: 10: Hoare triple {11754#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11755#(<= main_~i~0 2)} is VALID [2022-04-27 21:48:48,229 INFO L290 TraceCheckUtils]: 11: Hoare triple {11755#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11755#(<= main_~i~0 2)} is VALID [2022-04-27 21:48:48,230 INFO L290 TraceCheckUtils]: 12: Hoare triple {11755#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11756#(<= main_~i~0 3)} is VALID [2022-04-27 21:48:48,230 INFO L290 TraceCheckUtils]: 13: Hoare triple {11756#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11756#(<= main_~i~0 3)} is VALID [2022-04-27 21:48:48,230 INFO L290 TraceCheckUtils]: 14: Hoare triple {11756#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11757#(<= main_~i~0 4)} is VALID [2022-04-27 21:48:48,230 INFO L290 TraceCheckUtils]: 15: Hoare triple {11757#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11757#(<= main_~i~0 4)} is VALID [2022-04-27 21:48:48,231 INFO L290 TraceCheckUtils]: 16: Hoare triple {11757#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11758#(<= main_~i~0 5)} is VALID [2022-04-27 21:48:48,231 INFO L290 TraceCheckUtils]: 17: Hoare triple {11758#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11758#(<= main_~i~0 5)} is VALID [2022-04-27 21:48:48,231 INFO L290 TraceCheckUtils]: 18: Hoare triple {11758#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11759#(<= main_~i~0 6)} is VALID [2022-04-27 21:48:48,232 INFO L290 TraceCheckUtils]: 19: Hoare triple {11759#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11760#(<= main_~n~0 6)} is VALID [2022-04-27 21:48:48,232 INFO L290 TraceCheckUtils]: 20: Hoare triple {11760#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-27 21:48:48,232 INFO L290 TraceCheckUtils]: 21: Hoare triple {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-27 21:48:48,233 INFO L272 TraceCheckUtils]: 22: Hoare triple {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,233 INFO L290 TraceCheckUtils]: 23: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,233 INFO L290 TraceCheckUtils]: 24: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,233 INFO L290 TraceCheckUtils]: 25: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,233 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11748#true} {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-27 21:48:48,233 INFO L290 TraceCheckUtils]: 27: Hoare triple {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-27 21:48:48,234 INFO L290 TraceCheckUtils]: 28: Hoare triple {11761#(and (<= main_~n~0 6) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11766#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:48:48,234 INFO L290 TraceCheckUtils]: 29: Hoare triple {11766#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11766#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:48:48,234 INFO L272 TraceCheckUtils]: 30: Hoare triple {11766#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,234 INFO L290 TraceCheckUtils]: 31: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,234 INFO L290 TraceCheckUtils]: 32: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,234 INFO L290 TraceCheckUtils]: 33: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,235 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11748#true} {11766#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11766#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:48:48,235 INFO L290 TraceCheckUtils]: 35: Hoare triple {11766#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11766#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:48:48,235 INFO L290 TraceCheckUtils]: 36: Hoare triple {11766#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11771#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:48:48,235 INFO L290 TraceCheckUtils]: 37: Hoare triple {11771#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11771#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:48:48,236 INFO L272 TraceCheckUtils]: 38: Hoare triple {11771#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,236 INFO L290 TraceCheckUtils]: 39: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,236 INFO L290 TraceCheckUtils]: 40: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,236 INFO L290 TraceCheckUtils]: 41: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,236 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11748#true} {11771#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11771#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:48:48,236 INFO L290 TraceCheckUtils]: 43: Hoare triple {11771#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11771#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:48:48,237 INFO L290 TraceCheckUtils]: 44: Hoare triple {11771#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11776#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:48:48,237 INFO L290 TraceCheckUtils]: 45: Hoare triple {11776#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11776#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:48:48,237 INFO L272 TraceCheckUtils]: 46: Hoare triple {11776#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,237 INFO L290 TraceCheckUtils]: 47: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,237 INFO L290 TraceCheckUtils]: 48: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,237 INFO L290 TraceCheckUtils]: 49: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,238 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11748#true} {11776#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11776#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:48:48,238 INFO L290 TraceCheckUtils]: 51: Hoare triple {11776#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11776#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:48:48,238 INFO L290 TraceCheckUtils]: 52: Hoare triple {11776#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11781#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:48:48,239 INFO L290 TraceCheckUtils]: 53: Hoare triple {11781#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11781#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:48:48,239 INFO L272 TraceCheckUtils]: 54: Hoare triple {11781#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,239 INFO L290 TraceCheckUtils]: 55: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,239 INFO L290 TraceCheckUtils]: 56: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,239 INFO L290 TraceCheckUtils]: 57: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,239 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11748#true} {11781#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11781#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:48:48,239 INFO L290 TraceCheckUtils]: 59: Hoare triple {11781#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11781#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:48:48,240 INFO L290 TraceCheckUtils]: 60: Hoare triple {11781#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11786#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:48:48,240 INFO L290 TraceCheckUtils]: 61: Hoare triple {11786#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11786#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:48:48,240 INFO L272 TraceCheckUtils]: 62: Hoare triple {11786#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,240 INFO L290 TraceCheckUtils]: 63: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,240 INFO L290 TraceCheckUtils]: 64: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,240 INFO L290 TraceCheckUtils]: 65: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,241 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11748#true} {11786#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11786#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:48:48,241 INFO L290 TraceCheckUtils]: 67: Hoare triple {11786#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11786#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:48:48,241 INFO L290 TraceCheckUtils]: 68: Hoare triple {11786#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11791#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:48:48,242 INFO L290 TraceCheckUtils]: 69: Hoare triple {11791#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11749#false} is VALID [2022-04-27 21:48:48,242 INFO L272 TraceCheckUtils]: 70: Hoare triple {11749#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11749#false} is VALID [2022-04-27 21:48:48,242 INFO L290 TraceCheckUtils]: 71: Hoare triple {11749#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11749#false} is VALID [2022-04-27 21:48:48,242 INFO L290 TraceCheckUtils]: 72: Hoare triple {11749#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11749#false} is VALID [2022-04-27 21:48:48,242 INFO L290 TraceCheckUtils]: 73: Hoare triple {11749#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11749#false} is VALID [2022-04-27 21:48:48,242 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 63 proven. 57 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 21:48:48,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:48:48,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215256976] [2022-04-27 21:48:48,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [215256976] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:48:48,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2101043870] [2022-04-27 21:48:48,242 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:48:48,242 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:48:48,243 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:48:48,243 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:48:48,244 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-27 21:48:48,318 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:48:48,319 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:48:48,319 INFO L263 TraceCheckSpWp]: Trace formula consists of 206 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-27 21:48:48,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:48,333 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:48:48,779 INFO L272 TraceCheckUtils]: 0: Hoare triple {11748#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,779 INFO L290 TraceCheckUtils]: 1: Hoare triple {11748#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11748#true} is VALID [2022-04-27 21:48:48,779 INFO L290 TraceCheckUtils]: 2: Hoare triple {11748#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,779 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11748#true} {11748#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,779 INFO L272 TraceCheckUtils]: 4: Hoare triple {11748#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,779 INFO L290 TraceCheckUtils]: 5: Hoare triple {11748#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11748#true} is VALID [2022-04-27 21:48:48,780 INFO L290 TraceCheckUtils]: 6: Hoare triple {11748#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11814#(<= main_~i~0 0)} is VALID [2022-04-27 21:48:48,780 INFO L290 TraceCheckUtils]: 7: Hoare triple {11814#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11814#(<= main_~i~0 0)} is VALID [2022-04-27 21:48:48,780 INFO L290 TraceCheckUtils]: 8: Hoare triple {11814#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11754#(<= main_~i~0 1)} is VALID [2022-04-27 21:48:48,780 INFO L290 TraceCheckUtils]: 9: Hoare triple {11754#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11754#(<= main_~i~0 1)} is VALID [2022-04-27 21:48:48,781 INFO L290 TraceCheckUtils]: 10: Hoare triple {11754#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11755#(<= main_~i~0 2)} is VALID [2022-04-27 21:48:48,781 INFO L290 TraceCheckUtils]: 11: Hoare triple {11755#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11755#(<= main_~i~0 2)} is VALID [2022-04-27 21:48:48,781 INFO L290 TraceCheckUtils]: 12: Hoare triple {11755#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11756#(<= main_~i~0 3)} is VALID [2022-04-27 21:48:48,782 INFO L290 TraceCheckUtils]: 13: Hoare triple {11756#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11756#(<= main_~i~0 3)} is VALID [2022-04-27 21:48:48,782 INFO L290 TraceCheckUtils]: 14: Hoare triple {11756#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11757#(<= main_~i~0 4)} is VALID [2022-04-27 21:48:48,782 INFO L290 TraceCheckUtils]: 15: Hoare triple {11757#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11757#(<= main_~i~0 4)} is VALID [2022-04-27 21:48:48,783 INFO L290 TraceCheckUtils]: 16: Hoare triple {11757#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11758#(<= main_~i~0 5)} is VALID [2022-04-27 21:48:48,783 INFO L290 TraceCheckUtils]: 17: Hoare triple {11758#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11758#(<= main_~i~0 5)} is VALID [2022-04-27 21:48:48,783 INFO L290 TraceCheckUtils]: 18: Hoare triple {11758#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11759#(<= main_~i~0 6)} is VALID [2022-04-27 21:48:48,784 INFO L290 TraceCheckUtils]: 19: Hoare triple {11759#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11760#(<= main_~n~0 6)} is VALID [2022-04-27 21:48:48,784 INFO L290 TraceCheckUtils]: 20: Hoare triple {11760#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11857#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-27 21:48:48,784 INFO L290 TraceCheckUtils]: 21: Hoare triple {11857#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11857#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-27 21:48:48,784 INFO L272 TraceCheckUtils]: 22: Hoare triple {11857#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,784 INFO L290 TraceCheckUtils]: 23: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,785 INFO L290 TraceCheckUtils]: 24: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,785 INFO L290 TraceCheckUtils]: 25: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,785 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11748#true} {11857#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11857#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-27 21:48:48,785 INFO L290 TraceCheckUtils]: 27: Hoare triple {11857#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11857#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-27 21:48:48,786 INFO L290 TraceCheckUtils]: 28: Hoare triple {11857#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11882#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-27 21:48:48,786 INFO L290 TraceCheckUtils]: 29: Hoare triple {11882#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11882#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-27 21:48:48,786 INFO L272 TraceCheckUtils]: 30: Hoare triple {11882#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,786 INFO L290 TraceCheckUtils]: 31: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,786 INFO L290 TraceCheckUtils]: 32: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,786 INFO L290 TraceCheckUtils]: 33: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,787 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11748#true} {11882#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11882#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-27 21:48:48,787 INFO L290 TraceCheckUtils]: 35: Hoare triple {11882#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11882#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-27 21:48:48,787 INFO L290 TraceCheckUtils]: 36: Hoare triple {11882#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11907#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-27 21:48:48,788 INFO L290 TraceCheckUtils]: 37: Hoare triple {11907#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11907#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-27 21:48:48,788 INFO L272 TraceCheckUtils]: 38: Hoare triple {11907#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,788 INFO L290 TraceCheckUtils]: 39: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,788 INFO L290 TraceCheckUtils]: 40: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,788 INFO L290 TraceCheckUtils]: 41: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,788 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11748#true} {11907#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11907#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-27 21:48:48,789 INFO L290 TraceCheckUtils]: 43: Hoare triple {11907#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11907#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-27 21:48:48,789 INFO L290 TraceCheckUtils]: 44: Hoare triple {11907#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11932#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-27 21:48:48,789 INFO L290 TraceCheckUtils]: 45: Hoare triple {11932#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11932#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-27 21:48:48,790 INFO L272 TraceCheckUtils]: 46: Hoare triple {11932#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,790 INFO L290 TraceCheckUtils]: 47: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,790 INFO L290 TraceCheckUtils]: 48: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,790 INFO L290 TraceCheckUtils]: 49: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,790 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11748#true} {11932#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11932#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-27 21:48:48,790 INFO L290 TraceCheckUtils]: 51: Hoare triple {11932#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11932#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-27 21:48:48,791 INFO L290 TraceCheckUtils]: 52: Hoare triple {11932#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11957#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-27 21:48:48,791 INFO L290 TraceCheckUtils]: 53: Hoare triple {11957#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11957#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-27 21:48:48,791 INFO L272 TraceCheckUtils]: 54: Hoare triple {11957#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,791 INFO L290 TraceCheckUtils]: 55: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,791 INFO L290 TraceCheckUtils]: 56: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,791 INFO L290 TraceCheckUtils]: 57: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,792 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11748#true} {11957#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11957#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-27 21:48:48,792 INFO L290 TraceCheckUtils]: 59: Hoare triple {11957#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11957#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-27 21:48:48,793 INFO L290 TraceCheckUtils]: 60: Hoare triple {11957#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11982#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-27 21:48:48,793 INFO L290 TraceCheckUtils]: 61: Hoare triple {11982#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11982#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-27 21:48:48,793 INFO L272 TraceCheckUtils]: 62: Hoare triple {11982#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:48,793 INFO L290 TraceCheckUtils]: 63: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:48,793 INFO L290 TraceCheckUtils]: 64: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,793 INFO L290 TraceCheckUtils]: 65: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:48,794 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11748#true} {11982#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11982#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-27 21:48:48,794 INFO L290 TraceCheckUtils]: 67: Hoare triple {11982#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11982#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-27 21:48:48,794 INFO L290 TraceCheckUtils]: 68: Hoare triple {11982#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12007#(and (<= main_~n~0 6) (<= 6 main_~i~1))} is VALID [2022-04-27 21:48:48,795 INFO L290 TraceCheckUtils]: 69: Hoare triple {12007#(and (<= main_~n~0 6) (<= 6 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11749#false} is VALID [2022-04-27 21:48:48,795 INFO L272 TraceCheckUtils]: 70: Hoare triple {11749#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11749#false} is VALID [2022-04-27 21:48:48,795 INFO L290 TraceCheckUtils]: 71: Hoare triple {11749#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11749#false} is VALID [2022-04-27 21:48:48,795 INFO L290 TraceCheckUtils]: 72: Hoare triple {11749#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11749#false} is VALID [2022-04-27 21:48:48,795 INFO L290 TraceCheckUtils]: 73: Hoare triple {11749#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11749#false} is VALID [2022-04-27 21:48:48,795 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 21:48:48,795 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:48:49,085 INFO L290 TraceCheckUtils]: 73: Hoare triple {11749#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11749#false} is VALID [2022-04-27 21:48:49,085 INFO L290 TraceCheckUtils]: 72: Hoare triple {11749#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11749#false} is VALID [2022-04-27 21:48:49,085 INFO L290 TraceCheckUtils]: 71: Hoare triple {11749#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11749#false} is VALID [2022-04-27 21:48:49,085 INFO L272 TraceCheckUtils]: 70: Hoare triple {11749#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11749#false} is VALID [2022-04-27 21:48:49,085 INFO L290 TraceCheckUtils]: 69: Hoare triple {11791#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11749#false} is VALID [2022-04-27 21:48:49,086 INFO L290 TraceCheckUtils]: 68: Hoare triple {11786#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11791#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:48:49,086 INFO L290 TraceCheckUtils]: 67: Hoare triple {11786#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11786#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:48:49,086 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11748#true} {11786#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11786#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:48:49,086 INFO L290 TraceCheckUtils]: 65: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,086 INFO L290 TraceCheckUtils]: 64: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,087 INFO L290 TraceCheckUtils]: 63: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:49,087 INFO L272 TraceCheckUtils]: 62: Hoare triple {11786#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:49,087 INFO L290 TraceCheckUtils]: 61: Hoare triple {11786#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11786#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:48:49,087 INFO L290 TraceCheckUtils]: 60: Hoare triple {11781#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11786#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:48:49,088 INFO L290 TraceCheckUtils]: 59: Hoare triple {11781#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11781#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:48:49,088 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11748#true} {11781#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11781#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:48:49,088 INFO L290 TraceCheckUtils]: 57: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,088 INFO L290 TraceCheckUtils]: 56: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,088 INFO L290 TraceCheckUtils]: 55: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:49,088 INFO L272 TraceCheckUtils]: 54: Hoare triple {11781#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:49,090 INFO L290 TraceCheckUtils]: 53: Hoare triple {11781#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11781#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:48:49,091 INFO L290 TraceCheckUtils]: 52: Hoare triple {11776#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11781#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:48:49,091 INFO L290 TraceCheckUtils]: 51: Hoare triple {11776#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11776#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:48:49,091 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11748#true} {11776#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11776#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:48:49,091 INFO L290 TraceCheckUtils]: 49: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,091 INFO L290 TraceCheckUtils]: 48: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,091 INFO L290 TraceCheckUtils]: 47: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:49,092 INFO L272 TraceCheckUtils]: 46: Hoare triple {11776#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:49,092 INFO L290 TraceCheckUtils]: 45: Hoare triple {11776#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11776#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:48:49,092 INFO L290 TraceCheckUtils]: 44: Hoare triple {11771#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11776#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:48:49,092 INFO L290 TraceCheckUtils]: 43: Hoare triple {11771#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11771#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:48:49,093 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11748#true} {11771#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11771#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:48:49,093 INFO L290 TraceCheckUtils]: 41: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,093 INFO L290 TraceCheckUtils]: 40: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,093 INFO L290 TraceCheckUtils]: 39: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:49,093 INFO L272 TraceCheckUtils]: 38: Hoare triple {11771#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:49,093 INFO L290 TraceCheckUtils]: 37: Hoare triple {11771#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11771#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:48:49,094 INFO L290 TraceCheckUtils]: 36: Hoare triple {11766#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11771#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:48:49,094 INFO L290 TraceCheckUtils]: 35: Hoare triple {11766#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11766#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:48:49,094 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11748#true} {11766#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11766#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:48:49,094 INFO L290 TraceCheckUtils]: 33: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,095 INFO L290 TraceCheckUtils]: 32: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,095 INFO L290 TraceCheckUtils]: 31: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:49,095 INFO L272 TraceCheckUtils]: 30: Hoare triple {11766#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:49,095 INFO L290 TraceCheckUtils]: 29: Hoare triple {11766#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11766#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:48:49,095 INFO L290 TraceCheckUtils]: 28: Hoare triple {12158#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11766#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:48:49,096 INFO L290 TraceCheckUtils]: 27: Hoare triple {12158#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12158#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:48:49,096 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11748#true} {12158#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12158#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:48:49,096 INFO L290 TraceCheckUtils]: 25: Hoare triple {11748#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,096 INFO L290 TraceCheckUtils]: 24: Hoare triple {11748#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,096 INFO L290 TraceCheckUtils]: 23: Hoare triple {11748#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11748#true} is VALID [2022-04-27 21:48:49,096 INFO L272 TraceCheckUtils]: 22: Hoare triple {12158#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11748#true} is VALID [2022-04-27 21:48:49,097 INFO L290 TraceCheckUtils]: 21: Hoare triple {12158#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12158#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:48:49,097 INFO L290 TraceCheckUtils]: 20: Hoare triple {11760#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12158#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:48:49,097 INFO L290 TraceCheckUtils]: 19: Hoare triple {11759#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11760#(<= main_~n~0 6)} is VALID [2022-04-27 21:48:49,098 INFO L290 TraceCheckUtils]: 18: Hoare triple {11758#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11759#(<= main_~i~0 6)} is VALID [2022-04-27 21:48:49,098 INFO L290 TraceCheckUtils]: 17: Hoare triple {11758#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11758#(<= main_~i~0 5)} is VALID [2022-04-27 21:48:49,098 INFO L290 TraceCheckUtils]: 16: Hoare triple {11757#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11758#(<= main_~i~0 5)} is VALID [2022-04-27 21:48:49,098 INFO L290 TraceCheckUtils]: 15: Hoare triple {11757#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11757#(<= main_~i~0 4)} is VALID [2022-04-27 21:48:49,101 INFO L290 TraceCheckUtils]: 14: Hoare triple {11756#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11757#(<= main_~i~0 4)} is VALID [2022-04-27 21:48:49,102 INFO L290 TraceCheckUtils]: 13: Hoare triple {11756#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11756#(<= main_~i~0 3)} is VALID [2022-04-27 21:48:49,102 INFO L290 TraceCheckUtils]: 12: Hoare triple {11755#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11756#(<= main_~i~0 3)} is VALID [2022-04-27 21:48:49,102 INFO L290 TraceCheckUtils]: 11: Hoare triple {11755#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11755#(<= main_~i~0 2)} is VALID [2022-04-27 21:48:49,103 INFO L290 TraceCheckUtils]: 10: Hoare triple {11754#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11755#(<= main_~i~0 2)} is VALID [2022-04-27 21:48:49,103 INFO L290 TraceCheckUtils]: 9: Hoare triple {11754#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11754#(<= main_~i~0 1)} is VALID [2022-04-27 21:48:49,103 INFO L290 TraceCheckUtils]: 8: Hoare triple {11814#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11754#(<= main_~i~0 1)} is VALID [2022-04-27 21:48:49,104 INFO L290 TraceCheckUtils]: 7: Hoare triple {11814#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11814#(<= main_~i~0 0)} is VALID [2022-04-27 21:48:49,104 INFO L290 TraceCheckUtils]: 6: Hoare triple {11748#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11814#(<= main_~i~0 0)} is VALID [2022-04-27 21:48:49,104 INFO L290 TraceCheckUtils]: 5: Hoare triple {11748#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11748#true} is VALID [2022-04-27 21:48:49,104 INFO L272 TraceCheckUtils]: 4: Hoare triple {11748#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,104 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11748#true} {11748#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,104 INFO L290 TraceCheckUtils]: 2: Hoare triple {11748#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,104 INFO L290 TraceCheckUtils]: 1: Hoare triple {11748#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11748#true} is VALID [2022-04-27 21:48:49,104 INFO L272 TraceCheckUtils]: 0: Hoare triple {11748#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11748#true} is VALID [2022-04-27 21:48:49,105 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 21:48:49,105 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2101043870] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:48:49,105 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:48:49,105 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 27 [2022-04-27 21:48:49,105 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2035696584] [2022-04-27 21:48:49,105 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:48:49,105 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) Word has length 74 [2022-04-27 21:48:49,106 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:48:49,106 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 21:48:49,170 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:48:49,170 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-04-27 21:48:49,170 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:48:49,170 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-04-27 21:48:49,170 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=543, Unknown=0, NotChecked=0, Total=702 [2022-04-27 21:48:49,171 INFO L87 Difference]: Start difference. First operand 143 states and 150 transitions. Second operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 21:48:49,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:48:49,826 INFO L93 Difference]: Finished difference Result 160 states and 168 transitions. [2022-04-27 21:48:49,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-27 21:48:49,826 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) Word has length 74 [2022-04-27 21:48:49,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:48:49,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 21:48:49,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 78 transitions. [2022-04-27 21:48:49,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 21:48:49,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 78 transitions. [2022-04-27 21:48:49,828 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 78 transitions. [2022-04-27 21:48:49,880 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:48:49,883 INFO L225 Difference]: With dead ends: 160 [2022-04-27 21:48:49,884 INFO L226 Difference]: Without dead ends: 116 [2022-04-27 21:48:49,886 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 193 GetRequests, 152 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 435 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=357, Invalid=1365, Unknown=0, NotChecked=0, Total=1722 [2022-04-27 21:48:49,887 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 43 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 291 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 330 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 291 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:48:49,887 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 57 Invalid, 330 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 291 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 21:48:49,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-04-27 21:48:49,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2022-04-27 21:48:49,937 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:48:49,937 INFO L82 GeneralOperation]: Start isEquivalent. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 21:48:49,937 INFO L74 IsIncluded]: Start isIncluded. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 21:48:49,938 INFO L87 Difference]: Start difference. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 21:48:49,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:48:49,939 INFO L93 Difference]: Finished difference Result 116 states and 119 transitions. [2022-04-27 21:48:49,939 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-27 21:48:49,939 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:48:49,940 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:48:49,940 INFO L74 IsIncluded]: Start isIncluded. First operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) Second operand 116 states. [2022-04-27 21:48:49,940 INFO L87 Difference]: Start difference. First operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) Second operand 116 states. [2022-04-27 21:48:49,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:48:49,941 INFO L93 Difference]: Finished difference Result 116 states and 119 transitions. [2022-04-27 21:48:49,941 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-27 21:48:49,942 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:48:49,942 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:48:49,942 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:48:49,942 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:48:49,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 21:48:49,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 119 transitions. [2022-04-27 21:48:49,943 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 119 transitions. Word has length 74 [2022-04-27 21:48:49,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:48:49,943 INFO L495 AbstractCegarLoop]: Abstraction has 116 states and 119 transitions. [2022-04-27 21:48:49,943 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 21:48:49,944 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-27 21:48:49,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-04-27 21:48:49,944 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:48:49,944 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:48:49,960 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2022-04-27 21:48:50,157 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:48:50,158 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:48:50,158 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:48:50,158 INFO L85 PathProgramCache]: Analyzing trace with hash -578078115, now seen corresponding path program 17 times [2022-04-27 21:48:50,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:48:50,158 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [876874897] [2022-04-27 21:48:50,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:48:50,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:48:50,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:50,414 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:48:50,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:50,427 INFO L290 TraceCheckUtils]: 0: Hoare triple {12945#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12897#true} is VALID [2022-04-27 21:48:50,427 INFO L290 TraceCheckUtils]: 1: Hoare triple {12897#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,427 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12897#true} {12897#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,427 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-27 21:48:50,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:50,438 INFO L290 TraceCheckUtils]: 0: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,438 INFO L290 TraceCheckUtils]: 2: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,439 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12897#true} {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:48:50,439 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-27 21:48:50,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:50,441 INFO L290 TraceCheckUtils]: 0: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,441 INFO L290 TraceCheckUtils]: 1: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,441 INFO L290 TraceCheckUtils]: 2: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,442 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12897#true} {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:48:50,442 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-27 21:48:50,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:50,444 INFO L290 TraceCheckUtils]: 0: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,444 INFO L290 TraceCheckUtils]: 1: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,444 INFO L290 TraceCheckUtils]: 2: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,444 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12897#true} {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:50,444 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-27 21:48:50,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:50,446 INFO L290 TraceCheckUtils]: 0: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,446 INFO L290 TraceCheckUtils]: 1: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,447 INFO L290 TraceCheckUtils]: 2: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,447 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12897#true} {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:48:50,447 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-27 21:48:50,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:50,449 INFO L290 TraceCheckUtils]: 0: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,449 INFO L290 TraceCheckUtils]: 1: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,449 INFO L290 TraceCheckUtils]: 2: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,450 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12897#true} {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:48:50,450 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-04-27 21:48:50,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:50,452 INFO L290 TraceCheckUtils]: 0: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,452 INFO L290 TraceCheckUtils]: 1: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,452 INFO L290 TraceCheckUtils]: 2: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,452 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12897#true} {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:48:50,453 INFO L272 TraceCheckUtils]: 0: Hoare triple {12897#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12945#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:48:50,453 INFO L290 TraceCheckUtils]: 1: Hoare triple {12945#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12897#true} is VALID [2022-04-27 21:48:50,453 INFO L290 TraceCheckUtils]: 2: Hoare triple {12897#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,453 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12897#true} {12897#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,453 INFO L272 TraceCheckUtils]: 4: Hoare triple {12897#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,453 INFO L290 TraceCheckUtils]: 5: Hoare triple {12897#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12897#true} is VALID [2022-04-27 21:48:50,453 INFO L290 TraceCheckUtils]: 6: Hoare triple {12897#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12902#(= main_~i~0 0)} is VALID [2022-04-27 21:48:50,454 INFO L290 TraceCheckUtils]: 7: Hoare triple {12902#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12902#(= main_~i~0 0)} is VALID [2022-04-27 21:48:50,454 INFO L290 TraceCheckUtils]: 8: Hoare triple {12902#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:48:50,454 INFO L290 TraceCheckUtils]: 9: Hoare triple {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:48:50,455 INFO L290 TraceCheckUtils]: 10: Hoare triple {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:48:50,455 INFO L290 TraceCheckUtils]: 11: Hoare triple {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:48:50,456 INFO L290 TraceCheckUtils]: 12: Hoare triple {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:48:50,456 INFO L290 TraceCheckUtils]: 13: Hoare triple {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:48:50,456 INFO L290 TraceCheckUtils]: 14: Hoare triple {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:48:50,457 INFO L290 TraceCheckUtils]: 15: Hoare triple {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:48:50,457 INFO L290 TraceCheckUtils]: 16: Hoare triple {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:48:50,457 INFO L290 TraceCheckUtils]: 17: Hoare triple {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:48:50,458 INFO L290 TraceCheckUtils]: 18: Hoare triple {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12908#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:48:50,458 INFO L290 TraceCheckUtils]: 19: Hoare triple {12908#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12909#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:48:50,459 INFO L290 TraceCheckUtils]: 20: Hoare triple {12909#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 21:48:50,459 INFO L290 TraceCheckUtils]: 21: Hoare triple {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 21:48:50,459 INFO L290 TraceCheckUtils]: 22: Hoare triple {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:48:50,460 INFO L290 TraceCheckUtils]: 23: Hoare triple {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:48:50,460 INFO L272 TraceCheckUtils]: 24: Hoare triple {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:48:50,460 INFO L290 TraceCheckUtils]: 25: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,460 INFO L290 TraceCheckUtils]: 26: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,460 INFO L290 TraceCheckUtils]: 27: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,461 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12897#true} {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:48:50,461 INFO L290 TraceCheckUtils]: 29: Hoare triple {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:48:50,461 INFO L290 TraceCheckUtils]: 30: Hoare triple {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:48:50,462 INFO L290 TraceCheckUtils]: 31: Hoare triple {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:48:50,462 INFO L272 TraceCheckUtils]: 32: Hoare triple {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:48:50,462 INFO L290 TraceCheckUtils]: 33: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,462 INFO L290 TraceCheckUtils]: 34: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,462 INFO L290 TraceCheckUtils]: 35: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,462 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12897#true} {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:48:50,463 INFO L290 TraceCheckUtils]: 37: Hoare triple {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:48:50,463 INFO L290 TraceCheckUtils]: 38: Hoare triple {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:50,463 INFO L290 TraceCheckUtils]: 39: Hoare triple {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:50,464 INFO L272 TraceCheckUtils]: 40: Hoare triple {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:48:50,464 INFO L290 TraceCheckUtils]: 41: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,464 INFO L290 TraceCheckUtils]: 42: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,464 INFO L290 TraceCheckUtils]: 43: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,464 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12897#true} {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:50,464 INFO L290 TraceCheckUtils]: 45: Hoare triple {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:50,465 INFO L290 TraceCheckUtils]: 46: Hoare triple {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:48:50,465 INFO L290 TraceCheckUtils]: 47: Hoare triple {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:48:50,465 INFO L272 TraceCheckUtils]: 48: Hoare triple {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:48:50,465 INFO L290 TraceCheckUtils]: 49: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,466 INFO L290 TraceCheckUtils]: 50: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,466 INFO L290 TraceCheckUtils]: 51: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,466 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12897#true} {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:48:50,466 INFO L290 TraceCheckUtils]: 53: Hoare triple {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:48:50,467 INFO L290 TraceCheckUtils]: 54: Hoare triple {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:48:50,467 INFO L290 TraceCheckUtils]: 55: Hoare triple {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:48:50,467 INFO L272 TraceCheckUtils]: 56: Hoare triple {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:48:50,467 INFO L290 TraceCheckUtils]: 57: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,467 INFO L290 TraceCheckUtils]: 58: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,467 INFO L290 TraceCheckUtils]: 59: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,468 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12897#true} {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:48:50,468 INFO L290 TraceCheckUtils]: 61: Hoare triple {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:48:50,469 INFO L290 TraceCheckUtils]: 62: Hoare triple {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:48:50,469 INFO L290 TraceCheckUtils]: 63: Hoare triple {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:48:50,469 INFO L272 TraceCheckUtils]: 64: Hoare triple {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:48:50,469 INFO L290 TraceCheckUtils]: 65: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:48:50,469 INFO L290 TraceCheckUtils]: 66: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,469 INFO L290 TraceCheckUtils]: 67: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:48:50,470 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12897#true} {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:48:50,470 INFO L290 TraceCheckUtils]: 69: Hoare triple {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:48:50,471 INFO L290 TraceCheckUtils]: 70: Hoare triple {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:48:50,471 INFO L290 TraceCheckUtils]: 71: Hoare triple {12941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12942#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:48:50,471 INFO L272 TraceCheckUtils]: 72: Hoare triple {12942#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12943#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:48:50,472 INFO L290 TraceCheckUtils]: 73: Hoare triple {12943#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12944#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:48:50,472 INFO L290 TraceCheckUtils]: 74: Hoare triple {12944#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12898#false} is VALID [2022-04-27 21:48:50,472 INFO L290 TraceCheckUtils]: 75: Hoare triple {12898#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#false} is VALID [2022-04-27 21:48:50,472 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 12 proven. 121 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 21:48:50,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:48:50,472 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [876874897] [2022-04-27 21:48:50,472 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [876874897] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:48:50,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1609695277] [2022-04-27 21:48:50,473 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 21:48:50,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:48:50,473 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:48:50,474 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:48:50,475 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-27 21:48:50,560 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2022-04-27 21:48:50,560 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:48:50,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 213 conjuncts, 37 conjunts are in the unsatisfiable core [2022-04-27 21:48:50,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:48:50,576 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:48:50,711 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:50:02,309 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:50:02,359 INFO L272 TraceCheckUtils]: 0: Hoare triple {12897#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:02,359 INFO L290 TraceCheckUtils]: 1: Hoare triple {12897#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12897#true} is VALID [2022-04-27 21:50:02,359 INFO L290 TraceCheckUtils]: 2: Hoare triple {12897#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:02,359 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12897#true} {12897#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:02,359 INFO L272 TraceCheckUtils]: 4: Hoare triple {12897#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:02,359 INFO L290 TraceCheckUtils]: 5: Hoare triple {12897#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12897#true} is VALID [2022-04-27 21:50:02,360 INFO L290 TraceCheckUtils]: 6: Hoare triple {12897#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12902#(= main_~i~0 0)} is VALID [2022-04-27 21:50:02,360 INFO L290 TraceCheckUtils]: 7: Hoare triple {12902#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12902#(= main_~i~0 0)} is VALID [2022-04-27 21:50:02,360 INFO L290 TraceCheckUtils]: 8: Hoare triple {12902#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:50:02,361 INFO L290 TraceCheckUtils]: 9: Hoare triple {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:50:02,361 INFO L290 TraceCheckUtils]: 10: Hoare triple {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:50:02,361 INFO L290 TraceCheckUtils]: 11: Hoare triple {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:50:02,362 INFO L290 TraceCheckUtils]: 12: Hoare triple {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:50:02,362 INFO L290 TraceCheckUtils]: 13: Hoare triple {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:50:02,363 INFO L290 TraceCheckUtils]: 14: Hoare triple {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:50:02,363 INFO L290 TraceCheckUtils]: 15: Hoare triple {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:50:02,363 INFO L290 TraceCheckUtils]: 16: Hoare triple {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:50:02,364 INFO L290 TraceCheckUtils]: 17: Hoare triple {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:50:02,364 INFO L290 TraceCheckUtils]: 18: Hoare triple {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12908#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:50:02,365 INFO L290 TraceCheckUtils]: 19: Hoare triple {12908#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 21:50:02,365 INFO L290 TraceCheckUtils]: 20: Hoare triple {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 21:50:02,365 INFO L290 TraceCheckUtils]: 21: Hoare triple {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 21:50:02,365 INFO L290 TraceCheckUtils]: 22: Hoare triple {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,366 INFO L290 TraceCheckUtils]: 23: Hoare triple {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,367 INFO L272 TraceCheckUtils]: 24: Hoare triple {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,367 INFO L290 TraceCheckUtils]: 25: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,367 INFO L290 TraceCheckUtils]: 26: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,368 INFO L290 TraceCheckUtils]: 27: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,369 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,369 INFO L290 TraceCheckUtils]: 29: Hoare triple {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,369 INFO L290 TraceCheckUtils]: 30: Hoare triple {12911#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13040#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,370 INFO L290 TraceCheckUtils]: 31: Hoare triple {13040#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13040#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,371 INFO L272 TraceCheckUtils]: 32: Hoare triple {13040#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,371 INFO L290 TraceCheckUtils]: 33: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,371 INFO L290 TraceCheckUtils]: 34: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,371 INFO L290 TraceCheckUtils]: 35: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,372 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {13040#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13040#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,372 INFO L290 TraceCheckUtils]: 37: Hoare triple {13040#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13040#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,373 INFO L290 TraceCheckUtils]: 38: Hoare triple {13040#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13065#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,373 INFO L290 TraceCheckUtils]: 39: Hoare triple {13065#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13065#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,374 INFO L272 TraceCheckUtils]: 40: Hoare triple {13065#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,374 INFO L290 TraceCheckUtils]: 41: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,374 INFO L290 TraceCheckUtils]: 42: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,375 INFO L290 TraceCheckUtils]: 43: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,375 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {13065#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13065#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,375 INFO L290 TraceCheckUtils]: 45: Hoare triple {13065#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13065#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,376 INFO L290 TraceCheckUtils]: 46: Hoare triple {13065#(and (= main_~i~1 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13090#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,376 INFO L290 TraceCheckUtils]: 47: Hoare triple {13090#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13090#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,377 INFO L272 TraceCheckUtils]: 48: Hoare triple {13090#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,377 INFO L290 TraceCheckUtils]: 49: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,377 INFO L290 TraceCheckUtils]: 50: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,378 INFO L290 TraceCheckUtils]: 51: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,378 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {13090#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13090#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,378 INFO L290 TraceCheckUtils]: 53: Hoare triple {13090#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13090#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,379 INFO L290 TraceCheckUtils]: 54: Hoare triple {13090#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13115#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,379 INFO L290 TraceCheckUtils]: 55: Hoare triple {13115#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13115#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,380 INFO L272 TraceCheckUtils]: 56: Hoare triple {13115#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,380 INFO L290 TraceCheckUtils]: 57: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,380 INFO L290 TraceCheckUtils]: 58: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,381 INFO L290 TraceCheckUtils]: 59: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,381 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {13115#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13115#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,382 INFO L290 TraceCheckUtils]: 61: Hoare triple {13115#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13115#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,382 INFO L290 TraceCheckUtils]: 62: Hoare triple {13115#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13140#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,382 INFO L290 TraceCheckUtils]: 63: Hoare triple {13140#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13140#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,383 INFO L272 TraceCheckUtils]: 64: Hoare triple {13140#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,383 INFO L290 TraceCheckUtils]: 65: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,383 INFO L290 TraceCheckUtils]: 66: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,385 INFO L290 TraceCheckUtils]: 67: Hoare triple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} is VALID [2022-04-27 21:50:02,385 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {13021#(exists ((v_main_~x~0.base_BEFORE_CALL_69 Int) (v_main_~x~0.offset_BEFORE_CALL_69 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_69) (+ v_main_~x~0.offset_BEFORE_CALL_69 24)) 0))} {13140#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13140#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,385 INFO L290 TraceCheckUtils]: 69: Hoare triple {13140#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13140#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,386 INFO L290 TraceCheckUtils]: 70: Hoare triple {13140#(and (= 5 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13165#(and (= 5 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-27 21:50:02,386 INFO L290 TraceCheckUtils]: 71: Hoare triple {13165#(and (= 5 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12942#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:50:02,387 INFO L272 TraceCheckUtils]: 72: Hoare triple {12942#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13172#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:50:02,387 INFO L290 TraceCheckUtils]: 73: Hoare triple {13172#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13176#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:50:02,387 INFO L290 TraceCheckUtils]: 74: Hoare triple {13176#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12898#false} is VALID [2022-04-27 21:50:02,387 INFO L290 TraceCheckUtils]: 75: Hoare triple {12898#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#false} is VALID [2022-04-27 21:50:02,388 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 133 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 21:50:02,388 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:50:04,608 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:50:04,612 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:50:04,724 INFO L290 TraceCheckUtils]: 75: Hoare triple {12898#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#false} is VALID [2022-04-27 21:50:04,725 INFO L290 TraceCheckUtils]: 74: Hoare triple {13176#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12898#false} is VALID [2022-04-27 21:50:04,725 INFO L290 TraceCheckUtils]: 73: Hoare triple {13172#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13176#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:50:04,726 INFO L272 TraceCheckUtils]: 72: Hoare triple {12942#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13172#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:50:04,726 INFO L290 TraceCheckUtils]: 71: Hoare triple {12941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12942#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:50:04,727 INFO L290 TraceCheckUtils]: 70: Hoare triple {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:04,727 INFO L290 TraceCheckUtils]: 69: Hoare triple {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:50:04,728 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12897#true} {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:50:04,728 INFO L290 TraceCheckUtils]: 67: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,728 INFO L290 TraceCheckUtils]: 66: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,728 INFO L290 TraceCheckUtils]: 65: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:50:04,728 INFO L272 TraceCheckUtils]: 64: Hoare triple {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:50:04,728 INFO L290 TraceCheckUtils]: 63: Hoare triple {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:50:04,729 INFO L290 TraceCheckUtils]: 62: Hoare triple {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12936#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:50:04,729 INFO L290 TraceCheckUtils]: 61: Hoare triple {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:50:04,729 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12897#true} {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:50:04,730 INFO L290 TraceCheckUtils]: 59: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,730 INFO L290 TraceCheckUtils]: 58: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,730 INFO L290 TraceCheckUtils]: 57: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:50:04,730 INFO L272 TraceCheckUtils]: 56: Hoare triple {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:50:04,730 INFO L290 TraceCheckUtils]: 55: Hoare triple {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:50:04,731 INFO L290 TraceCheckUtils]: 54: Hoare triple {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12931#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:50:04,731 INFO L290 TraceCheckUtils]: 53: Hoare triple {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:50:04,731 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12897#true} {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:50:04,731 INFO L290 TraceCheckUtils]: 51: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,732 INFO L290 TraceCheckUtils]: 50: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,732 INFO L290 TraceCheckUtils]: 49: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:50:04,732 INFO L272 TraceCheckUtils]: 48: Hoare triple {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:50:04,732 INFO L290 TraceCheckUtils]: 47: Hoare triple {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:50:04,732 INFO L290 TraceCheckUtils]: 46: Hoare triple {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:50:04,733 INFO L290 TraceCheckUtils]: 45: Hoare triple {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:04,733 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12897#true} {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:04,734 INFO L290 TraceCheckUtils]: 43: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,734 INFO L290 TraceCheckUtils]: 42: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,734 INFO L290 TraceCheckUtils]: 41: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:50:04,734 INFO L272 TraceCheckUtils]: 40: Hoare triple {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:50:04,734 INFO L290 TraceCheckUtils]: 39: Hoare triple {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:04,735 INFO L290 TraceCheckUtils]: 38: Hoare triple {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12921#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:04,735 INFO L290 TraceCheckUtils]: 37: Hoare triple {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:50:04,736 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12897#true} {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:50:04,736 INFO L290 TraceCheckUtils]: 35: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,736 INFO L290 TraceCheckUtils]: 34: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,736 INFO L290 TraceCheckUtils]: 33: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:50:04,736 INFO L272 TraceCheckUtils]: 32: Hoare triple {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:50:04,736 INFO L290 TraceCheckUtils]: 31: Hoare triple {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:50:04,737 INFO L290 TraceCheckUtils]: 30: Hoare triple {13318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12916#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:50:04,737 INFO L290 TraceCheckUtils]: 29: Hoare triple {13318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:50:04,737 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12897#true} {13318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:50:04,738 INFO L290 TraceCheckUtils]: 27: Hoare triple {12897#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,738 INFO L290 TraceCheckUtils]: 26: Hoare triple {12897#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,738 INFO L290 TraceCheckUtils]: 25: Hoare triple {12897#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12897#true} is VALID [2022-04-27 21:50:04,738 INFO L272 TraceCheckUtils]: 24: Hoare triple {13318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12897#true} is VALID [2022-04-27 21:50:04,738 INFO L290 TraceCheckUtils]: 23: Hoare triple {13318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:50:04,738 INFO L290 TraceCheckUtils]: 22: Hoare triple {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {13318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:50:04,739 INFO L290 TraceCheckUtils]: 21: Hoare triple {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 21:50:04,739 INFO L290 TraceCheckUtils]: 20: Hoare triple {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 21:50:04,739 INFO L290 TraceCheckUtils]: 19: Hoare triple {12908#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12910#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-27 21:50:04,740 INFO L290 TraceCheckUtils]: 18: Hoare triple {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12908#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:50:04,740 INFO L290 TraceCheckUtils]: 17: Hoare triple {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:50:04,741 INFO L290 TraceCheckUtils]: 16: Hoare triple {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12907#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:50:04,741 INFO L290 TraceCheckUtils]: 15: Hoare triple {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:50:04,741 INFO L290 TraceCheckUtils]: 14: Hoare triple {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12906#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:50:04,742 INFO L290 TraceCheckUtils]: 13: Hoare triple {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:50:04,742 INFO L290 TraceCheckUtils]: 12: Hoare triple {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12905#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:50:04,743 INFO L290 TraceCheckUtils]: 11: Hoare triple {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:50:04,743 INFO L290 TraceCheckUtils]: 10: Hoare triple {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12904#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:50:04,743 INFO L290 TraceCheckUtils]: 9: Hoare triple {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:50:04,744 INFO L290 TraceCheckUtils]: 8: Hoare triple {12902#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12903#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:50:04,744 INFO L290 TraceCheckUtils]: 7: Hoare triple {12902#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12902#(= main_~i~0 0)} is VALID [2022-04-27 21:50:04,745 INFO L290 TraceCheckUtils]: 6: Hoare triple {12897#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12902#(= main_~i~0 0)} is VALID [2022-04-27 21:50:04,745 INFO L290 TraceCheckUtils]: 5: Hoare triple {12897#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12897#true} is VALID [2022-04-27 21:50:04,745 INFO L272 TraceCheckUtils]: 4: Hoare triple {12897#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,745 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12897#true} {12897#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,745 INFO L290 TraceCheckUtils]: 2: Hoare triple {12897#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,745 INFO L290 TraceCheckUtils]: 1: Hoare triple {12897#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12897#true} is VALID [2022-04-27 21:50:04,745 INFO L272 TraceCheckUtils]: 0: Hoare triple {12897#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12897#true} is VALID [2022-04-27 21:50:04,745 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 12 proven. 121 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-27 21:50:04,745 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1609695277] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:50:04,745 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:50:04,745 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 20] total 32 [2022-04-27 21:50:04,746 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [469451378] [2022-04-27 21:50:04,746 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:50:04,746 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 76 [2022-04-27 21:50:04,747 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:50:04,747 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-27 21:50:04,823 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:50:04,823 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-27 21:50:04,823 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:50:04,823 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-27 21:50:04,823 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=897, Unknown=7, NotChecked=0, Total=992 [2022-04-27 21:50:04,824 INFO L87 Difference]: Start difference. First operand 116 states and 119 transitions. Second operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-27 21:50:06,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:50:06,579 INFO L93 Difference]: Finished difference Result 128 states and 131 transitions. [2022-04-27 21:50:06,579 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-27 21:50:06,579 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 76 [2022-04-27 21:50:06,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:50:06,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-27 21:50:06,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 78 transitions. [2022-04-27 21:50:06,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-27 21:50:06,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 78 transitions. [2022-04-27 21:50:06,581 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 78 transitions. [2022-04-27 21:50:06,651 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:50:06,652 INFO L225 Difference]: With dead ends: 128 [2022-04-27 21:50:06,652 INFO L226 Difference]: Without dead ends: 126 [2022-04-27 21:50:06,653 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 208 GetRequests, 141 SyntacticMatches, 16 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 588 ImplicationChecksByTransitivity, 73.4s TimeCoverageRelationStatistics Valid=228, Invalid=2521, Unknown=7, NotChecked=0, Total=2756 [2022-04-27 21:50:06,653 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 68 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 953 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 68 SdHoareTripleChecker+Valid, 225 SdHoareTripleChecker+Invalid, 1089 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 953 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 91 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 21:50:06,654 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [68 Valid, 225 Invalid, 1089 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 953 Invalid, 0 Unknown, 91 Unchecked, 0.7s Time] [2022-04-27 21:50:06,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2022-04-27 21:50:06,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 124. [2022-04-27 21:50:06,696 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:50:06,696 INFO L82 GeneralOperation]: Start isEquivalent. First operand 126 states. Second operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 21:50:06,696 INFO L74 IsIncluded]: Start isIncluded. First operand 126 states. Second operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 21:50:06,697 INFO L87 Difference]: Start difference. First operand 126 states. Second operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 21:50:06,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:50:06,698 INFO L93 Difference]: Finished difference Result 126 states and 129 transitions. [2022-04-27 21:50:06,698 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 129 transitions. [2022-04-27 21:50:06,698 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:50:06,698 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:50:06,699 INFO L74 IsIncluded]: Start isIncluded. First operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) Second operand 126 states. [2022-04-27 21:50:06,699 INFO L87 Difference]: Start difference. First operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) Second operand 126 states. [2022-04-27 21:50:06,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:50:06,700 INFO L93 Difference]: Finished difference Result 126 states and 129 transitions. [2022-04-27 21:50:06,700 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 129 transitions. [2022-04-27 21:50:06,700 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:50:06,700 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:50:06,700 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:50:06,700 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:50:06,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-27 21:50:06,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 127 transitions. [2022-04-27 21:50:06,702 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 127 transitions. Word has length 76 [2022-04-27 21:50:06,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:50:06,702 INFO L495 AbstractCegarLoop]: Abstraction has 124 states and 127 transitions. [2022-04-27 21:50:06,702 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-27 21:50:06,702 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 127 transitions. [2022-04-27 21:50:06,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2022-04-27 21:50:06,703 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:50:06,703 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:50:06,719 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2022-04-27 21:50:06,919 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:50:06,920 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:50:06,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:50:06,920 INFO L85 PathProgramCache]: Analyzing trace with hash -1454537293, now seen corresponding path program 18 times [2022-04-27 21:50:06,920 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:50:06,920 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [418906594] [2022-04-27 21:50:06,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:50:06,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:50:06,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:07,092 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:50:07,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:07,095 INFO L290 TraceCheckUtils]: 0: Hoare triple {14110#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14060#true} is VALID [2022-04-27 21:50:07,095 INFO L290 TraceCheckUtils]: 1: Hoare triple {14060#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,095 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14060#true} {14060#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,095 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-27 21:50:07,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:07,097 INFO L290 TraceCheckUtils]: 0: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,097 INFO L290 TraceCheckUtils]: 1: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,097 INFO L290 TraceCheckUtils]: 2: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,100 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14060#true} {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-27 21:50:07,100 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-27 21:50:07,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:07,109 INFO L290 TraceCheckUtils]: 0: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,109 INFO L290 TraceCheckUtils]: 1: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,109 INFO L290 TraceCheckUtils]: 2: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,110 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14060#true} {14079#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14079#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:50:07,110 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-27 21:50:07,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:07,118 INFO L290 TraceCheckUtils]: 0: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,118 INFO L290 TraceCheckUtils]: 1: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,118 INFO L290 TraceCheckUtils]: 2: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,119 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14060#true} {14084#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14084#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:50:07,119 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-27 21:50:07,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:07,122 INFO L290 TraceCheckUtils]: 0: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,122 INFO L290 TraceCheckUtils]: 1: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,122 INFO L290 TraceCheckUtils]: 2: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,122 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14060#true} {14089#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14089#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:50:07,122 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-27 21:50:07,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:07,124 INFO L290 TraceCheckUtils]: 0: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,124 INFO L290 TraceCheckUtils]: 1: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,124 INFO L290 TraceCheckUtils]: 2: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,125 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14060#true} {14094#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14094#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:50:07,125 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-04-27 21:50:07,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:07,128 INFO L290 TraceCheckUtils]: 0: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,128 INFO L290 TraceCheckUtils]: 1: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,128 INFO L290 TraceCheckUtils]: 2: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,129 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14060#true} {14099#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14099#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:50:07,129 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2022-04-27 21:50:07,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:07,133 INFO L290 TraceCheckUtils]: 0: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,133 INFO L290 TraceCheckUtils]: 1: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,133 INFO L290 TraceCheckUtils]: 2: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,133 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14060#true} {14104#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14104#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:50:07,134 INFO L272 TraceCheckUtils]: 0: Hoare triple {14060#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14110#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:50:07,134 INFO L290 TraceCheckUtils]: 1: Hoare triple {14110#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14060#true} is VALID [2022-04-27 21:50:07,134 INFO L290 TraceCheckUtils]: 2: Hoare triple {14060#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,134 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14060#true} {14060#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,134 INFO L272 TraceCheckUtils]: 4: Hoare triple {14060#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,134 INFO L290 TraceCheckUtils]: 5: Hoare triple {14060#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14060#true} is VALID [2022-04-27 21:50:07,134 INFO L290 TraceCheckUtils]: 6: Hoare triple {14060#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14065#(= main_~i~0 0)} is VALID [2022-04-27 21:50:07,135 INFO L290 TraceCheckUtils]: 7: Hoare triple {14065#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14065#(= main_~i~0 0)} is VALID [2022-04-27 21:50:07,135 INFO L290 TraceCheckUtils]: 8: Hoare triple {14065#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14066#(<= main_~i~0 1)} is VALID [2022-04-27 21:50:07,135 INFO L290 TraceCheckUtils]: 9: Hoare triple {14066#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14066#(<= main_~i~0 1)} is VALID [2022-04-27 21:50:07,136 INFO L290 TraceCheckUtils]: 10: Hoare triple {14066#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14067#(<= main_~i~0 2)} is VALID [2022-04-27 21:50:07,136 INFO L290 TraceCheckUtils]: 11: Hoare triple {14067#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14067#(<= main_~i~0 2)} is VALID [2022-04-27 21:50:07,137 INFO L290 TraceCheckUtils]: 12: Hoare triple {14067#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14068#(<= main_~i~0 3)} is VALID [2022-04-27 21:50:07,137 INFO L290 TraceCheckUtils]: 13: Hoare triple {14068#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14068#(<= main_~i~0 3)} is VALID [2022-04-27 21:50:07,137 INFO L290 TraceCheckUtils]: 14: Hoare triple {14068#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14069#(<= main_~i~0 4)} is VALID [2022-04-27 21:50:07,138 INFO L290 TraceCheckUtils]: 15: Hoare triple {14069#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14069#(<= main_~i~0 4)} is VALID [2022-04-27 21:50:07,138 INFO L290 TraceCheckUtils]: 16: Hoare triple {14069#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14070#(<= main_~i~0 5)} is VALID [2022-04-27 21:50:07,138 INFO L290 TraceCheckUtils]: 17: Hoare triple {14070#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14070#(<= main_~i~0 5)} is VALID [2022-04-27 21:50:07,139 INFO L290 TraceCheckUtils]: 18: Hoare triple {14070#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14071#(<= main_~i~0 6)} is VALID [2022-04-27 21:50:07,139 INFO L290 TraceCheckUtils]: 19: Hoare triple {14071#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14071#(<= main_~i~0 6)} is VALID [2022-04-27 21:50:07,140 INFO L290 TraceCheckUtils]: 20: Hoare triple {14071#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14072#(<= main_~i~0 7)} is VALID [2022-04-27 21:50:07,140 INFO L290 TraceCheckUtils]: 21: Hoare triple {14072#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14073#(<= main_~n~0 7)} is VALID [2022-04-27 21:50:07,140 INFO L290 TraceCheckUtils]: 22: Hoare triple {14073#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-27 21:50:07,141 INFO L290 TraceCheckUtils]: 23: Hoare triple {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-27 21:50:07,141 INFO L272 TraceCheckUtils]: 24: Hoare triple {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,141 INFO L290 TraceCheckUtils]: 25: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,141 INFO L290 TraceCheckUtils]: 26: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,141 INFO L290 TraceCheckUtils]: 27: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,142 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {14060#true} {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-27 21:50:07,142 INFO L290 TraceCheckUtils]: 29: Hoare triple {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-27 21:50:07,142 INFO L290 TraceCheckUtils]: 30: Hoare triple {14074#(and (<= main_~n~0 7) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14079#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:50:07,143 INFO L290 TraceCheckUtils]: 31: Hoare triple {14079#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14079#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:50:07,143 INFO L272 TraceCheckUtils]: 32: Hoare triple {14079#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,143 INFO L290 TraceCheckUtils]: 33: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,143 INFO L290 TraceCheckUtils]: 34: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,143 INFO L290 TraceCheckUtils]: 35: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,143 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {14060#true} {14079#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14079#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:50:07,144 INFO L290 TraceCheckUtils]: 37: Hoare triple {14079#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14079#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:50:07,144 INFO L290 TraceCheckUtils]: 38: Hoare triple {14079#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14084#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:50:07,144 INFO L290 TraceCheckUtils]: 39: Hoare triple {14084#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14084#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:50:07,144 INFO L272 TraceCheckUtils]: 40: Hoare triple {14084#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,144 INFO L290 TraceCheckUtils]: 41: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,144 INFO L290 TraceCheckUtils]: 42: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,145 INFO L290 TraceCheckUtils]: 43: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,145 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {14060#true} {14084#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14084#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:50:07,145 INFO L290 TraceCheckUtils]: 45: Hoare triple {14084#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14084#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:50:07,146 INFO L290 TraceCheckUtils]: 46: Hoare triple {14084#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14089#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:50:07,146 INFO L290 TraceCheckUtils]: 47: Hoare triple {14089#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14089#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:50:07,146 INFO L272 TraceCheckUtils]: 48: Hoare triple {14089#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,146 INFO L290 TraceCheckUtils]: 49: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,146 INFO L290 TraceCheckUtils]: 50: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,146 INFO L290 TraceCheckUtils]: 51: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,147 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {14060#true} {14089#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14089#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:50:07,147 INFO L290 TraceCheckUtils]: 53: Hoare triple {14089#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14089#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:50:07,147 INFO L290 TraceCheckUtils]: 54: Hoare triple {14089#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14094#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:50:07,148 INFO L290 TraceCheckUtils]: 55: Hoare triple {14094#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14094#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:50:07,148 INFO L272 TraceCheckUtils]: 56: Hoare triple {14094#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,148 INFO L290 TraceCheckUtils]: 57: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,148 INFO L290 TraceCheckUtils]: 58: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,148 INFO L290 TraceCheckUtils]: 59: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,148 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {14060#true} {14094#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14094#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:50:07,149 INFO L290 TraceCheckUtils]: 61: Hoare triple {14094#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14094#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:50:07,149 INFO L290 TraceCheckUtils]: 62: Hoare triple {14094#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14099#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:50:07,149 INFO L290 TraceCheckUtils]: 63: Hoare triple {14099#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14099#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:50:07,150 INFO L272 TraceCheckUtils]: 64: Hoare triple {14099#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,150 INFO L290 TraceCheckUtils]: 65: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,150 INFO L290 TraceCheckUtils]: 66: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,150 INFO L290 TraceCheckUtils]: 67: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,150 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {14060#true} {14099#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14099#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:50:07,150 INFO L290 TraceCheckUtils]: 69: Hoare triple {14099#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14099#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:50:07,151 INFO L290 TraceCheckUtils]: 70: Hoare triple {14099#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14104#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:50:07,151 INFO L290 TraceCheckUtils]: 71: Hoare triple {14104#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14104#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:50:07,151 INFO L272 TraceCheckUtils]: 72: Hoare triple {14104#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,151 INFO L290 TraceCheckUtils]: 73: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,151 INFO L290 TraceCheckUtils]: 74: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,151 INFO L290 TraceCheckUtils]: 75: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,152 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {14060#true} {14104#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14104#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:50:07,152 INFO L290 TraceCheckUtils]: 77: Hoare triple {14104#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14104#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:50:07,153 INFO L290 TraceCheckUtils]: 78: Hoare triple {14104#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14109#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:50:07,153 INFO L290 TraceCheckUtils]: 79: Hoare triple {14109#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14061#false} is VALID [2022-04-27 21:50:07,153 INFO L272 TraceCheckUtils]: 80: Hoare triple {14061#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14061#false} is VALID [2022-04-27 21:50:07,153 INFO L290 TraceCheckUtils]: 81: Hoare triple {14061#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14061#false} is VALID [2022-04-27 21:50:07,153 INFO L290 TraceCheckUtils]: 82: Hoare triple {14061#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14061#false} is VALID [2022-04-27 21:50:07,153 INFO L290 TraceCheckUtils]: 83: Hoare triple {14061#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14061#false} is VALID [2022-04-27 21:50:07,153 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 87 proven. 74 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 21:50:07,154 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:50:07,154 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [418906594] [2022-04-27 21:50:07,154 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [418906594] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:50:07,154 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1401861681] [2022-04-27 21:50:07,154 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 21:50:07,154 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:50:07,154 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:50:07,155 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:50:07,159 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-27 21:50:07,250 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-27 21:50:07,250 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:50:07,251 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 21:50:07,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:07,264 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:50:07,786 INFO L272 TraceCheckUtils]: 0: Hoare triple {14060#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,786 INFO L290 TraceCheckUtils]: 1: Hoare triple {14060#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14060#true} is VALID [2022-04-27 21:50:07,786 INFO L290 TraceCheckUtils]: 2: Hoare triple {14060#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,786 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14060#true} {14060#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,786 INFO L272 TraceCheckUtils]: 4: Hoare triple {14060#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,787 INFO L290 TraceCheckUtils]: 5: Hoare triple {14060#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14060#true} is VALID [2022-04-27 21:50:07,787 INFO L290 TraceCheckUtils]: 6: Hoare triple {14060#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14132#(<= main_~i~0 0)} is VALID [2022-04-27 21:50:07,787 INFO L290 TraceCheckUtils]: 7: Hoare triple {14132#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14132#(<= main_~i~0 0)} is VALID [2022-04-27 21:50:07,788 INFO L290 TraceCheckUtils]: 8: Hoare triple {14132#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14066#(<= main_~i~0 1)} is VALID [2022-04-27 21:50:07,788 INFO L290 TraceCheckUtils]: 9: Hoare triple {14066#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14066#(<= main_~i~0 1)} is VALID [2022-04-27 21:50:07,788 INFO L290 TraceCheckUtils]: 10: Hoare triple {14066#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14067#(<= main_~i~0 2)} is VALID [2022-04-27 21:50:07,789 INFO L290 TraceCheckUtils]: 11: Hoare triple {14067#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14067#(<= main_~i~0 2)} is VALID [2022-04-27 21:50:07,789 INFO L290 TraceCheckUtils]: 12: Hoare triple {14067#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14068#(<= main_~i~0 3)} is VALID [2022-04-27 21:50:07,789 INFO L290 TraceCheckUtils]: 13: Hoare triple {14068#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14068#(<= main_~i~0 3)} is VALID [2022-04-27 21:50:07,789 INFO L290 TraceCheckUtils]: 14: Hoare triple {14068#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14069#(<= main_~i~0 4)} is VALID [2022-04-27 21:50:07,791 INFO L290 TraceCheckUtils]: 15: Hoare triple {14069#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14069#(<= main_~i~0 4)} is VALID [2022-04-27 21:50:07,791 INFO L290 TraceCheckUtils]: 16: Hoare triple {14069#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14070#(<= main_~i~0 5)} is VALID [2022-04-27 21:50:07,792 INFO L290 TraceCheckUtils]: 17: Hoare triple {14070#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14070#(<= main_~i~0 5)} is VALID [2022-04-27 21:50:07,792 INFO L290 TraceCheckUtils]: 18: Hoare triple {14070#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14071#(<= main_~i~0 6)} is VALID [2022-04-27 21:50:07,792 INFO L290 TraceCheckUtils]: 19: Hoare triple {14071#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14071#(<= main_~i~0 6)} is VALID [2022-04-27 21:50:07,793 INFO L290 TraceCheckUtils]: 20: Hoare triple {14071#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14072#(<= main_~i~0 7)} is VALID [2022-04-27 21:50:07,793 INFO L290 TraceCheckUtils]: 21: Hoare triple {14072#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14073#(<= main_~n~0 7)} is VALID [2022-04-27 21:50:07,793 INFO L290 TraceCheckUtils]: 22: Hoare triple {14073#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14181#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,794 INFO L290 TraceCheckUtils]: 23: Hoare triple {14181#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14181#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,794 INFO L272 TraceCheckUtils]: 24: Hoare triple {14181#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,794 INFO L290 TraceCheckUtils]: 25: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,794 INFO L290 TraceCheckUtils]: 26: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,794 INFO L290 TraceCheckUtils]: 27: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,794 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {14060#true} {14181#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14181#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,795 INFO L290 TraceCheckUtils]: 29: Hoare triple {14181#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14181#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,795 INFO L290 TraceCheckUtils]: 30: Hoare triple {14181#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14206#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,795 INFO L290 TraceCheckUtils]: 31: Hoare triple {14206#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14206#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,795 INFO L272 TraceCheckUtils]: 32: Hoare triple {14206#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,795 INFO L290 TraceCheckUtils]: 33: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,795 INFO L290 TraceCheckUtils]: 34: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,796 INFO L290 TraceCheckUtils]: 35: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,799 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {14060#true} {14206#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14206#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,800 INFO L290 TraceCheckUtils]: 37: Hoare triple {14206#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14206#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,800 INFO L290 TraceCheckUtils]: 38: Hoare triple {14206#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14231#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-27 21:50:07,801 INFO L290 TraceCheckUtils]: 39: Hoare triple {14231#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14231#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-27 21:50:07,801 INFO L272 TraceCheckUtils]: 40: Hoare triple {14231#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,801 INFO L290 TraceCheckUtils]: 41: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,801 INFO L290 TraceCheckUtils]: 42: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,801 INFO L290 TraceCheckUtils]: 43: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,801 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {14060#true} {14231#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14231#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-27 21:50:07,802 INFO L290 TraceCheckUtils]: 45: Hoare triple {14231#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14231#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-27 21:50:07,802 INFO L290 TraceCheckUtils]: 46: Hoare triple {14231#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14256#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-27 21:50:07,802 INFO L290 TraceCheckUtils]: 47: Hoare triple {14256#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14256#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-27 21:50:07,803 INFO L272 TraceCheckUtils]: 48: Hoare triple {14256#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,803 INFO L290 TraceCheckUtils]: 49: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,803 INFO L290 TraceCheckUtils]: 50: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,803 INFO L290 TraceCheckUtils]: 51: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,803 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {14060#true} {14256#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14256#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-27 21:50:07,804 INFO L290 TraceCheckUtils]: 53: Hoare triple {14256#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14256#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-27 21:50:07,804 INFO L290 TraceCheckUtils]: 54: Hoare triple {14256#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14281#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-27 21:50:07,804 INFO L290 TraceCheckUtils]: 55: Hoare triple {14281#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14281#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-27 21:50:07,805 INFO L272 TraceCheckUtils]: 56: Hoare triple {14281#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,805 INFO L290 TraceCheckUtils]: 57: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,805 INFO L290 TraceCheckUtils]: 58: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,805 INFO L290 TraceCheckUtils]: 59: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,805 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {14060#true} {14281#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14281#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-27 21:50:07,806 INFO L290 TraceCheckUtils]: 61: Hoare triple {14281#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14281#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-27 21:50:07,806 INFO L290 TraceCheckUtils]: 62: Hoare triple {14281#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14306#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,806 INFO L290 TraceCheckUtils]: 63: Hoare triple {14306#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14306#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,807 INFO L272 TraceCheckUtils]: 64: Hoare triple {14306#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,807 INFO L290 TraceCheckUtils]: 65: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,807 INFO L290 TraceCheckUtils]: 66: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,807 INFO L290 TraceCheckUtils]: 67: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,807 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {14060#true} {14306#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14306#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,808 INFO L290 TraceCheckUtils]: 69: Hoare triple {14306#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14306#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,808 INFO L290 TraceCheckUtils]: 70: Hoare triple {14306#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14331#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,808 INFO L290 TraceCheckUtils]: 71: Hoare triple {14331#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14331#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,809 INFO L272 TraceCheckUtils]: 72: Hoare triple {14331#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:07,809 INFO L290 TraceCheckUtils]: 73: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:07,809 INFO L290 TraceCheckUtils]: 74: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,809 INFO L290 TraceCheckUtils]: 75: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:07,809 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {14060#true} {14331#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14331#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,810 INFO L290 TraceCheckUtils]: 77: Hoare triple {14331#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14331#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,810 INFO L290 TraceCheckUtils]: 78: Hoare triple {14331#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14356#(and (<= 7 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-27 21:50:07,811 INFO L290 TraceCheckUtils]: 79: Hoare triple {14356#(and (<= 7 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14061#false} is VALID [2022-04-27 21:50:07,811 INFO L272 TraceCheckUtils]: 80: Hoare triple {14061#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14061#false} is VALID [2022-04-27 21:50:07,811 INFO L290 TraceCheckUtils]: 81: Hoare triple {14061#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14061#false} is VALID [2022-04-27 21:50:07,811 INFO L290 TraceCheckUtils]: 82: Hoare triple {14061#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14061#false} is VALID [2022-04-27 21:50:07,811 INFO L290 TraceCheckUtils]: 83: Hoare triple {14061#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14061#false} is VALID [2022-04-27 21:50:07,811 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 112 proven. 49 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 21:50:07,811 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:50:08,173 INFO L290 TraceCheckUtils]: 83: Hoare triple {14061#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14061#false} is VALID [2022-04-27 21:50:08,174 INFO L290 TraceCheckUtils]: 82: Hoare triple {14061#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14061#false} is VALID [2022-04-27 21:50:08,174 INFO L290 TraceCheckUtils]: 81: Hoare triple {14061#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14061#false} is VALID [2022-04-27 21:50:08,174 INFO L272 TraceCheckUtils]: 80: Hoare triple {14061#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14061#false} is VALID [2022-04-27 21:50:08,174 INFO L290 TraceCheckUtils]: 79: Hoare triple {14109#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14061#false} is VALID [2022-04-27 21:50:08,175 INFO L290 TraceCheckUtils]: 78: Hoare triple {14104#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14109#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:50:08,175 INFO L290 TraceCheckUtils]: 77: Hoare triple {14104#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14104#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:50:08,175 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {14060#true} {14104#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14104#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:50:08,175 INFO L290 TraceCheckUtils]: 75: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,175 INFO L290 TraceCheckUtils]: 74: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,175 INFO L290 TraceCheckUtils]: 73: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:08,176 INFO L272 TraceCheckUtils]: 72: Hoare triple {14104#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:08,176 INFO L290 TraceCheckUtils]: 71: Hoare triple {14104#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14104#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:50:08,176 INFO L290 TraceCheckUtils]: 70: Hoare triple {14099#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14104#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:50:08,176 INFO L290 TraceCheckUtils]: 69: Hoare triple {14099#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14099#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:50:08,177 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {14060#true} {14099#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14099#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:50:08,177 INFO L290 TraceCheckUtils]: 67: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,177 INFO L290 TraceCheckUtils]: 66: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,177 INFO L290 TraceCheckUtils]: 65: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:08,177 INFO L272 TraceCheckUtils]: 64: Hoare triple {14099#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:08,177 INFO L290 TraceCheckUtils]: 63: Hoare triple {14099#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14099#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:50:08,178 INFO L290 TraceCheckUtils]: 62: Hoare triple {14094#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14099#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:50:08,178 INFO L290 TraceCheckUtils]: 61: Hoare triple {14094#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14094#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:50:08,178 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {14060#true} {14094#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14094#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:50:08,179 INFO L290 TraceCheckUtils]: 59: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,179 INFO L290 TraceCheckUtils]: 58: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,179 INFO L290 TraceCheckUtils]: 57: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:08,179 INFO L272 TraceCheckUtils]: 56: Hoare triple {14094#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:08,179 INFO L290 TraceCheckUtils]: 55: Hoare triple {14094#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14094#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:50:08,179 INFO L290 TraceCheckUtils]: 54: Hoare triple {14089#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14094#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:50:08,180 INFO L290 TraceCheckUtils]: 53: Hoare triple {14089#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14089#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:50:08,180 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {14060#true} {14089#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14089#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:50:08,180 INFO L290 TraceCheckUtils]: 51: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,180 INFO L290 TraceCheckUtils]: 50: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,180 INFO L290 TraceCheckUtils]: 49: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:08,180 INFO L272 TraceCheckUtils]: 48: Hoare triple {14089#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:08,181 INFO L290 TraceCheckUtils]: 47: Hoare triple {14089#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14089#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:50:08,181 INFO L290 TraceCheckUtils]: 46: Hoare triple {14084#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14089#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:50:08,181 INFO L290 TraceCheckUtils]: 45: Hoare triple {14084#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14084#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:50:08,182 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {14060#true} {14084#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14084#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:50:08,182 INFO L290 TraceCheckUtils]: 43: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,182 INFO L290 TraceCheckUtils]: 42: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,182 INFO L290 TraceCheckUtils]: 41: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:08,182 INFO L272 TraceCheckUtils]: 40: Hoare triple {14084#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:08,182 INFO L290 TraceCheckUtils]: 39: Hoare triple {14084#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14084#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:50:08,182 INFO L290 TraceCheckUtils]: 38: Hoare triple {14079#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14084#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:50:08,183 INFO L290 TraceCheckUtils]: 37: Hoare triple {14079#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14079#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:50:08,183 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {14060#true} {14079#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14079#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:50:08,183 INFO L290 TraceCheckUtils]: 35: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,183 INFO L290 TraceCheckUtils]: 34: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,183 INFO L290 TraceCheckUtils]: 33: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:08,183 INFO L272 TraceCheckUtils]: 32: Hoare triple {14079#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:08,184 INFO L290 TraceCheckUtils]: 31: Hoare triple {14079#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14079#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:50:08,184 INFO L290 TraceCheckUtils]: 30: Hoare triple {14531#(<= main_~n~0 (+ 7 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14079#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:50:08,184 INFO L290 TraceCheckUtils]: 29: Hoare triple {14531#(<= main_~n~0 (+ 7 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14531#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:50:08,185 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {14060#true} {14531#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14531#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:50:08,185 INFO L290 TraceCheckUtils]: 27: Hoare triple {14060#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,185 INFO L290 TraceCheckUtils]: 26: Hoare triple {14060#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,185 INFO L290 TraceCheckUtils]: 25: Hoare triple {14060#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14060#true} is VALID [2022-04-27 21:50:08,185 INFO L272 TraceCheckUtils]: 24: Hoare triple {14531#(<= main_~n~0 (+ 7 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14060#true} is VALID [2022-04-27 21:50:08,185 INFO L290 TraceCheckUtils]: 23: Hoare triple {14531#(<= main_~n~0 (+ 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14531#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:50:08,185 INFO L290 TraceCheckUtils]: 22: Hoare triple {14073#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14531#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:50:08,186 INFO L290 TraceCheckUtils]: 21: Hoare triple {14072#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14073#(<= main_~n~0 7)} is VALID [2022-04-27 21:50:08,186 INFO L290 TraceCheckUtils]: 20: Hoare triple {14071#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14072#(<= main_~i~0 7)} is VALID [2022-04-27 21:50:08,186 INFO L290 TraceCheckUtils]: 19: Hoare triple {14071#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14071#(<= main_~i~0 6)} is VALID [2022-04-27 21:50:08,187 INFO L290 TraceCheckUtils]: 18: Hoare triple {14070#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14071#(<= main_~i~0 6)} is VALID [2022-04-27 21:50:08,187 INFO L290 TraceCheckUtils]: 17: Hoare triple {14070#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14070#(<= main_~i~0 5)} is VALID [2022-04-27 21:50:08,187 INFO L290 TraceCheckUtils]: 16: Hoare triple {14069#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14070#(<= main_~i~0 5)} is VALID [2022-04-27 21:50:08,188 INFO L290 TraceCheckUtils]: 15: Hoare triple {14069#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14069#(<= main_~i~0 4)} is VALID [2022-04-27 21:50:08,188 INFO L290 TraceCheckUtils]: 14: Hoare triple {14068#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14069#(<= main_~i~0 4)} is VALID [2022-04-27 21:50:08,188 INFO L290 TraceCheckUtils]: 13: Hoare triple {14068#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14068#(<= main_~i~0 3)} is VALID [2022-04-27 21:50:08,189 INFO L290 TraceCheckUtils]: 12: Hoare triple {14067#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14068#(<= main_~i~0 3)} is VALID [2022-04-27 21:50:08,189 INFO L290 TraceCheckUtils]: 11: Hoare triple {14067#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14067#(<= main_~i~0 2)} is VALID [2022-04-27 21:50:08,189 INFO L290 TraceCheckUtils]: 10: Hoare triple {14066#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14067#(<= main_~i~0 2)} is VALID [2022-04-27 21:50:08,190 INFO L290 TraceCheckUtils]: 9: Hoare triple {14066#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14066#(<= main_~i~0 1)} is VALID [2022-04-27 21:50:08,190 INFO L290 TraceCheckUtils]: 8: Hoare triple {14132#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14066#(<= main_~i~0 1)} is VALID [2022-04-27 21:50:08,190 INFO L290 TraceCheckUtils]: 7: Hoare triple {14132#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14132#(<= main_~i~0 0)} is VALID [2022-04-27 21:50:08,191 INFO L290 TraceCheckUtils]: 6: Hoare triple {14060#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14132#(<= main_~i~0 0)} is VALID [2022-04-27 21:50:08,191 INFO L290 TraceCheckUtils]: 5: Hoare triple {14060#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14060#true} is VALID [2022-04-27 21:50:08,191 INFO L272 TraceCheckUtils]: 4: Hoare triple {14060#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,191 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14060#true} {14060#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,191 INFO L290 TraceCheckUtils]: 2: Hoare triple {14060#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,191 INFO L290 TraceCheckUtils]: 1: Hoare triple {14060#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14060#true} is VALID [2022-04-27 21:50:08,191 INFO L272 TraceCheckUtils]: 0: Hoare triple {14060#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14060#true} is VALID [2022-04-27 21:50:08,191 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 112 proven. 49 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 21:50:08,191 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1401861681] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:50:08,191 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:50:08,191 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19] total 30 [2022-04-27 21:50:08,192 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2009753115] [2022-04-27 21:50:08,192 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:50:08,192 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) Word has length 84 [2022-04-27 21:50:08,192 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:50:08,192 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 21:50:08,256 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:50:08,256 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-27 21:50:08,256 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:50:08,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-27 21:50:08,256 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=196, Invalid=674, Unknown=0, NotChecked=0, Total=870 [2022-04-27 21:50:08,257 INFO L87 Difference]: Start difference. First operand 124 states and 127 transitions. Second operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 21:50:08,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:50:08,975 INFO L93 Difference]: Finished difference Result 146 states and 151 transitions. [2022-04-27 21:50:08,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-27 21:50:08,975 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) Word has length 84 [2022-04-27 21:50:08,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:50:08,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 21:50:08,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 85 transitions. [2022-04-27 21:50:08,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 21:50:08,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 85 transitions. [2022-04-27 21:50:08,978 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 85 transitions. [2022-04-27 21:50:09,050 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:50:09,051 INFO L225 Difference]: With dead ends: 146 [2022-04-27 21:50:09,051 INFO L226 Difference]: Without dead ends: 90 [2022-04-27 21:50:09,052 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 173 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 555 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=441, Invalid=1721, Unknown=0, NotChecked=0, Total=2162 [2022-04-27 21:50:09,052 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 45 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 320 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 364 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 320 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:50:09,053 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 64 Invalid, 364 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 320 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 21:50:09,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-04-27 21:50:09,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 89. [2022-04-27 21:50:09,087 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:50:09,087 INFO L82 GeneralOperation]: Start isEquivalent. First operand 90 states. Second operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 21:50:09,087 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 21:50:09,087 INFO L87 Difference]: Start difference. First operand 90 states. Second operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 21:50:09,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:50:09,088 INFO L93 Difference]: Finished difference Result 90 states and 91 transitions. [2022-04-27 21:50:09,088 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 91 transitions. [2022-04-27 21:50:09,088 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:50:09,088 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:50:09,088 INFO L74 IsIncluded]: Start isIncluded. First operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 90 states. [2022-04-27 21:50:09,089 INFO L87 Difference]: Start difference. First operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 90 states. [2022-04-27 21:50:09,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:50:09,089 INFO L93 Difference]: Finished difference Result 90 states and 91 transitions. [2022-04-27 21:50:09,090 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 91 transitions. [2022-04-27 21:50:09,090 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:50:09,090 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:50:09,090 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:50:09,090 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:50:09,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-27 21:50:09,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 90 transitions. [2022-04-27 21:50:09,091 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 90 transitions. Word has length 84 [2022-04-27 21:50:09,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:50:09,091 INFO L495 AbstractCegarLoop]: Abstraction has 89 states and 90 transitions. [2022-04-27 21:50:09,091 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-27 21:50:09,091 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 90 transitions. [2022-04-27 21:50:09,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-04-27 21:50:09,092 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:50:09,092 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:50:09,110 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-27 21:50:09,308 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:50:09,309 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:50:09,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:50:09,309 INFO L85 PathProgramCache]: Analyzing trace with hash -160730255, now seen corresponding path program 19 times [2022-04-27 21:50:09,309 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:50:09,309 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644475259] [2022-04-27 21:50:09,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:50:09,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:50:09,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,593 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:50:09,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,607 INFO L290 TraceCheckUtils]: 0: Hoare triple {15223#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15169#true} is VALID [2022-04-27 21:50:09,607 INFO L290 TraceCheckUtils]: 1: Hoare triple {15169#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,607 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15169#true} {15169#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,607 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 21:50:09,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,609 INFO L290 TraceCheckUtils]: 0: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,609 INFO L290 TraceCheckUtils]: 1: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,609 INFO L290 TraceCheckUtils]: 2: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,610 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15169#true} {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:50:09,610 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 21:50:09,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,612 INFO L290 TraceCheckUtils]: 0: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,612 INFO L290 TraceCheckUtils]: 2: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15169#true} {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:50:09,613 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-27 21:50:09,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,614 INFO L290 TraceCheckUtils]: 0: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,614 INFO L290 TraceCheckUtils]: 1: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,614 INFO L290 TraceCheckUtils]: 2: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15169#true} {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:50:09,615 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-27 21:50:09,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,617 INFO L290 TraceCheckUtils]: 0: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,617 INFO L290 TraceCheckUtils]: 1: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,617 INFO L290 TraceCheckUtils]: 2: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,617 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15169#true} {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:09,618 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-27 21:50:09,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,620 INFO L290 TraceCheckUtils]: 0: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,620 INFO L290 TraceCheckUtils]: 1: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,620 INFO L290 TraceCheckUtils]: 2: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,620 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15169#true} {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:50:09,620 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-04-27 21:50:09,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,622 INFO L290 TraceCheckUtils]: 0: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,622 INFO L290 TraceCheckUtils]: 1: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,623 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15169#true} {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:50:09,623 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-04-27 21:50:09,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,625 INFO L290 TraceCheckUtils]: 0: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,625 INFO L290 TraceCheckUtils]: 1: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,625 INFO L290 TraceCheckUtils]: 2: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,626 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15169#true} {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:50:09,626 INFO L272 TraceCheckUtils]: 0: Hoare triple {15169#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15223#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:50:09,626 INFO L290 TraceCheckUtils]: 1: Hoare triple {15223#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15169#true} is VALID [2022-04-27 21:50:09,626 INFO L290 TraceCheckUtils]: 2: Hoare triple {15169#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,626 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15169#true} {15169#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,626 INFO L272 TraceCheckUtils]: 4: Hoare triple {15169#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,626 INFO L290 TraceCheckUtils]: 5: Hoare triple {15169#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15169#true} is VALID [2022-04-27 21:50:09,627 INFO L290 TraceCheckUtils]: 6: Hoare triple {15169#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15174#(= main_~i~0 0)} is VALID [2022-04-27 21:50:09,627 INFO L290 TraceCheckUtils]: 7: Hoare triple {15174#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15174#(= main_~i~0 0)} is VALID [2022-04-27 21:50:09,627 INFO L290 TraceCheckUtils]: 8: Hoare triple {15174#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:50:09,628 INFO L290 TraceCheckUtils]: 9: Hoare triple {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:50:09,628 INFO L290 TraceCheckUtils]: 10: Hoare triple {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:50:09,628 INFO L290 TraceCheckUtils]: 11: Hoare triple {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:50:09,629 INFO L290 TraceCheckUtils]: 12: Hoare triple {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:50:09,629 INFO L290 TraceCheckUtils]: 13: Hoare triple {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:50:09,630 INFO L290 TraceCheckUtils]: 14: Hoare triple {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:50:09,630 INFO L290 TraceCheckUtils]: 15: Hoare triple {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:50:09,630 INFO L290 TraceCheckUtils]: 16: Hoare triple {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:50:09,631 INFO L290 TraceCheckUtils]: 17: Hoare triple {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:50:09,631 INFO L290 TraceCheckUtils]: 18: Hoare triple {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:50:09,637 INFO L290 TraceCheckUtils]: 19: Hoare triple {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:50:09,638 INFO L290 TraceCheckUtils]: 20: Hoare triple {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15181#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 21:50:09,638 INFO L290 TraceCheckUtils]: 21: Hoare triple {15181#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15182#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-27 21:50:09,639 INFO L290 TraceCheckUtils]: 22: Hoare triple {15182#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 21:50:09,639 INFO L290 TraceCheckUtils]: 23: Hoare triple {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 21:50:09,639 INFO L290 TraceCheckUtils]: 24: Hoare triple {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:50:09,640 INFO L290 TraceCheckUtils]: 25: Hoare triple {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:50:09,640 INFO L272 TraceCheckUtils]: 26: Hoare triple {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:50:09,640 INFO L290 TraceCheckUtils]: 27: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,640 INFO L290 TraceCheckUtils]: 28: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,640 INFO L290 TraceCheckUtils]: 29: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,640 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {15169#true} {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:50:09,641 INFO L290 TraceCheckUtils]: 31: Hoare triple {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:50:09,641 INFO L290 TraceCheckUtils]: 32: Hoare triple {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:50:09,641 INFO L290 TraceCheckUtils]: 33: Hoare triple {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:50:09,641 INFO L272 TraceCheckUtils]: 34: Hoare triple {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:50:09,641 INFO L290 TraceCheckUtils]: 35: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,641 INFO L290 TraceCheckUtils]: 36: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,642 INFO L290 TraceCheckUtils]: 37: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,642 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {15169#true} {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:50:09,642 INFO L290 TraceCheckUtils]: 39: Hoare triple {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:50:09,643 INFO L290 TraceCheckUtils]: 40: Hoare triple {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:50:09,643 INFO L290 TraceCheckUtils]: 41: Hoare triple {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:50:09,643 INFO L272 TraceCheckUtils]: 42: Hoare triple {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:50:09,643 INFO L290 TraceCheckUtils]: 43: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,643 INFO L290 TraceCheckUtils]: 44: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,643 INFO L290 TraceCheckUtils]: 45: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,644 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {15169#true} {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:50:09,644 INFO L290 TraceCheckUtils]: 47: Hoare triple {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:50:09,645 INFO L290 TraceCheckUtils]: 48: Hoare triple {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:09,645 INFO L290 TraceCheckUtils]: 49: Hoare triple {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:09,645 INFO L272 TraceCheckUtils]: 50: Hoare triple {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:50:09,645 INFO L290 TraceCheckUtils]: 51: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,645 INFO L290 TraceCheckUtils]: 52: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,645 INFO L290 TraceCheckUtils]: 53: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,646 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {15169#true} {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:09,646 INFO L290 TraceCheckUtils]: 55: Hoare triple {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:09,647 INFO L290 TraceCheckUtils]: 56: Hoare triple {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:50:09,647 INFO L290 TraceCheckUtils]: 57: Hoare triple {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:50:09,647 INFO L272 TraceCheckUtils]: 58: Hoare triple {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:50:09,647 INFO L290 TraceCheckUtils]: 59: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,647 INFO L290 TraceCheckUtils]: 60: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,647 INFO L290 TraceCheckUtils]: 61: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,648 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {15169#true} {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:50:09,648 INFO L290 TraceCheckUtils]: 63: Hoare triple {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:50:09,648 INFO L290 TraceCheckUtils]: 64: Hoare triple {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:50:09,649 INFO L290 TraceCheckUtils]: 65: Hoare triple {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:50:09,649 INFO L272 TraceCheckUtils]: 66: Hoare triple {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:50:09,649 INFO L290 TraceCheckUtils]: 67: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,649 INFO L290 TraceCheckUtils]: 68: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,649 INFO L290 TraceCheckUtils]: 69: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,649 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {15169#true} {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:50:09,650 INFO L290 TraceCheckUtils]: 71: Hoare triple {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:50:09,650 INFO L290 TraceCheckUtils]: 72: Hoare triple {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:50:09,650 INFO L290 TraceCheckUtils]: 73: Hoare triple {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:50:09,650 INFO L272 TraceCheckUtils]: 74: Hoare triple {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:50:09,651 INFO L290 TraceCheckUtils]: 75: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:50:09,651 INFO L290 TraceCheckUtils]: 76: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,651 INFO L290 TraceCheckUtils]: 77: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:50:09,651 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {15169#true} {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:50:09,651 INFO L290 TraceCheckUtils]: 79: Hoare triple {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:50:09,652 INFO L290 TraceCheckUtils]: 80: Hoare triple {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15219#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:50:09,652 INFO L290 TraceCheckUtils]: 81: Hoare triple {15219#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15220#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:50:09,652 INFO L272 TraceCheckUtils]: 82: Hoare triple {15220#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15221#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:50:09,653 INFO L290 TraceCheckUtils]: 83: Hoare triple {15221#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15222#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:50:09,653 INFO L290 TraceCheckUtils]: 84: Hoare triple {15222#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15170#false} is VALID [2022-04-27 21:50:09,653 INFO L290 TraceCheckUtils]: 85: Hoare triple {15170#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15170#false} is VALID [2022-04-27 21:50:09,653 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 14 proven. 162 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 21:50:09,654 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:50:09,654 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644475259] [2022-04-27 21:50:09,654 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [644475259] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:50:09,654 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [596518754] [2022-04-27 21:50:09,654 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 21:50:09,654 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:50:09,654 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:50:09,672 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:50:09,673 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-27 21:50:09,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,727 INFO L263 TraceCheckSpWp]: Trace formula consists of 235 conjuncts, 41 conjunts are in the unsatisfiable core [2022-04-27 21:50:09,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:50:09,740 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:50:09,865 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:51:45,082 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-27 21:51:45,134 INFO L272 TraceCheckUtils]: 0: Hoare triple {15169#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:45,134 INFO L290 TraceCheckUtils]: 1: Hoare triple {15169#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15169#true} is VALID [2022-04-27 21:51:45,134 INFO L290 TraceCheckUtils]: 2: Hoare triple {15169#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:45,134 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15169#true} {15169#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:45,134 INFO L272 TraceCheckUtils]: 4: Hoare triple {15169#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:45,134 INFO L290 TraceCheckUtils]: 5: Hoare triple {15169#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15169#true} is VALID [2022-04-27 21:51:45,134 INFO L290 TraceCheckUtils]: 6: Hoare triple {15169#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15174#(= main_~i~0 0)} is VALID [2022-04-27 21:51:45,135 INFO L290 TraceCheckUtils]: 7: Hoare triple {15174#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15174#(= main_~i~0 0)} is VALID [2022-04-27 21:51:45,135 INFO L290 TraceCheckUtils]: 8: Hoare triple {15174#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:51:45,135 INFO L290 TraceCheckUtils]: 9: Hoare triple {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:51:45,136 INFO L290 TraceCheckUtils]: 10: Hoare triple {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:51:45,136 INFO L290 TraceCheckUtils]: 11: Hoare triple {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:51:45,136 INFO L290 TraceCheckUtils]: 12: Hoare triple {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:51:45,137 INFO L290 TraceCheckUtils]: 13: Hoare triple {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:51:45,137 INFO L290 TraceCheckUtils]: 14: Hoare triple {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:51:45,138 INFO L290 TraceCheckUtils]: 15: Hoare triple {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:51:45,138 INFO L290 TraceCheckUtils]: 16: Hoare triple {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:51:45,138 INFO L290 TraceCheckUtils]: 17: Hoare triple {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:51:45,139 INFO L290 TraceCheckUtils]: 18: Hoare triple {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:51:45,139 INFO L290 TraceCheckUtils]: 19: Hoare triple {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:51:45,139 INFO L290 TraceCheckUtils]: 20: Hoare triple {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15181#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 21:51:45,140 INFO L290 TraceCheckUtils]: 21: Hoare triple {15181#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 21:51:45,140 INFO L290 TraceCheckUtils]: 22: Hoare triple {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 21:51:45,140 INFO L290 TraceCheckUtils]: 23: Hoare triple {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 21:51:45,141 INFO L290 TraceCheckUtils]: 24: Hoare triple {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:51:45,141 INFO L290 TraceCheckUtils]: 25: Hoare triple {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:51:45,142 INFO L272 TraceCheckUtils]: 26: Hoare triple {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,142 INFO L290 TraceCheckUtils]: 27: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,142 INFO L290 TraceCheckUtils]: 28: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,143 INFO L290 TraceCheckUtils]: 29: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,143 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:51:45,143 INFO L290 TraceCheckUtils]: 31: Hoare triple {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:51:45,144 INFO L290 TraceCheckUtils]: 32: Hoare triple {15184#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15324#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:51:45,144 INFO L290 TraceCheckUtils]: 33: Hoare triple {15324#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15324#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:51:45,145 INFO L272 TraceCheckUtils]: 34: Hoare triple {15324#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,145 INFO L290 TraceCheckUtils]: 35: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,145 INFO L290 TraceCheckUtils]: 36: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,146 INFO L290 TraceCheckUtils]: 37: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,146 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} {15324#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15324#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:51:45,146 INFO L290 TraceCheckUtils]: 39: Hoare triple {15324#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15324#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:51:45,147 INFO L290 TraceCheckUtils]: 40: Hoare triple {15324#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15349#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-27 21:51:45,147 INFO L290 TraceCheckUtils]: 41: Hoare triple {15349#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15349#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-27 21:51:45,148 INFO L272 TraceCheckUtils]: 42: Hoare triple {15349#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,148 INFO L290 TraceCheckUtils]: 43: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,148 INFO L290 TraceCheckUtils]: 44: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,149 INFO L290 TraceCheckUtils]: 45: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,149 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} {15349#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15349#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-27 21:51:45,149 INFO L290 TraceCheckUtils]: 47: Hoare triple {15349#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15349#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-27 21:51:45,150 INFO L290 TraceCheckUtils]: 48: Hoare triple {15349#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-27 21:51:45,150 INFO L290 TraceCheckUtils]: 49: Hoare triple {15374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-27 21:51:45,151 INFO L272 TraceCheckUtils]: 50: Hoare triple {15374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,151 INFO L290 TraceCheckUtils]: 51: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,151 INFO L290 TraceCheckUtils]: 52: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,152 INFO L290 TraceCheckUtils]: 53: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,152 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} {15374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-27 21:51:45,153 INFO L290 TraceCheckUtils]: 55: Hoare triple {15374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-27 21:51:45,153 INFO L290 TraceCheckUtils]: 56: Hoare triple {15374#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15399#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} is VALID [2022-04-27 21:51:45,153 INFO L290 TraceCheckUtils]: 57: Hoare triple {15399#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15399#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} is VALID [2022-04-27 21:51:45,154 INFO L272 TraceCheckUtils]: 58: Hoare triple {15399#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,154 INFO L290 TraceCheckUtils]: 59: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,155 INFO L290 TraceCheckUtils]: 60: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,155 INFO L290 TraceCheckUtils]: 61: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,156 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} {15399#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15399#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} is VALID [2022-04-27 21:51:45,156 INFO L290 TraceCheckUtils]: 63: Hoare triple {15399#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15399#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} is VALID [2022-04-27 21:51:45,156 INFO L290 TraceCheckUtils]: 64: Hoare triple {15399#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15424#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:51:45,157 INFO L290 TraceCheckUtils]: 65: Hoare triple {15424#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15424#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:51:45,158 INFO L272 TraceCheckUtils]: 66: Hoare triple {15424#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,158 INFO L290 TraceCheckUtils]: 67: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,158 INFO L290 TraceCheckUtils]: 68: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,159 INFO L290 TraceCheckUtils]: 69: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,159 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} {15424#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15424#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:51:45,160 INFO L290 TraceCheckUtils]: 71: Hoare triple {15424#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15424#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:51:45,160 INFO L290 TraceCheckUtils]: 72: Hoare triple {15424#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 4 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} is VALID [2022-04-27 21:51:45,160 INFO L290 TraceCheckUtils]: 73: Hoare triple {15449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} is VALID [2022-04-27 21:51:45,161 INFO L272 TraceCheckUtils]: 74: Hoare triple {15449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,162 INFO L290 TraceCheckUtils]: 75: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,162 INFO L290 TraceCheckUtils]: 76: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,162 INFO L290 TraceCheckUtils]: 77: Hoare triple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} is VALID [2022-04-27 21:51:45,163 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {15305#(exists ((v_main_~x~0.base_BEFORE_CALL_81 Int) (v_main_~x~0.offset_BEFORE_CALL_81 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_81) (+ 28 v_main_~x~0.offset_BEFORE_CALL_81)) 0))} {15449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} is VALID [2022-04-27 21:51:45,163 INFO L290 TraceCheckUtils]: 79: Hoare triple {15449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} is VALID [2022-04-27 21:51:45,164 INFO L290 TraceCheckUtils]: 80: Hoare triple {15449#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15474#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 7 main_~i~1))} is VALID [2022-04-27 21:51:45,164 INFO L290 TraceCheckUtils]: 81: Hoare triple {15474#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15220#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:51:45,165 INFO L272 TraceCheckUtils]: 82: Hoare triple {15220#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15481#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:51:45,165 INFO L290 TraceCheckUtils]: 83: Hoare triple {15481#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15485#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:51:45,165 INFO L290 TraceCheckUtils]: 84: Hoare triple {15485#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15170#false} is VALID [2022-04-27 21:51:45,165 INFO L290 TraceCheckUtils]: 85: Hoare triple {15170#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15170#false} is VALID [2022-04-27 21:51:45,166 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 176 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 21:51:45,166 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:51:47,427 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-27 21:51:47,431 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-27 21:51:47,545 INFO L290 TraceCheckUtils]: 85: Hoare triple {15170#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15170#false} is VALID [2022-04-27 21:51:47,546 INFO L290 TraceCheckUtils]: 84: Hoare triple {15485#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15170#false} is VALID [2022-04-27 21:51:47,546 INFO L290 TraceCheckUtils]: 83: Hoare triple {15481#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15485#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:51:47,546 INFO L272 TraceCheckUtils]: 82: Hoare triple {15220#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15481#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:51:47,547 INFO L290 TraceCheckUtils]: 81: Hoare triple {15219#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15220#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:51:47,547 INFO L290 TraceCheckUtils]: 80: Hoare triple {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15219#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:47,548 INFO L290 TraceCheckUtils]: 79: Hoare triple {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:51:47,548 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {15169#true} {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:51:47,548 INFO L290 TraceCheckUtils]: 77: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,548 INFO L290 TraceCheckUtils]: 76: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,548 INFO L290 TraceCheckUtils]: 75: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:51:47,549 INFO L272 TraceCheckUtils]: 74: Hoare triple {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:51:47,549 INFO L290 TraceCheckUtils]: 73: Hoare triple {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:51:47,549 INFO L290 TraceCheckUtils]: 72: Hoare triple {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15214#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:51:47,550 INFO L290 TraceCheckUtils]: 71: Hoare triple {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:51:47,550 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {15169#true} {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:51:47,550 INFO L290 TraceCheckUtils]: 69: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,550 INFO L290 TraceCheckUtils]: 68: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,550 INFO L290 TraceCheckUtils]: 67: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:51:47,550 INFO L272 TraceCheckUtils]: 66: Hoare triple {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:51:47,551 INFO L290 TraceCheckUtils]: 65: Hoare triple {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:51:47,551 INFO L290 TraceCheckUtils]: 64: Hoare triple {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15209#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:51:47,552 INFO L290 TraceCheckUtils]: 63: Hoare triple {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:51:47,552 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {15169#true} {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:51:47,552 INFO L290 TraceCheckUtils]: 61: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,552 INFO L290 TraceCheckUtils]: 60: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,552 INFO L290 TraceCheckUtils]: 59: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:51:47,552 INFO L272 TraceCheckUtils]: 58: Hoare triple {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:51:47,553 INFO L290 TraceCheckUtils]: 57: Hoare triple {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:51:47,553 INFO L290 TraceCheckUtils]: 56: Hoare triple {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:51:47,553 INFO L290 TraceCheckUtils]: 55: Hoare triple {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:47,554 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {15169#true} {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:47,554 INFO L290 TraceCheckUtils]: 53: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,554 INFO L290 TraceCheckUtils]: 52: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,554 INFO L290 TraceCheckUtils]: 51: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:51:47,554 INFO L272 TraceCheckUtils]: 50: Hoare triple {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:51:47,554 INFO L290 TraceCheckUtils]: 49: Hoare triple {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:47,555 INFO L290 TraceCheckUtils]: 48: Hoare triple {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15199#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:47,555 INFO L290 TraceCheckUtils]: 47: Hoare triple {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:51:47,556 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {15169#true} {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:51:47,556 INFO L290 TraceCheckUtils]: 45: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,556 INFO L290 TraceCheckUtils]: 44: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,556 INFO L290 TraceCheckUtils]: 43: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:51:47,556 INFO L272 TraceCheckUtils]: 42: Hoare triple {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:51:47,556 INFO L290 TraceCheckUtils]: 41: Hoare triple {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:51:47,557 INFO L290 TraceCheckUtils]: 40: Hoare triple {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15194#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:51:47,557 INFO L290 TraceCheckUtils]: 39: Hoare triple {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:51:47,564 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {15169#true} {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:51:47,564 INFO L290 TraceCheckUtils]: 37: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,564 INFO L290 TraceCheckUtils]: 36: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,564 INFO L290 TraceCheckUtils]: 35: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:51:47,564 INFO L272 TraceCheckUtils]: 34: Hoare triple {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:51:47,565 INFO L290 TraceCheckUtils]: 33: Hoare triple {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:51:47,565 INFO L290 TraceCheckUtils]: 32: Hoare triple {15651#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15189#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:51:47,565 INFO L290 TraceCheckUtils]: 31: Hoare triple {15651#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15651#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:51:47,566 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {15169#true} {15651#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15651#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:51:47,566 INFO L290 TraceCheckUtils]: 29: Hoare triple {15169#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,566 INFO L290 TraceCheckUtils]: 28: Hoare triple {15169#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,566 INFO L290 TraceCheckUtils]: 27: Hoare triple {15169#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15169#true} is VALID [2022-04-27 21:51:47,566 INFO L272 TraceCheckUtils]: 26: Hoare triple {15651#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15169#true} is VALID [2022-04-27 21:51:47,567 INFO L290 TraceCheckUtils]: 25: Hoare triple {15651#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15651#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:51:47,567 INFO L290 TraceCheckUtils]: 24: Hoare triple {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15651#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:51:47,567 INFO L290 TraceCheckUtils]: 23: Hoare triple {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 21:51:47,567 INFO L290 TraceCheckUtils]: 22: Hoare triple {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 21:51:47,568 INFO L290 TraceCheckUtils]: 21: Hoare triple {15181#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15183#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-27 21:51:47,568 INFO L290 TraceCheckUtils]: 20: Hoare triple {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15181#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 21:51:47,569 INFO L290 TraceCheckUtils]: 19: Hoare triple {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:51:47,569 INFO L290 TraceCheckUtils]: 18: Hoare triple {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15180#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:51:47,569 INFO L290 TraceCheckUtils]: 17: Hoare triple {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:51:47,570 INFO L290 TraceCheckUtils]: 16: Hoare triple {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15179#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:51:47,570 INFO L290 TraceCheckUtils]: 15: Hoare triple {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:51:47,571 INFO L290 TraceCheckUtils]: 14: Hoare triple {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15178#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:51:47,571 INFO L290 TraceCheckUtils]: 13: Hoare triple {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:51:47,571 INFO L290 TraceCheckUtils]: 12: Hoare triple {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15177#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:51:47,572 INFO L290 TraceCheckUtils]: 11: Hoare triple {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:51:47,572 INFO L290 TraceCheckUtils]: 10: Hoare triple {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15176#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:51:47,572 INFO L290 TraceCheckUtils]: 9: Hoare triple {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:51:47,573 INFO L290 TraceCheckUtils]: 8: Hoare triple {15174#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15175#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:51:47,573 INFO L290 TraceCheckUtils]: 7: Hoare triple {15174#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15174#(= main_~i~0 0)} is VALID [2022-04-27 21:51:47,573 INFO L290 TraceCheckUtils]: 6: Hoare triple {15169#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15174#(= main_~i~0 0)} is VALID [2022-04-27 21:51:47,573 INFO L290 TraceCheckUtils]: 5: Hoare triple {15169#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15169#true} is VALID [2022-04-27 21:51:47,573 INFO L272 TraceCheckUtils]: 4: Hoare triple {15169#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,573 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15169#true} {15169#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,573 INFO L290 TraceCheckUtils]: 2: Hoare triple {15169#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,574 INFO L290 TraceCheckUtils]: 1: Hoare triple {15169#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15169#true} is VALID [2022-04-27 21:51:47,574 INFO L272 TraceCheckUtils]: 0: Hoare triple {15169#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15169#true} is VALID [2022-04-27 21:51:47,574 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 14 proven. 162 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-27 21:51:47,574 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [596518754] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:51:47,574 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:51:47,574 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 22] total 35 [2022-04-27 21:51:47,574 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1442875179] [2022-04-27 21:51:47,574 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:51:47,575 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 86 [2022-04-27 21:51:47,575 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:51:47,576 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 21:51:47,650 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 118 edges. 118 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:51:47,650 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-27 21:51:47,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:51:47,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-27 21:51:47,651 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=1085, Unknown=8, NotChecked=0, Total=1190 [2022-04-27 21:51:47,651 INFO L87 Difference]: Start difference. First operand 89 states and 90 transitions. Second operand has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 21:51:49,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:51:49,889 INFO L93 Difference]: Finished difference Result 102 states and 103 transitions. [2022-04-27 21:51:49,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-04-27 21:51:49,889 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 86 [2022-04-27 21:51:49,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:51:49,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 21:51:49,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 85 transitions. [2022-04-27 21:51:49,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 21:51:49,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 85 transitions. [2022-04-27 21:51:49,891 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 33 states and 85 transitions. [2022-04-27 21:51:49,965 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:51:49,966 INFO L225 Difference]: With dead ends: 102 [2022-04-27 21:51:49,966 INFO L226 Difference]: Without dead ends: 100 [2022-04-27 21:51:49,967 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 234 GetRequests, 160 SyntacticMatches, 18 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 712 ImplicationChecksByTransitivity, 97.0s TimeCoverageRelationStatistics Valid=250, Invalid=3048, Unknown=8, NotChecked=0, Total=3306 [2022-04-27 21:51:49,967 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 67 mSDsluCounter, 280 mSDsCounter, 0 mSdLazyCounter, 1366 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 67 SdHoareTripleChecker+Valid, 311 SdHoareTripleChecker+Invalid, 1508 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 1366 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 93 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-27 21:51:49,967 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [67 Valid, 311 Invalid, 1508 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 1366 Invalid, 0 Unknown, 93 Unchecked, 0.9s Time] [2022-04-27 21:51:49,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2022-04-27 21:51:50,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 97. [2022-04-27 21:51:50,001 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:51:50,002 INFO L82 GeneralOperation]: Start isEquivalent. First operand 100 states. Second operand has 97 states, 75 states have (on average 1.0266666666666666) internal successors, (77), 76 states have internal predecessors, (77), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:51:50,002 INFO L74 IsIncluded]: Start isIncluded. First operand 100 states. Second operand has 97 states, 75 states have (on average 1.0266666666666666) internal successors, (77), 76 states have internal predecessors, (77), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:51:50,002 INFO L87 Difference]: Start difference. First operand 100 states. Second operand has 97 states, 75 states have (on average 1.0266666666666666) internal successors, (77), 76 states have internal predecessors, (77), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:51:50,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:51:50,003 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2022-04-27 21:51:50,003 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 101 transitions. [2022-04-27 21:51:50,004 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:51:50,004 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:51:50,004 INFO L74 IsIncluded]: Start isIncluded. First operand has 97 states, 75 states have (on average 1.0266666666666666) internal successors, (77), 76 states have internal predecessors, (77), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) Second operand 100 states. [2022-04-27 21:51:50,004 INFO L87 Difference]: Start difference. First operand has 97 states, 75 states have (on average 1.0266666666666666) internal successors, (77), 76 states have internal predecessors, (77), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) Second operand 100 states. [2022-04-27 21:51:50,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:51:50,005 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2022-04-27 21:51:50,005 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 101 transitions. [2022-04-27 21:51:50,005 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:51:50,005 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:51:50,005 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:51:50,005 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:51:50,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 75 states have (on average 1.0266666666666666) internal successors, (77), 76 states have internal predecessors, (77), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:51:50,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 98 transitions. [2022-04-27 21:51:50,007 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 98 transitions. Word has length 86 [2022-04-27 21:51:50,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:51:50,007 INFO L495 AbstractCegarLoop]: Abstraction has 97 states and 98 transitions. [2022-04-27 21:51:50,007 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-27 21:51:50,007 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 98 transitions. [2022-04-27 21:51:50,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-04-27 21:51:50,008 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:51:50,008 INFO L195 NwaCegarLoop]: trace histogram [9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:51:50,031 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2022-04-27 21:51:50,224 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-04-27 21:51:50,224 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:51:50,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:51:50,225 INFO L85 PathProgramCache]: Analyzing trace with hash -1271043385, now seen corresponding path program 20 times [2022-04-27 21:51:50,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:51:50,225 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [724139031] [2022-04-27 21:51:50,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:51:50,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:51:50,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,404 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:51:50,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,406 INFO L290 TraceCheckUtils]: 0: Hoare triple {16332#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16276#true} is VALID [2022-04-27 21:51:50,407 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,407 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16276#true} {16276#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,407 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-27 21:51:50,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,409 INFO L290 TraceCheckUtils]: 0: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,409 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,409 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,410 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-27 21:51:50,410 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-27 21:51:50,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,412 INFO L290 TraceCheckUtils]: 0: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,412 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,412 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,413 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16296#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16296#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:51:50,413 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-27 21:51:50,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,415 INFO L290 TraceCheckUtils]: 0: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,415 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,415 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,415 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16301#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16301#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:51:50,415 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-27 21:51:50,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,418 INFO L290 TraceCheckUtils]: 0: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,418 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,418 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16306#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16306#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:51:50,418 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-27 21:51:50,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,420 INFO L290 TraceCheckUtils]: 0: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,420 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,420 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,421 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16311#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16311#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:51:50,421 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-04-27 21:51:50,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,423 INFO L290 TraceCheckUtils]: 0: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,423 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,423 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,424 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16316#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16316#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:51:50,424 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-04-27 21:51:50,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,426 INFO L290 TraceCheckUtils]: 0: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,426 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,426 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16321#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16321#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:51:50,426 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-04-27 21:51:50,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,429 INFO L290 TraceCheckUtils]: 0: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,429 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,429 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,429 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16326#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16326#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:51:50,430 INFO L272 TraceCheckUtils]: 0: Hoare triple {16276#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16332#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:51:50,430 INFO L290 TraceCheckUtils]: 1: Hoare triple {16332#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16276#true} is VALID [2022-04-27 21:51:50,430 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,430 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16276#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,430 INFO L272 TraceCheckUtils]: 4: Hoare triple {16276#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,430 INFO L290 TraceCheckUtils]: 5: Hoare triple {16276#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16276#true} is VALID [2022-04-27 21:51:50,430 INFO L290 TraceCheckUtils]: 6: Hoare triple {16276#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16281#(= main_~i~0 0)} is VALID [2022-04-27 21:51:50,431 INFO L290 TraceCheckUtils]: 7: Hoare triple {16281#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16281#(= main_~i~0 0)} is VALID [2022-04-27 21:51:50,431 INFO L290 TraceCheckUtils]: 8: Hoare triple {16281#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16282#(<= main_~i~0 1)} is VALID [2022-04-27 21:51:50,431 INFO L290 TraceCheckUtils]: 9: Hoare triple {16282#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16282#(<= main_~i~0 1)} is VALID [2022-04-27 21:51:50,432 INFO L290 TraceCheckUtils]: 10: Hoare triple {16282#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16283#(<= main_~i~0 2)} is VALID [2022-04-27 21:51:50,432 INFO L290 TraceCheckUtils]: 11: Hoare triple {16283#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16283#(<= main_~i~0 2)} is VALID [2022-04-27 21:51:50,432 INFO L290 TraceCheckUtils]: 12: Hoare triple {16283#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16284#(<= main_~i~0 3)} is VALID [2022-04-27 21:51:50,433 INFO L290 TraceCheckUtils]: 13: Hoare triple {16284#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16284#(<= main_~i~0 3)} is VALID [2022-04-27 21:51:50,433 INFO L290 TraceCheckUtils]: 14: Hoare triple {16284#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16285#(<= main_~i~0 4)} is VALID [2022-04-27 21:51:50,433 INFO L290 TraceCheckUtils]: 15: Hoare triple {16285#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16285#(<= main_~i~0 4)} is VALID [2022-04-27 21:51:50,434 INFO L290 TraceCheckUtils]: 16: Hoare triple {16285#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16286#(<= main_~i~0 5)} is VALID [2022-04-27 21:51:50,434 INFO L290 TraceCheckUtils]: 17: Hoare triple {16286#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16286#(<= main_~i~0 5)} is VALID [2022-04-27 21:51:50,434 INFO L290 TraceCheckUtils]: 18: Hoare triple {16286#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16287#(<= main_~i~0 6)} is VALID [2022-04-27 21:51:50,434 INFO L290 TraceCheckUtils]: 19: Hoare triple {16287#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16287#(<= main_~i~0 6)} is VALID [2022-04-27 21:51:50,435 INFO L290 TraceCheckUtils]: 20: Hoare triple {16287#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16288#(<= main_~i~0 7)} is VALID [2022-04-27 21:51:50,435 INFO L290 TraceCheckUtils]: 21: Hoare triple {16288#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16288#(<= main_~i~0 7)} is VALID [2022-04-27 21:51:50,435 INFO L290 TraceCheckUtils]: 22: Hoare triple {16288#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16289#(<= main_~i~0 8)} is VALID [2022-04-27 21:51:50,436 INFO L290 TraceCheckUtils]: 23: Hoare triple {16289#(<= main_~i~0 8)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16290#(<= main_~n~0 8)} is VALID [2022-04-27 21:51:50,436 INFO L290 TraceCheckUtils]: 24: Hoare triple {16290#(<= main_~n~0 8)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-27 21:51:50,436 INFO L290 TraceCheckUtils]: 25: Hoare triple {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-27 21:51:50,437 INFO L272 TraceCheckUtils]: 26: Hoare triple {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:50,437 INFO L290 TraceCheckUtils]: 27: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,437 INFO L290 TraceCheckUtils]: 28: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,437 INFO L290 TraceCheckUtils]: 29: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,437 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {16276#true} {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-27 21:51:50,437 INFO L290 TraceCheckUtils]: 31: Hoare triple {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-27 21:51:50,438 INFO L290 TraceCheckUtils]: 32: Hoare triple {16291#(and (<= main_~n~0 8) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16296#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:51:50,438 INFO L290 TraceCheckUtils]: 33: Hoare triple {16296#(<= main_~n~0 (+ 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16296#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:51:50,438 INFO L272 TraceCheckUtils]: 34: Hoare triple {16296#(<= main_~n~0 (+ 7 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:50,438 INFO L290 TraceCheckUtils]: 35: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,438 INFO L290 TraceCheckUtils]: 36: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,438 INFO L290 TraceCheckUtils]: 37: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,439 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {16276#true} {16296#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16296#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:51:50,439 INFO L290 TraceCheckUtils]: 39: Hoare triple {16296#(<= main_~n~0 (+ 7 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16296#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:51:50,439 INFO L290 TraceCheckUtils]: 40: Hoare triple {16296#(<= main_~n~0 (+ 7 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16301#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:51:50,440 INFO L290 TraceCheckUtils]: 41: Hoare triple {16301#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16301#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:51:50,440 INFO L272 TraceCheckUtils]: 42: Hoare triple {16301#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:50,440 INFO L290 TraceCheckUtils]: 43: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,440 INFO L290 TraceCheckUtils]: 44: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,440 INFO L290 TraceCheckUtils]: 45: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,440 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {16276#true} {16301#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16301#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:51:50,440 INFO L290 TraceCheckUtils]: 47: Hoare triple {16301#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16301#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:51:50,441 INFO L290 TraceCheckUtils]: 48: Hoare triple {16301#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16306#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:51:50,441 INFO L290 TraceCheckUtils]: 49: Hoare triple {16306#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16306#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:51:50,441 INFO L272 TraceCheckUtils]: 50: Hoare triple {16306#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:50,441 INFO L290 TraceCheckUtils]: 51: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,441 INFO L290 TraceCheckUtils]: 52: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,441 INFO L290 TraceCheckUtils]: 53: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,442 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {16276#true} {16306#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16306#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:51:50,442 INFO L290 TraceCheckUtils]: 55: Hoare triple {16306#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16306#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:51:50,442 INFO L290 TraceCheckUtils]: 56: Hoare triple {16306#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16311#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:51:50,443 INFO L290 TraceCheckUtils]: 57: Hoare triple {16311#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16311#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:51:50,443 INFO L272 TraceCheckUtils]: 58: Hoare triple {16311#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:50,443 INFO L290 TraceCheckUtils]: 59: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,443 INFO L290 TraceCheckUtils]: 60: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,443 INFO L290 TraceCheckUtils]: 61: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,443 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {16276#true} {16311#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16311#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:51:50,443 INFO L290 TraceCheckUtils]: 63: Hoare triple {16311#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16311#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:51:50,444 INFO L290 TraceCheckUtils]: 64: Hoare triple {16311#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16316#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:51:50,444 INFO L290 TraceCheckUtils]: 65: Hoare triple {16316#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16316#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:51:50,444 INFO L272 TraceCheckUtils]: 66: Hoare triple {16316#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:50,444 INFO L290 TraceCheckUtils]: 67: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,444 INFO L290 TraceCheckUtils]: 68: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,444 INFO L290 TraceCheckUtils]: 69: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,445 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {16276#true} {16316#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16316#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:51:50,445 INFO L290 TraceCheckUtils]: 71: Hoare triple {16316#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16316#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:51:50,445 INFO L290 TraceCheckUtils]: 72: Hoare triple {16316#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16321#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:51:50,446 INFO L290 TraceCheckUtils]: 73: Hoare triple {16321#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16321#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:51:50,446 INFO L272 TraceCheckUtils]: 74: Hoare triple {16321#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:50,446 INFO L290 TraceCheckUtils]: 75: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,446 INFO L290 TraceCheckUtils]: 76: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,446 INFO L290 TraceCheckUtils]: 77: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,446 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {16276#true} {16321#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16321#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:51:50,447 INFO L290 TraceCheckUtils]: 79: Hoare triple {16321#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16321#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:51:50,447 INFO L290 TraceCheckUtils]: 80: Hoare triple {16321#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16326#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:51:50,447 INFO L290 TraceCheckUtils]: 81: Hoare triple {16326#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16326#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:51:50,447 INFO L272 TraceCheckUtils]: 82: Hoare triple {16326#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:50,447 INFO L290 TraceCheckUtils]: 83: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:50,447 INFO L290 TraceCheckUtils]: 84: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,447 INFO L290 TraceCheckUtils]: 85: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:50,448 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {16276#true} {16326#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16326#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:51:50,448 INFO L290 TraceCheckUtils]: 87: Hoare triple {16326#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16326#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:51:50,448 INFO L290 TraceCheckUtils]: 88: Hoare triple {16326#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16331#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:51:50,449 INFO L290 TraceCheckUtils]: 89: Hoare triple {16331#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16277#false} is VALID [2022-04-27 21:51:50,449 INFO L272 TraceCheckUtils]: 90: Hoare triple {16277#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16277#false} is VALID [2022-04-27 21:51:50,449 INFO L290 TraceCheckUtils]: 91: Hoare triple {16277#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16277#false} is VALID [2022-04-27 21:51:50,449 INFO L290 TraceCheckUtils]: 92: Hoare triple {16277#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16277#false} is VALID [2022-04-27 21:51:50,449 INFO L290 TraceCheckUtils]: 93: Hoare triple {16277#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16277#false} is VALID [2022-04-27 21:51:50,449 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 115 proven. 93 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 21:51:50,449 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:51:50,450 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [724139031] [2022-04-27 21:51:50,450 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [724139031] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:51:50,450 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019933825] [2022-04-27 21:51:50,450 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:51:50,450 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:51:50,450 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:51:50,451 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:51:50,451 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-27 21:51:50,528 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:51:50,529 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:51:50,529 INFO L263 TraceCheckSpWp]: Trace formula consists of 250 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 21:51:50,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:50,556 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:51:51,198 INFO L272 TraceCheckUtils]: 0: Hoare triple {16276#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,198 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16276#true} is VALID [2022-04-27 21:51:51,198 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,198 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16276#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,198 INFO L272 TraceCheckUtils]: 4: Hoare triple {16276#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,198 INFO L290 TraceCheckUtils]: 5: Hoare triple {16276#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16276#true} is VALID [2022-04-27 21:51:51,199 INFO L290 TraceCheckUtils]: 6: Hoare triple {16276#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16354#(<= main_~i~0 0)} is VALID [2022-04-27 21:51:51,199 INFO L290 TraceCheckUtils]: 7: Hoare triple {16354#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16354#(<= main_~i~0 0)} is VALID [2022-04-27 21:51:51,199 INFO L290 TraceCheckUtils]: 8: Hoare triple {16354#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16282#(<= main_~i~0 1)} is VALID [2022-04-27 21:51:51,200 INFO L290 TraceCheckUtils]: 9: Hoare triple {16282#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16282#(<= main_~i~0 1)} is VALID [2022-04-27 21:51:51,200 INFO L290 TraceCheckUtils]: 10: Hoare triple {16282#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16283#(<= main_~i~0 2)} is VALID [2022-04-27 21:51:51,200 INFO L290 TraceCheckUtils]: 11: Hoare triple {16283#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16283#(<= main_~i~0 2)} is VALID [2022-04-27 21:51:51,201 INFO L290 TraceCheckUtils]: 12: Hoare triple {16283#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16284#(<= main_~i~0 3)} is VALID [2022-04-27 21:51:51,201 INFO L290 TraceCheckUtils]: 13: Hoare triple {16284#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16284#(<= main_~i~0 3)} is VALID [2022-04-27 21:51:51,201 INFO L290 TraceCheckUtils]: 14: Hoare triple {16284#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16285#(<= main_~i~0 4)} is VALID [2022-04-27 21:51:51,202 INFO L290 TraceCheckUtils]: 15: Hoare triple {16285#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16285#(<= main_~i~0 4)} is VALID [2022-04-27 21:51:51,202 INFO L290 TraceCheckUtils]: 16: Hoare triple {16285#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16286#(<= main_~i~0 5)} is VALID [2022-04-27 21:51:51,202 INFO L290 TraceCheckUtils]: 17: Hoare triple {16286#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16286#(<= main_~i~0 5)} is VALID [2022-04-27 21:51:51,203 INFO L290 TraceCheckUtils]: 18: Hoare triple {16286#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16287#(<= main_~i~0 6)} is VALID [2022-04-27 21:51:51,203 INFO L290 TraceCheckUtils]: 19: Hoare triple {16287#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16287#(<= main_~i~0 6)} is VALID [2022-04-27 21:51:51,203 INFO L290 TraceCheckUtils]: 20: Hoare triple {16287#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16288#(<= main_~i~0 7)} is VALID [2022-04-27 21:51:51,204 INFO L290 TraceCheckUtils]: 21: Hoare triple {16288#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16288#(<= main_~i~0 7)} is VALID [2022-04-27 21:51:51,204 INFO L290 TraceCheckUtils]: 22: Hoare triple {16288#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16289#(<= main_~i~0 8)} is VALID [2022-04-27 21:51:51,204 INFO L290 TraceCheckUtils]: 23: Hoare triple {16289#(<= main_~i~0 8)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16290#(<= main_~n~0 8)} is VALID [2022-04-27 21:51:51,205 INFO L290 TraceCheckUtils]: 24: Hoare triple {16290#(<= main_~n~0 8)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {16409#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,205 INFO L290 TraceCheckUtils]: 25: Hoare triple {16409#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16409#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,205 INFO L272 TraceCheckUtils]: 26: Hoare triple {16409#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,205 INFO L290 TraceCheckUtils]: 27: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,205 INFO L290 TraceCheckUtils]: 28: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,205 INFO L290 TraceCheckUtils]: 29: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,206 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {16276#true} {16409#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16409#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,206 INFO L290 TraceCheckUtils]: 31: Hoare triple {16409#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16409#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,206 INFO L290 TraceCheckUtils]: 32: Hoare triple {16409#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16434#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,207 INFO L290 TraceCheckUtils]: 33: Hoare triple {16434#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16434#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,207 INFO L272 TraceCheckUtils]: 34: Hoare triple {16434#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,207 INFO L290 TraceCheckUtils]: 35: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,207 INFO L290 TraceCheckUtils]: 36: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,207 INFO L290 TraceCheckUtils]: 37: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,207 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {16276#true} {16434#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16434#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,208 INFO L290 TraceCheckUtils]: 39: Hoare triple {16434#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16434#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,208 INFO L290 TraceCheckUtils]: 40: Hoare triple {16434#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16459#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-27 21:51:51,209 INFO L290 TraceCheckUtils]: 41: Hoare triple {16459#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16459#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-27 21:51:51,209 INFO L272 TraceCheckUtils]: 42: Hoare triple {16459#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,209 INFO L290 TraceCheckUtils]: 43: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,209 INFO L290 TraceCheckUtils]: 44: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,209 INFO L290 TraceCheckUtils]: 45: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,209 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {16276#true} {16459#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16459#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-27 21:51:51,210 INFO L290 TraceCheckUtils]: 47: Hoare triple {16459#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16459#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-27 21:51:51,210 INFO L290 TraceCheckUtils]: 48: Hoare triple {16459#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16484#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-27 21:51:51,210 INFO L290 TraceCheckUtils]: 49: Hoare triple {16484#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16484#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-27 21:51:51,210 INFO L272 TraceCheckUtils]: 50: Hoare triple {16484#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,210 INFO L290 TraceCheckUtils]: 51: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,210 INFO L290 TraceCheckUtils]: 52: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,210 INFO L290 TraceCheckUtils]: 53: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,211 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {16276#true} {16484#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16484#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-27 21:51:51,211 INFO L290 TraceCheckUtils]: 55: Hoare triple {16484#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16484#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-27 21:51:51,212 INFO L290 TraceCheckUtils]: 56: Hoare triple {16484#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16509#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-27 21:51:51,212 INFO L290 TraceCheckUtils]: 57: Hoare triple {16509#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16509#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-27 21:51:51,212 INFO L272 TraceCheckUtils]: 58: Hoare triple {16509#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,212 INFO L290 TraceCheckUtils]: 59: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,212 INFO L290 TraceCheckUtils]: 60: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,212 INFO L290 TraceCheckUtils]: 61: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,213 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {16276#true} {16509#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16509#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-27 21:51:51,213 INFO L290 TraceCheckUtils]: 63: Hoare triple {16509#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16509#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-27 21:51:51,213 INFO L290 TraceCheckUtils]: 64: Hoare triple {16509#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16534#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-27 21:51:51,214 INFO L290 TraceCheckUtils]: 65: Hoare triple {16534#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16534#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-27 21:51:51,214 INFO L272 TraceCheckUtils]: 66: Hoare triple {16534#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,214 INFO L290 TraceCheckUtils]: 67: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,214 INFO L290 TraceCheckUtils]: 68: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,214 INFO L290 TraceCheckUtils]: 69: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,214 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {16276#true} {16534#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16534#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-27 21:51:51,215 INFO L290 TraceCheckUtils]: 71: Hoare triple {16534#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16534#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-27 21:51:51,215 INFO L290 TraceCheckUtils]: 72: Hoare triple {16534#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16559#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,215 INFO L290 TraceCheckUtils]: 73: Hoare triple {16559#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16559#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,215 INFO L272 TraceCheckUtils]: 74: Hoare triple {16559#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,215 INFO L290 TraceCheckUtils]: 75: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,215 INFO L290 TraceCheckUtils]: 76: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,216 INFO L290 TraceCheckUtils]: 77: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,216 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {16276#true} {16559#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16559#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,216 INFO L290 TraceCheckUtils]: 79: Hoare triple {16559#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16559#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,217 INFO L290 TraceCheckUtils]: 80: Hoare triple {16559#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16584#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,217 INFO L290 TraceCheckUtils]: 81: Hoare triple {16584#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16584#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,217 INFO L272 TraceCheckUtils]: 82: Hoare triple {16584#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,217 INFO L290 TraceCheckUtils]: 83: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,217 INFO L290 TraceCheckUtils]: 84: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,217 INFO L290 TraceCheckUtils]: 85: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,218 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {16276#true} {16584#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16584#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,218 INFO L290 TraceCheckUtils]: 87: Hoare triple {16584#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16584#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-27 21:51:51,218 INFO L290 TraceCheckUtils]: 88: Hoare triple {16584#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16609#(and (<= main_~n~0 8) (<= 8 main_~i~1))} is VALID [2022-04-27 21:51:51,219 INFO L290 TraceCheckUtils]: 89: Hoare triple {16609#(and (<= main_~n~0 8) (<= 8 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16277#false} is VALID [2022-04-27 21:51:51,219 INFO L272 TraceCheckUtils]: 90: Hoare triple {16277#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16277#false} is VALID [2022-04-27 21:51:51,219 INFO L290 TraceCheckUtils]: 91: Hoare triple {16277#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16277#false} is VALID [2022-04-27 21:51:51,219 INFO L290 TraceCheckUtils]: 92: Hoare triple {16277#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16277#false} is VALID [2022-04-27 21:51:51,219 INFO L290 TraceCheckUtils]: 93: Hoare triple {16277#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16277#false} is VALID [2022-04-27 21:51:51,219 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 144 proven. 64 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 21:51:51,219 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:51:51,587 INFO L290 TraceCheckUtils]: 93: Hoare triple {16277#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16277#false} is VALID [2022-04-27 21:51:51,587 INFO L290 TraceCheckUtils]: 92: Hoare triple {16277#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16277#false} is VALID [2022-04-27 21:51:51,587 INFO L290 TraceCheckUtils]: 91: Hoare triple {16277#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16277#false} is VALID [2022-04-27 21:51:51,587 INFO L272 TraceCheckUtils]: 90: Hoare triple {16277#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16277#false} is VALID [2022-04-27 21:51:51,599 INFO L290 TraceCheckUtils]: 89: Hoare triple {16331#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16277#false} is VALID [2022-04-27 21:51:51,600 INFO L290 TraceCheckUtils]: 88: Hoare triple {16326#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16331#(<= main_~n~0 main_~i~1)} is VALID [2022-04-27 21:51:51,600 INFO L290 TraceCheckUtils]: 87: Hoare triple {16326#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16326#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:51:51,600 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {16276#true} {16326#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16326#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:51:51,600 INFO L290 TraceCheckUtils]: 85: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,600 INFO L290 TraceCheckUtils]: 84: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,601 INFO L290 TraceCheckUtils]: 83: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,601 INFO L272 TraceCheckUtils]: 82: Hoare triple {16326#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,601 INFO L290 TraceCheckUtils]: 81: Hoare triple {16326#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16326#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:51:51,601 INFO L290 TraceCheckUtils]: 80: Hoare triple {16321#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16326#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-27 21:51:51,601 INFO L290 TraceCheckUtils]: 79: Hoare triple {16321#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16321#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:51:51,602 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {16276#true} {16321#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16321#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:51:51,602 INFO L290 TraceCheckUtils]: 77: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,602 INFO L290 TraceCheckUtils]: 76: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,602 INFO L290 TraceCheckUtils]: 75: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,602 INFO L272 TraceCheckUtils]: 74: Hoare triple {16321#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,602 INFO L290 TraceCheckUtils]: 73: Hoare triple {16321#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16321#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:51:51,603 INFO L290 TraceCheckUtils]: 72: Hoare triple {16316#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16321#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-27 21:51:51,603 INFO L290 TraceCheckUtils]: 71: Hoare triple {16316#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16316#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:51:51,603 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {16276#true} {16316#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16316#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:51:51,604 INFO L290 TraceCheckUtils]: 69: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,604 INFO L290 TraceCheckUtils]: 68: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,604 INFO L290 TraceCheckUtils]: 67: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,604 INFO L272 TraceCheckUtils]: 66: Hoare triple {16316#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,604 INFO L290 TraceCheckUtils]: 65: Hoare triple {16316#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16316#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:51:51,604 INFO L290 TraceCheckUtils]: 64: Hoare triple {16311#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16316#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-27 21:51:51,605 INFO L290 TraceCheckUtils]: 63: Hoare triple {16311#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16311#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:51:51,605 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {16276#true} {16311#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16311#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:51:51,605 INFO L290 TraceCheckUtils]: 61: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,605 INFO L290 TraceCheckUtils]: 60: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,605 INFO L290 TraceCheckUtils]: 59: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,605 INFO L272 TraceCheckUtils]: 58: Hoare triple {16311#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,606 INFO L290 TraceCheckUtils]: 57: Hoare triple {16311#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16311#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:51:51,606 INFO L290 TraceCheckUtils]: 56: Hoare triple {16306#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16311#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-27 21:51:51,606 INFO L290 TraceCheckUtils]: 55: Hoare triple {16306#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16306#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:51:51,607 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {16276#true} {16306#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16306#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:51:51,607 INFO L290 TraceCheckUtils]: 53: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,607 INFO L290 TraceCheckUtils]: 52: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,607 INFO L290 TraceCheckUtils]: 51: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,607 INFO L272 TraceCheckUtils]: 50: Hoare triple {16306#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,607 INFO L290 TraceCheckUtils]: 49: Hoare triple {16306#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16306#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:51:51,607 INFO L290 TraceCheckUtils]: 48: Hoare triple {16301#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16306#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-27 21:51:51,608 INFO L290 TraceCheckUtils]: 47: Hoare triple {16301#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16301#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:51:51,608 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {16276#true} {16301#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16301#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:51:51,608 INFO L290 TraceCheckUtils]: 45: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,608 INFO L290 TraceCheckUtils]: 44: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,608 INFO L290 TraceCheckUtils]: 43: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,608 INFO L272 TraceCheckUtils]: 42: Hoare triple {16301#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,609 INFO L290 TraceCheckUtils]: 41: Hoare triple {16301#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16301#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:51:51,609 INFO L290 TraceCheckUtils]: 40: Hoare triple {16296#(<= main_~n~0 (+ 7 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16301#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-27 21:51:51,609 INFO L290 TraceCheckUtils]: 39: Hoare triple {16296#(<= main_~n~0 (+ 7 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16296#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:51:51,610 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {16276#true} {16296#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16296#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:51:51,610 INFO L290 TraceCheckUtils]: 37: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,610 INFO L290 TraceCheckUtils]: 36: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,610 INFO L290 TraceCheckUtils]: 35: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,610 INFO L272 TraceCheckUtils]: 34: Hoare triple {16296#(<= main_~n~0 (+ 7 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,610 INFO L290 TraceCheckUtils]: 33: Hoare triple {16296#(<= main_~n~0 (+ 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16296#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:51:51,610 INFO L290 TraceCheckUtils]: 32: Hoare triple {16808#(<= main_~n~0 (+ main_~i~1 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16296#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-27 21:51:51,611 INFO L290 TraceCheckUtils]: 31: Hoare triple {16808#(<= main_~n~0 (+ main_~i~1 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16808#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-27 21:51:51,611 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {16276#true} {16808#(<= main_~n~0 (+ main_~i~1 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16808#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-27 21:51:51,611 INFO L290 TraceCheckUtils]: 29: Hoare triple {16276#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,611 INFO L290 TraceCheckUtils]: 28: Hoare triple {16276#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,611 INFO L290 TraceCheckUtils]: 27: Hoare triple {16276#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16276#true} is VALID [2022-04-27 21:51:51,611 INFO L272 TraceCheckUtils]: 26: Hoare triple {16808#(<= main_~n~0 (+ main_~i~1 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16276#true} is VALID [2022-04-27 21:51:51,612 INFO L290 TraceCheckUtils]: 25: Hoare triple {16808#(<= main_~n~0 (+ main_~i~1 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16808#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-27 21:51:51,612 INFO L290 TraceCheckUtils]: 24: Hoare triple {16290#(<= main_~n~0 8)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {16808#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-27 21:51:51,612 INFO L290 TraceCheckUtils]: 23: Hoare triple {16289#(<= main_~i~0 8)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16290#(<= main_~n~0 8)} is VALID [2022-04-27 21:51:51,613 INFO L290 TraceCheckUtils]: 22: Hoare triple {16288#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16289#(<= main_~i~0 8)} is VALID [2022-04-27 21:51:51,613 INFO L290 TraceCheckUtils]: 21: Hoare triple {16288#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16288#(<= main_~i~0 7)} is VALID [2022-04-27 21:51:51,613 INFO L290 TraceCheckUtils]: 20: Hoare triple {16287#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16288#(<= main_~i~0 7)} is VALID [2022-04-27 21:51:51,613 INFO L290 TraceCheckUtils]: 19: Hoare triple {16287#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16287#(<= main_~i~0 6)} is VALID [2022-04-27 21:51:51,614 INFO L290 TraceCheckUtils]: 18: Hoare triple {16286#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16287#(<= main_~i~0 6)} is VALID [2022-04-27 21:51:51,614 INFO L290 TraceCheckUtils]: 17: Hoare triple {16286#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16286#(<= main_~i~0 5)} is VALID [2022-04-27 21:51:51,614 INFO L290 TraceCheckUtils]: 16: Hoare triple {16285#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16286#(<= main_~i~0 5)} is VALID [2022-04-27 21:51:51,615 INFO L290 TraceCheckUtils]: 15: Hoare triple {16285#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16285#(<= main_~i~0 4)} is VALID [2022-04-27 21:51:51,615 INFO L290 TraceCheckUtils]: 14: Hoare triple {16284#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16285#(<= main_~i~0 4)} is VALID [2022-04-27 21:51:51,615 INFO L290 TraceCheckUtils]: 13: Hoare triple {16284#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16284#(<= main_~i~0 3)} is VALID [2022-04-27 21:51:51,616 INFO L290 TraceCheckUtils]: 12: Hoare triple {16283#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16284#(<= main_~i~0 3)} is VALID [2022-04-27 21:51:51,616 INFO L290 TraceCheckUtils]: 11: Hoare triple {16283#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16283#(<= main_~i~0 2)} is VALID [2022-04-27 21:51:51,616 INFO L290 TraceCheckUtils]: 10: Hoare triple {16282#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16283#(<= main_~i~0 2)} is VALID [2022-04-27 21:51:51,616 INFO L290 TraceCheckUtils]: 9: Hoare triple {16282#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16282#(<= main_~i~0 1)} is VALID [2022-04-27 21:51:51,617 INFO L290 TraceCheckUtils]: 8: Hoare triple {16354#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16282#(<= main_~i~0 1)} is VALID [2022-04-27 21:51:51,617 INFO L290 TraceCheckUtils]: 7: Hoare triple {16354#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16354#(<= main_~i~0 0)} is VALID [2022-04-27 21:51:51,617 INFO L290 TraceCheckUtils]: 6: Hoare triple {16276#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16354#(<= main_~i~0 0)} is VALID [2022-04-27 21:51:51,617 INFO L290 TraceCheckUtils]: 5: Hoare triple {16276#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16276#true} is VALID [2022-04-27 21:51:51,618 INFO L272 TraceCheckUtils]: 4: Hoare triple {16276#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,618 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16276#true} {16276#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,618 INFO L290 TraceCheckUtils]: 2: Hoare triple {16276#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {16276#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16276#true} is VALID [2022-04-27 21:51:51,618 INFO L272 TraceCheckUtils]: 0: Hoare triple {16276#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16276#true} is VALID [2022-04-27 21:51:51,618 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 144 proven. 64 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 21:51:51,618 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2019933825] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:51:51,618 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:51:51,618 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 33 [2022-04-27 21:51:51,618 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [877431278] [2022-04-27 21:51:51,618 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:51:51,619 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) Word has length 94 [2022-04-27 21:51:51,619 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:51:51,619 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 21:51:51,697 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:51:51,697 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-04-27 21:51:51,697 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:51:51,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-04-27 21:51:51,698 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=819, Unknown=0, NotChecked=0, Total=1056 [2022-04-27 21:51:51,698 INFO L87 Difference]: Start difference. First operand 97 states and 98 transitions. Second operand has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 21:51:52,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:51:52,637 INFO L93 Difference]: Finished difference Result 144 states and 154 transitions. [2022-04-27 21:51:52,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-27 21:51:52,637 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) Word has length 94 [2022-04-27 21:51:52,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:51:52,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 21:51:52,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 92 transitions. [2022-04-27 21:51:52,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 21:51:52,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 92 transitions. [2022-04-27 21:51:52,640 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 92 transitions. [2022-04-27 21:51:52,724 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 92 edges. 92 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:51:52,726 INFO L225 Difference]: With dead ends: 144 [2022-04-27 21:51:52,726 INFO L226 Difference]: Without dead ends: 100 [2022-04-27 21:51:52,726 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 194 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 689 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=534, Invalid=2118, Unknown=0, NotChecked=0, Total=2652 [2022-04-27 21:51:52,727 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 48 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 453 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 49 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 500 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 453 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 21:51:52,727 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [49 Valid, 71 Invalid, 500 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 453 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 21:51:52,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2022-04-27 21:51:52,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 99. [2022-04-27 21:51:52,762 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:51:52,762 INFO L82 GeneralOperation]: Start isEquivalent. First operand 100 states. Second operand has 99 states, 77 states have (on average 1.025974025974026) internal successors, (79), 78 states have internal predecessors, (79), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:51:52,762 INFO L74 IsIncluded]: Start isIncluded. First operand 100 states. Second operand has 99 states, 77 states have (on average 1.025974025974026) internal successors, (79), 78 states have internal predecessors, (79), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:51:52,762 INFO L87 Difference]: Start difference. First operand 100 states. Second operand has 99 states, 77 states have (on average 1.025974025974026) internal successors, (79), 78 states have internal predecessors, (79), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:51:52,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:51:52,764 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2022-04-27 21:51:52,764 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 101 transitions. [2022-04-27 21:51:52,764 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:51:52,764 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:51:52,764 INFO L74 IsIncluded]: Start isIncluded. First operand has 99 states, 77 states have (on average 1.025974025974026) internal successors, (79), 78 states have internal predecessors, (79), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) Second operand 100 states. [2022-04-27 21:51:52,764 INFO L87 Difference]: Start difference. First operand has 99 states, 77 states have (on average 1.025974025974026) internal successors, (79), 78 states have internal predecessors, (79), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) Second operand 100 states. [2022-04-27 21:51:52,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:51:52,766 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2022-04-27 21:51:52,766 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 101 transitions. [2022-04-27 21:51:52,766 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:51:52,766 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:51:52,766 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:51:52,766 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:51:52,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 77 states have (on average 1.025974025974026) internal successors, (79), 78 states have internal predecessors, (79), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:51:52,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2022-04-27 21:51:52,767 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 100 transitions. Word has length 94 [2022-04-27 21:51:52,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:51:52,768 INFO L495 AbstractCegarLoop]: Abstraction has 99 states and 100 transitions. [2022-04-27 21:51:52,768 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-27 21:51:52,768 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 100 transitions. [2022-04-27 21:51:52,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2022-04-27 21:51:52,769 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:51:52,769 INFO L195 NwaCegarLoop]: trace histogram [9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:51:52,785 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2022-04-27 21:51:52,983 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-27 21:51:52,983 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:51:52,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:51:52,984 INFO L85 PathProgramCache]: Analyzing trace with hash 1012122373, now seen corresponding path program 21 times [2022-04-27 21:51:52,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:51:52,984 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584377319] [2022-04-27 21:51:52,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:51:52,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:51:53,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,309 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:51:53,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,312 INFO L290 TraceCheckUtils]: 0: Hoare triple {17550#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17490#true} is VALID [2022-04-27 21:51:53,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {17490#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,312 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17490#true} {17490#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,312 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-27 21:51:53,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,314 INFO L290 TraceCheckUtils]: 0: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,314 INFO L290 TraceCheckUtils]: 1: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,314 INFO L290 TraceCheckUtils]: 2: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,314 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17490#true} {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:51:53,315 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-27 21:51:53,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,316 INFO L290 TraceCheckUtils]: 0: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,316 INFO L290 TraceCheckUtils]: 1: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,316 INFO L290 TraceCheckUtils]: 2: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,317 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17490#true} {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:51:53,317 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-27 21:51:53,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,319 INFO L290 TraceCheckUtils]: 0: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,319 INFO L290 TraceCheckUtils]: 1: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,319 INFO L290 TraceCheckUtils]: 2: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,319 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17490#true} {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:51:53,319 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-27 21:51:53,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,321 INFO L290 TraceCheckUtils]: 0: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,321 INFO L290 TraceCheckUtils]: 1: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,321 INFO L290 TraceCheckUtils]: 2: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17490#true} {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:51:53,322 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-04-27 21:51:53,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,323 INFO L290 TraceCheckUtils]: 0: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,323 INFO L290 TraceCheckUtils]: 1: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,323 INFO L290 TraceCheckUtils]: 2: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,332 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17490#true} {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:53,333 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-04-27 21:51:53,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,335 INFO L290 TraceCheckUtils]: 0: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,335 INFO L290 TraceCheckUtils]: 1: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,335 INFO L290 TraceCheckUtils]: 2: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,336 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17490#true} {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:51:53,336 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2022-04-27 21:51:53,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,338 INFO L290 TraceCheckUtils]: 0: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,338 INFO L290 TraceCheckUtils]: 1: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,338 INFO L290 TraceCheckUtils]: 2: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,339 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17490#true} {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:51:53,339 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 84 [2022-04-27 21:51:53,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,340 INFO L290 TraceCheckUtils]: 0: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,341 INFO L290 TraceCheckUtils]: 1: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,341 INFO L290 TraceCheckUtils]: 2: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,341 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17490#true} {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:51:53,341 INFO L272 TraceCheckUtils]: 0: Hoare triple {17490#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17550#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:51:53,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {17550#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17490#true} is VALID [2022-04-27 21:51:53,342 INFO L290 TraceCheckUtils]: 2: Hoare triple {17490#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,342 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17490#true} {17490#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,342 INFO L272 TraceCheckUtils]: 4: Hoare triple {17490#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,342 INFO L290 TraceCheckUtils]: 5: Hoare triple {17490#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {17490#true} is VALID [2022-04-27 21:51:53,342 INFO L290 TraceCheckUtils]: 6: Hoare triple {17490#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {17495#(= main_~i~0 0)} is VALID [2022-04-27 21:51:53,342 INFO L290 TraceCheckUtils]: 7: Hoare triple {17495#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17495#(= main_~i~0 0)} is VALID [2022-04-27 21:51:53,343 INFO L290 TraceCheckUtils]: 8: Hoare triple {17495#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17496#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:51:53,343 INFO L290 TraceCheckUtils]: 9: Hoare triple {17496#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17496#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:51:53,343 INFO L290 TraceCheckUtils]: 10: Hoare triple {17496#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17497#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:51:53,344 INFO L290 TraceCheckUtils]: 11: Hoare triple {17497#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17497#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:51:53,344 INFO L290 TraceCheckUtils]: 12: Hoare triple {17497#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17498#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:51:53,345 INFO L290 TraceCheckUtils]: 13: Hoare triple {17498#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17498#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:51:53,347 INFO L290 TraceCheckUtils]: 14: Hoare triple {17498#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17499#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:51:53,347 INFO L290 TraceCheckUtils]: 15: Hoare triple {17499#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17499#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:51:53,348 INFO L290 TraceCheckUtils]: 16: Hoare triple {17499#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17500#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:51:53,348 INFO L290 TraceCheckUtils]: 17: Hoare triple {17500#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17500#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:51:53,348 INFO L290 TraceCheckUtils]: 18: Hoare triple {17500#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17501#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:51:53,349 INFO L290 TraceCheckUtils]: 19: Hoare triple {17501#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17501#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:51:53,349 INFO L290 TraceCheckUtils]: 20: Hoare triple {17501#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17502#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 21:51:53,350 INFO L290 TraceCheckUtils]: 21: Hoare triple {17502#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17502#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 21:51:53,350 INFO L290 TraceCheckUtils]: 22: Hoare triple {17502#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17503#(and (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-27 21:51:53,350 INFO L290 TraceCheckUtils]: 23: Hoare triple {17503#(and (<= 8 main_~i~0) (<= main_~i~0 8))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17504#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-27 21:51:53,351 INFO L290 TraceCheckUtils]: 24: Hoare triple {17504#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17505#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 21:51:53,351 INFO L290 TraceCheckUtils]: 25: Hoare triple {17505#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {17505#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 21:51:53,352 INFO L290 TraceCheckUtils]: 26: Hoare triple {17505#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:51:53,352 INFO L290 TraceCheckUtils]: 27: Hoare triple {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:51:53,352 INFO L272 TraceCheckUtils]: 28: Hoare triple {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17490#true} is VALID [2022-04-27 21:51:53,352 INFO L290 TraceCheckUtils]: 29: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,352 INFO L290 TraceCheckUtils]: 30: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,352 INFO L290 TraceCheckUtils]: 31: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,353 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {17490#true} {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:51:53,353 INFO L290 TraceCheckUtils]: 33: Hoare triple {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:51:53,353 INFO L290 TraceCheckUtils]: 34: Hoare triple {17506#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:51:53,354 INFO L290 TraceCheckUtils]: 35: Hoare triple {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:51:53,354 INFO L272 TraceCheckUtils]: 36: Hoare triple {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17490#true} is VALID [2022-04-27 21:51:53,354 INFO L290 TraceCheckUtils]: 37: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,354 INFO L290 TraceCheckUtils]: 38: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,354 INFO L290 TraceCheckUtils]: 39: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,354 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {17490#true} {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:51:53,355 INFO L290 TraceCheckUtils]: 41: Hoare triple {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:51:53,355 INFO L290 TraceCheckUtils]: 42: Hoare triple {17511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:51:53,356 INFO L290 TraceCheckUtils]: 43: Hoare triple {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:51:53,356 INFO L272 TraceCheckUtils]: 44: Hoare triple {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17490#true} is VALID [2022-04-27 21:51:53,356 INFO L290 TraceCheckUtils]: 45: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,356 INFO L290 TraceCheckUtils]: 46: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,356 INFO L290 TraceCheckUtils]: 47: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,356 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {17490#true} {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:51:53,356 INFO L290 TraceCheckUtils]: 49: Hoare triple {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:51:53,357 INFO L290 TraceCheckUtils]: 50: Hoare triple {17516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:51:53,357 INFO L290 TraceCheckUtils]: 51: Hoare triple {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:51:53,357 INFO L272 TraceCheckUtils]: 52: Hoare triple {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17490#true} is VALID [2022-04-27 21:51:53,357 INFO L290 TraceCheckUtils]: 53: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,357 INFO L290 TraceCheckUtils]: 54: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,358 INFO L290 TraceCheckUtils]: 55: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,358 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {17490#true} {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:51:53,358 INFO L290 TraceCheckUtils]: 57: Hoare triple {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:51:53,359 INFO L290 TraceCheckUtils]: 58: Hoare triple {17521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:53,359 INFO L290 TraceCheckUtils]: 59: Hoare triple {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:53,359 INFO L272 TraceCheckUtils]: 60: Hoare triple {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17490#true} is VALID [2022-04-27 21:51:53,359 INFO L290 TraceCheckUtils]: 61: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,359 INFO L290 TraceCheckUtils]: 62: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,359 INFO L290 TraceCheckUtils]: 63: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,360 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {17490#true} {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:53,360 INFO L290 TraceCheckUtils]: 65: Hoare triple {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:53,360 INFO L290 TraceCheckUtils]: 66: Hoare triple {17526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:51:53,361 INFO L290 TraceCheckUtils]: 67: Hoare triple {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:51:53,361 INFO L272 TraceCheckUtils]: 68: Hoare triple {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17490#true} is VALID [2022-04-27 21:51:53,361 INFO L290 TraceCheckUtils]: 69: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,361 INFO L290 TraceCheckUtils]: 70: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,361 INFO L290 TraceCheckUtils]: 71: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,361 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {17490#true} {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:51:53,362 INFO L290 TraceCheckUtils]: 73: Hoare triple {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:51:53,362 INFO L290 TraceCheckUtils]: 74: Hoare triple {17531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:51:53,362 INFO L290 TraceCheckUtils]: 75: Hoare triple {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:51:53,362 INFO L272 TraceCheckUtils]: 76: Hoare triple {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17490#true} is VALID [2022-04-27 21:51:53,362 INFO L290 TraceCheckUtils]: 77: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,363 INFO L290 TraceCheckUtils]: 78: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,363 INFO L290 TraceCheckUtils]: 79: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,363 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {17490#true} {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:51:53,363 INFO L290 TraceCheckUtils]: 81: Hoare triple {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:51:53,364 INFO L290 TraceCheckUtils]: 82: Hoare triple {17536#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:51:53,364 INFO L290 TraceCheckUtils]: 83: Hoare triple {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:51:53,364 INFO L272 TraceCheckUtils]: 84: Hoare triple {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17490#true} is VALID [2022-04-27 21:51:53,364 INFO L290 TraceCheckUtils]: 85: Hoare triple {17490#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17490#true} is VALID [2022-04-27 21:51:53,364 INFO L290 TraceCheckUtils]: 86: Hoare triple {17490#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,364 INFO L290 TraceCheckUtils]: 87: Hoare triple {17490#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:53,365 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {17490#true} {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:51:53,365 INFO L290 TraceCheckUtils]: 89: Hoare triple {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:51:53,365 INFO L290 TraceCheckUtils]: 90: Hoare triple {17541#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:51:53,366 INFO L290 TraceCheckUtils]: 91: Hoare triple {17546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17547#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:51:53,366 INFO L272 TraceCheckUtils]: 92: Hoare triple {17547#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17548#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:51:53,366 INFO L290 TraceCheckUtils]: 93: Hoare triple {17548#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17549#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:51:53,367 INFO L290 TraceCheckUtils]: 94: Hoare triple {17549#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {17491#false} is VALID [2022-04-27 21:51:53,367 INFO L290 TraceCheckUtils]: 95: Hoare triple {17491#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17491#false} is VALID [2022-04-27 21:51:53,367 INFO L134 CoverageAnalysis]: Checked inductivity of 337 backedges. 16 proven. 209 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 21:51:53,367 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:51:53,367 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [584377319] [2022-04-27 21:51:53,367 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [584377319] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:51:53,367 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [217881279] [2022-04-27 21:51:53,367 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:51:53,367 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:51:53,368 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:51:53,368 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:51:53,370 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-27 21:51:53,491 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2022-04-27 21:51:53,491 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:51:53,493 INFO L263 TraceCheckSpWp]: Trace formula consists of 257 conjuncts, 30 conjunts are in the unsatisfiable core [2022-04-27 21:51:53,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:51:53,512 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:51:53,780 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:51:59,805 INFO L356 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2022-04-27 21:51:59,805 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2022-04-27 21:51:59,893 INFO L272 TraceCheckUtils]: 0: Hoare triple {17490#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:59,893 INFO L290 TraceCheckUtils]: 1: Hoare triple {17490#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17490#true} is VALID [2022-04-27 21:51:59,893 INFO L290 TraceCheckUtils]: 2: Hoare triple {17490#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:59,893 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17490#true} {17490#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:59,893 INFO L272 TraceCheckUtils]: 4: Hoare triple {17490#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17490#true} is VALID [2022-04-27 21:51:59,894 INFO L290 TraceCheckUtils]: 5: Hoare triple {17490#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {17490#true} is VALID [2022-04-27 21:51:59,894 INFO L290 TraceCheckUtils]: 6: Hoare triple {17490#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {17572#(<= main_~i~0 0)} is VALID [2022-04-27 21:51:59,894 INFO L290 TraceCheckUtils]: 7: Hoare triple {17572#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17572#(<= main_~i~0 0)} is VALID [2022-04-27 21:51:59,895 INFO L290 TraceCheckUtils]: 8: Hoare triple {17572#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17579#(<= main_~i~0 1)} is VALID [2022-04-27 21:51:59,895 INFO L290 TraceCheckUtils]: 9: Hoare triple {17579#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17579#(<= main_~i~0 1)} is VALID [2022-04-27 21:51:59,895 INFO L290 TraceCheckUtils]: 10: Hoare triple {17579#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17586#(<= main_~i~0 2)} is VALID [2022-04-27 21:51:59,895 INFO L290 TraceCheckUtils]: 11: Hoare triple {17586#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17586#(<= main_~i~0 2)} is VALID [2022-04-27 21:51:59,896 INFO L290 TraceCheckUtils]: 12: Hoare triple {17586#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17593#(<= main_~i~0 3)} is VALID [2022-04-27 21:51:59,896 INFO L290 TraceCheckUtils]: 13: Hoare triple {17593#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17593#(<= main_~i~0 3)} is VALID [2022-04-27 21:51:59,896 INFO L290 TraceCheckUtils]: 14: Hoare triple {17593#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17600#(<= main_~i~0 4)} is VALID [2022-04-27 21:51:59,897 INFO L290 TraceCheckUtils]: 15: Hoare triple {17600#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17600#(<= main_~i~0 4)} is VALID [2022-04-27 21:51:59,897 INFO L290 TraceCheckUtils]: 16: Hoare triple {17600#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17607#(<= main_~i~0 5)} is VALID [2022-04-27 21:51:59,897 INFO L290 TraceCheckUtils]: 17: Hoare triple {17607#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17607#(<= main_~i~0 5)} is VALID [2022-04-27 21:51:59,898 INFO L290 TraceCheckUtils]: 18: Hoare triple {17607#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17614#(<= main_~i~0 6)} is VALID [2022-04-27 21:51:59,898 INFO L290 TraceCheckUtils]: 19: Hoare triple {17614#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17614#(<= main_~i~0 6)} is VALID [2022-04-27 21:51:59,898 INFO L290 TraceCheckUtils]: 20: Hoare triple {17614#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17621#(<= main_~i~0 7)} is VALID [2022-04-27 21:51:59,898 INFO L290 TraceCheckUtils]: 21: Hoare triple {17621#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17621#(<= main_~i~0 7)} is VALID [2022-04-27 21:51:59,899 INFO L290 TraceCheckUtils]: 22: Hoare triple {17621#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17628#(<= main_~i~0 8)} is VALID [2022-04-27 21:51:59,899 INFO L290 TraceCheckUtils]: 23: Hoare triple {17628#(<= main_~i~0 8)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17632#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 8))} is VALID [2022-04-27 21:51:59,901 INFO L290 TraceCheckUtils]: 24: Hoare triple {17632#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 8))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {17636#(exists ((v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (<= main_~i~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0)))} is VALID [2022-04-27 21:51:59,901 INFO L290 TraceCheckUtils]: 25: Hoare triple {17636#(exists ((v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (<= main_~i~0 (+ v_main_~i~0_228 1)) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {17640#(exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0)))} is VALID [2022-04-27 21:51:59,902 INFO L290 TraceCheckUtils]: 26: Hoare triple {17640#(exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {17644#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,903 INFO L290 TraceCheckUtils]: 27: Hoare triple {17644#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17644#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,907 INFO L272 TraceCheckUtils]: 28: Hoare triple {17644#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,907 INFO L290 TraceCheckUtils]: 29: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,908 INFO L290 TraceCheckUtils]: 30: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,908 INFO L290 TraceCheckUtils]: 31: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,909 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} {17644#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17644#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,909 INFO L290 TraceCheckUtils]: 33: Hoare triple {17644#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17644#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,910 INFO L290 TraceCheckUtils]: 34: Hoare triple {17644#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17670#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,910 INFO L290 TraceCheckUtils]: 35: Hoare triple {17670#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17670#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,922 INFO L272 TraceCheckUtils]: 36: Hoare triple {17670#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,922 INFO L290 TraceCheckUtils]: 37: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,923 INFO L290 TraceCheckUtils]: 38: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,923 INFO L290 TraceCheckUtils]: 39: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,923 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} {17670#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17670#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,924 INFO L290 TraceCheckUtils]: 41: Hoare triple {17670#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17670#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,925 INFO L290 TraceCheckUtils]: 42: Hoare triple {17670#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17695#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 2 main_~i~1))} is VALID [2022-04-27 21:51:59,925 INFO L290 TraceCheckUtils]: 43: Hoare triple {17695#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17695#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 2 main_~i~1))} is VALID [2022-04-27 21:51:59,928 INFO L272 TraceCheckUtils]: 44: Hoare triple {17695#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,929 INFO L290 TraceCheckUtils]: 45: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,929 INFO L290 TraceCheckUtils]: 46: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,929 INFO L290 TraceCheckUtils]: 47: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,930 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} {17695#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17695#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 2 main_~i~1))} is VALID [2022-04-27 21:51:59,930 INFO L290 TraceCheckUtils]: 49: Hoare triple {17695#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17695#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 2 main_~i~1))} is VALID [2022-04-27 21:51:59,931 INFO L290 TraceCheckUtils]: 50: Hoare triple {17695#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17720#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 3 main_~i~1))} is VALID [2022-04-27 21:51:59,931 INFO L290 TraceCheckUtils]: 51: Hoare triple {17720#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17720#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 3 main_~i~1))} is VALID [2022-04-27 21:51:59,938 INFO L272 TraceCheckUtils]: 52: Hoare triple {17720#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,939 INFO L290 TraceCheckUtils]: 53: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,939 INFO L290 TraceCheckUtils]: 54: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,939 INFO L290 TraceCheckUtils]: 55: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,940 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} {17720#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17720#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 3 main_~i~1))} is VALID [2022-04-27 21:51:59,940 INFO L290 TraceCheckUtils]: 57: Hoare triple {17720#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17720#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 3 main_~i~1))} is VALID [2022-04-27 21:51:59,941 INFO L290 TraceCheckUtils]: 58: Hoare triple {17720#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17745#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 4 main_~i~1))} is VALID [2022-04-27 21:51:59,941 INFO L290 TraceCheckUtils]: 59: Hoare triple {17745#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17745#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 4 main_~i~1))} is VALID [2022-04-27 21:51:59,945 INFO L272 TraceCheckUtils]: 60: Hoare triple {17745#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,945 INFO L290 TraceCheckUtils]: 61: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,945 INFO L290 TraceCheckUtils]: 62: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,945 INFO L290 TraceCheckUtils]: 63: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,946 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} {17745#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17745#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 4 main_~i~1))} is VALID [2022-04-27 21:51:59,946 INFO L290 TraceCheckUtils]: 65: Hoare triple {17745#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17745#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 4 main_~i~1))} is VALID [2022-04-27 21:51:59,947 INFO L290 TraceCheckUtils]: 66: Hoare triple {17745#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17770#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 5 main_~i~1))} is VALID [2022-04-27 21:51:59,948 INFO L290 TraceCheckUtils]: 67: Hoare triple {17770#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17770#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 5 main_~i~1))} is VALID [2022-04-27 21:51:59,951 INFO L272 TraceCheckUtils]: 68: Hoare triple {17770#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,951 INFO L290 TraceCheckUtils]: 69: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,951 INFO L290 TraceCheckUtils]: 70: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,952 INFO L290 TraceCheckUtils]: 71: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,952 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} {17770#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17770#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 5 main_~i~1))} is VALID [2022-04-27 21:51:59,953 INFO L290 TraceCheckUtils]: 73: Hoare triple {17770#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17770#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 5 main_~i~1))} is VALID [2022-04-27 21:51:59,953 INFO L290 TraceCheckUtils]: 74: Hoare triple {17770#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17795#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,954 INFO L290 TraceCheckUtils]: 75: Hoare triple {17795#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17795#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,956 INFO L272 TraceCheckUtils]: 76: Hoare triple {17795#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,957 INFO L290 TraceCheckUtils]: 77: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,957 INFO L290 TraceCheckUtils]: 78: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,957 INFO L290 TraceCheckUtils]: 79: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,958 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} {17795#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17795#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,958 INFO L290 TraceCheckUtils]: 81: Hoare triple {17795#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17795#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,959 INFO L290 TraceCheckUtils]: 82: Hoare triple {17795#(and (<= 6 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17820#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,959 INFO L290 TraceCheckUtils]: 83: Hoare triple {17820#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17820#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,962 INFO L272 TraceCheckUtils]: 84: Hoare triple {17820#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,962 INFO L290 TraceCheckUtils]: 85: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,962 INFO L290 TraceCheckUtils]: 86: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,963 INFO L290 TraceCheckUtils]: 87: Hoare triple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} is VALID [2022-04-27 21:51:59,963 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {17651#(exists ((v_main_~x~0.base_BEFORE_CALL_95 Int) (v_main_~x~0.offset_BEFORE_CALL_95 Int) (v_main_~i~0_228 Int)) (and (<= v_main_~i~0_228 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_95) (+ (* 4 v_main_~i~0_228) v_main_~x~0.offset_BEFORE_CALL_95)) 0)))} {17820#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17820#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,964 INFO L290 TraceCheckUtils]: 89: Hoare triple {17820#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17820#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} is VALID [2022-04-27 21:51:59,964 INFO L290 TraceCheckUtils]: 90: Hoare triple {17820#(and (<= 7 main_~i~1) (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17845#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 8 main_~i~1))} is VALID [2022-04-27 21:51:59,965 INFO L290 TraceCheckUtils]: 91: Hoare triple {17845#(and (exists ((v_main_~i~0_228 Int)) (and (<= main_~n~0 (+ v_main_~i~0_228 1)) (<= v_main_~i~0_228 8) (= (select (select |#memory_int| main_~x~0.base) (+ (* 4 v_main_~i~0_228) main_~x~0.offset)) 0))) (<= 8 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17547#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:51:59,965 INFO L272 TraceCheckUtils]: 92: Hoare triple {17547#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17852#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:51:59,965 INFO L290 TraceCheckUtils]: 93: Hoare triple {17852#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17856#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:51:59,966 INFO L290 TraceCheckUtils]: 94: Hoare triple {17856#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {17491#false} is VALID [2022-04-27 21:51:59,966 INFO L290 TraceCheckUtils]: 95: Hoare triple {17491#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17491#false} is VALID [2022-04-27 21:51:59,966 INFO L134 CoverageAnalysis]: Checked inductivity of 337 backedges. 120 proven. 105 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 21:51:59,966 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:52:00,243 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [217881279] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:52:00,243 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-27 21:52:00,243 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 27] total 50 [2022-04-27 21:52:00,243 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [163609089] [2022-04-27 21:52:00,243 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-27 21:52:00,244 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 2.183673469387755) internal successors, (107), 47 states have internal predecessors, (107), 18 states have call successors, (21), 5 states have call predecessors, (21), 2 states have return successors, (17), 17 states have call predecessors, (17), 17 states have call successors, (17) Word has length 96 [2022-04-27 21:52:00,244 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:52:00,244 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 50 states, 49 states have (on average 2.183673469387755) internal successors, (107), 47 states have internal predecessors, (107), 18 states have call successors, (21), 5 states have call predecessors, (21), 2 states have return successors, (17), 17 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-27 21:52:00,618 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 145 edges. 145 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:52:00,618 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-04-27 21:52:00,618 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:52:00,618 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-04-27 21:52:00,619 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=264, Invalid=2388, Unknown=0, NotChecked=0, Total=2652 [2022-04-27 21:52:00,619 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. Second operand has 50 states, 49 states have (on average 2.183673469387755) internal successors, (107), 47 states have internal predecessors, (107), 18 states have call successors, (21), 5 states have call predecessors, (21), 2 states have return successors, (17), 17 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-27 21:52:12,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:52:12,652 INFO L93 Difference]: Finished difference Result 177 states and 179 transitions. [2022-04-27 21:52:12,652 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2022-04-27 21:52:12,652 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 2.183673469387755) internal successors, (107), 47 states have internal predecessors, (107), 18 states have call successors, (21), 5 states have call predecessors, (21), 2 states have return successors, (17), 17 states have call predecessors, (17), 17 states have call successors, (17) Word has length 96 [2022-04-27 21:52:12,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:52:12,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 2.183673469387755) internal successors, (107), 47 states have internal predecessors, (107), 18 states have call successors, (21), 5 states have call predecessors, (21), 2 states have return successors, (17), 17 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-27 21:52:12,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 99 transitions. [2022-04-27 21:52:12,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 2.183673469387755) internal successors, (107), 47 states have internal predecessors, (107), 18 states have call successors, (21), 5 states have call predecessors, (21), 2 states have return successors, (17), 17 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-27 21:52:12,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 99 transitions. [2022-04-27 21:52:12,655 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 41 states and 99 transitions. [2022-04-27 21:52:28,840 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 99 edges. 91 inductive. 0 not inductive. 8 times theorem prover too weak to decide inductivity. [2022-04-27 21:52:28,841 INFO L225 Difference]: With dead ends: 177 [2022-04-27 21:52:28,841 INFO L226 Difference]: Without dead ends: 101 [2022-04-27 21:52:28,843 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 95 SyntacticMatches, 16 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1641 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=616, Invalid=6694, Unknown=0, NotChecked=0, Total=7310 [2022-04-27 21:52:28,843 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 34 mSDsluCounter, 383 mSDsCounter, 0 mSdLazyCounter, 291 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 422 SdHoareTripleChecker+Invalid, 667 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 291 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 360 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:52:28,843 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [34 Valid, 422 Invalid, 667 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 291 Invalid, 0 Unknown, 360 Unchecked, 0.2s Time] [2022-04-27 21:52:28,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2022-04-27 21:52:28,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2022-04-27 21:52:28,890 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:52:28,890 INFO L82 GeneralOperation]: Start isEquivalent. First operand 101 states. Second operand has 101 states, 79 states have (on average 1.0253164556962024) internal successors, (81), 80 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:52:28,890 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand has 101 states, 79 states have (on average 1.0253164556962024) internal successors, (81), 80 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:52:28,890 INFO L87 Difference]: Start difference. First operand 101 states. Second operand has 101 states, 79 states have (on average 1.0253164556962024) internal successors, (81), 80 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:52:28,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:52:28,892 INFO L93 Difference]: Finished difference Result 101 states and 102 transitions. [2022-04-27 21:52:28,892 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 102 transitions. [2022-04-27 21:52:28,892 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:52:28,892 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:52:28,892 INFO L74 IsIncluded]: Start isIncluded. First operand has 101 states, 79 states have (on average 1.0253164556962024) internal successors, (81), 80 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) Second operand 101 states. [2022-04-27 21:52:28,892 INFO L87 Difference]: Start difference. First operand has 101 states, 79 states have (on average 1.0253164556962024) internal successors, (81), 80 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) Second operand 101 states. [2022-04-27 21:52:28,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:52:28,894 INFO L93 Difference]: Finished difference Result 101 states and 102 transitions. [2022-04-27 21:52:28,894 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 102 transitions. [2022-04-27 21:52:28,894 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:52:28,894 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:52:28,894 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:52:28,894 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:52:28,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 79 states have (on average 1.0253164556962024) internal successors, (81), 80 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 21:52:28,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 102 transitions. [2022-04-27 21:52:28,895 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 102 transitions. Word has length 96 [2022-04-27 21:52:28,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:52:28,895 INFO L495 AbstractCegarLoop]: Abstraction has 101 states and 102 transitions. [2022-04-27 21:52:28,896 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 49 states have (on average 2.183673469387755) internal successors, (107), 47 states have internal predecessors, (107), 18 states have call successors, (21), 5 states have call predecessors, (21), 2 states have return successors, (17), 17 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-27 21:52:28,896 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 102 transitions. [2022-04-27 21:52:28,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2022-04-27 21:52:28,896 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:52:28,896 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:52:28,914 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-27 21:52:29,103 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:52:29,104 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:52:29,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:52:29,104 INFO L85 PathProgramCache]: Analyzing trace with hash 406127555, now seen corresponding path program 22 times [2022-04-27 21:52:29,104 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:52:29,104 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769829484] [2022-04-27 21:52:29,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:52:29,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:52:29,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,477 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:52:29,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,479 INFO L290 TraceCheckUtils]: 0: Hoare triple {18624#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18563#true} is VALID [2022-04-27 21:52:29,480 INFO L290 TraceCheckUtils]: 1: Hoare triple {18563#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,480 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18563#true} {18563#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,480 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-27 21:52:29,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,482 INFO L290 TraceCheckUtils]: 0: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,482 INFO L290 TraceCheckUtils]: 1: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,482 INFO L290 TraceCheckUtils]: 2: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,483 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18563#true} {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:52:29,483 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-27 21:52:29,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,484 INFO L290 TraceCheckUtils]: 0: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,485 INFO L290 TraceCheckUtils]: 1: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,485 INFO L290 TraceCheckUtils]: 2: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,485 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18563#true} {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:52:29,485 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-27 21:52:29,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,487 INFO L290 TraceCheckUtils]: 0: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,487 INFO L290 TraceCheckUtils]: 1: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,487 INFO L290 TraceCheckUtils]: 2: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,488 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18563#true} {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:52:29,488 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-27 21:52:29,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,490 INFO L290 TraceCheckUtils]: 0: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,490 INFO L290 TraceCheckUtils]: 1: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,490 INFO L290 TraceCheckUtils]: 2: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,490 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18563#true} {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:52:29,490 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-04-27 21:52:29,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,493 INFO L290 TraceCheckUtils]: 0: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,493 INFO L290 TraceCheckUtils]: 1: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,493 INFO L290 TraceCheckUtils]: 2: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,493 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18563#true} {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:52:29,493 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2022-04-27 21:52:29,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,495 INFO L290 TraceCheckUtils]: 0: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,495 INFO L290 TraceCheckUtils]: 1: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,495 INFO L290 TraceCheckUtils]: 2: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,496 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18563#true} {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:52:29,496 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2022-04-27 21:52:29,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,498 INFO L290 TraceCheckUtils]: 0: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,498 INFO L290 TraceCheckUtils]: 1: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,498 INFO L290 TraceCheckUtils]: 2: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,499 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18563#true} {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:52:29,499 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-04-27 21:52:29,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,501 INFO L290 TraceCheckUtils]: 0: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,501 INFO L290 TraceCheckUtils]: 1: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,501 INFO L290 TraceCheckUtils]: 2: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,501 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18563#true} {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:52:29,502 INFO L272 TraceCheckUtils]: 0: Hoare triple {18563#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18624#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:52:29,502 INFO L290 TraceCheckUtils]: 1: Hoare triple {18624#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18563#true} is VALID [2022-04-27 21:52:29,502 INFO L290 TraceCheckUtils]: 2: Hoare triple {18563#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,502 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18563#true} {18563#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,502 INFO L272 TraceCheckUtils]: 4: Hoare triple {18563#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,502 INFO L290 TraceCheckUtils]: 5: Hoare triple {18563#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {18563#true} is VALID [2022-04-27 21:52:29,503 INFO L290 TraceCheckUtils]: 6: Hoare triple {18563#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {18568#(= main_~i~0 0)} is VALID [2022-04-27 21:52:29,503 INFO L290 TraceCheckUtils]: 7: Hoare triple {18568#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18568#(= main_~i~0 0)} is VALID [2022-04-27 21:52:29,503 INFO L290 TraceCheckUtils]: 8: Hoare triple {18568#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18569#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:52:29,504 INFO L290 TraceCheckUtils]: 9: Hoare triple {18569#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18569#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-27 21:52:29,504 INFO L290 TraceCheckUtils]: 10: Hoare triple {18569#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18570#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:52:29,505 INFO L290 TraceCheckUtils]: 11: Hoare triple {18570#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18570#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-27 21:52:29,505 INFO L290 TraceCheckUtils]: 12: Hoare triple {18570#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18571#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:52:29,506 INFO L290 TraceCheckUtils]: 13: Hoare triple {18571#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18571#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-27 21:52:29,506 INFO L290 TraceCheckUtils]: 14: Hoare triple {18571#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18572#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:52:29,506 INFO L290 TraceCheckUtils]: 15: Hoare triple {18572#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18572#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-27 21:52:29,507 INFO L290 TraceCheckUtils]: 16: Hoare triple {18572#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18573#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:52:29,507 INFO L290 TraceCheckUtils]: 17: Hoare triple {18573#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18573#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-27 21:52:29,508 INFO L290 TraceCheckUtils]: 18: Hoare triple {18573#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18574#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:52:29,508 INFO L290 TraceCheckUtils]: 19: Hoare triple {18574#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18574#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-27 21:52:29,509 INFO L290 TraceCheckUtils]: 20: Hoare triple {18574#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18575#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 21:52:29,509 INFO L290 TraceCheckUtils]: 21: Hoare triple {18575#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18575#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-27 21:52:29,509 INFO L290 TraceCheckUtils]: 22: Hoare triple {18575#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18576#(and (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-27 21:52:29,510 INFO L290 TraceCheckUtils]: 23: Hoare triple {18576#(and (<= 8 main_~i~0) (<= main_~i~0 8))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18577#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-27 21:52:29,521 INFO L290 TraceCheckUtils]: 24: Hoare triple {18577#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18578#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 32))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-27 21:52:29,521 INFO L290 TraceCheckUtils]: 25: Hoare triple {18578#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 32))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18579#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 21:52:29,522 INFO L290 TraceCheckUtils]: 26: Hoare triple {18579#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18579#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 21:52:29,522 INFO L290 TraceCheckUtils]: 27: Hoare triple {18579#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {18579#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-27 21:52:29,522 INFO L290 TraceCheckUtils]: 28: Hoare triple {18579#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:52:29,523 INFO L290 TraceCheckUtils]: 29: Hoare triple {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:52:29,523 INFO L272 TraceCheckUtils]: 30: Hoare triple {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18563#true} is VALID [2022-04-27 21:52:29,523 INFO L290 TraceCheckUtils]: 31: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,523 INFO L290 TraceCheckUtils]: 32: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,523 INFO L290 TraceCheckUtils]: 33: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,524 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {18563#true} {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:52:29,524 INFO L290 TraceCheckUtils]: 35: Hoare triple {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-27 21:52:29,524 INFO L290 TraceCheckUtils]: 36: Hoare triple {18580#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:52:29,525 INFO L290 TraceCheckUtils]: 37: Hoare triple {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:52:29,525 INFO L272 TraceCheckUtils]: 38: Hoare triple {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18563#true} is VALID [2022-04-27 21:52:29,525 INFO L290 TraceCheckUtils]: 39: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,525 INFO L290 TraceCheckUtils]: 40: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,525 INFO L290 TraceCheckUtils]: 41: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,525 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {18563#true} {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:52:29,526 INFO L290 TraceCheckUtils]: 43: Hoare triple {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-27 21:52:29,526 INFO L290 TraceCheckUtils]: 44: Hoare triple {18585#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:52:29,527 INFO L290 TraceCheckUtils]: 45: Hoare triple {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:52:29,527 INFO L272 TraceCheckUtils]: 46: Hoare triple {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18563#true} is VALID [2022-04-27 21:52:29,527 INFO L290 TraceCheckUtils]: 47: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,527 INFO L290 TraceCheckUtils]: 48: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,527 INFO L290 TraceCheckUtils]: 49: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,527 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {18563#true} {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:52:29,528 INFO L290 TraceCheckUtils]: 51: Hoare triple {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-27 21:52:29,528 INFO L290 TraceCheckUtils]: 52: Hoare triple {18590#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:52:29,528 INFO L290 TraceCheckUtils]: 53: Hoare triple {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:52:29,529 INFO L272 TraceCheckUtils]: 54: Hoare triple {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18563#true} is VALID [2022-04-27 21:52:29,529 INFO L290 TraceCheckUtils]: 55: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,529 INFO L290 TraceCheckUtils]: 56: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,529 INFO L290 TraceCheckUtils]: 57: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,529 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {18563#true} {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:52:29,530 INFO L290 TraceCheckUtils]: 59: Hoare triple {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-27 21:52:29,530 INFO L290 TraceCheckUtils]: 60: Hoare triple {18595#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:52:29,530 INFO L290 TraceCheckUtils]: 61: Hoare triple {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:52:29,530 INFO L272 TraceCheckUtils]: 62: Hoare triple {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18563#true} is VALID [2022-04-27 21:52:29,530 INFO L290 TraceCheckUtils]: 63: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,531 INFO L290 TraceCheckUtils]: 64: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,531 INFO L290 TraceCheckUtils]: 65: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,531 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {18563#true} {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:52:29,531 INFO L290 TraceCheckUtils]: 67: Hoare triple {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:52:29,532 INFO L290 TraceCheckUtils]: 68: Hoare triple {18600#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:52:29,532 INFO L290 TraceCheckUtils]: 69: Hoare triple {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:52:29,532 INFO L272 TraceCheckUtils]: 70: Hoare triple {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18563#true} is VALID [2022-04-27 21:52:29,532 INFO L290 TraceCheckUtils]: 71: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,532 INFO L290 TraceCheckUtils]: 72: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,532 INFO L290 TraceCheckUtils]: 73: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,533 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {18563#true} {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:52:29,533 INFO L290 TraceCheckUtils]: 75: Hoare triple {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-27 21:52:29,534 INFO L290 TraceCheckUtils]: 76: Hoare triple {18605#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:52:29,534 INFO L290 TraceCheckUtils]: 77: Hoare triple {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:52:29,534 INFO L272 TraceCheckUtils]: 78: Hoare triple {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18563#true} is VALID [2022-04-27 21:52:29,534 INFO L290 TraceCheckUtils]: 79: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,534 INFO L290 TraceCheckUtils]: 80: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,534 INFO L290 TraceCheckUtils]: 81: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,535 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {18563#true} {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:52:29,535 INFO L290 TraceCheckUtils]: 83: Hoare triple {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-27 21:52:29,536 INFO L290 TraceCheckUtils]: 84: Hoare triple {18610#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:52:29,536 INFO L290 TraceCheckUtils]: 85: Hoare triple {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:52:29,536 INFO L272 TraceCheckUtils]: 86: Hoare triple {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18563#true} is VALID [2022-04-27 21:52:29,536 INFO L290 TraceCheckUtils]: 87: Hoare triple {18563#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18563#true} is VALID [2022-04-27 21:52:29,536 INFO L290 TraceCheckUtils]: 88: Hoare triple {18563#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,536 INFO L290 TraceCheckUtils]: 89: Hoare triple {18563#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:52:29,537 INFO L284 TraceCheckUtils]: 90: Hoare quadruple {18563#true} {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:52:29,537 INFO L290 TraceCheckUtils]: 91: Hoare triple {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-27 21:52:29,538 INFO L290 TraceCheckUtils]: 92: Hoare triple {18615#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18620#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-27 21:52:29,538 INFO L290 TraceCheckUtils]: 93: Hoare triple {18620#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18621#(= |main_#t~mem5| 0)} is VALID [2022-04-27 21:52:29,538 INFO L272 TraceCheckUtils]: 94: Hoare triple {18621#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18622#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:52:29,539 INFO L290 TraceCheckUtils]: 95: Hoare triple {18622#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18623#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:52:29,539 INFO L290 TraceCheckUtils]: 96: Hoare triple {18623#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18564#false} is VALID [2022-04-27 21:52:29,539 INFO L290 TraceCheckUtils]: 97: Hoare triple {18564#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18564#false} is VALID [2022-04-27 21:52:29,539 INFO L134 CoverageAnalysis]: Checked inductivity of 356 backedges. 16 proven. 228 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-27 21:52:29,539 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:52:29,540 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769829484] [2022-04-27 21:52:29,540 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [769829484] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:52:29,540 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2040853218] [2022-04-27 21:52:29,540 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:52:29,540 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:52:29,540 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:52:29,541 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:52:29,543 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-27 21:52:29,729 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:52:29,729 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:52:29,731 INFO L263 TraceCheckSpWp]: Trace formula consists of 264 conjuncts, 50 conjunts are in the unsatisfiable core [2022-04-27 21:52:29,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:52:29,748 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:52:30,004 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-27 21:52:30,160 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-27 21:52:30,160 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-27 21:55:42,739 INFO L356 Elim1Store]: treesize reduction 174, result has 1.7 percent of original size [2022-04-27 21:55:42,740 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 54 treesize of output 19 [2022-04-27 21:55:42,883 INFO L272 TraceCheckUtils]: 0: Hoare triple {18563#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:55:42,883 INFO L290 TraceCheckUtils]: 1: Hoare triple {18563#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18563#true} is VALID [2022-04-27 21:55:42,883 INFO L290 TraceCheckUtils]: 2: Hoare triple {18563#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:55:42,883 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18563#true} {18563#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:55:42,883 INFO L272 TraceCheckUtils]: 4: Hoare triple {18563#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18563#true} is VALID [2022-04-27 21:55:42,883 INFO L290 TraceCheckUtils]: 5: Hoare triple {18563#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {18563#true} is VALID [2022-04-27 21:55:42,884 INFO L290 TraceCheckUtils]: 6: Hoare triple {18563#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {18646#(<= main_~i~0 0)} is VALID [2022-04-27 21:55:42,884 INFO L290 TraceCheckUtils]: 7: Hoare triple {18646#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18646#(<= main_~i~0 0)} is VALID [2022-04-27 21:55:42,884 INFO L290 TraceCheckUtils]: 8: Hoare triple {18646#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18653#(<= main_~i~0 1)} is VALID [2022-04-27 21:55:42,884 INFO L290 TraceCheckUtils]: 9: Hoare triple {18653#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18653#(<= main_~i~0 1)} is VALID [2022-04-27 21:55:42,885 INFO L290 TraceCheckUtils]: 10: Hoare triple {18653#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18660#(<= main_~i~0 2)} is VALID [2022-04-27 21:55:42,885 INFO L290 TraceCheckUtils]: 11: Hoare triple {18660#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18660#(<= main_~i~0 2)} is VALID [2022-04-27 21:55:42,885 INFO L290 TraceCheckUtils]: 12: Hoare triple {18660#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18667#(<= main_~i~0 3)} is VALID [2022-04-27 21:55:42,886 INFO L290 TraceCheckUtils]: 13: Hoare triple {18667#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18667#(<= main_~i~0 3)} is VALID [2022-04-27 21:55:42,886 INFO L290 TraceCheckUtils]: 14: Hoare triple {18667#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18674#(<= main_~i~0 4)} is VALID [2022-04-27 21:55:42,886 INFO L290 TraceCheckUtils]: 15: Hoare triple {18674#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18674#(<= main_~i~0 4)} is VALID [2022-04-27 21:55:42,887 INFO L290 TraceCheckUtils]: 16: Hoare triple {18674#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18681#(<= main_~i~0 5)} is VALID [2022-04-27 21:55:42,887 INFO L290 TraceCheckUtils]: 17: Hoare triple {18681#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18681#(<= main_~i~0 5)} is VALID [2022-04-27 21:55:42,887 INFO L290 TraceCheckUtils]: 18: Hoare triple {18681#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18688#(<= main_~i~0 6)} is VALID [2022-04-27 21:55:42,887 INFO L290 TraceCheckUtils]: 19: Hoare triple {18688#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18688#(<= main_~i~0 6)} is VALID [2022-04-27 21:55:42,888 INFO L290 TraceCheckUtils]: 20: Hoare triple {18688#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18695#(<= main_~i~0 7)} is VALID [2022-04-27 21:55:42,888 INFO L290 TraceCheckUtils]: 21: Hoare triple {18695#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18695#(<= main_~i~0 7)} is VALID [2022-04-27 21:55:42,888 INFO L290 TraceCheckUtils]: 22: Hoare triple {18695#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18702#(<= main_~i~0 8)} is VALID [2022-04-27 21:55:42,889 INFO L290 TraceCheckUtils]: 23: Hoare triple {18702#(<= main_~i~0 8)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18706#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 8))} is VALID [2022-04-27 21:55:42,891 INFO L290 TraceCheckUtils]: 24: Hoare triple {18706#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 8))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18710#(exists ((v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_237 8) (<= main_~i~0 (+ v_main_~i~0_237 1))))} is VALID [2022-04-27 21:55:42,892 INFO L290 TraceCheckUtils]: 25: Hoare triple {18710#(exists ((v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_237 8) (<= main_~i~0 (+ v_main_~i~0_237 1))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18714#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (exists ((v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_237 8) (<= main_~i~0 (+ v_main_~i~0_237 1)))))} is VALID [2022-04-27 21:55:42,893 INFO L290 TraceCheckUtils]: 26: Hoare triple {18714#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (exists ((v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_237 8) (<= main_~i~0 (+ v_main_~i~0_237 1)))))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18718#(exists ((v_main_~i~0_238 Int)) (and (<= main_~i~0 (+ v_main_~i~0_238 1)) (exists ((v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= v_main_~i~0_237 8))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0)))} is VALID [2022-04-27 21:55:42,894 INFO L290 TraceCheckUtils]: 27: Hoare triple {18718#(exists ((v_main_~i~0_238 Int)) (and (<= main_~i~0 (+ v_main_~i~0_238 1)) (exists ((v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= v_main_~i~0_237 8))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {18722#(exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0)))} is VALID [2022-04-27 21:55:42,895 INFO L290 TraceCheckUtils]: 28: Hoare triple {18722#(exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {18726#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 0))} is VALID [2022-04-27 21:55:42,895 INFO L290 TraceCheckUtils]: 29: Hoare triple {18726#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18726#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 0))} is VALID [2022-04-27 21:55:44,897 WARN L272 TraceCheckUtils]: 30: Hoare triple {18726#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} is UNKNOWN [2022-04-27 21:55:44,902 INFO L290 TraceCheckUtils]: 31: Hoare triple {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} is VALID [2022-04-27 21:55:44,904 INFO L290 TraceCheckUtils]: 32: Hoare triple {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} is VALID [2022-04-27 21:55:46,906 WARN L290 TraceCheckUtils]: 33: Hoare triple {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} is UNKNOWN [2022-04-27 21:55:46,908 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} {18726#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18746#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 0))} is VALID [2022-04-27 21:55:47,095 INFO L290 TraceCheckUtils]: 35: Hoare triple {18746#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18746#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 0))} is VALID [2022-04-27 21:55:47,100 INFO L290 TraceCheckUtils]: 36: Hoare triple {18746#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18753#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 0 (+ (- 1) main_~i~1)) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is VALID [2022-04-27 21:55:49,103 WARN L290 TraceCheckUtils]: 37: Hoare triple {18753#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 0 (+ (- 1) main_~i~1)) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18753#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 0 (+ (- 1) main_~i~1)) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is UNKNOWN [2022-04-27 21:55:49,104 INFO L272 TraceCheckUtils]: 38: Hoare triple {18753#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 0 (+ (- 1) main_~i~1)) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18760#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is VALID [2022-04-27 21:55:49,107 INFO L290 TraceCheckUtils]: 39: Hoare triple {18760#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18760#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is VALID [2022-04-27 21:55:51,110 WARN L290 TraceCheckUtils]: 40: Hoare triple {18760#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18760#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:55:53,114 WARN L290 TraceCheckUtils]: 41: Hoare triple {18760#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18760#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:55:53,115 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {18760#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} {18753#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 0 (+ (- 1) main_~i~1)) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18753#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 0 (+ (- 1) main_~i~1)) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is VALID [2022-04-27 21:55:53,121 INFO L290 TraceCheckUtils]: 43: Hoare triple {18753#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 0 (+ (- 1) main_~i~1)) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18753#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 0 (+ (- 1) main_~i~1)) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is VALID [2022-04-27 21:55:55,124 WARN L290 TraceCheckUtils]: 44: Hoare triple {18753#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 0 (+ (- 1) main_~i~1)) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18779#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is UNKNOWN [2022-04-27 21:55:55,131 INFO L290 TraceCheckUtils]: 45: Hoare triple {18779#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18779#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is VALID [2022-04-27 21:55:55,132 INFO L272 TraceCheckUtils]: 46: Hoare triple {18779#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is VALID [2022-04-27 21:55:57,136 WARN L290 TraceCheckUtils]: 47: Hoare triple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:55:59,141 WARN L290 TraceCheckUtils]: 48: Hoare triple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:56:01,151 WARN L290 TraceCheckUtils]: 49: Hoare triple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:56:01,152 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} {18779#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18779#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is VALID [2022-04-27 21:56:01,197 INFO L290 TraceCheckUtils]: 51: Hoare triple {18779#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18779#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is VALID [2022-04-27 21:56:03,200 WARN L290 TraceCheckUtils]: 52: Hoare triple {18779#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= main_~i~1 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18805#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))) (= 2 (+ (- 1) main_~i~1)))} is UNKNOWN [2022-04-27 21:56:03,241 INFO L290 TraceCheckUtils]: 53: Hoare triple {18805#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))) (= 2 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18805#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:56:03,242 INFO L272 TraceCheckUtils]: 54: Hoare triple {18805#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))) (= 2 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is VALID [2022-04-27 21:56:05,243 WARN L290 TraceCheckUtils]: 55: Hoare triple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:56:07,246 WARN L290 TraceCheckUtils]: 56: Hoare triple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:56:09,249 WARN L290 TraceCheckUtils]: 57: Hoare triple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:56:09,250 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} {18805#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))) (= 2 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18805#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:56:09,277 INFO L290 TraceCheckUtils]: 59: Hoare triple {18805#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))) (= 2 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18805#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-27 21:56:11,280 WARN L290 TraceCheckUtils]: 60: Hoare triple {18805#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))) (= 2 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18830#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= (+ (- 2) main_~i~1) 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is UNKNOWN [2022-04-27 21:56:13,283 WARN L290 TraceCheckUtils]: 61: Hoare triple {18830#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= (+ (- 2) main_~i~1) 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18830#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= (+ (- 2) main_~i~1) 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is UNKNOWN [2022-04-27 21:56:13,284 INFO L272 TraceCheckUtils]: 62: Hoare triple {18830#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= (+ (- 2) main_~i~1) 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is VALID [2022-04-27 21:56:15,444 WARN L290 TraceCheckUtils]: 63: Hoare triple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:56:17,449 WARN L290 TraceCheckUtils]: 64: Hoare triple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:56:19,451 WARN L290 TraceCheckUtils]: 65: Hoare triple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} is UNKNOWN [2022-04-27 21:56:19,452 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {18786#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1))))} {18830#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= (+ (- 2) main_~i~1) 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18830#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= (+ (- 2) main_~i~1) 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is VALID [2022-04-27 21:56:19,490 INFO L290 TraceCheckUtils]: 67: Hoare triple {18830#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= (+ (- 2) main_~i~1) 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18830#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= (+ (- 2) main_~i~1) 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} is VALID [2022-04-27 21:56:19,491 INFO L290 TraceCheckUtils]: 68: Hoare triple {18830#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= (+ (- 2) main_~i~1) 2) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_240 Int) (v_main_~i~0_239 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_240))) 0) (<= v_main_~i~0_240 8) (= 0 (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_239)))) (<= v_main_~i~0_239 (+ v_main_~i~0_240 1)))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18855#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 5 main_~i~1))} is VALID [2022-04-27 21:56:19,491 INFO L290 TraceCheckUtils]: 69: Hoare triple {18855#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18855#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 5 main_~i~1))} is VALID [2022-04-27 21:56:21,496 WARN L272 TraceCheckUtils]: 70: Hoare triple {18855#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} is UNKNOWN [2022-04-27 21:56:21,500 INFO L290 TraceCheckUtils]: 71: Hoare triple {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} is VALID [2022-04-27 21:56:23,503 WARN L290 TraceCheckUtils]: 72: Hoare triple {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} is UNKNOWN [2022-04-27 21:56:23,524 INFO L290 TraceCheckUtils]: 73: Hoare triple {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} is VALID [2022-04-27 21:56:23,526 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {18733#(exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0)))} {18855#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18874#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0))) (= 5 main_~i~1))} is VALID [2022-04-27 21:56:23,539 INFO L290 TraceCheckUtils]: 75: Hoare triple {18874#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0))) (= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18874#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0))) (= 5 main_~i~1))} is VALID [2022-04-27 21:56:23,548 INFO L290 TraceCheckUtils]: 76: Hoare triple {18874#(and (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~i~0_238 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int) (v_main_~i~0_237 Int)) (and (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_237) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_238))) 0))) (= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18881#(and (= main_~i~1 6) (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~i~0_241 Int) (v_main_~i~0_242 Int) (v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_242) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_242 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_241))) 0) (<= v_main_~i~0_241 (+ v_main_~i~0_242 1)))))} is VALID [2022-04-27 21:56:23,566 INFO L290 TraceCheckUtils]: 77: Hoare triple {18881#(and (= main_~i~1 6) (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~i~0_241 Int) (v_main_~i~0_242 Int) (v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_242) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_242 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_241))) 0) (<= v_main_~i~0_241 (+ v_main_~i~0_242 1)))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18881#(and (= main_~i~1 6) (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~i~0_241 Int) (v_main_~i~0_242 Int) (v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_242) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_242 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_241))) 0) (<= v_main_~i~0_241 (+ v_main_~i~0_242 1)))))} is VALID [2022-04-27 21:56:23,567 INFO L272 TraceCheckUtils]: 78: Hoare triple {18881#(and (= main_~i~1 6) (exists ((v_main_~i~0_238 Int) (v_main_~i~0_237 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_237))) 0) (<= v_main_~i~0_238 (+ v_main_~i~0_237 1)) (<= main_~n~0 (+ v_main_~i~0_238 1)) (<= v_main_~i~0_237 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_238))) 0))) (exists ((v_main_~i~0_241 Int) (v_main_~i~0_242 Int) (v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_242) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_242 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_241))) 0) (<= v_main_~i~0_241 (+ v_main_~i~0_242 1)))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18888#(exists ((v_main_~i~0_241 Int) (v_main_~i~0_242 Int) (v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_242) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_242 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_241))) 0) (<= v_main_~i~0_241 (+ v_main_~i~0_242 1))))} is VALID [2022-04-27 21:56:25,568 WARN L290 TraceCheckUtils]: 79: Hoare triple {18888#(exists ((v_main_~i~0_241 Int) (v_main_~i~0_242 Int) (v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_242) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_242 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_241))) 0) (<= v_main_~i~0_241 (+ v_main_~i~0_242 1))))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18888#(exists ((v_main_~i~0_241 Int) (v_main_~i~0_242 Int) (v_main_~x~0.offset_BEFORE_CALL_103 Int) (v_main_~x~0.base_BEFORE_CALL_103 Int)) (and (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ (* 4 v_main_~i~0_242) v_main_~x~0.offset_BEFORE_CALL_103)) 0) (<= v_main_~i~0_242 8) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_103) (+ v_main_~x~0.offset_BEFORE_CALL_103 (* 4 v_main_~i~0_241))) 0) (<= v_main_~i~0_241 (+ v_main_~i~0_242 1))))} is UNKNOWN