/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/nested5-2.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 22:19:12,553 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 22:19:12,561 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 22:19:12,597 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 22:19:12,598 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 22:19:12,598 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 22:19:12,603 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 22:19:12,606 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 22:19:12,608 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 22:19:12,611 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 22:19:12,612 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 22:19:12,613 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 22:19:12,613 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 22:19:12,614 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 22:19:12,615 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 22:19:12,617 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 22:19:12,617 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 22:19:12,618 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 22:19:12,622 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 22:19:12,625 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 22:19:12,626 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 22:19:12,627 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 22:19:12,627 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 22:19:12,628 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 22:19:12,629 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 22:19:12,633 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 22:19:12,637 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 22:19:12,637 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 22:19:12,641 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 22:19:12,642 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 22:19:12,662 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 22:19:12,662 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 22:19:12,663 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 22:19:12,663 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 22:19:12,664 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 22:19:12,664 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 22:19:12,664 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 22:19:12,664 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 22:19:12,664 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 22:19:12,665 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 22:19:12,665 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 22:19:12,665 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 22:19:12,665 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 22:19:12,665 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 22:19:12,665 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 22:19:12,665 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 22:19:12,665 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 22:19:12,665 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 22:19:12,665 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 22:19:12,665 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 22:19:12,666 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 22:19:12,666 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 22:19:12,666 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 22:19:12,666 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 22:19:12,666 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 22:19:12,666 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 22:19:12,666 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 22:19:12,666 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 22:19:12,667 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 22:19:12,667 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 22:19:12,830 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 22:19:12,846 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 22:19:12,848 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 22:19:12,849 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 22:19:12,850 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 22:19:12,851 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/nested5-2.c [2022-04-27 22:19:12,902 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/039649d93/50ebbda93a964e65b1a2c93dd0b4f029/FLAGebfe9a29b [2022-04-27 22:19:13,202 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 22:19:13,202 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/nested5-2.c [2022-04-27 22:19:13,206 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/039649d93/50ebbda93a964e65b1a2c93dd0b4f029/FLAGebfe9a29b [2022-04-27 22:19:13,658 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/039649d93/50ebbda93a964e65b1a2c93dd0b4f029 [2022-04-27 22:19:13,660 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 22:19:13,661 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 22:19:13,662 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 22:19:13,662 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 22:19:13,665 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 22:19:13,665 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 10:19:13" (1/1) ... [2022-04-27 22:19:13,667 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6a5bc56e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13, skipping insertion in model container [2022-04-27 22:19:13,667 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 10:19:13" (1/1) ... [2022-04-27 22:19:13,672 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 22:19:13,680 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 22:19:13,809 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/nested5-2.c[321,334] [2022-04-27 22:19:13,832 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 22:19:13,839 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 22:19:13,848 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/nested5-2.c[321,334] [2022-04-27 22:19:13,859 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 22:19:13,872 INFO L208 MainTranslator]: Completed translation [2022-04-27 22:19:13,872 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13 WrapperNode [2022-04-27 22:19:13,873 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 22:19:13,874 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 22:19:13,874 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 22:19:13,875 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 22:19:13,882 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13" (1/1) ... [2022-04-27 22:19:13,882 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13" (1/1) ... [2022-04-27 22:19:13,887 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13" (1/1) ... [2022-04-27 22:19:13,887 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13" (1/1) ... [2022-04-27 22:19:13,897 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13" (1/1) ... [2022-04-27 22:19:13,903 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13" (1/1) ... [2022-04-27 22:19:13,906 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13" (1/1) ... [2022-04-27 22:19:13,908 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 22:19:13,909 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 22:19:13,909 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 22:19:13,910 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 22:19:13,910 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13" (1/1) ... [2022-04-27 22:19:13,915 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 22:19:13,921 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:19:13,933 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 22:19:13,951 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 22:19:13,965 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 22:19:13,965 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 22:19:13,966 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 22:19:13,966 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 22:19:13,966 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 22:19:13,966 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 22:19:13,966 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 22:19:13,967 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 22:19:13,967 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 22:19:13,967 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 22:19:13,967 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 22:19:13,967 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 22:19:13,968 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 22:19:13,968 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 22:19:13,968 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 22:19:13,968 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 22:19:13,968 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 22:19:14,013 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 22:19:14,014 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 22:19:14,138 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 22:19:14,143 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 22:19:14,143 INFO L299 CfgBuilder]: Removed 5 assume(true) statements. [2022-04-27 22:19:14,144 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:19:14 BoogieIcfgContainer [2022-04-27 22:19:14,144 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 22:19:14,145 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 22:19:14,145 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 22:19:14,146 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 22:19:14,147 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:19:14" (1/1) ... [2022-04-27 22:19:14,149 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 22:19:14,165 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 10:19:14 BasicIcfg [2022-04-27 22:19:14,166 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 22:19:14,167 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 22:19:14,167 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 22:19:14,169 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 22:19:14,169 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 10:19:13" (1/4) ... [2022-04-27 22:19:14,169 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@f508eaf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 10:19:14, skipping insertion in model container [2022-04-27 22:19:14,169 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:19:13" (2/4) ... [2022-04-27 22:19:14,170 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@f508eaf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 10:19:14, skipping insertion in model container [2022-04-27 22:19:14,170 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:19:14" (3/4) ... [2022-04-27 22:19:14,170 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@f508eaf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 10:19:14, skipping insertion in model container [2022-04-27 22:19:14,170 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 10:19:14" (4/4) ... [2022-04-27 22:19:14,171 INFO L111 eAbstractionObserver]: Analyzing ICFG nested5-2.cqvasr [2022-04-27 22:19:14,180 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 22:19:14,180 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 22:19:14,208 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 22:19:14,212 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@2d72066c, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@33ac15d3 [2022-04-27 22:19:14,213 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 22:19:14,218 INFO L276 IsEmpty]: Start isEmpty. Operand has 28 states, 20 states have (on average 1.6) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 22:19:14,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 22:19:14,222 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:19:14,223 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:19:14,223 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:19:14,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:19:14,226 INFO L85 PathProgramCache]: Analyzing trace with hash -1895308246, now seen corresponding path program 1 times [2022-04-27 22:19:14,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:19:14,233 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1418014142] [2022-04-27 22:19:14,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:19:14,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:19:14,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:14,387 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:19:14,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:14,410 INFO L290 TraceCheckUtils]: 0: Hoare triple {36#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31#true} is VALID [2022-04-27 22:19:14,410 INFO L290 TraceCheckUtils]: 1: Hoare triple {31#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#true} is VALID [2022-04-27 22:19:14,411 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31#true} {31#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#true} is VALID [2022-04-27 22:19:14,412 INFO L272 TraceCheckUtils]: 0: Hoare triple {31#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:19:14,415 INFO L290 TraceCheckUtils]: 1: Hoare triple {36#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31#true} is VALID [2022-04-27 22:19:14,415 INFO L290 TraceCheckUtils]: 2: Hoare triple {31#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#true} is VALID [2022-04-27 22:19:14,415 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31#true} {31#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#true} is VALID [2022-04-27 22:19:14,416 INFO L272 TraceCheckUtils]: 4: Hoare triple {31#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#true} is VALID [2022-04-27 22:19:14,416 INFO L290 TraceCheckUtils]: 5: Hoare triple {31#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {31#true} is VALID [2022-04-27 22:19:14,416 INFO L290 TraceCheckUtils]: 6: Hoare triple {31#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {31#true} is VALID [2022-04-27 22:19:14,417 INFO L290 TraceCheckUtils]: 7: Hoare triple {31#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {31#true} is VALID [2022-04-27 22:19:14,417 INFO L290 TraceCheckUtils]: 8: Hoare triple {31#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {31#true} is VALID [2022-04-27 22:19:14,417 INFO L290 TraceCheckUtils]: 9: Hoare triple {31#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {31#true} is VALID [2022-04-27 22:19:14,418 INFO L290 TraceCheckUtils]: 10: Hoare triple {31#true} [113] L24-3-->L24-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {32#false} is VALID [2022-04-27 22:19:14,418 INFO L272 TraceCheckUtils]: 11: Hoare triple {32#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {32#false} is VALID [2022-04-27 22:19:14,418 INFO L290 TraceCheckUtils]: 12: Hoare triple {32#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32#false} is VALID [2022-04-27 22:19:14,419 INFO L290 TraceCheckUtils]: 13: Hoare triple {32#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {32#false} is VALID [2022-04-27 22:19:14,419 INFO L290 TraceCheckUtils]: 14: Hoare triple {32#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#false} is VALID [2022-04-27 22:19:14,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:14,420 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:19:14,420 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1418014142] [2022-04-27 22:19:14,421 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1418014142] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:19:14,421 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:19:14,421 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 22:19:14,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1219456767] [2022-04-27 22:19:14,424 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:19:14,428 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:19:14,429 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:19:14,432 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:14,456 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:14,457 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 22:19:14,457 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:19:14,479 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 22:19:14,479 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 22:19:14,482 INFO L87 Difference]: Start difference. First operand has 28 states, 20 states have (on average 1.6) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:14,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:14,574 INFO L93 Difference]: Finished difference Result 50 states and 71 transitions. [2022-04-27 22:19:14,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 22:19:14,575 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:19:14,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:19:14,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:14,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 71 transitions. [2022-04-27 22:19:14,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:14,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 71 transitions. [2022-04-27 22:19:14,591 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 71 transitions. [2022-04-27 22:19:14,665 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:14,672 INFO L225 Difference]: With dead ends: 50 [2022-04-27 22:19:14,672 INFO L226 Difference]: Without dead ends: 23 [2022-04-27 22:19:14,674 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 22:19:14,678 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 23 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:19:14,680 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 34 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:19:14,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-27 22:19:14,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-04-27 22:19:14,702 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:19:14,703 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 23 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:14,704 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 23 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:14,705 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 23 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:14,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:14,710 INFO L93 Difference]: Finished difference Result 23 states and 27 transitions. [2022-04-27 22:19:14,711 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2022-04-27 22:19:14,711 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:19:14,711 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:19:14,712 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 23 states. [2022-04-27 22:19:14,712 INFO L87 Difference]: Start difference. First operand has 23 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 23 states. [2022-04-27 22:19:14,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:14,718 INFO L93 Difference]: Finished difference Result 23 states and 27 transitions. [2022-04-27 22:19:14,718 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2022-04-27 22:19:14,718 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:19:14,718 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:19:14,718 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:19:14,718 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:19:14,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:14,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2022-04-27 22:19:14,725 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 27 transitions. Word has length 15 [2022-04-27 22:19:14,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:19:14,731 INFO L495 AbstractCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-04-27 22:19:14,731 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:14,732 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2022-04-27 22:19:14,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 22:19:14,732 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:19:14,732 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:19:14,732 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 22:19:14,733 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:19:14,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:19:14,734 INFO L85 PathProgramCache]: Analyzing trace with hash -1894384725, now seen corresponding path program 1 times [2022-04-27 22:19:14,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:19:14,734 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326350992] [2022-04-27 22:19:14,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:19:14,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:19:14,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:14,849 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:19:14,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:14,857 INFO L290 TraceCheckUtils]: 0: Hoare triple {193#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {187#true} is VALID [2022-04-27 22:19:14,858 INFO L290 TraceCheckUtils]: 1: Hoare triple {187#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187#true} is VALID [2022-04-27 22:19:14,858 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {187#true} {187#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187#true} is VALID [2022-04-27 22:19:14,858 INFO L272 TraceCheckUtils]: 0: Hoare triple {187#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {193#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:19:14,859 INFO L290 TraceCheckUtils]: 1: Hoare triple {193#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {187#true} is VALID [2022-04-27 22:19:14,859 INFO L290 TraceCheckUtils]: 2: Hoare triple {187#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187#true} is VALID [2022-04-27 22:19:14,859 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {187#true} {187#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187#true} is VALID [2022-04-27 22:19:14,859 INFO L272 TraceCheckUtils]: 4: Hoare triple {187#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187#true} is VALID [2022-04-27 22:19:14,859 INFO L290 TraceCheckUtils]: 5: Hoare triple {187#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {187#true} is VALID [2022-04-27 22:19:14,860 INFO L290 TraceCheckUtils]: 6: Hoare triple {187#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {187#true} is VALID [2022-04-27 22:19:14,860 INFO L290 TraceCheckUtils]: 7: Hoare triple {187#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {187#true} is VALID [2022-04-27 22:19:14,860 INFO L290 TraceCheckUtils]: 8: Hoare triple {187#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {187#true} is VALID [2022-04-27 22:19:14,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {187#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {192#(= main_~v~0 0)} is VALID [2022-04-27 22:19:14,861 INFO L290 TraceCheckUtils]: 10: Hoare triple {192#(= main_~v~0 0)} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {188#false} is VALID [2022-04-27 22:19:14,861 INFO L272 TraceCheckUtils]: 11: Hoare triple {188#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {188#false} is VALID [2022-04-27 22:19:14,861 INFO L290 TraceCheckUtils]: 12: Hoare triple {188#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {188#false} is VALID [2022-04-27 22:19:14,861 INFO L290 TraceCheckUtils]: 13: Hoare triple {188#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {188#false} is VALID [2022-04-27 22:19:14,862 INFO L290 TraceCheckUtils]: 14: Hoare triple {188#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {188#false} is VALID [2022-04-27 22:19:14,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:14,862 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:19:14,862 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326350992] [2022-04-27 22:19:14,862 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [326350992] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:19:14,862 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:19:14,862 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 22:19:14,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869389125] [2022-04-27 22:19:14,863 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:19:14,863 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:19:14,864 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:19:14,864 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:14,875 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:14,875 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 22:19:14,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:19:14,875 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 22:19:14,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 22:19:14,876 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:14,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:14,967 INFO L93 Difference]: Finished difference Result 49 states and 61 transitions. [2022-04-27 22:19:14,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 22:19:14,968 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:19:14,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:19:14,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:14,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 61 transitions. [2022-04-27 22:19:14,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:14,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 61 transitions. [2022-04-27 22:19:14,973 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 61 transitions. [2022-04-27 22:19:15,025 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:15,027 INFO L225 Difference]: With dead ends: 49 [2022-04-27 22:19:15,027 INFO L226 Difference]: Without dead ends: 32 [2022-04-27 22:19:15,028 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:19:15,030 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 41 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:19:15,031 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 31 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:19:15,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-27 22:19:15,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 24. [2022-04-27 22:19:15,036 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:19:15,036 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 24 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 18 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:15,037 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 24 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 18 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:15,037 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 24 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 18 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:15,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:15,039 INFO L93 Difference]: Finished difference Result 32 states and 39 transitions. [2022-04-27 22:19:15,039 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 39 transitions. [2022-04-27 22:19:15,039 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:19:15,039 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:19:15,041 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 18 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 32 states. [2022-04-27 22:19:15,041 INFO L87 Difference]: Start difference. First operand has 24 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 18 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 32 states. [2022-04-27 22:19:15,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:15,044 INFO L93 Difference]: Finished difference Result 32 states and 39 transitions. [2022-04-27 22:19:15,044 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 39 transitions. [2022-04-27 22:19:15,045 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:19:15,045 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:19:15,045 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:19:15,045 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:19:15,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 18 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:15,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 28 transitions. [2022-04-27 22:19:15,052 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 28 transitions. Word has length 15 [2022-04-27 22:19:15,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:19:15,052 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 28 transitions. [2022-04-27 22:19:15,052 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:15,053 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 28 transitions. [2022-04-27 22:19:15,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 22:19:15,053 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:19:15,053 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:19:15,053 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 22:19:15,053 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:19:15,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:19:15,059 INFO L85 PathProgramCache]: Analyzing trace with hash 1473809801, now seen corresponding path program 1 times [2022-04-27 22:19:15,059 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:19:15,060 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1438280946] [2022-04-27 22:19:15,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:19:15,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:19:15,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:15,155 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:19:15,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:15,160 INFO L290 TraceCheckUtils]: 0: Hoare triple {378#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {371#true} is VALID [2022-04-27 22:19:15,160 INFO L290 TraceCheckUtils]: 1: Hoare triple {371#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,160 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {371#true} {371#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,161 INFO L272 TraceCheckUtils]: 0: Hoare triple {371#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:19:15,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {378#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {371#true} is VALID [2022-04-27 22:19:15,161 INFO L290 TraceCheckUtils]: 2: Hoare triple {371#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,162 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {371#true} {371#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,162 INFO L272 TraceCheckUtils]: 4: Hoare triple {371#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,162 INFO L290 TraceCheckUtils]: 5: Hoare triple {371#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {371#true} is VALID [2022-04-27 22:19:15,162 INFO L290 TraceCheckUtils]: 6: Hoare triple {371#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {371#true} is VALID [2022-04-27 22:19:15,162 INFO L290 TraceCheckUtils]: 7: Hoare triple {371#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {371#true} is VALID [2022-04-27 22:19:15,163 INFO L290 TraceCheckUtils]: 8: Hoare triple {371#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {371#true} is VALID [2022-04-27 22:19:15,163 INFO L290 TraceCheckUtils]: 9: Hoare triple {371#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {376#(= main_~v~0 0)} is VALID [2022-04-27 22:19:15,163 INFO L290 TraceCheckUtils]: 10: Hoare triple {376#(= main_~v~0 0)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {376#(= main_~v~0 0)} is VALID [2022-04-27 22:19:15,164 INFO L290 TraceCheckUtils]: 11: Hoare triple {376#(= main_~v~0 0)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {377#(and (<= main_~v~0 1) (not (<= (+ (div main_~v~0 4294967296) 1) 0)))} is VALID [2022-04-27 22:19:15,164 INFO L290 TraceCheckUtils]: 12: Hoare triple {377#(and (<= main_~v~0 1) (not (<= (+ (div main_~v~0 4294967296) 1) 0)))} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-27 22:19:15,165 INFO L272 TraceCheckUtils]: 13: Hoare triple {372#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {372#false} is VALID [2022-04-27 22:19:15,165 INFO L290 TraceCheckUtils]: 14: Hoare triple {372#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {372#false} is VALID [2022-04-27 22:19:15,165 INFO L290 TraceCheckUtils]: 15: Hoare triple {372#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-27 22:19:15,165 INFO L290 TraceCheckUtils]: 16: Hoare triple {372#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-27 22:19:15,165 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:15,166 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:19:15,166 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1438280946] [2022-04-27 22:19:15,166 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1438280946] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:19:15,166 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [602510408] [2022-04-27 22:19:15,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:19:15,166 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:19:15,166 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:19:15,183 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:19:15,184 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 22:19:15,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:15,230 INFO L263 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-27 22:19:15,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:15,238 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:19:15,331 INFO L272 TraceCheckUtils]: 0: Hoare triple {371#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,331 INFO L290 TraceCheckUtils]: 1: Hoare triple {371#true} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {371#true} is VALID [2022-04-27 22:19:15,332 INFO L290 TraceCheckUtils]: 2: Hoare triple {371#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,332 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {371#true} {371#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,332 INFO L272 TraceCheckUtils]: 4: Hoare triple {371#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,332 INFO L290 TraceCheckUtils]: 5: Hoare triple {371#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {371#true} is VALID [2022-04-27 22:19:15,332 INFO L290 TraceCheckUtils]: 6: Hoare triple {371#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {371#true} is VALID [2022-04-27 22:19:15,332 INFO L290 TraceCheckUtils]: 7: Hoare triple {371#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {371#true} is VALID [2022-04-27 22:19:15,333 INFO L290 TraceCheckUtils]: 8: Hoare triple {371#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {371#true} is VALID [2022-04-27 22:19:15,333 INFO L290 TraceCheckUtils]: 9: Hoare triple {371#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {376#(= main_~v~0 0)} is VALID [2022-04-27 22:19:15,333 INFO L290 TraceCheckUtils]: 10: Hoare triple {376#(= main_~v~0 0)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {376#(= main_~v~0 0)} is VALID [2022-04-27 22:19:15,334 INFO L290 TraceCheckUtils]: 11: Hoare triple {376#(= main_~v~0 0)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {415#(= main_~v~0 1)} is VALID [2022-04-27 22:19:15,334 INFO L290 TraceCheckUtils]: 12: Hoare triple {415#(= main_~v~0 1)} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-27 22:19:15,335 INFO L272 TraceCheckUtils]: 13: Hoare triple {372#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {372#false} is VALID [2022-04-27 22:19:15,335 INFO L290 TraceCheckUtils]: 14: Hoare triple {372#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {372#false} is VALID [2022-04-27 22:19:15,335 INFO L290 TraceCheckUtils]: 15: Hoare triple {372#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-27 22:19:15,335 INFO L290 TraceCheckUtils]: 16: Hoare triple {372#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-27 22:19:15,335 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:15,335 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:19:15,394 INFO L290 TraceCheckUtils]: 16: Hoare triple {372#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-27 22:19:15,395 INFO L290 TraceCheckUtils]: 15: Hoare triple {372#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-27 22:19:15,395 INFO L290 TraceCheckUtils]: 14: Hoare triple {372#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {372#false} is VALID [2022-04-27 22:19:15,395 INFO L272 TraceCheckUtils]: 13: Hoare triple {372#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {372#false} is VALID [2022-04-27 22:19:15,401 INFO L290 TraceCheckUtils]: 12: Hoare triple {443#(< (mod main_~v~0 4294967296) 268435455)} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {372#false} is VALID [2022-04-27 22:19:15,402 INFO L290 TraceCheckUtils]: 11: Hoare triple {447#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {443#(< (mod main_~v~0 4294967296) 268435455)} is VALID [2022-04-27 22:19:15,402 INFO L290 TraceCheckUtils]: 10: Hoare triple {447#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {447#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} is VALID [2022-04-27 22:19:15,403 INFO L290 TraceCheckUtils]: 9: Hoare triple {371#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {447#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} is VALID [2022-04-27 22:19:15,403 INFO L290 TraceCheckUtils]: 8: Hoare triple {371#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {371#true} is VALID [2022-04-27 22:19:15,403 INFO L290 TraceCheckUtils]: 7: Hoare triple {371#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {371#true} is VALID [2022-04-27 22:19:15,403 INFO L290 TraceCheckUtils]: 6: Hoare triple {371#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {371#true} is VALID [2022-04-27 22:19:15,403 INFO L290 TraceCheckUtils]: 5: Hoare triple {371#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {371#true} is VALID [2022-04-27 22:19:15,403 INFO L272 TraceCheckUtils]: 4: Hoare triple {371#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,404 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {371#true} {371#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,404 INFO L290 TraceCheckUtils]: 2: Hoare triple {371#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {371#true} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {371#true} is VALID [2022-04-27 22:19:15,404 INFO L272 TraceCheckUtils]: 0: Hoare triple {371#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {371#true} is VALID [2022-04-27 22:19:15,404 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:15,404 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [602510408] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:19:15,405 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:19:15,405 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2022-04-27 22:19:15,405 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135143436] [2022-04-27 22:19:15,405 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:19:15,405 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.5) internal successors, (20), 7 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:19:15,406 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:19:15,406 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 2.5) internal successors, (20), 7 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:15,425 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:15,426 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 22:19:15,426 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:19:15,426 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 22:19:15,426 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2022-04-27 22:19:15,427 INFO L87 Difference]: Start difference. First operand 24 states and 28 transitions. Second operand has 8 states, 8 states have (on average 2.5) internal successors, (20), 7 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:15,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:15,704 INFO L93 Difference]: Finished difference Result 55 states and 69 transitions. [2022-04-27 22:19:15,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 22:19:15,705 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.5) internal successors, (20), 7 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:19:15,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:19:15,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.5) internal successors, (20), 7 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:15,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 68 transitions. [2022-04-27 22:19:15,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.5) internal successors, (20), 7 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:15,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 68 transitions. [2022-04-27 22:19:15,708 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 68 transitions. [2022-04-27 22:19:15,770 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:15,773 INFO L225 Difference]: With dead ends: 55 [2022-04-27 22:19:15,773 INFO L226 Difference]: Without dead ends: 37 [2022-04-27 22:19:15,773 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=83, Unknown=0, NotChecked=0, Total=132 [2022-04-27 22:19:15,774 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 49 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 94 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:19:15,774 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [50 Valid, 41 Invalid, 94 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:19:15,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2022-04-27 22:19:15,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 30. [2022-04-27 22:19:15,783 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:19:15,783 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37 states. Second operand has 30 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:15,784 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand has 30 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:15,785 INFO L87 Difference]: Start difference. First operand 37 states. Second operand has 30 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:15,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:15,788 INFO L93 Difference]: Finished difference Result 37 states and 44 transitions. [2022-04-27 22:19:15,788 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 44 transitions. [2022-04-27 22:19:15,790 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:19:15,790 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:19:15,790 INFO L74 IsIncluded]: Start isIncluded. First operand has 30 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 37 states. [2022-04-27 22:19:15,790 INFO L87 Difference]: Start difference. First operand has 30 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 37 states. [2022-04-27 22:19:15,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:15,794 INFO L93 Difference]: Finished difference Result 37 states and 44 transitions. [2022-04-27 22:19:15,794 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 44 transitions. [2022-04-27 22:19:15,794 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:19:15,794 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:19:15,794 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:19:15,794 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:19:15,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:15,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 34 transitions. [2022-04-27 22:19:15,795 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 34 transitions. Word has length 17 [2022-04-27 22:19:15,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:19:15,796 INFO L495 AbstractCegarLoop]: Abstraction has 30 states and 34 transitions. [2022-04-27 22:19:15,796 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 2.5) internal successors, (20), 7 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:15,796 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 34 transitions. [2022-04-27 22:19:15,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 22:19:15,796 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:19:15,796 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:19:15,814 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-27 22:19:16,002 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:19:16,002 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:19:16,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:19:16,003 INFO L85 PathProgramCache]: Analyzing trace with hash -1878931933, now seen corresponding path program 2 times [2022-04-27 22:19:16,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:19:16,003 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1302038225] [2022-04-27 22:19:16,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:19:16,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:19:16,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:16,106 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:19:16,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:16,110 INFO L290 TraceCheckUtils]: 0: Hoare triple {703#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {693#true} is VALID [2022-04-27 22:19:16,111 INFO L290 TraceCheckUtils]: 1: Hoare triple {693#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,111 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {693#true} {693#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,111 INFO L272 TraceCheckUtils]: 0: Hoare triple {693#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:19:16,111 INFO L290 TraceCheckUtils]: 1: Hoare triple {703#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {693#true} is VALID [2022-04-27 22:19:16,112 INFO L290 TraceCheckUtils]: 2: Hoare triple {693#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,112 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {693#true} {693#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,112 INFO L272 TraceCheckUtils]: 4: Hoare triple {693#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,112 INFO L290 TraceCheckUtils]: 5: Hoare triple {693#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {693#true} is VALID [2022-04-27 22:19:16,112 INFO L290 TraceCheckUtils]: 6: Hoare triple {693#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {693#true} is VALID [2022-04-27 22:19:16,112 INFO L290 TraceCheckUtils]: 7: Hoare triple {693#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {693#true} is VALID [2022-04-27 22:19:16,112 INFO L290 TraceCheckUtils]: 8: Hoare triple {693#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {693#true} is VALID [2022-04-27 22:19:16,113 INFO L290 TraceCheckUtils]: 9: Hoare triple {693#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {698#(= main_~v~0 0)} is VALID [2022-04-27 22:19:16,113 INFO L290 TraceCheckUtils]: 10: Hoare triple {698#(= main_~v~0 0)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {698#(= main_~v~0 0)} is VALID [2022-04-27 22:19:16,114 INFO L290 TraceCheckUtils]: 11: Hoare triple {698#(= main_~v~0 0)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {699#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:16,114 INFO L290 TraceCheckUtils]: 12: Hoare triple {699#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {699#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:16,115 INFO L290 TraceCheckUtils]: 13: Hoare triple {699#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {700#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:16,115 INFO L290 TraceCheckUtils]: 14: Hoare triple {700#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {700#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:16,116 INFO L290 TraceCheckUtils]: 15: Hoare triple {700#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {701#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:16,116 INFO L290 TraceCheckUtils]: 16: Hoare triple {701#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {701#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:16,117 INFO L290 TraceCheckUtils]: 17: Hoare triple {701#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {702#(and (<= main_~v~0 4) (not (<= (+ (div main_~v~0 4294967296) 1) 0)))} is VALID [2022-04-27 22:19:16,117 INFO L290 TraceCheckUtils]: 18: Hoare triple {702#(and (<= main_~v~0 4) (not (<= (+ (div main_~v~0 4294967296) 1) 0)))} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {694#false} is VALID [2022-04-27 22:19:16,117 INFO L272 TraceCheckUtils]: 19: Hoare triple {694#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {694#false} is VALID [2022-04-27 22:19:16,117 INFO L290 TraceCheckUtils]: 20: Hoare triple {694#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {694#false} is VALID [2022-04-27 22:19:16,118 INFO L290 TraceCheckUtils]: 21: Hoare triple {694#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {694#false} is VALID [2022-04-27 22:19:16,118 INFO L290 TraceCheckUtils]: 22: Hoare triple {694#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {694#false} is VALID [2022-04-27 22:19:16,118 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:16,118 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:19:16,118 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1302038225] [2022-04-27 22:19:16,118 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1302038225] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:19:16,118 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2024787648] [2022-04-27 22:19:16,119 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:19:16,119 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:19:16,119 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:19:16,120 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:19:16,121 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 22:19:16,158 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:19:16,158 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:19:16,158 INFO L263 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-27 22:19:16,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:16,171 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:19:16,398 INFO L272 TraceCheckUtils]: 0: Hoare triple {693#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,398 INFO L290 TraceCheckUtils]: 1: Hoare triple {693#true} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {693#true} is VALID [2022-04-27 22:19:16,398 INFO L290 TraceCheckUtils]: 2: Hoare triple {693#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,398 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {693#true} {693#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,398 INFO L272 TraceCheckUtils]: 4: Hoare triple {693#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,399 INFO L290 TraceCheckUtils]: 5: Hoare triple {693#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {693#true} is VALID [2022-04-27 22:19:16,399 INFO L290 TraceCheckUtils]: 6: Hoare triple {693#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {693#true} is VALID [2022-04-27 22:19:16,399 INFO L290 TraceCheckUtils]: 7: Hoare triple {693#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {693#true} is VALID [2022-04-27 22:19:16,399 INFO L290 TraceCheckUtils]: 8: Hoare triple {693#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {693#true} is VALID [2022-04-27 22:19:16,399 INFO L290 TraceCheckUtils]: 9: Hoare triple {693#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {698#(= main_~v~0 0)} is VALID [2022-04-27 22:19:16,400 INFO L290 TraceCheckUtils]: 10: Hoare triple {698#(= main_~v~0 0)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {698#(= main_~v~0 0)} is VALID [2022-04-27 22:19:16,400 INFO L290 TraceCheckUtils]: 11: Hoare triple {698#(= main_~v~0 0)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {699#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:16,401 INFO L290 TraceCheckUtils]: 12: Hoare triple {699#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {699#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:16,401 INFO L290 TraceCheckUtils]: 13: Hoare triple {699#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {700#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:16,402 INFO L290 TraceCheckUtils]: 14: Hoare triple {700#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {700#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:16,402 INFO L290 TraceCheckUtils]: 15: Hoare triple {700#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {701#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:16,402 INFO L290 TraceCheckUtils]: 16: Hoare triple {701#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {701#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:16,403 INFO L290 TraceCheckUtils]: 17: Hoare triple {701#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {758#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:19:16,403 INFO L290 TraceCheckUtils]: 18: Hoare triple {758#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {694#false} is VALID [2022-04-27 22:19:16,404 INFO L272 TraceCheckUtils]: 19: Hoare triple {694#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {694#false} is VALID [2022-04-27 22:19:16,404 INFO L290 TraceCheckUtils]: 20: Hoare triple {694#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {694#false} is VALID [2022-04-27 22:19:16,404 INFO L290 TraceCheckUtils]: 21: Hoare triple {694#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {694#false} is VALID [2022-04-27 22:19:16,404 INFO L290 TraceCheckUtils]: 22: Hoare triple {694#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {694#false} is VALID [2022-04-27 22:19:16,404 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:16,404 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:19:16,531 INFO L290 TraceCheckUtils]: 22: Hoare triple {694#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {694#false} is VALID [2022-04-27 22:19:16,531 INFO L290 TraceCheckUtils]: 21: Hoare triple {694#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {694#false} is VALID [2022-04-27 22:19:16,531 INFO L290 TraceCheckUtils]: 20: Hoare triple {694#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {694#false} is VALID [2022-04-27 22:19:16,531 INFO L272 TraceCheckUtils]: 19: Hoare triple {694#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {694#false} is VALID [2022-04-27 22:19:16,532 INFO L290 TraceCheckUtils]: 18: Hoare triple {786#(< (mod main_~v~0 4294967296) 268435455)} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {694#false} is VALID [2022-04-27 22:19:16,533 INFO L290 TraceCheckUtils]: 17: Hoare triple {790#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {786#(< (mod main_~v~0 4294967296) 268435455)} is VALID [2022-04-27 22:19:16,533 INFO L290 TraceCheckUtils]: 16: Hoare triple {790#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {790#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} is VALID [2022-04-27 22:19:16,536 INFO L290 TraceCheckUtils]: 15: Hoare triple {797#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {790#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} is VALID [2022-04-27 22:19:16,536 INFO L290 TraceCheckUtils]: 14: Hoare triple {797#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {797#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} is VALID [2022-04-27 22:19:16,537 INFO L290 TraceCheckUtils]: 13: Hoare triple {804#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {797#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} is VALID [2022-04-27 22:19:16,537 INFO L290 TraceCheckUtils]: 12: Hoare triple {804#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {804#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} is VALID [2022-04-27 22:19:16,538 INFO L290 TraceCheckUtils]: 11: Hoare triple {811#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {804#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} is VALID [2022-04-27 22:19:16,539 INFO L290 TraceCheckUtils]: 10: Hoare triple {811#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {811#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} is VALID [2022-04-27 22:19:16,539 INFO L290 TraceCheckUtils]: 9: Hoare triple {693#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {811#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} is VALID [2022-04-27 22:19:16,539 INFO L290 TraceCheckUtils]: 8: Hoare triple {693#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {693#true} is VALID [2022-04-27 22:19:16,539 INFO L290 TraceCheckUtils]: 7: Hoare triple {693#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {693#true} is VALID [2022-04-27 22:19:16,540 INFO L290 TraceCheckUtils]: 6: Hoare triple {693#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {693#true} is VALID [2022-04-27 22:19:16,540 INFO L290 TraceCheckUtils]: 5: Hoare triple {693#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {693#true} is VALID [2022-04-27 22:19:16,540 INFO L272 TraceCheckUtils]: 4: Hoare triple {693#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,540 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {693#true} {693#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,540 INFO L290 TraceCheckUtils]: 2: Hoare triple {693#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,540 INFO L290 TraceCheckUtils]: 1: Hoare triple {693#true} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {693#true} is VALID [2022-04-27 22:19:16,540 INFO L272 TraceCheckUtils]: 0: Hoare triple {693#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {693#true} is VALID [2022-04-27 22:19:16,541 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:16,541 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2024787648] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:19:16,541 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:19:16,541 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-04-27 22:19:16,541 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1307875603] [2022-04-27 22:19:16,541 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:19:16,542 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 13 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 22:19:16,542 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:19:16,542 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 13 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:16,575 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:16,575 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 22:19:16,575 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:19:16,576 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 22:19:16,576 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2022-04-27 22:19:16,576 INFO L87 Difference]: Start difference. First operand 30 states and 34 transitions. Second operand has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 13 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:17,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:17,241 INFO L93 Difference]: Finished difference Result 73 states and 90 transitions. [2022-04-27 22:19:17,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-27 22:19:17,241 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 13 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 22:19:17,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:19:17,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 13 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:17,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 83 transitions. [2022-04-27 22:19:17,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 13 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:17,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 83 transitions. [2022-04-27 22:19:17,245 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 83 transitions. [2022-04-27 22:19:17,308 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:17,309 INFO L225 Difference]: With dead ends: 73 [2022-04-27 22:19:17,309 INFO L226 Difference]: Without dead ends: 49 [2022-04-27 22:19:17,310 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=175, Invalid=377, Unknown=0, NotChecked=0, Total=552 [2022-04-27 22:19:17,310 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 89 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 207 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 90 SdHoareTripleChecker+Valid, 56 SdHoareTripleChecker+Invalid, 242 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 207 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:19:17,310 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [90 Valid, 56 Invalid, 242 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 207 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:19:17,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-27 22:19:17,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 42. [2022-04-27 22:19:17,323 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:19:17,323 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 42 states, 36 states have (on average 1.1388888888888888) internal successors, (41), 36 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:17,324 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 42 states, 36 states have (on average 1.1388888888888888) internal successors, (41), 36 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:17,324 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 42 states, 36 states have (on average 1.1388888888888888) internal successors, (41), 36 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:17,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:17,325 INFO L93 Difference]: Finished difference Result 49 states and 56 transitions. [2022-04-27 22:19:17,325 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 56 transitions. [2022-04-27 22:19:17,326 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:19:17,326 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:19:17,326 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 36 states have (on average 1.1388888888888888) internal successors, (41), 36 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 49 states. [2022-04-27 22:19:17,326 INFO L87 Difference]: Start difference. First operand has 42 states, 36 states have (on average 1.1388888888888888) internal successors, (41), 36 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 49 states. [2022-04-27 22:19:17,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:17,327 INFO L93 Difference]: Finished difference Result 49 states and 56 transitions. [2022-04-27 22:19:17,327 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 56 transitions. [2022-04-27 22:19:17,327 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:19:17,327 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:19:17,327 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:19:17,328 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:19:17,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 36 states have (on average 1.1388888888888888) internal successors, (41), 36 states have internal predecessors, (41), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:17,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 46 transitions. [2022-04-27 22:19:17,329 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 46 transitions. Word has length 23 [2022-04-27 22:19:17,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:19:17,329 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 46 transitions. [2022-04-27 22:19:17,329 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.2857142857142856) internal successors, (32), 13 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:17,329 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 46 transitions. [2022-04-27 22:19:17,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-27 22:19:17,330 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:19:17,330 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:19:17,347 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 22:19:17,533 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 22:19:17,533 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:19:17,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:19:17,534 INFO L85 PathProgramCache]: Analyzing trace with hash -607664937, now seen corresponding path program 3 times [2022-04-27 22:19:17,534 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:19:17,534 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452263181] [2022-04-27 22:19:17,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:19:17,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:19:17,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:17,722 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:19:17,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:17,732 INFO L290 TraceCheckUtils]: 0: Hoare triple {1154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1138#true} is VALID [2022-04-27 22:19:17,732 INFO L290 TraceCheckUtils]: 1: Hoare triple {1138#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:17,732 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1138#true} {1138#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:17,733 INFO L272 TraceCheckUtils]: 0: Hoare triple {1138#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:19:17,733 INFO L290 TraceCheckUtils]: 1: Hoare triple {1154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1138#true} is VALID [2022-04-27 22:19:17,733 INFO L290 TraceCheckUtils]: 2: Hoare triple {1138#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:17,734 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1138#true} {1138#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:17,734 INFO L272 TraceCheckUtils]: 4: Hoare triple {1138#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:17,743 INFO L290 TraceCheckUtils]: 5: Hoare triple {1138#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {1138#true} is VALID [2022-04-27 22:19:17,744 INFO L290 TraceCheckUtils]: 6: Hoare triple {1138#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {1138#true} is VALID [2022-04-27 22:19:17,744 INFO L290 TraceCheckUtils]: 7: Hoare triple {1138#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {1138#true} is VALID [2022-04-27 22:19:17,744 INFO L290 TraceCheckUtils]: 8: Hoare triple {1138#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1138#true} is VALID [2022-04-27 22:19:17,744 INFO L290 TraceCheckUtils]: 9: Hoare triple {1138#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {1143#(= main_~v~0 0)} is VALID [2022-04-27 22:19:17,745 INFO L290 TraceCheckUtils]: 10: Hoare triple {1143#(= main_~v~0 0)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1143#(= main_~v~0 0)} is VALID [2022-04-27 22:19:17,745 INFO L290 TraceCheckUtils]: 11: Hoare triple {1143#(= main_~v~0 0)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1144#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:17,746 INFO L290 TraceCheckUtils]: 12: Hoare triple {1144#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1144#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:17,746 INFO L290 TraceCheckUtils]: 13: Hoare triple {1144#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1145#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:17,746 INFO L290 TraceCheckUtils]: 14: Hoare triple {1145#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1145#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:17,747 INFO L290 TraceCheckUtils]: 15: Hoare triple {1145#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1146#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:17,747 INFO L290 TraceCheckUtils]: 16: Hoare triple {1146#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1146#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:17,748 INFO L290 TraceCheckUtils]: 17: Hoare triple {1146#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1147#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:19:17,748 INFO L290 TraceCheckUtils]: 18: Hoare triple {1147#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1147#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:19:17,749 INFO L290 TraceCheckUtils]: 19: Hoare triple {1147#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1148#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:19:17,752 INFO L290 TraceCheckUtils]: 20: Hoare triple {1148#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1148#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:19:17,753 INFO L290 TraceCheckUtils]: 21: Hoare triple {1148#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1149#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:19:17,753 INFO L290 TraceCheckUtils]: 22: Hoare triple {1149#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1149#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:19:17,754 INFO L290 TraceCheckUtils]: 23: Hoare triple {1149#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1150#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:19:17,754 INFO L290 TraceCheckUtils]: 24: Hoare triple {1150#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1150#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:19:17,754 INFO L290 TraceCheckUtils]: 25: Hoare triple {1150#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1151#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:19:17,755 INFO L290 TraceCheckUtils]: 26: Hoare triple {1151#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1151#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:19:17,755 INFO L290 TraceCheckUtils]: 27: Hoare triple {1151#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1152#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:19:17,756 INFO L290 TraceCheckUtils]: 28: Hoare triple {1152#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1152#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:19:17,756 INFO L290 TraceCheckUtils]: 29: Hoare triple {1152#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1153#(and (<= main_~v~0 10) (not (<= (+ (div main_~v~0 4294967296) 1) 0)))} is VALID [2022-04-27 22:19:17,756 INFO L290 TraceCheckUtils]: 30: Hoare triple {1153#(and (<= main_~v~0 10) (not (<= (+ (div main_~v~0 4294967296) 1) 0)))} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 22:19:17,757 INFO L272 TraceCheckUtils]: 31: Hoare triple {1139#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {1139#false} is VALID [2022-04-27 22:19:17,757 INFO L290 TraceCheckUtils]: 32: Hoare triple {1139#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1139#false} is VALID [2022-04-27 22:19:17,757 INFO L290 TraceCheckUtils]: 33: Hoare triple {1139#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 22:19:17,757 INFO L290 TraceCheckUtils]: 34: Hoare triple {1139#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 22:19:17,757 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:17,757 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:19:17,758 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1452263181] [2022-04-27 22:19:17,758 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1452263181] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:19:17,758 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1622145364] [2022-04-27 22:19:17,758 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:19:17,758 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:19:17,758 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:19:17,759 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:19:17,760 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 22:19:17,805 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-04-27 22:19:17,806 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:19:17,807 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 23 conjunts are in the unsatisfiable core [2022-04-27 22:19:17,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:17,815 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:19:18,124 INFO L272 TraceCheckUtils]: 0: Hoare triple {1138#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:18,125 INFO L290 TraceCheckUtils]: 1: Hoare triple {1138#true} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1138#true} is VALID [2022-04-27 22:19:18,125 INFO L290 TraceCheckUtils]: 2: Hoare triple {1138#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:18,125 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1138#true} {1138#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:18,125 INFO L272 TraceCheckUtils]: 4: Hoare triple {1138#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:18,125 INFO L290 TraceCheckUtils]: 5: Hoare triple {1138#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {1138#true} is VALID [2022-04-27 22:19:18,125 INFO L290 TraceCheckUtils]: 6: Hoare triple {1138#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {1138#true} is VALID [2022-04-27 22:19:18,125 INFO L290 TraceCheckUtils]: 7: Hoare triple {1138#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {1138#true} is VALID [2022-04-27 22:19:18,126 INFO L290 TraceCheckUtils]: 8: Hoare triple {1138#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1138#true} is VALID [2022-04-27 22:19:18,135 INFO L290 TraceCheckUtils]: 9: Hoare triple {1138#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {1143#(= main_~v~0 0)} is VALID [2022-04-27 22:19:18,136 INFO L290 TraceCheckUtils]: 10: Hoare triple {1143#(= main_~v~0 0)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1143#(= main_~v~0 0)} is VALID [2022-04-27 22:19:18,136 INFO L290 TraceCheckUtils]: 11: Hoare triple {1143#(= main_~v~0 0)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1144#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:18,136 INFO L290 TraceCheckUtils]: 12: Hoare triple {1144#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1144#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:18,137 INFO L290 TraceCheckUtils]: 13: Hoare triple {1144#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1145#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:18,137 INFO L290 TraceCheckUtils]: 14: Hoare triple {1145#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1145#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:18,137 INFO L290 TraceCheckUtils]: 15: Hoare triple {1145#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1146#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:18,138 INFO L290 TraceCheckUtils]: 16: Hoare triple {1146#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1146#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:18,138 INFO L290 TraceCheckUtils]: 17: Hoare triple {1146#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1147#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:19:18,139 INFO L290 TraceCheckUtils]: 18: Hoare triple {1147#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1147#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:19:18,139 INFO L290 TraceCheckUtils]: 19: Hoare triple {1147#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1148#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:19:18,139 INFO L290 TraceCheckUtils]: 20: Hoare triple {1148#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1148#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:19:18,140 INFO L290 TraceCheckUtils]: 21: Hoare triple {1148#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1149#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:19:18,140 INFO L290 TraceCheckUtils]: 22: Hoare triple {1149#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1149#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:19:18,140 INFO L290 TraceCheckUtils]: 23: Hoare triple {1149#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1150#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:19:18,141 INFO L290 TraceCheckUtils]: 24: Hoare triple {1150#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1150#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:19:18,141 INFO L290 TraceCheckUtils]: 25: Hoare triple {1150#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1151#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:19:18,142 INFO L290 TraceCheckUtils]: 26: Hoare triple {1151#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1151#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:19:18,142 INFO L290 TraceCheckUtils]: 27: Hoare triple {1151#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1152#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:19:18,142 INFO L290 TraceCheckUtils]: 28: Hoare triple {1152#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1152#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:19:18,143 INFO L290 TraceCheckUtils]: 29: Hoare triple {1152#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1245#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2022-04-27 22:19:18,143 INFO L290 TraceCheckUtils]: 30: Hoare triple {1245#(and (<= 10 main_~v~0) (<= main_~v~0 10))} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 22:19:18,143 INFO L272 TraceCheckUtils]: 31: Hoare triple {1139#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {1139#false} is VALID [2022-04-27 22:19:18,143 INFO L290 TraceCheckUtils]: 32: Hoare triple {1139#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1139#false} is VALID [2022-04-27 22:19:18,144 INFO L290 TraceCheckUtils]: 33: Hoare triple {1139#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 22:19:18,144 INFO L290 TraceCheckUtils]: 34: Hoare triple {1139#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 22:19:18,144 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:18,144 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:19:18,454 INFO L290 TraceCheckUtils]: 34: Hoare triple {1139#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 22:19:18,454 INFO L290 TraceCheckUtils]: 33: Hoare triple {1139#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 22:19:18,455 INFO L290 TraceCheckUtils]: 32: Hoare triple {1139#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1139#false} is VALID [2022-04-27 22:19:18,455 INFO L272 TraceCheckUtils]: 31: Hoare triple {1139#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {1139#false} is VALID [2022-04-27 22:19:18,457 INFO L290 TraceCheckUtils]: 30: Hoare triple {1273#(< (mod main_~v~0 4294967296) 268435455)} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {1139#false} is VALID [2022-04-27 22:19:18,460 INFO L290 TraceCheckUtils]: 29: Hoare triple {1277#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1273#(< (mod main_~v~0 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,461 INFO L290 TraceCheckUtils]: 28: Hoare triple {1277#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1277#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,462 INFO L290 TraceCheckUtils]: 27: Hoare triple {1284#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1277#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,463 INFO L290 TraceCheckUtils]: 26: Hoare triple {1284#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1284#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,464 INFO L290 TraceCheckUtils]: 25: Hoare triple {1291#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1284#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,464 INFO L290 TraceCheckUtils]: 24: Hoare triple {1291#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1291#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,465 INFO L290 TraceCheckUtils]: 23: Hoare triple {1298#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1291#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,465 INFO L290 TraceCheckUtils]: 22: Hoare triple {1298#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1298#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,467 INFO L290 TraceCheckUtils]: 21: Hoare triple {1305#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1298#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,468 INFO L290 TraceCheckUtils]: 20: Hoare triple {1305#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1305#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,468 INFO L290 TraceCheckUtils]: 19: Hoare triple {1312#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1305#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,468 INFO L290 TraceCheckUtils]: 18: Hoare triple {1312#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1312#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,469 INFO L290 TraceCheckUtils]: 17: Hoare triple {1319#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1312#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,469 INFO L290 TraceCheckUtils]: 16: Hoare triple {1319#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1319#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,470 INFO L290 TraceCheckUtils]: 15: Hoare triple {1326#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1319#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,470 INFO L290 TraceCheckUtils]: 14: Hoare triple {1326#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1326#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,471 INFO L290 TraceCheckUtils]: 13: Hoare triple {1333#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1326#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,471 INFO L290 TraceCheckUtils]: 12: Hoare triple {1333#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1333#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,472 INFO L290 TraceCheckUtils]: 11: Hoare triple {1340#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1333#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,472 INFO L290 TraceCheckUtils]: 10: Hoare triple {1340#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1340#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,473 INFO L290 TraceCheckUtils]: 9: Hoare triple {1138#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {1340#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} is VALID [2022-04-27 22:19:18,473 INFO L290 TraceCheckUtils]: 8: Hoare triple {1138#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1138#true} is VALID [2022-04-27 22:19:18,473 INFO L290 TraceCheckUtils]: 7: Hoare triple {1138#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {1138#true} is VALID [2022-04-27 22:19:18,473 INFO L290 TraceCheckUtils]: 6: Hoare triple {1138#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {1138#true} is VALID [2022-04-27 22:19:18,473 INFO L290 TraceCheckUtils]: 5: Hoare triple {1138#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {1138#true} is VALID [2022-04-27 22:19:18,473 INFO L272 TraceCheckUtils]: 4: Hoare triple {1138#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:18,473 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1138#true} {1138#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:18,473 INFO L290 TraceCheckUtils]: 2: Hoare triple {1138#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:18,473 INFO L290 TraceCheckUtils]: 1: Hoare triple {1138#true} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1138#true} is VALID [2022-04-27 22:19:18,474 INFO L272 TraceCheckUtils]: 0: Hoare triple {1138#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#true} is VALID [2022-04-27 22:19:18,474 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:18,474 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1622145364] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:19:18,474 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:19:18,474 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 26 [2022-04-27 22:19:18,474 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [590017229] [2022-04-27 22:19:18,474 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:19:18,475 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 25 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 22:19:18,475 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:19:18,475 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 25 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:18,527 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:18,527 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-27 22:19:18,527 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:19:18,528 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-27 22:19:18,528 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=458, Unknown=0, NotChecked=0, Total=650 [2022-04-27 22:19:18,528 INFO L87 Difference]: Start difference. First operand 42 states and 46 transitions. Second operand has 26 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 25 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:23,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:23,255 INFO L93 Difference]: Finished difference Result 109 states and 132 transitions. [2022-04-27 22:19:23,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-27 22:19:23,255 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 25 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 22:19:23,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:19:23,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 25 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:23,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 113 transitions. [2022-04-27 22:19:23,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 25 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:23,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 113 transitions. [2022-04-27 22:19:23,259 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 113 transitions. [2022-04-27 22:19:23,364 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:23,368 INFO L225 Difference]: With dead ends: 109 [2022-04-27 22:19:23,368 INFO L226 Difference]: Without dead ends: 73 [2022-04-27 22:19:23,369 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 268 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=643, Invalid=1613, Unknown=0, NotChecked=0, Total=2256 [2022-04-27 22:19:23,371 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 110 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 597 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 111 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 650 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 597 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:19:23,371 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [111 Valid, 96 Invalid, 650 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 597 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-27 22:19:23,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2022-04-27 22:19:23,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 66. [2022-04-27 22:19:23,410 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:19:23,410 INFO L82 GeneralOperation]: Start isEquivalent. First operand 73 states. Second operand has 66 states, 60 states have (on average 1.0833333333333333) internal successors, (65), 60 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:23,411 INFO L74 IsIncluded]: Start isIncluded. First operand 73 states. Second operand has 66 states, 60 states have (on average 1.0833333333333333) internal successors, (65), 60 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:23,411 INFO L87 Difference]: Start difference. First operand 73 states. Second operand has 66 states, 60 states have (on average 1.0833333333333333) internal successors, (65), 60 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:23,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:23,413 INFO L93 Difference]: Finished difference Result 73 states and 80 transitions. [2022-04-27 22:19:23,413 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 80 transitions. [2022-04-27 22:19:23,413 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:19:23,414 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:19:23,414 INFO L74 IsIncluded]: Start isIncluded. First operand has 66 states, 60 states have (on average 1.0833333333333333) internal successors, (65), 60 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 73 states. [2022-04-27 22:19:23,414 INFO L87 Difference]: Start difference. First operand has 66 states, 60 states have (on average 1.0833333333333333) internal successors, (65), 60 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 73 states. [2022-04-27 22:19:23,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:19:23,416 INFO L93 Difference]: Finished difference Result 73 states and 80 transitions. [2022-04-27 22:19:23,416 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 80 transitions. [2022-04-27 22:19:23,420 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:19:23,420 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:19:23,420 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:19:23,420 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:19:23,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 60 states have (on average 1.0833333333333333) internal successors, (65), 60 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:19:23,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2022-04-27 22:19:23,422 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 35 [2022-04-27 22:19:23,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:19:23,423 INFO L495 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2022-04-27 22:19:23,423 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 25 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:23,423 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2022-04-27 22:19:23,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-04-27 22:19:23,426 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:19:23,427 INFO L195 NwaCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:19:23,443 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 22:19:23,635 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:19:23,636 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:19:23,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:19:23,636 INFO L85 PathProgramCache]: Analyzing trace with hash -943491009, now seen corresponding path program 4 times [2022-04-27 22:19:23,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:19:23,636 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098183416] [2022-04-27 22:19:23,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:19:23,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:19:23,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:24,106 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:19:24,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:24,115 INFO L290 TraceCheckUtils]: 0: Hoare triple {1857#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1829#true} is VALID [2022-04-27 22:19:24,115 INFO L290 TraceCheckUtils]: 1: Hoare triple {1829#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:24,115 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1829#true} {1829#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:24,117 INFO L272 TraceCheckUtils]: 0: Hoare triple {1829#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1857#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:19:24,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {1857#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1829#true} is VALID [2022-04-27 22:19:24,117 INFO L290 TraceCheckUtils]: 2: Hoare triple {1829#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:24,117 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1829#true} {1829#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:24,117 INFO L272 TraceCheckUtils]: 4: Hoare triple {1829#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:24,117 INFO L290 TraceCheckUtils]: 5: Hoare triple {1829#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {1829#true} is VALID [2022-04-27 22:19:24,117 INFO L290 TraceCheckUtils]: 6: Hoare triple {1829#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {1829#true} is VALID [2022-04-27 22:19:24,117 INFO L290 TraceCheckUtils]: 7: Hoare triple {1829#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {1829#true} is VALID [2022-04-27 22:19:24,117 INFO L290 TraceCheckUtils]: 8: Hoare triple {1829#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1829#true} is VALID [2022-04-27 22:19:24,118 INFO L290 TraceCheckUtils]: 9: Hoare triple {1829#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {1834#(= main_~v~0 0)} is VALID [2022-04-27 22:19:24,118 INFO L290 TraceCheckUtils]: 10: Hoare triple {1834#(= main_~v~0 0)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1834#(= main_~v~0 0)} is VALID [2022-04-27 22:19:24,118 INFO L290 TraceCheckUtils]: 11: Hoare triple {1834#(= main_~v~0 0)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:24,119 INFO L290 TraceCheckUtils]: 12: Hoare triple {1835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:24,119 INFO L290 TraceCheckUtils]: 13: Hoare triple {1835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1836#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:24,120 INFO L290 TraceCheckUtils]: 14: Hoare triple {1836#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1836#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:24,120 INFO L290 TraceCheckUtils]: 15: Hoare triple {1836#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1837#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:24,121 INFO L290 TraceCheckUtils]: 16: Hoare triple {1837#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1837#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:24,121 INFO L290 TraceCheckUtils]: 17: Hoare triple {1837#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1838#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:19:24,121 INFO L290 TraceCheckUtils]: 18: Hoare triple {1838#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1838#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:19:24,122 INFO L290 TraceCheckUtils]: 19: Hoare triple {1838#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1839#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:19:24,123 INFO L290 TraceCheckUtils]: 20: Hoare triple {1839#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1839#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:19:24,123 INFO L290 TraceCheckUtils]: 21: Hoare triple {1839#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1840#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:19:24,123 INFO L290 TraceCheckUtils]: 22: Hoare triple {1840#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1840#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:19:24,124 INFO L290 TraceCheckUtils]: 23: Hoare triple {1840#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1841#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:19:24,124 INFO L290 TraceCheckUtils]: 24: Hoare triple {1841#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1841#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:19:24,125 INFO L290 TraceCheckUtils]: 25: Hoare triple {1841#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1842#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:19:24,126 INFO L290 TraceCheckUtils]: 26: Hoare triple {1842#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1842#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:19:24,126 INFO L290 TraceCheckUtils]: 27: Hoare triple {1842#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1843#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:19:24,127 INFO L290 TraceCheckUtils]: 28: Hoare triple {1843#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1843#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:19:24,127 INFO L290 TraceCheckUtils]: 29: Hoare triple {1843#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1844#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2022-04-27 22:19:24,127 INFO L290 TraceCheckUtils]: 30: Hoare triple {1844#(and (<= 10 main_~v~0) (<= main_~v~0 10))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1844#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2022-04-27 22:19:24,128 INFO L290 TraceCheckUtils]: 31: Hoare triple {1844#(and (<= 10 main_~v~0) (<= main_~v~0 10))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1845#(and (<= main_~v~0 11) (<= 11 main_~v~0))} is VALID [2022-04-27 22:19:24,128 INFO L290 TraceCheckUtils]: 32: Hoare triple {1845#(and (<= main_~v~0 11) (<= 11 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1845#(and (<= main_~v~0 11) (<= 11 main_~v~0))} is VALID [2022-04-27 22:19:24,129 INFO L290 TraceCheckUtils]: 33: Hoare triple {1845#(and (<= main_~v~0 11) (<= 11 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1846#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2022-04-27 22:19:24,129 INFO L290 TraceCheckUtils]: 34: Hoare triple {1846#(and (<= 12 main_~v~0) (<= main_~v~0 12))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1846#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2022-04-27 22:19:24,130 INFO L290 TraceCheckUtils]: 35: Hoare triple {1846#(and (<= 12 main_~v~0) (<= main_~v~0 12))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1847#(and (<= 13 main_~v~0) (<= main_~v~0 13))} is VALID [2022-04-27 22:19:24,130 INFO L290 TraceCheckUtils]: 36: Hoare triple {1847#(and (<= 13 main_~v~0) (<= main_~v~0 13))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1847#(and (<= 13 main_~v~0) (<= main_~v~0 13))} is VALID [2022-04-27 22:19:24,131 INFO L290 TraceCheckUtils]: 37: Hoare triple {1847#(and (<= 13 main_~v~0) (<= main_~v~0 13))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1848#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2022-04-27 22:19:24,131 INFO L290 TraceCheckUtils]: 38: Hoare triple {1848#(and (<= main_~v~0 14) (<= 14 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1848#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2022-04-27 22:19:24,132 INFO L290 TraceCheckUtils]: 39: Hoare triple {1848#(and (<= main_~v~0 14) (<= 14 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1849#(and (<= 15 main_~v~0) (<= main_~v~0 15))} is VALID [2022-04-27 22:19:24,132 INFO L290 TraceCheckUtils]: 40: Hoare triple {1849#(and (<= 15 main_~v~0) (<= main_~v~0 15))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1849#(and (<= 15 main_~v~0) (<= main_~v~0 15))} is VALID [2022-04-27 22:19:24,132 INFO L290 TraceCheckUtils]: 41: Hoare triple {1849#(and (<= 15 main_~v~0) (<= main_~v~0 15))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1850#(and (<= main_~v~0 16) (<= 16 main_~v~0))} is VALID [2022-04-27 22:19:24,133 INFO L290 TraceCheckUtils]: 42: Hoare triple {1850#(and (<= main_~v~0 16) (<= 16 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1850#(and (<= main_~v~0 16) (<= 16 main_~v~0))} is VALID [2022-04-27 22:19:24,133 INFO L290 TraceCheckUtils]: 43: Hoare triple {1850#(and (<= main_~v~0 16) (<= 16 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1851#(and (<= main_~v~0 17) (<= 17 main_~v~0))} is VALID [2022-04-27 22:19:24,134 INFO L290 TraceCheckUtils]: 44: Hoare triple {1851#(and (<= main_~v~0 17) (<= 17 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1851#(and (<= main_~v~0 17) (<= 17 main_~v~0))} is VALID [2022-04-27 22:19:24,134 INFO L290 TraceCheckUtils]: 45: Hoare triple {1851#(and (<= main_~v~0 17) (<= 17 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1852#(and (<= main_~v~0 18) (<= 18 main_~v~0))} is VALID [2022-04-27 22:19:24,134 INFO L290 TraceCheckUtils]: 46: Hoare triple {1852#(and (<= main_~v~0 18) (<= 18 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1852#(and (<= main_~v~0 18) (<= 18 main_~v~0))} is VALID [2022-04-27 22:19:24,135 INFO L290 TraceCheckUtils]: 47: Hoare triple {1852#(and (<= main_~v~0 18) (<= 18 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1853#(and (<= 19 main_~v~0) (<= main_~v~0 19))} is VALID [2022-04-27 22:19:24,135 INFO L290 TraceCheckUtils]: 48: Hoare triple {1853#(and (<= 19 main_~v~0) (<= main_~v~0 19))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1853#(and (<= 19 main_~v~0) (<= main_~v~0 19))} is VALID [2022-04-27 22:19:24,136 INFO L290 TraceCheckUtils]: 49: Hoare triple {1853#(and (<= 19 main_~v~0) (<= main_~v~0 19))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1854#(and (<= main_~v~0 20) (<= 20 main_~v~0))} is VALID [2022-04-27 22:19:24,136 INFO L290 TraceCheckUtils]: 50: Hoare triple {1854#(and (<= main_~v~0 20) (<= 20 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1854#(and (<= main_~v~0 20) (<= 20 main_~v~0))} is VALID [2022-04-27 22:19:24,137 INFO L290 TraceCheckUtils]: 51: Hoare triple {1854#(and (<= main_~v~0 20) (<= 20 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1855#(and (<= main_~v~0 21) (<= 21 main_~v~0))} is VALID [2022-04-27 22:19:24,137 INFO L290 TraceCheckUtils]: 52: Hoare triple {1855#(and (<= main_~v~0 21) (<= 21 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1855#(and (<= main_~v~0 21) (<= 21 main_~v~0))} is VALID [2022-04-27 22:19:24,137 INFO L290 TraceCheckUtils]: 53: Hoare triple {1855#(and (<= main_~v~0 21) (<= 21 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1856#(and (<= main_~v~0 22) (not (<= (+ (div main_~v~0 4294967296) 1) 0)))} is VALID [2022-04-27 22:19:24,138 INFO L290 TraceCheckUtils]: 54: Hoare triple {1856#(and (<= main_~v~0 22) (not (<= (+ (div main_~v~0 4294967296) 1) 0)))} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {1830#false} is VALID [2022-04-27 22:19:24,138 INFO L272 TraceCheckUtils]: 55: Hoare triple {1830#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {1830#false} is VALID [2022-04-27 22:19:24,138 INFO L290 TraceCheckUtils]: 56: Hoare triple {1830#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1830#false} is VALID [2022-04-27 22:19:24,139 INFO L290 TraceCheckUtils]: 57: Hoare triple {1830#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1830#false} is VALID [2022-04-27 22:19:24,139 INFO L290 TraceCheckUtils]: 58: Hoare triple {1830#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1830#false} is VALID [2022-04-27 22:19:24,139 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:24,139 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:19:24,139 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2098183416] [2022-04-27 22:19:24,139 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2098183416] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:19:24,141 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1721952693] [2022-04-27 22:19:24,142 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:19:24,142 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:19:24,142 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:19:24,143 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:19:24,144 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 22:19:24,222 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:19:24,223 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:19:24,224 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-27 22:19:24,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:19:24,241 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:19:24,812 INFO L272 TraceCheckUtils]: 0: Hoare triple {1829#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:24,813 INFO L290 TraceCheckUtils]: 1: Hoare triple {1829#true} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1829#true} is VALID [2022-04-27 22:19:24,813 INFO L290 TraceCheckUtils]: 2: Hoare triple {1829#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:24,813 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1829#true} {1829#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:24,813 INFO L272 TraceCheckUtils]: 4: Hoare triple {1829#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:24,813 INFO L290 TraceCheckUtils]: 5: Hoare triple {1829#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {1829#true} is VALID [2022-04-27 22:19:24,813 INFO L290 TraceCheckUtils]: 6: Hoare triple {1829#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {1829#true} is VALID [2022-04-27 22:19:24,813 INFO L290 TraceCheckUtils]: 7: Hoare triple {1829#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {1829#true} is VALID [2022-04-27 22:19:24,813 INFO L290 TraceCheckUtils]: 8: Hoare triple {1829#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1829#true} is VALID [2022-04-27 22:19:24,814 INFO L290 TraceCheckUtils]: 9: Hoare triple {1829#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {1834#(= main_~v~0 0)} is VALID [2022-04-27 22:19:24,814 INFO L290 TraceCheckUtils]: 10: Hoare triple {1834#(= main_~v~0 0)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1834#(= main_~v~0 0)} is VALID [2022-04-27 22:19:24,814 INFO L290 TraceCheckUtils]: 11: Hoare triple {1834#(= main_~v~0 0)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:24,815 INFO L290 TraceCheckUtils]: 12: Hoare triple {1835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:19:24,815 INFO L290 TraceCheckUtils]: 13: Hoare triple {1835#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1836#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:24,816 INFO L290 TraceCheckUtils]: 14: Hoare triple {1836#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1836#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:19:24,816 INFO L290 TraceCheckUtils]: 15: Hoare triple {1836#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1837#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:24,816 INFO L290 TraceCheckUtils]: 16: Hoare triple {1837#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1837#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:19:24,817 INFO L290 TraceCheckUtils]: 17: Hoare triple {1837#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1838#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:19:24,818 INFO L290 TraceCheckUtils]: 18: Hoare triple {1838#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1838#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:19:24,818 INFO L290 TraceCheckUtils]: 19: Hoare triple {1838#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1839#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:19:24,818 INFO L290 TraceCheckUtils]: 20: Hoare triple {1839#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1839#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:19:24,819 INFO L290 TraceCheckUtils]: 21: Hoare triple {1839#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1840#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:19:24,819 INFO L290 TraceCheckUtils]: 22: Hoare triple {1840#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1840#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:19:24,820 INFO L290 TraceCheckUtils]: 23: Hoare triple {1840#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1841#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:19:24,820 INFO L290 TraceCheckUtils]: 24: Hoare triple {1841#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1841#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:19:24,820 INFO L290 TraceCheckUtils]: 25: Hoare triple {1841#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1842#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:19:24,821 INFO L290 TraceCheckUtils]: 26: Hoare triple {1842#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1842#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:19:24,821 INFO L290 TraceCheckUtils]: 27: Hoare triple {1842#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1843#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:19:24,822 INFO L290 TraceCheckUtils]: 28: Hoare triple {1843#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1843#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:19:24,822 INFO L290 TraceCheckUtils]: 29: Hoare triple {1843#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1844#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2022-04-27 22:19:24,822 INFO L290 TraceCheckUtils]: 30: Hoare triple {1844#(and (<= 10 main_~v~0) (<= main_~v~0 10))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1844#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2022-04-27 22:19:24,823 INFO L290 TraceCheckUtils]: 31: Hoare triple {1844#(and (<= 10 main_~v~0) (<= main_~v~0 10))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1845#(and (<= main_~v~0 11) (<= 11 main_~v~0))} is VALID [2022-04-27 22:19:24,823 INFO L290 TraceCheckUtils]: 32: Hoare triple {1845#(and (<= main_~v~0 11) (<= 11 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1845#(and (<= main_~v~0 11) (<= 11 main_~v~0))} is VALID [2022-04-27 22:19:24,824 INFO L290 TraceCheckUtils]: 33: Hoare triple {1845#(and (<= main_~v~0 11) (<= 11 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1846#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2022-04-27 22:19:24,824 INFO L290 TraceCheckUtils]: 34: Hoare triple {1846#(and (<= 12 main_~v~0) (<= main_~v~0 12))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1846#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2022-04-27 22:19:24,825 INFO L290 TraceCheckUtils]: 35: Hoare triple {1846#(and (<= 12 main_~v~0) (<= main_~v~0 12))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1847#(and (<= 13 main_~v~0) (<= main_~v~0 13))} is VALID [2022-04-27 22:19:24,825 INFO L290 TraceCheckUtils]: 36: Hoare triple {1847#(and (<= 13 main_~v~0) (<= main_~v~0 13))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1847#(and (<= 13 main_~v~0) (<= main_~v~0 13))} is VALID [2022-04-27 22:19:24,825 INFO L290 TraceCheckUtils]: 37: Hoare triple {1847#(and (<= 13 main_~v~0) (<= main_~v~0 13))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1848#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2022-04-27 22:19:24,826 INFO L290 TraceCheckUtils]: 38: Hoare triple {1848#(and (<= main_~v~0 14) (<= 14 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1848#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2022-04-27 22:19:24,826 INFO L290 TraceCheckUtils]: 39: Hoare triple {1848#(and (<= main_~v~0 14) (<= 14 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1849#(and (<= 15 main_~v~0) (<= main_~v~0 15))} is VALID [2022-04-27 22:19:24,827 INFO L290 TraceCheckUtils]: 40: Hoare triple {1849#(and (<= 15 main_~v~0) (<= main_~v~0 15))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1849#(and (<= 15 main_~v~0) (<= main_~v~0 15))} is VALID [2022-04-27 22:19:24,827 INFO L290 TraceCheckUtils]: 41: Hoare triple {1849#(and (<= 15 main_~v~0) (<= main_~v~0 15))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1850#(and (<= main_~v~0 16) (<= 16 main_~v~0))} is VALID [2022-04-27 22:19:24,827 INFO L290 TraceCheckUtils]: 42: Hoare triple {1850#(and (<= main_~v~0 16) (<= 16 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1850#(and (<= main_~v~0 16) (<= 16 main_~v~0))} is VALID [2022-04-27 22:19:24,831 INFO L290 TraceCheckUtils]: 43: Hoare triple {1850#(and (<= main_~v~0 16) (<= 16 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1851#(and (<= main_~v~0 17) (<= 17 main_~v~0))} is VALID [2022-04-27 22:19:24,832 INFO L290 TraceCheckUtils]: 44: Hoare triple {1851#(and (<= main_~v~0 17) (<= 17 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1851#(and (<= main_~v~0 17) (<= 17 main_~v~0))} is VALID [2022-04-27 22:19:24,832 INFO L290 TraceCheckUtils]: 45: Hoare triple {1851#(and (<= main_~v~0 17) (<= 17 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1852#(and (<= main_~v~0 18) (<= 18 main_~v~0))} is VALID [2022-04-27 22:19:24,837 INFO L290 TraceCheckUtils]: 46: Hoare triple {1852#(and (<= main_~v~0 18) (<= 18 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1852#(and (<= main_~v~0 18) (<= 18 main_~v~0))} is VALID [2022-04-27 22:19:24,838 INFO L290 TraceCheckUtils]: 47: Hoare triple {1852#(and (<= main_~v~0 18) (<= 18 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1853#(and (<= 19 main_~v~0) (<= main_~v~0 19))} is VALID [2022-04-27 22:19:24,838 INFO L290 TraceCheckUtils]: 48: Hoare triple {1853#(and (<= 19 main_~v~0) (<= main_~v~0 19))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1853#(and (<= 19 main_~v~0) (<= main_~v~0 19))} is VALID [2022-04-27 22:19:24,839 INFO L290 TraceCheckUtils]: 49: Hoare triple {1853#(and (<= 19 main_~v~0) (<= main_~v~0 19))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1854#(and (<= main_~v~0 20) (<= 20 main_~v~0))} is VALID [2022-04-27 22:19:24,839 INFO L290 TraceCheckUtils]: 50: Hoare triple {1854#(and (<= main_~v~0 20) (<= 20 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1854#(and (<= main_~v~0 20) (<= 20 main_~v~0))} is VALID [2022-04-27 22:19:24,839 INFO L290 TraceCheckUtils]: 51: Hoare triple {1854#(and (<= main_~v~0 20) (<= 20 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {1855#(and (<= main_~v~0 21) (<= 21 main_~v~0))} is VALID [2022-04-27 22:19:24,840 INFO L290 TraceCheckUtils]: 52: Hoare triple {1855#(and (<= main_~v~0 21) (<= 21 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {1855#(and (<= main_~v~0 21) (<= 21 main_~v~0))} is VALID [2022-04-27 22:19:24,840 INFO L290 TraceCheckUtils]: 53: Hoare triple {1855#(and (<= main_~v~0 21) (<= 21 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2020#(and (<= 22 main_~v~0) (<= main_~v~0 22))} is VALID [2022-04-27 22:19:24,841 INFO L290 TraceCheckUtils]: 54: Hoare triple {2020#(and (<= 22 main_~v~0) (<= main_~v~0 22))} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {1830#false} is VALID [2022-04-27 22:19:24,841 INFO L272 TraceCheckUtils]: 55: Hoare triple {1830#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {1830#false} is VALID [2022-04-27 22:19:24,841 INFO L290 TraceCheckUtils]: 56: Hoare triple {1830#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1830#false} is VALID [2022-04-27 22:19:24,841 INFO L290 TraceCheckUtils]: 57: Hoare triple {1830#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1830#false} is VALID [2022-04-27 22:19:24,841 INFO L290 TraceCheckUtils]: 58: Hoare triple {1830#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1830#false} is VALID [2022-04-27 22:19:24,842 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:24,842 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:19:25,866 INFO L290 TraceCheckUtils]: 58: Hoare triple {1830#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1830#false} is VALID [2022-04-27 22:19:25,866 INFO L290 TraceCheckUtils]: 57: Hoare triple {1830#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1830#false} is VALID [2022-04-27 22:19:25,866 INFO L290 TraceCheckUtils]: 56: Hoare triple {1830#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1830#false} is VALID [2022-04-27 22:19:25,866 INFO L272 TraceCheckUtils]: 55: Hoare triple {1830#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {1830#false} is VALID [2022-04-27 22:19:25,866 INFO L290 TraceCheckUtils]: 54: Hoare triple {2048#(< (mod main_~v~0 4294967296) 268435455)} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {1830#false} is VALID [2022-04-27 22:19:25,867 INFO L290 TraceCheckUtils]: 53: Hoare triple {2052#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2048#(< (mod main_~v~0 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,867 INFO L290 TraceCheckUtils]: 52: Hoare triple {2052#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2052#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,868 INFO L290 TraceCheckUtils]: 51: Hoare triple {2059#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2052#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,868 INFO L290 TraceCheckUtils]: 50: Hoare triple {2059#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2059#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,869 INFO L290 TraceCheckUtils]: 49: Hoare triple {2066#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2059#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,869 INFO L290 TraceCheckUtils]: 48: Hoare triple {2066#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2066#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,870 INFO L290 TraceCheckUtils]: 47: Hoare triple {2073#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2066#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,870 INFO L290 TraceCheckUtils]: 46: Hoare triple {2073#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2073#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,871 INFO L290 TraceCheckUtils]: 45: Hoare triple {2080#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2073#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,871 INFO L290 TraceCheckUtils]: 44: Hoare triple {2080#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2080#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,872 INFO L290 TraceCheckUtils]: 43: Hoare triple {2087#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2080#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,872 INFO L290 TraceCheckUtils]: 42: Hoare triple {2087#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2087#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,873 INFO L290 TraceCheckUtils]: 41: Hoare triple {2094#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2087#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,874 INFO L290 TraceCheckUtils]: 40: Hoare triple {2094#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2094#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,874 INFO L290 TraceCheckUtils]: 39: Hoare triple {2101#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2094#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,875 INFO L290 TraceCheckUtils]: 38: Hoare triple {2101#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2101#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,875 INFO L290 TraceCheckUtils]: 37: Hoare triple {2108#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2101#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,876 INFO L290 TraceCheckUtils]: 36: Hoare triple {2108#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2108#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,876 INFO L290 TraceCheckUtils]: 35: Hoare triple {2115#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2108#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,877 INFO L290 TraceCheckUtils]: 34: Hoare triple {2115#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2115#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,877 INFO L290 TraceCheckUtils]: 33: Hoare triple {2122#(< (mod (+ main_~v~0 11) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2115#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,878 INFO L290 TraceCheckUtils]: 32: Hoare triple {2122#(< (mod (+ main_~v~0 11) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2122#(< (mod (+ main_~v~0 11) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,878 INFO L290 TraceCheckUtils]: 31: Hoare triple {2129#(< (mod (+ main_~v~0 12) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2122#(< (mod (+ main_~v~0 11) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,878 INFO L290 TraceCheckUtils]: 30: Hoare triple {2129#(< (mod (+ main_~v~0 12) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2129#(< (mod (+ main_~v~0 12) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,879 INFO L290 TraceCheckUtils]: 29: Hoare triple {2136#(< (mod (+ main_~v~0 13) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2129#(< (mod (+ main_~v~0 12) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,879 INFO L290 TraceCheckUtils]: 28: Hoare triple {2136#(< (mod (+ main_~v~0 13) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2136#(< (mod (+ main_~v~0 13) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,880 INFO L290 TraceCheckUtils]: 27: Hoare triple {2143#(< (mod (+ main_~v~0 14) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2136#(< (mod (+ main_~v~0 13) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,880 INFO L290 TraceCheckUtils]: 26: Hoare triple {2143#(< (mod (+ main_~v~0 14) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2143#(< (mod (+ main_~v~0 14) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,881 INFO L290 TraceCheckUtils]: 25: Hoare triple {2150#(< (mod (+ main_~v~0 15) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2143#(< (mod (+ main_~v~0 14) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,881 INFO L290 TraceCheckUtils]: 24: Hoare triple {2150#(< (mod (+ main_~v~0 15) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2150#(< (mod (+ main_~v~0 15) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,883 INFO L290 TraceCheckUtils]: 23: Hoare triple {2157#(< (mod (+ main_~v~0 16) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2150#(< (mod (+ main_~v~0 15) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,883 INFO L290 TraceCheckUtils]: 22: Hoare triple {2157#(< (mod (+ main_~v~0 16) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2157#(< (mod (+ main_~v~0 16) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,884 INFO L290 TraceCheckUtils]: 21: Hoare triple {2164#(< (mod (+ main_~v~0 17) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2157#(< (mod (+ main_~v~0 16) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,884 INFO L290 TraceCheckUtils]: 20: Hoare triple {2164#(< (mod (+ main_~v~0 17) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2164#(< (mod (+ main_~v~0 17) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,884 INFO L290 TraceCheckUtils]: 19: Hoare triple {2171#(< (mod (+ main_~v~0 18) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2164#(< (mod (+ main_~v~0 17) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,885 INFO L290 TraceCheckUtils]: 18: Hoare triple {2171#(< (mod (+ main_~v~0 18) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2171#(< (mod (+ main_~v~0 18) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,885 INFO L290 TraceCheckUtils]: 17: Hoare triple {2178#(< (mod (+ 19 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2171#(< (mod (+ main_~v~0 18) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,886 INFO L290 TraceCheckUtils]: 16: Hoare triple {2178#(< (mod (+ 19 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2178#(< (mod (+ 19 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,886 INFO L290 TraceCheckUtils]: 15: Hoare triple {2185#(< (mod (+ main_~v~0 20) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2178#(< (mod (+ 19 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,886 INFO L290 TraceCheckUtils]: 14: Hoare triple {2185#(< (mod (+ main_~v~0 20) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2185#(< (mod (+ main_~v~0 20) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,888 INFO L290 TraceCheckUtils]: 13: Hoare triple {2192#(< (mod (+ main_~v~0 21) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2185#(< (mod (+ main_~v~0 20) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,888 INFO L290 TraceCheckUtils]: 12: Hoare triple {2192#(< (mod (+ main_~v~0 21) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2192#(< (mod (+ main_~v~0 21) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,889 INFO L290 TraceCheckUtils]: 11: Hoare triple {2199#(< (mod (+ main_~v~0 22) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {2192#(< (mod (+ main_~v~0 21) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,889 INFO L290 TraceCheckUtils]: 10: Hoare triple {2199#(< (mod (+ main_~v~0 22) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {2199#(< (mod (+ main_~v~0 22) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,889 INFO L290 TraceCheckUtils]: 9: Hoare triple {1829#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {2199#(< (mod (+ main_~v~0 22) 4294967296) 268435455)} is VALID [2022-04-27 22:19:25,889 INFO L290 TraceCheckUtils]: 8: Hoare triple {1829#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1829#true} is VALID [2022-04-27 22:19:25,890 INFO L290 TraceCheckUtils]: 7: Hoare triple {1829#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {1829#true} is VALID [2022-04-27 22:19:25,890 INFO L290 TraceCheckUtils]: 6: Hoare triple {1829#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {1829#true} is VALID [2022-04-27 22:19:25,890 INFO L290 TraceCheckUtils]: 5: Hoare triple {1829#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {1829#true} is VALID [2022-04-27 22:19:25,890 INFO L272 TraceCheckUtils]: 4: Hoare triple {1829#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:25,890 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1829#true} {1829#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:25,890 INFO L290 TraceCheckUtils]: 2: Hoare triple {1829#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:25,890 INFO L290 TraceCheckUtils]: 1: Hoare triple {1829#true} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1829#true} is VALID [2022-04-27 22:19:25,890 INFO L272 TraceCheckUtils]: 0: Hoare triple {1829#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1829#true} is VALID [2022-04-27 22:19:25,891 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:19:25,891 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1721952693] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:19:25,891 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:19:25,891 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 25] total 50 [2022-04-27 22:19:25,891 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975149756] [2022-04-27 22:19:25,891 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:19:25,892 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 2.08) internal successors, (104), 49 states have internal predecessors, (104), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 59 [2022-04-27 22:19:25,892 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:19:25,892 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 50 states, 50 states have (on average 2.08) internal successors, (104), 49 states have internal predecessors, (104), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:19:25,998 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 109 edges. 109 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:19:25,998 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-04-27 22:19:25,998 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:19:25,999 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-04-27 22:19:26,000 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=672, Invalid=1778, Unknown=0, NotChecked=0, Total=2450 [2022-04-27 22:19:26,000 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand has 50 states, 50 states have (on average 2.08) internal successors, (104), 49 states have internal predecessors, (104), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:21:12,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:21:12,700 INFO L93 Difference]: Finished difference Result 181 states and 216 transitions. [2022-04-27 22:21:12,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2022-04-27 22:21:12,701 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 2.08) internal successors, (104), 49 states have internal predecessors, (104), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 59 [2022-04-27 22:21:12,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:21:12,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 2.08) internal successors, (104), 49 states have internal predecessors, (104), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:21:12,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 173 transitions. [2022-04-27 22:21:12,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 2.08) internal successors, (104), 49 states have internal predecessors, (104), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:21:12,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 173 transitions. [2022-04-27 22:21:12,705 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 49 states and 173 transitions. [2022-04-27 22:21:12,912 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 173 edges. 173 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:21:12,914 INFO L225 Difference]: With dead ends: 181 [2022-04-27 22:21:12,914 INFO L226 Difference]: Without dead ends: 121 [2022-04-27 22:21:12,916 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 97 SyntacticMatches, 1 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1111 ImplicationChecksByTransitivity, 105.0s TimeCoverageRelationStatistics Valid=2438, Invalid=6677, Unknown=5, NotChecked=0, Total=9120 [2022-04-27 22:21:12,917 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 149 mSDsluCounter, 117 mSDsCounter, 0 mSdLazyCounter, 1748 mSolverCounterSat, 79 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 1827 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 79 IncrementalHoareTripleChecker+Valid, 1748 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:21:12,917 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [150 Valid, 141 Invalid, 1827 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [79 Valid, 1748 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-04-27 22:21:12,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2022-04-27 22:21:12,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 114. [2022-04-27 22:21:12,977 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:21:12,978 INFO L82 GeneralOperation]: Start isEquivalent. First operand 121 states. Second operand has 114 states, 108 states have (on average 1.0462962962962963) internal successors, (113), 108 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:21:12,978 INFO L74 IsIncluded]: Start isIncluded. First operand 121 states. Second operand has 114 states, 108 states have (on average 1.0462962962962963) internal successors, (113), 108 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:21:12,978 INFO L87 Difference]: Start difference. First operand 121 states. Second operand has 114 states, 108 states have (on average 1.0462962962962963) internal successors, (113), 108 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:21:12,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:21:12,981 INFO L93 Difference]: Finished difference Result 121 states and 128 transitions. [2022-04-27 22:21:12,981 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 128 transitions. [2022-04-27 22:21:12,982 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:21:12,982 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:21:12,983 INFO L74 IsIncluded]: Start isIncluded. First operand has 114 states, 108 states have (on average 1.0462962962962963) internal successors, (113), 108 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 121 states. [2022-04-27 22:21:12,983 INFO L87 Difference]: Start difference. First operand has 114 states, 108 states have (on average 1.0462962962962963) internal successors, (113), 108 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 121 states. [2022-04-27 22:21:12,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:21:12,986 INFO L93 Difference]: Finished difference Result 121 states and 128 transitions. [2022-04-27 22:21:12,986 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 128 transitions. [2022-04-27 22:21:12,986 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:21:12,986 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:21:12,986 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:21:12,986 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:21:12,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 114 states, 108 states have (on average 1.0462962962962963) internal successors, (113), 108 states have internal predecessors, (113), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 22:21:12,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 118 transitions. [2022-04-27 22:21:12,988 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 118 transitions. Word has length 59 [2022-04-27 22:21:12,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:21:12,989 INFO L495 AbstractCegarLoop]: Abstraction has 114 states and 118 transitions. [2022-04-27 22:21:12,989 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 2.08) internal successors, (104), 49 states have internal predecessors, (104), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:21:12,989 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 118 transitions. [2022-04-27 22:21:12,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2022-04-27 22:21:12,990 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:21:12,990 INFO L195 NwaCegarLoop]: trace histogram [46, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:21:13,007 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 22:21:13,196 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:21:13,196 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:21:13,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:21:13,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1664764145, now seen corresponding path program 5 times [2022-04-27 22:21:13,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:21:13,197 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626585864] [2022-04-27 22:21:13,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:21:13,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:21:13,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:21:14,408 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:21:14,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:21:14,424 INFO L290 TraceCheckUtils]: 0: Hoare triple {3064#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3012#true} is VALID [2022-04-27 22:21:14,424 INFO L290 TraceCheckUtils]: 1: Hoare triple {3012#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:21:14,424 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3012#true} {3012#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:21:14,424 INFO L272 TraceCheckUtils]: 0: Hoare triple {3012#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3064#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:21:14,425 INFO L290 TraceCheckUtils]: 1: Hoare triple {3064#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3012#true} is VALID [2022-04-27 22:21:14,425 INFO L290 TraceCheckUtils]: 2: Hoare triple {3012#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:21:14,425 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3012#true} {3012#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:21:14,425 INFO L272 TraceCheckUtils]: 4: Hoare triple {3012#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:21:14,425 INFO L290 TraceCheckUtils]: 5: Hoare triple {3012#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {3012#true} is VALID [2022-04-27 22:21:14,425 INFO L290 TraceCheckUtils]: 6: Hoare triple {3012#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {3012#true} is VALID [2022-04-27 22:21:14,425 INFO L290 TraceCheckUtils]: 7: Hoare triple {3012#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {3012#true} is VALID [2022-04-27 22:21:14,425 INFO L290 TraceCheckUtils]: 8: Hoare triple {3012#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {3012#true} is VALID [2022-04-27 22:21:14,425 INFO L290 TraceCheckUtils]: 9: Hoare triple {3012#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {3017#(= main_~v~0 0)} is VALID [2022-04-27 22:21:14,426 INFO L290 TraceCheckUtils]: 10: Hoare triple {3017#(= main_~v~0 0)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3017#(= main_~v~0 0)} is VALID [2022-04-27 22:21:14,426 INFO L290 TraceCheckUtils]: 11: Hoare triple {3017#(= main_~v~0 0)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3018#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:21:14,426 INFO L290 TraceCheckUtils]: 12: Hoare triple {3018#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3018#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:21:14,427 INFO L290 TraceCheckUtils]: 13: Hoare triple {3018#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3019#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:21:14,427 INFO L290 TraceCheckUtils]: 14: Hoare triple {3019#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3019#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:21:14,428 INFO L290 TraceCheckUtils]: 15: Hoare triple {3019#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3020#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:21:14,428 INFO L290 TraceCheckUtils]: 16: Hoare triple {3020#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3020#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:21:14,429 INFO L290 TraceCheckUtils]: 17: Hoare triple {3020#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3021#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:21:14,429 INFO L290 TraceCheckUtils]: 18: Hoare triple {3021#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3021#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:21:14,429 INFO L290 TraceCheckUtils]: 19: Hoare triple {3021#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3022#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:21:14,430 INFO L290 TraceCheckUtils]: 20: Hoare triple {3022#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3022#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:21:14,430 INFO L290 TraceCheckUtils]: 21: Hoare triple {3022#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3023#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:21:14,431 INFO L290 TraceCheckUtils]: 22: Hoare triple {3023#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3023#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:21:14,431 INFO L290 TraceCheckUtils]: 23: Hoare triple {3023#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3024#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:21:14,432 INFO L290 TraceCheckUtils]: 24: Hoare triple {3024#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3024#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:21:14,432 INFO L290 TraceCheckUtils]: 25: Hoare triple {3024#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3025#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:21:14,432 INFO L290 TraceCheckUtils]: 26: Hoare triple {3025#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3025#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:21:14,433 INFO L290 TraceCheckUtils]: 27: Hoare triple {3025#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3026#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:21:14,433 INFO L290 TraceCheckUtils]: 28: Hoare triple {3026#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3026#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:21:14,434 INFO L290 TraceCheckUtils]: 29: Hoare triple {3026#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3027#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2022-04-27 22:21:14,434 INFO L290 TraceCheckUtils]: 30: Hoare triple {3027#(and (<= 10 main_~v~0) (<= main_~v~0 10))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3027#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2022-04-27 22:21:14,435 INFO L290 TraceCheckUtils]: 31: Hoare triple {3027#(and (<= 10 main_~v~0) (<= main_~v~0 10))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3028#(and (<= main_~v~0 11) (<= 11 main_~v~0))} is VALID [2022-04-27 22:21:14,435 INFO L290 TraceCheckUtils]: 32: Hoare triple {3028#(and (<= main_~v~0 11) (<= 11 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3028#(and (<= main_~v~0 11) (<= 11 main_~v~0))} is VALID [2022-04-27 22:21:14,435 INFO L290 TraceCheckUtils]: 33: Hoare triple {3028#(and (<= main_~v~0 11) (<= 11 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3029#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2022-04-27 22:21:14,436 INFO L290 TraceCheckUtils]: 34: Hoare triple {3029#(and (<= 12 main_~v~0) (<= main_~v~0 12))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3029#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2022-04-27 22:21:14,436 INFO L290 TraceCheckUtils]: 35: Hoare triple {3029#(and (<= 12 main_~v~0) (<= main_~v~0 12))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3030#(and (<= 13 main_~v~0) (<= main_~v~0 13))} is VALID [2022-04-27 22:21:14,437 INFO L290 TraceCheckUtils]: 36: Hoare triple {3030#(and (<= 13 main_~v~0) (<= main_~v~0 13))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3030#(and (<= 13 main_~v~0) (<= main_~v~0 13))} is VALID [2022-04-27 22:21:14,437 INFO L290 TraceCheckUtils]: 37: Hoare triple {3030#(and (<= 13 main_~v~0) (<= main_~v~0 13))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3031#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2022-04-27 22:21:14,437 INFO L290 TraceCheckUtils]: 38: Hoare triple {3031#(and (<= main_~v~0 14) (<= 14 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3031#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2022-04-27 22:21:14,438 INFO L290 TraceCheckUtils]: 39: Hoare triple {3031#(and (<= main_~v~0 14) (<= 14 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3032#(and (<= 15 main_~v~0) (<= main_~v~0 15))} is VALID [2022-04-27 22:21:14,438 INFO L290 TraceCheckUtils]: 40: Hoare triple {3032#(and (<= 15 main_~v~0) (<= main_~v~0 15))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3032#(and (<= 15 main_~v~0) (<= main_~v~0 15))} is VALID [2022-04-27 22:21:14,439 INFO L290 TraceCheckUtils]: 41: Hoare triple {3032#(and (<= 15 main_~v~0) (<= main_~v~0 15))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3033#(and (<= main_~v~0 16) (<= 16 main_~v~0))} is VALID [2022-04-27 22:21:14,439 INFO L290 TraceCheckUtils]: 42: Hoare triple {3033#(and (<= main_~v~0 16) (<= 16 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3033#(and (<= main_~v~0 16) (<= 16 main_~v~0))} is VALID [2022-04-27 22:21:14,439 INFO L290 TraceCheckUtils]: 43: Hoare triple {3033#(and (<= main_~v~0 16) (<= 16 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3034#(and (<= main_~v~0 17) (<= 17 main_~v~0))} is VALID [2022-04-27 22:21:14,440 INFO L290 TraceCheckUtils]: 44: Hoare triple {3034#(and (<= main_~v~0 17) (<= 17 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3034#(and (<= main_~v~0 17) (<= 17 main_~v~0))} is VALID [2022-04-27 22:21:14,440 INFO L290 TraceCheckUtils]: 45: Hoare triple {3034#(and (<= main_~v~0 17) (<= 17 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3035#(and (<= main_~v~0 18) (<= 18 main_~v~0))} is VALID [2022-04-27 22:21:14,441 INFO L290 TraceCheckUtils]: 46: Hoare triple {3035#(and (<= main_~v~0 18) (<= 18 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3035#(and (<= main_~v~0 18) (<= 18 main_~v~0))} is VALID [2022-04-27 22:21:14,441 INFO L290 TraceCheckUtils]: 47: Hoare triple {3035#(and (<= main_~v~0 18) (<= 18 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3036#(and (<= 19 main_~v~0) (<= main_~v~0 19))} is VALID [2022-04-27 22:21:14,442 INFO L290 TraceCheckUtils]: 48: Hoare triple {3036#(and (<= 19 main_~v~0) (<= main_~v~0 19))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3036#(and (<= 19 main_~v~0) (<= main_~v~0 19))} is VALID [2022-04-27 22:21:14,442 INFO L290 TraceCheckUtils]: 49: Hoare triple {3036#(and (<= 19 main_~v~0) (<= main_~v~0 19))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3037#(and (<= main_~v~0 20) (<= 20 main_~v~0))} is VALID [2022-04-27 22:21:14,442 INFO L290 TraceCheckUtils]: 50: Hoare triple {3037#(and (<= main_~v~0 20) (<= 20 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3037#(and (<= main_~v~0 20) (<= 20 main_~v~0))} is VALID [2022-04-27 22:21:14,443 INFO L290 TraceCheckUtils]: 51: Hoare triple {3037#(and (<= main_~v~0 20) (<= 20 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3038#(and (<= main_~v~0 21) (<= 21 main_~v~0))} is VALID [2022-04-27 22:21:14,443 INFO L290 TraceCheckUtils]: 52: Hoare triple {3038#(and (<= main_~v~0 21) (<= 21 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3038#(and (<= main_~v~0 21) (<= 21 main_~v~0))} is VALID [2022-04-27 22:21:14,444 INFO L290 TraceCheckUtils]: 53: Hoare triple {3038#(and (<= main_~v~0 21) (<= 21 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3039#(and (<= 22 main_~v~0) (<= main_~v~0 22))} is VALID [2022-04-27 22:21:14,444 INFO L290 TraceCheckUtils]: 54: Hoare triple {3039#(and (<= 22 main_~v~0) (<= main_~v~0 22))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3039#(and (<= 22 main_~v~0) (<= main_~v~0 22))} is VALID [2022-04-27 22:21:14,444 INFO L290 TraceCheckUtils]: 55: Hoare triple {3039#(and (<= 22 main_~v~0) (<= main_~v~0 22))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3040#(and (<= 23 main_~v~0) (<= main_~v~0 23))} is VALID [2022-04-27 22:21:14,445 INFO L290 TraceCheckUtils]: 56: Hoare triple {3040#(and (<= 23 main_~v~0) (<= main_~v~0 23))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3040#(and (<= 23 main_~v~0) (<= main_~v~0 23))} is VALID [2022-04-27 22:21:14,445 INFO L290 TraceCheckUtils]: 57: Hoare triple {3040#(and (<= 23 main_~v~0) (<= main_~v~0 23))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3041#(and (<= main_~v~0 24) (<= 24 main_~v~0))} is VALID [2022-04-27 22:21:14,446 INFO L290 TraceCheckUtils]: 58: Hoare triple {3041#(and (<= main_~v~0 24) (<= 24 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3041#(and (<= main_~v~0 24) (<= 24 main_~v~0))} is VALID [2022-04-27 22:21:14,446 INFO L290 TraceCheckUtils]: 59: Hoare triple {3041#(and (<= main_~v~0 24) (<= 24 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3042#(and (<= 25 main_~v~0) (<= main_~v~0 25))} is VALID [2022-04-27 22:21:14,446 INFO L290 TraceCheckUtils]: 60: Hoare triple {3042#(and (<= 25 main_~v~0) (<= main_~v~0 25))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3042#(and (<= 25 main_~v~0) (<= main_~v~0 25))} is VALID [2022-04-27 22:21:14,447 INFO L290 TraceCheckUtils]: 61: Hoare triple {3042#(and (<= 25 main_~v~0) (<= main_~v~0 25))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3043#(and (<= 26 main_~v~0) (<= main_~v~0 26))} is VALID [2022-04-27 22:21:14,447 INFO L290 TraceCheckUtils]: 62: Hoare triple {3043#(and (<= 26 main_~v~0) (<= main_~v~0 26))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3043#(and (<= 26 main_~v~0) (<= main_~v~0 26))} is VALID [2022-04-27 22:21:14,448 INFO L290 TraceCheckUtils]: 63: Hoare triple {3043#(and (<= 26 main_~v~0) (<= main_~v~0 26))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3044#(and (<= 27 main_~v~0) (<= main_~v~0 27))} is VALID [2022-04-27 22:21:14,448 INFO L290 TraceCheckUtils]: 64: Hoare triple {3044#(and (<= 27 main_~v~0) (<= main_~v~0 27))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3044#(and (<= 27 main_~v~0) (<= main_~v~0 27))} is VALID [2022-04-27 22:21:14,448 INFO L290 TraceCheckUtils]: 65: Hoare triple {3044#(and (<= 27 main_~v~0) (<= main_~v~0 27))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3045#(and (<= main_~v~0 28) (<= 28 main_~v~0))} is VALID [2022-04-27 22:21:14,449 INFO L290 TraceCheckUtils]: 66: Hoare triple {3045#(and (<= main_~v~0 28) (<= 28 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3045#(and (<= main_~v~0 28) (<= 28 main_~v~0))} is VALID [2022-04-27 22:21:14,449 INFO L290 TraceCheckUtils]: 67: Hoare triple {3045#(and (<= main_~v~0 28) (<= 28 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3046#(and (<= main_~v~0 29) (<= 29 main_~v~0))} is VALID [2022-04-27 22:21:14,450 INFO L290 TraceCheckUtils]: 68: Hoare triple {3046#(and (<= main_~v~0 29) (<= 29 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3046#(and (<= main_~v~0 29) (<= 29 main_~v~0))} is VALID [2022-04-27 22:21:14,450 INFO L290 TraceCheckUtils]: 69: Hoare triple {3046#(and (<= main_~v~0 29) (<= 29 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3047#(and (<= 30 main_~v~0) (<= main_~v~0 30))} is VALID [2022-04-27 22:21:14,450 INFO L290 TraceCheckUtils]: 70: Hoare triple {3047#(and (<= 30 main_~v~0) (<= main_~v~0 30))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3047#(and (<= 30 main_~v~0) (<= main_~v~0 30))} is VALID [2022-04-27 22:21:14,451 INFO L290 TraceCheckUtils]: 71: Hoare triple {3047#(and (<= 30 main_~v~0) (<= main_~v~0 30))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3048#(and (<= 31 main_~v~0) (<= main_~v~0 31))} is VALID [2022-04-27 22:21:14,451 INFO L290 TraceCheckUtils]: 72: Hoare triple {3048#(and (<= 31 main_~v~0) (<= main_~v~0 31))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3048#(and (<= 31 main_~v~0) (<= main_~v~0 31))} is VALID [2022-04-27 22:21:14,452 INFO L290 TraceCheckUtils]: 73: Hoare triple {3048#(and (<= 31 main_~v~0) (<= main_~v~0 31))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3049#(and (<= main_~v~0 32) (<= 32 main_~v~0))} is VALID [2022-04-27 22:21:14,452 INFO L290 TraceCheckUtils]: 74: Hoare triple {3049#(and (<= main_~v~0 32) (<= 32 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3049#(and (<= main_~v~0 32) (<= 32 main_~v~0))} is VALID [2022-04-27 22:21:14,452 INFO L290 TraceCheckUtils]: 75: Hoare triple {3049#(and (<= main_~v~0 32) (<= 32 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3050#(and (<= main_~v~0 33) (<= 33 main_~v~0))} is VALID [2022-04-27 22:21:14,453 INFO L290 TraceCheckUtils]: 76: Hoare triple {3050#(and (<= main_~v~0 33) (<= 33 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3050#(and (<= main_~v~0 33) (<= 33 main_~v~0))} is VALID [2022-04-27 22:21:14,453 INFO L290 TraceCheckUtils]: 77: Hoare triple {3050#(and (<= main_~v~0 33) (<= 33 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3051#(and (<= 34 main_~v~0) (<= main_~v~0 34))} is VALID [2022-04-27 22:21:14,454 INFO L290 TraceCheckUtils]: 78: Hoare triple {3051#(and (<= 34 main_~v~0) (<= main_~v~0 34))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3051#(and (<= 34 main_~v~0) (<= main_~v~0 34))} is VALID [2022-04-27 22:21:14,454 INFO L290 TraceCheckUtils]: 79: Hoare triple {3051#(and (<= 34 main_~v~0) (<= main_~v~0 34))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3052#(and (<= 35 main_~v~0) (<= main_~v~0 35))} is VALID [2022-04-27 22:21:14,454 INFO L290 TraceCheckUtils]: 80: Hoare triple {3052#(and (<= 35 main_~v~0) (<= main_~v~0 35))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3052#(and (<= 35 main_~v~0) (<= main_~v~0 35))} is VALID [2022-04-27 22:21:14,455 INFO L290 TraceCheckUtils]: 81: Hoare triple {3052#(and (<= 35 main_~v~0) (<= main_~v~0 35))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3053#(and (<= 36 main_~v~0) (<= main_~v~0 36))} is VALID [2022-04-27 22:21:14,455 INFO L290 TraceCheckUtils]: 82: Hoare triple {3053#(and (<= 36 main_~v~0) (<= main_~v~0 36))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3053#(and (<= 36 main_~v~0) (<= main_~v~0 36))} is VALID [2022-04-27 22:21:14,456 INFO L290 TraceCheckUtils]: 83: Hoare triple {3053#(and (<= 36 main_~v~0) (<= main_~v~0 36))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3054#(and (<= main_~v~0 37) (<= 37 main_~v~0))} is VALID [2022-04-27 22:21:14,456 INFO L290 TraceCheckUtils]: 84: Hoare triple {3054#(and (<= main_~v~0 37) (<= 37 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3054#(and (<= main_~v~0 37) (<= 37 main_~v~0))} is VALID [2022-04-27 22:21:14,456 INFO L290 TraceCheckUtils]: 85: Hoare triple {3054#(and (<= main_~v~0 37) (<= 37 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3055#(and (<= 38 main_~v~0) (<= main_~v~0 38))} is VALID [2022-04-27 22:21:14,457 INFO L290 TraceCheckUtils]: 86: Hoare triple {3055#(and (<= 38 main_~v~0) (<= main_~v~0 38))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3055#(and (<= 38 main_~v~0) (<= main_~v~0 38))} is VALID [2022-04-27 22:21:14,459 INFO L290 TraceCheckUtils]: 87: Hoare triple {3055#(and (<= 38 main_~v~0) (<= main_~v~0 38))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3056#(and (<= main_~v~0 39) (<= 39 main_~v~0))} is VALID [2022-04-27 22:21:14,459 INFO L290 TraceCheckUtils]: 88: Hoare triple {3056#(and (<= main_~v~0 39) (<= 39 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3056#(and (<= main_~v~0 39) (<= 39 main_~v~0))} is VALID [2022-04-27 22:21:14,460 INFO L290 TraceCheckUtils]: 89: Hoare triple {3056#(and (<= main_~v~0 39) (<= 39 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3057#(and (<= main_~v~0 40) (<= 40 main_~v~0))} is VALID [2022-04-27 22:21:14,460 INFO L290 TraceCheckUtils]: 90: Hoare triple {3057#(and (<= main_~v~0 40) (<= 40 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3057#(and (<= main_~v~0 40) (<= 40 main_~v~0))} is VALID [2022-04-27 22:21:14,461 INFO L290 TraceCheckUtils]: 91: Hoare triple {3057#(and (<= main_~v~0 40) (<= 40 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3058#(and (<= main_~v~0 41) (<= 41 main_~v~0))} is VALID [2022-04-27 22:21:14,461 INFO L290 TraceCheckUtils]: 92: Hoare triple {3058#(and (<= main_~v~0 41) (<= 41 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3058#(and (<= main_~v~0 41) (<= 41 main_~v~0))} is VALID [2022-04-27 22:21:14,461 INFO L290 TraceCheckUtils]: 93: Hoare triple {3058#(and (<= main_~v~0 41) (<= 41 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3059#(and (<= main_~v~0 42) (<= 42 main_~v~0))} is VALID [2022-04-27 22:21:14,467 INFO L290 TraceCheckUtils]: 94: Hoare triple {3059#(and (<= main_~v~0 42) (<= 42 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3059#(and (<= main_~v~0 42) (<= 42 main_~v~0))} is VALID [2022-04-27 22:21:14,468 INFO L290 TraceCheckUtils]: 95: Hoare triple {3059#(and (<= main_~v~0 42) (<= 42 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3060#(and (<= main_~v~0 43) (<= 43 main_~v~0))} is VALID [2022-04-27 22:21:14,468 INFO L290 TraceCheckUtils]: 96: Hoare triple {3060#(and (<= main_~v~0 43) (<= 43 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3060#(and (<= main_~v~0 43) (<= 43 main_~v~0))} is VALID [2022-04-27 22:21:14,469 INFO L290 TraceCheckUtils]: 97: Hoare triple {3060#(and (<= main_~v~0 43) (<= 43 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3061#(and (<= 44 main_~v~0) (<= main_~v~0 44))} is VALID [2022-04-27 22:21:14,469 INFO L290 TraceCheckUtils]: 98: Hoare triple {3061#(and (<= 44 main_~v~0) (<= main_~v~0 44))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3061#(and (<= 44 main_~v~0) (<= main_~v~0 44))} is VALID [2022-04-27 22:21:14,469 INFO L290 TraceCheckUtils]: 99: Hoare triple {3061#(and (<= 44 main_~v~0) (<= main_~v~0 44))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3062#(and (<= main_~v~0 45) (<= 45 main_~v~0))} is VALID [2022-04-27 22:21:14,470 INFO L290 TraceCheckUtils]: 100: Hoare triple {3062#(and (<= main_~v~0 45) (<= 45 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3062#(and (<= main_~v~0 45) (<= 45 main_~v~0))} is VALID [2022-04-27 22:21:14,470 INFO L290 TraceCheckUtils]: 101: Hoare triple {3062#(and (<= main_~v~0 45) (<= 45 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3063#(and (not (<= (+ (div main_~v~0 4294967296) 1) 0)) (<= main_~v~0 46))} is VALID [2022-04-27 22:21:14,471 INFO L290 TraceCheckUtils]: 102: Hoare triple {3063#(and (not (<= (+ (div main_~v~0 4294967296) 1) 0)) (<= main_~v~0 46))} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {3013#false} is VALID [2022-04-27 22:21:14,471 INFO L272 TraceCheckUtils]: 103: Hoare triple {3013#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {3013#false} is VALID [2022-04-27 22:21:14,471 INFO L290 TraceCheckUtils]: 104: Hoare triple {3013#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3013#false} is VALID [2022-04-27 22:21:14,471 INFO L290 TraceCheckUtils]: 105: Hoare triple {3013#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3013#false} is VALID [2022-04-27 22:21:14,471 INFO L290 TraceCheckUtils]: 106: Hoare triple {3013#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3013#false} is VALID [2022-04-27 22:21:14,472 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:21:14,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:21:14,472 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [626585864] [2022-04-27 22:21:14,473 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [626585864] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:21:14,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1557567713] [2022-04-27 22:21:14,473 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:21:14,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:21:14,473 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:21:14,474 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:21:14,475 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 22:23:20,702 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2022-04-27 22:23:20,702 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:23:20,749 INFO L263 TraceCheckSpWp]: Trace formula consists of 209 conjuncts, 95 conjunts are in the unsatisfiable core [2022-04-27 22:23:20,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:23:20,780 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:23:21,796 INFO L272 TraceCheckUtils]: 0: Hoare triple {3012#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:23:21,796 INFO L290 TraceCheckUtils]: 1: Hoare triple {3012#true} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3012#true} is VALID [2022-04-27 22:23:21,796 INFO L290 TraceCheckUtils]: 2: Hoare triple {3012#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:23:21,796 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3012#true} {3012#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:23:21,796 INFO L272 TraceCheckUtils]: 4: Hoare triple {3012#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:23:21,797 INFO L290 TraceCheckUtils]: 5: Hoare triple {3012#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {3012#true} is VALID [2022-04-27 22:23:21,797 INFO L290 TraceCheckUtils]: 6: Hoare triple {3012#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {3012#true} is VALID [2022-04-27 22:23:21,797 INFO L290 TraceCheckUtils]: 7: Hoare triple {3012#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {3012#true} is VALID [2022-04-27 22:23:21,797 INFO L290 TraceCheckUtils]: 8: Hoare triple {3012#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {3012#true} is VALID [2022-04-27 22:23:21,797 INFO L290 TraceCheckUtils]: 9: Hoare triple {3012#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {3017#(= main_~v~0 0)} is VALID [2022-04-27 22:23:21,797 INFO L290 TraceCheckUtils]: 10: Hoare triple {3017#(= main_~v~0 0)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3017#(= main_~v~0 0)} is VALID [2022-04-27 22:23:21,798 INFO L290 TraceCheckUtils]: 11: Hoare triple {3017#(= main_~v~0 0)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3018#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:23:21,798 INFO L290 TraceCheckUtils]: 12: Hoare triple {3018#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3018#(and (<= main_~v~0 1) (<= 1 main_~v~0))} is VALID [2022-04-27 22:23:21,798 INFO L290 TraceCheckUtils]: 13: Hoare triple {3018#(and (<= main_~v~0 1) (<= 1 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3019#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:23:21,799 INFO L290 TraceCheckUtils]: 14: Hoare triple {3019#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3019#(and (<= 2 main_~v~0) (<= main_~v~0 2))} is VALID [2022-04-27 22:23:21,799 INFO L290 TraceCheckUtils]: 15: Hoare triple {3019#(and (<= 2 main_~v~0) (<= main_~v~0 2))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3020#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:23:21,800 INFO L290 TraceCheckUtils]: 16: Hoare triple {3020#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3020#(and (<= main_~v~0 3) (<= 3 main_~v~0))} is VALID [2022-04-27 22:23:21,800 INFO L290 TraceCheckUtils]: 17: Hoare triple {3020#(and (<= main_~v~0 3) (<= 3 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3021#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:23:21,800 INFO L290 TraceCheckUtils]: 18: Hoare triple {3021#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3021#(and (<= main_~v~0 4) (<= 4 main_~v~0))} is VALID [2022-04-27 22:23:21,801 INFO L290 TraceCheckUtils]: 19: Hoare triple {3021#(and (<= main_~v~0 4) (<= 4 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3022#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:23:21,801 INFO L290 TraceCheckUtils]: 20: Hoare triple {3022#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3022#(and (<= main_~v~0 5) (<= 5 main_~v~0))} is VALID [2022-04-27 22:23:21,801 INFO L290 TraceCheckUtils]: 21: Hoare triple {3022#(and (<= main_~v~0 5) (<= 5 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3023#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:23:21,802 INFO L290 TraceCheckUtils]: 22: Hoare triple {3023#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3023#(and (<= 6 main_~v~0) (<= main_~v~0 6))} is VALID [2022-04-27 22:23:21,802 INFO L290 TraceCheckUtils]: 23: Hoare triple {3023#(and (<= 6 main_~v~0) (<= main_~v~0 6))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3024#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:23:21,802 INFO L290 TraceCheckUtils]: 24: Hoare triple {3024#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3024#(and (<= main_~v~0 7) (<= 7 main_~v~0))} is VALID [2022-04-27 22:23:21,803 INFO L290 TraceCheckUtils]: 25: Hoare triple {3024#(and (<= main_~v~0 7) (<= 7 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3025#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:23:21,803 INFO L290 TraceCheckUtils]: 26: Hoare triple {3025#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3025#(and (<= main_~v~0 8) (<= 8 main_~v~0))} is VALID [2022-04-27 22:23:21,803 INFO L290 TraceCheckUtils]: 27: Hoare triple {3025#(and (<= main_~v~0 8) (<= 8 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3026#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:23:21,804 INFO L290 TraceCheckUtils]: 28: Hoare triple {3026#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3026#(and (<= 9 main_~v~0) (<= main_~v~0 9))} is VALID [2022-04-27 22:23:21,804 INFO L290 TraceCheckUtils]: 29: Hoare triple {3026#(and (<= 9 main_~v~0) (<= main_~v~0 9))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3027#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2022-04-27 22:23:21,805 INFO L290 TraceCheckUtils]: 30: Hoare triple {3027#(and (<= 10 main_~v~0) (<= main_~v~0 10))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3027#(and (<= 10 main_~v~0) (<= main_~v~0 10))} is VALID [2022-04-27 22:23:21,805 INFO L290 TraceCheckUtils]: 31: Hoare triple {3027#(and (<= 10 main_~v~0) (<= main_~v~0 10))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3028#(and (<= main_~v~0 11) (<= 11 main_~v~0))} is VALID [2022-04-27 22:23:21,805 INFO L290 TraceCheckUtils]: 32: Hoare triple {3028#(and (<= main_~v~0 11) (<= 11 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3028#(and (<= main_~v~0 11) (<= 11 main_~v~0))} is VALID [2022-04-27 22:23:21,806 INFO L290 TraceCheckUtils]: 33: Hoare triple {3028#(and (<= main_~v~0 11) (<= 11 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3029#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2022-04-27 22:23:21,806 INFO L290 TraceCheckUtils]: 34: Hoare triple {3029#(and (<= 12 main_~v~0) (<= main_~v~0 12))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3029#(and (<= 12 main_~v~0) (<= main_~v~0 12))} is VALID [2022-04-27 22:23:21,807 INFO L290 TraceCheckUtils]: 35: Hoare triple {3029#(and (<= 12 main_~v~0) (<= main_~v~0 12))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3030#(and (<= 13 main_~v~0) (<= main_~v~0 13))} is VALID [2022-04-27 22:23:21,807 INFO L290 TraceCheckUtils]: 36: Hoare triple {3030#(and (<= 13 main_~v~0) (<= main_~v~0 13))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3030#(and (<= 13 main_~v~0) (<= main_~v~0 13))} is VALID [2022-04-27 22:23:21,807 INFO L290 TraceCheckUtils]: 37: Hoare triple {3030#(and (<= 13 main_~v~0) (<= main_~v~0 13))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3031#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2022-04-27 22:23:21,808 INFO L290 TraceCheckUtils]: 38: Hoare triple {3031#(and (<= main_~v~0 14) (<= 14 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3031#(and (<= main_~v~0 14) (<= 14 main_~v~0))} is VALID [2022-04-27 22:23:21,808 INFO L290 TraceCheckUtils]: 39: Hoare triple {3031#(and (<= main_~v~0 14) (<= 14 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3032#(and (<= 15 main_~v~0) (<= main_~v~0 15))} is VALID [2022-04-27 22:23:21,808 INFO L290 TraceCheckUtils]: 40: Hoare triple {3032#(and (<= 15 main_~v~0) (<= main_~v~0 15))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3032#(and (<= 15 main_~v~0) (<= main_~v~0 15))} is VALID [2022-04-27 22:23:21,809 INFO L290 TraceCheckUtils]: 41: Hoare triple {3032#(and (<= 15 main_~v~0) (<= main_~v~0 15))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3033#(and (<= main_~v~0 16) (<= 16 main_~v~0))} is VALID [2022-04-27 22:23:21,809 INFO L290 TraceCheckUtils]: 42: Hoare triple {3033#(and (<= main_~v~0 16) (<= 16 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3033#(and (<= main_~v~0 16) (<= 16 main_~v~0))} is VALID [2022-04-27 22:23:21,809 INFO L290 TraceCheckUtils]: 43: Hoare triple {3033#(and (<= main_~v~0 16) (<= 16 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3034#(and (<= main_~v~0 17) (<= 17 main_~v~0))} is VALID [2022-04-27 22:23:21,810 INFO L290 TraceCheckUtils]: 44: Hoare triple {3034#(and (<= main_~v~0 17) (<= 17 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3034#(and (<= main_~v~0 17) (<= 17 main_~v~0))} is VALID [2022-04-27 22:23:21,810 INFO L290 TraceCheckUtils]: 45: Hoare triple {3034#(and (<= main_~v~0 17) (<= 17 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3035#(and (<= main_~v~0 18) (<= 18 main_~v~0))} is VALID [2022-04-27 22:23:21,811 INFO L290 TraceCheckUtils]: 46: Hoare triple {3035#(and (<= main_~v~0 18) (<= 18 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3035#(and (<= main_~v~0 18) (<= 18 main_~v~0))} is VALID [2022-04-27 22:23:21,811 INFO L290 TraceCheckUtils]: 47: Hoare triple {3035#(and (<= main_~v~0 18) (<= 18 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3036#(and (<= 19 main_~v~0) (<= main_~v~0 19))} is VALID [2022-04-27 22:23:21,811 INFO L290 TraceCheckUtils]: 48: Hoare triple {3036#(and (<= 19 main_~v~0) (<= main_~v~0 19))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3036#(and (<= 19 main_~v~0) (<= main_~v~0 19))} is VALID [2022-04-27 22:23:21,812 INFO L290 TraceCheckUtils]: 49: Hoare triple {3036#(and (<= 19 main_~v~0) (<= main_~v~0 19))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3037#(and (<= main_~v~0 20) (<= 20 main_~v~0))} is VALID [2022-04-27 22:23:21,812 INFO L290 TraceCheckUtils]: 50: Hoare triple {3037#(and (<= main_~v~0 20) (<= 20 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3037#(and (<= main_~v~0 20) (<= 20 main_~v~0))} is VALID [2022-04-27 22:23:21,812 INFO L290 TraceCheckUtils]: 51: Hoare triple {3037#(and (<= main_~v~0 20) (<= 20 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3038#(and (<= main_~v~0 21) (<= 21 main_~v~0))} is VALID [2022-04-27 22:23:21,813 INFO L290 TraceCheckUtils]: 52: Hoare triple {3038#(and (<= main_~v~0 21) (<= 21 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3038#(and (<= main_~v~0 21) (<= 21 main_~v~0))} is VALID [2022-04-27 22:23:21,813 INFO L290 TraceCheckUtils]: 53: Hoare triple {3038#(and (<= main_~v~0 21) (<= 21 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3039#(and (<= 22 main_~v~0) (<= main_~v~0 22))} is VALID [2022-04-27 22:23:21,813 INFO L290 TraceCheckUtils]: 54: Hoare triple {3039#(and (<= 22 main_~v~0) (<= main_~v~0 22))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3039#(and (<= 22 main_~v~0) (<= main_~v~0 22))} is VALID [2022-04-27 22:23:21,814 INFO L290 TraceCheckUtils]: 55: Hoare triple {3039#(and (<= 22 main_~v~0) (<= main_~v~0 22))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3040#(and (<= 23 main_~v~0) (<= main_~v~0 23))} is VALID [2022-04-27 22:23:21,814 INFO L290 TraceCheckUtils]: 56: Hoare triple {3040#(and (<= 23 main_~v~0) (<= main_~v~0 23))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3040#(and (<= 23 main_~v~0) (<= main_~v~0 23))} is VALID [2022-04-27 22:23:21,815 INFO L290 TraceCheckUtils]: 57: Hoare triple {3040#(and (<= 23 main_~v~0) (<= main_~v~0 23))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3041#(and (<= main_~v~0 24) (<= 24 main_~v~0))} is VALID [2022-04-27 22:23:21,815 INFO L290 TraceCheckUtils]: 58: Hoare triple {3041#(and (<= main_~v~0 24) (<= 24 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3041#(and (<= main_~v~0 24) (<= 24 main_~v~0))} is VALID [2022-04-27 22:23:21,815 INFO L290 TraceCheckUtils]: 59: Hoare triple {3041#(and (<= main_~v~0 24) (<= 24 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3042#(and (<= 25 main_~v~0) (<= main_~v~0 25))} is VALID [2022-04-27 22:23:21,816 INFO L290 TraceCheckUtils]: 60: Hoare triple {3042#(and (<= 25 main_~v~0) (<= main_~v~0 25))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3042#(and (<= 25 main_~v~0) (<= main_~v~0 25))} is VALID [2022-04-27 22:23:21,816 INFO L290 TraceCheckUtils]: 61: Hoare triple {3042#(and (<= 25 main_~v~0) (<= main_~v~0 25))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3043#(and (<= 26 main_~v~0) (<= main_~v~0 26))} is VALID [2022-04-27 22:23:21,816 INFO L290 TraceCheckUtils]: 62: Hoare triple {3043#(and (<= 26 main_~v~0) (<= main_~v~0 26))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3043#(and (<= 26 main_~v~0) (<= main_~v~0 26))} is VALID [2022-04-27 22:23:21,817 INFO L290 TraceCheckUtils]: 63: Hoare triple {3043#(and (<= 26 main_~v~0) (<= main_~v~0 26))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3044#(and (<= 27 main_~v~0) (<= main_~v~0 27))} is VALID [2022-04-27 22:23:21,817 INFO L290 TraceCheckUtils]: 64: Hoare triple {3044#(and (<= 27 main_~v~0) (<= main_~v~0 27))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3044#(and (<= 27 main_~v~0) (<= main_~v~0 27))} is VALID [2022-04-27 22:23:21,818 INFO L290 TraceCheckUtils]: 65: Hoare triple {3044#(and (<= 27 main_~v~0) (<= main_~v~0 27))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3045#(and (<= main_~v~0 28) (<= 28 main_~v~0))} is VALID [2022-04-27 22:23:21,818 INFO L290 TraceCheckUtils]: 66: Hoare triple {3045#(and (<= main_~v~0 28) (<= 28 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3045#(and (<= main_~v~0 28) (<= 28 main_~v~0))} is VALID [2022-04-27 22:23:21,818 INFO L290 TraceCheckUtils]: 67: Hoare triple {3045#(and (<= main_~v~0 28) (<= 28 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3046#(and (<= main_~v~0 29) (<= 29 main_~v~0))} is VALID [2022-04-27 22:23:21,819 INFO L290 TraceCheckUtils]: 68: Hoare triple {3046#(and (<= main_~v~0 29) (<= 29 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3046#(and (<= main_~v~0 29) (<= 29 main_~v~0))} is VALID [2022-04-27 22:23:21,819 INFO L290 TraceCheckUtils]: 69: Hoare triple {3046#(and (<= main_~v~0 29) (<= 29 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3047#(and (<= 30 main_~v~0) (<= main_~v~0 30))} is VALID [2022-04-27 22:23:21,819 INFO L290 TraceCheckUtils]: 70: Hoare triple {3047#(and (<= 30 main_~v~0) (<= main_~v~0 30))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3047#(and (<= 30 main_~v~0) (<= main_~v~0 30))} is VALID [2022-04-27 22:23:21,820 INFO L290 TraceCheckUtils]: 71: Hoare triple {3047#(and (<= 30 main_~v~0) (<= main_~v~0 30))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3048#(and (<= 31 main_~v~0) (<= main_~v~0 31))} is VALID [2022-04-27 22:23:21,820 INFO L290 TraceCheckUtils]: 72: Hoare triple {3048#(and (<= 31 main_~v~0) (<= main_~v~0 31))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3048#(and (<= 31 main_~v~0) (<= main_~v~0 31))} is VALID [2022-04-27 22:23:21,820 INFO L290 TraceCheckUtils]: 73: Hoare triple {3048#(and (<= 31 main_~v~0) (<= main_~v~0 31))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3049#(and (<= main_~v~0 32) (<= 32 main_~v~0))} is VALID [2022-04-27 22:23:21,821 INFO L290 TraceCheckUtils]: 74: Hoare triple {3049#(and (<= main_~v~0 32) (<= 32 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3049#(and (<= main_~v~0 32) (<= 32 main_~v~0))} is VALID [2022-04-27 22:23:21,821 INFO L290 TraceCheckUtils]: 75: Hoare triple {3049#(and (<= main_~v~0 32) (<= 32 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3050#(and (<= main_~v~0 33) (<= 33 main_~v~0))} is VALID [2022-04-27 22:23:21,822 INFO L290 TraceCheckUtils]: 76: Hoare triple {3050#(and (<= main_~v~0 33) (<= 33 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3050#(and (<= main_~v~0 33) (<= 33 main_~v~0))} is VALID [2022-04-27 22:23:21,822 INFO L290 TraceCheckUtils]: 77: Hoare triple {3050#(and (<= main_~v~0 33) (<= 33 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3051#(and (<= 34 main_~v~0) (<= main_~v~0 34))} is VALID [2022-04-27 22:23:21,822 INFO L290 TraceCheckUtils]: 78: Hoare triple {3051#(and (<= 34 main_~v~0) (<= main_~v~0 34))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3051#(and (<= 34 main_~v~0) (<= main_~v~0 34))} is VALID [2022-04-27 22:23:21,823 INFO L290 TraceCheckUtils]: 79: Hoare triple {3051#(and (<= 34 main_~v~0) (<= main_~v~0 34))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3052#(and (<= 35 main_~v~0) (<= main_~v~0 35))} is VALID [2022-04-27 22:23:21,823 INFO L290 TraceCheckUtils]: 80: Hoare triple {3052#(and (<= 35 main_~v~0) (<= main_~v~0 35))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3052#(and (<= 35 main_~v~0) (<= main_~v~0 35))} is VALID [2022-04-27 22:23:21,823 INFO L290 TraceCheckUtils]: 81: Hoare triple {3052#(and (<= 35 main_~v~0) (<= main_~v~0 35))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3053#(and (<= 36 main_~v~0) (<= main_~v~0 36))} is VALID [2022-04-27 22:23:21,824 INFO L290 TraceCheckUtils]: 82: Hoare triple {3053#(and (<= 36 main_~v~0) (<= main_~v~0 36))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3053#(and (<= 36 main_~v~0) (<= main_~v~0 36))} is VALID [2022-04-27 22:23:21,824 INFO L290 TraceCheckUtils]: 83: Hoare triple {3053#(and (<= 36 main_~v~0) (<= main_~v~0 36))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3054#(and (<= main_~v~0 37) (<= 37 main_~v~0))} is VALID [2022-04-27 22:23:21,824 INFO L290 TraceCheckUtils]: 84: Hoare triple {3054#(and (<= main_~v~0 37) (<= 37 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3054#(and (<= main_~v~0 37) (<= 37 main_~v~0))} is VALID [2022-04-27 22:23:21,825 INFO L290 TraceCheckUtils]: 85: Hoare triple {3054#(and (<= main_~v~0 37) (<= 37 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3055#(and (<= 38 main_~v~0) (<= main_~v~0 38))} is VALID [2022-04-27 22:23:21,825 INFO L290 TraceCheckUtils]: 86: Hoare triple {3055#(and (<= 38 main_~v~0) (<= main_~v~0 38))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3055#(and (<= 38 main_~v~0) (<= main_~v~0 38))} is VALID [2022-04-27 22:23:21,826 INFO L290 TraceCheckUtils]: 87: Hoare triple {3055#(and (<= 38 main_~v~0) (<= main_~v~0 38))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3056#(and (<= main_~v~0 39) (<= 39 main_~v~0))} is VALID [2022-04-27 22:23:21,826 INFO L290 TraceCheckUtils]: 88: Hoare triple {3056#(and (<= main_~v~0 39) (<= 39 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3056#(and (<= main_~v~0 39) (<= 39 main_~v~0))} is VALID [2022-04-27 22:23:21,826 INFO L290 TraceCheckUtils]: 89: Hoare triple {3056#(and (<= main_~v~0 39) (<= 39 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3057#(and (<= main_~v~0 40) (<= 40 main_~v~0))} is VALID [2022-04-27 22:23:21,827 INFO L290 TraceCheckUtils]: 90: Hoare triple {3057#(and (<= main_~v~0 40) (<= 40 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3057#(and (<= main_~v~0 40) (<= 40 main_~v~0))} is VALID [2022-04-27 22:23:21,827 INFO L290 TraceCheckUtils]: 91: Hoare triple {3057#(and (<= main_~v~0 40) (<= 40 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3058#(and (<= main_~v~0 41) (<= 41 main_~v~0))} is VALID [2022-04-27 22:23:21,827 INFO L290 TraceCheckUtils]: 92: Hoare triple {3058#(and (<= main_~v~0 41) (<= 41 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3058#(and (<= main_~v~0 41) (<= 41 main_~v~0))} is VALID [2022-04-27 22:23:21,828 INFO L290 TraceCheckUtils]: 93: Hoare triple {3058#(and (<= main_~v~0 41) (<= 41 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3059#(and (<= main_~v~0 42) (<= 42 main_~v~0))} is VALID [2022-04-27 22:23:21,828 INFO L290 TraceCheckUtils]: 94: Hoare triple {3059#(and (<= main_~v~0 42) (<= 42 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3059#(and (<= main_~v~0 42) (<= 42 main_~v~0))} is VALID [2022-04-27 22:23:21,829 INFO L290 TraceCheckUtils]: 95: Hoare triple {3059#(and (<= main_~v~0 42) (<= 42 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3060#(and (<= main_~v~0 43) (<= 43 main_~v~0))} is VALID [2022-04-27 22:23:21,829 INFO L290 TraceCheckUtils]: 96: Hoare triple {3060#(and (<= main_~v~0 43) (<= 43 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3060#(and (<= main_~v~0 43) (<= 43 main_~v~0))} is VALID [2022-04-27 22:23:21,829 INFO L290 TraceCheckUtils]: 97: Hoare triple {3060#(and (<= main_~v~0 43) (<= 43 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3061#(and (<= 44 main_~v~0) (<= main_~v~0 44))} is VALID [2022-04-27 22:23:21,830 INFO L290 TraceCheckUtils]: 98: Hoare triple {3061#(and (<= 44 main_~v~0) (<= main_~v~0 44))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3061#(and (<= 44 main_~v~0) (<= main_~v~0 44))} is VALID [2022-04-27 22:23:21,830 INFO L290 TraceCheckUtils]: 99: Hoare triple {3061#(and (<= 44 main_~v~0) (<= main_~v~0 44))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3062#(and (<= main_~v~0 45) (<= 45 main_~v~0))} is VALID [2022-04-27 22:23:21,830 INFO L290 TraceCheckUtils]: 100: Hoare triple {3062#(and (<= main_~v~0 45) (<= 45 main_~v~0))} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3062#(and (<= main_~v~0 45) (<= 45 main_~v~0))} is VALID [2022-04-27 22:23:21,831 INFO L290 TraceCheckUtils]: 101: Hoare triple {3062#(and (<= main_~v~0 45) (<= 45 main_~v~0))} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3371#(and (<= 46 main_~v~0) (<= main_~v~0 46))} is VALID [2022-04-27 22:23:21,831 INFO L290 TraceCheckUtils]: 102: Hoare triple {3371#(and (<= 46 main_~v~0) (<= main_~v~0 46))} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {3013#false} is VALID [2022-04-27 22:23:21,831 INFO L272 TraceCheckUtils]: 103: Hoare triple {3013#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {3013#false} is VALID [2022-04-27 22:23:21,831 INFO L290 TraceCheckUtils]: 104: Hoare triple {3013#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3013#false} is VALID [2022-04-27 22:23:21,831 INFO L290 TraceCheckUtils]: 105: Hoare triple {3013#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3013#false} is VALID [2022-04-27 22:23:21,832 INFO L290 TraceCheckUtils]: 106: Hoare triple {3013#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3013#false} is VALID [2022-04-27 22:23:21,833 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:23:21,833 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:23:25,252 INFO L290 TraceCheckUtils]: 106: Hoare triple {3013#false} [122] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3013#false} is VALID [2022-04-27 22:23:25,252 INFO L290 TraceCheckUtils]: 105: Hoare triple {3013#false} [120] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3013#false} is VALID [2022-04-27 22:23:25,252 INFO L290 TraceCheckUtils]: 104: Hoare triple {3013#false} [119] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3013#false} is VALID [2022-04-27 22:23:25,252 INFO L272 TraceCheckUtils]: 103: Hoare triple {3013#false} [116] L24-4-->__VERIFIER_assertENTRY: Formula: (= (ite (= 0 (mod v_main_~v~0_8 4)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~v~0=v_main_~v~0_8} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~v~0] {3013#false} is VALID [2022-04-27 22:23:25,253 INFO L290 TraceCheckUtils]: 102: Hoare triple {3399#(< (mod main_~v~0 4294967296) 268435455)} [114] L24-3-->L24-4: Formula: (not (< (mod v_main_~v~0_3 4294967296) 268435455)) InVars {main_~v~0=v_main_~v~0_3} OutVars{main_~v~0=v_main_~v~0_3} AuxVars[] AssignedVars[] {3013#false} is VALID [2022-04-27 22:23:25,254 INFO L290 TraceCheckUtils]: 101: Hoare triple {3403#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3399#(< (mod main_~v~0 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,254 INFO L290 TraceCheckUtils]: 100: Hoare triple {3403#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3403#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,254 INFO L290 TraceCheckUtils]: 99: Hoare triple {3410#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3403#(< (mod (+ main_~v~0 1) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,255 INFO L290 TraceCheckUtils]: 98: Hoare triple {3410#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3410#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,255 INFO L290 TraceCheckUtils]: 97: Hoare triple {3417#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3410#(< (mod (+ main_~v~0 2) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,256 INFO L290 TraceCheckUtils]: 96: Hoare triple {3417#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3417#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,256 INFO L290 TraceCheckUtils]: 95: Hoare triple {3424#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3417#(< (mod (+ main_~v~0 3) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,257 INFO L290 TraceCheckUtils]: 94: Hoare triple {3424#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3424#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,257 INFO L290 TraceCheckUtils]: 93: Hoare triple {3431#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3424#(< (mod (+ main_~v~0 4) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,258 INFO L290 TraceCheckUtils]: 92: Hoare triple {3431#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3431#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,258 INFO L290 TraceCheckUtils]: 91: Hoare triple {3438#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3431#(< (mod (+ 5 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,259 INFO L290 TraceCheckUtils]: 90: Hoare triple {3438#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3438#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,259 INFO L290 TraceCheckUtils]: 89: Hoare triple {3445#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3438#(< (mod (+ main_~v~0 6) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,260 INFO L290 TraceCheckUtils]: 88: Hoare triple {3445#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3445#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,260 INFO L290 TraceCheckUtils]: 87: Hoare triple {3452#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3445#(< (mod (+ 7 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,261 INFO L290 TraceCheckUtils]: 86: Hoare triple {3452#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3452#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,261 INFO L290 TraceCheckUtils]: 85: Hoare triple {3459#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3452#(< (mod (+ main_~v~0 8) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,262 INFO L290 TraceCheckUtils]: 84: Hoare triple {3459#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3459#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,262 INFO L290 TraceCheckUtils]: 83: Hoare triple {3466#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3459#(< (mod (+ main_~v~0 9) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,263 INFO L290 TraceCheckUtils]: 82: Hoare triple {3466#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3466#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,263 INFO L290 TraceCheckUtils]: 81: Hoare triple {3473#(< (mod (+ main_~v~0 11) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3466#(< (mod (+ main_~v~0 10) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,264 INFO L290 TraceCheckUtils]: 80: Hoare triple {3473#(< (mod (+ main_~v~0 11) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3473#(< (mod (+ main_~v~0 11) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,264 INFO L290 TraceCheckUtils]: 79: Hoare triple {3480#(< (mod (+ main_~v~0 12) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3473#(< (mod (+ main_~v~0 11) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,264 INFO L290 TraceCheckUtils]: 78: Hoare triple {3480#(< (mod (+ main_~v~0 12) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3480#(< (mod (+ main_~v~0 12) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,265 INFO L290 TraceCheckUtils]: 77: Hoare triple {3487#(< (mod (+ main_~v~0 13) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3480#(< (mod (+ main_~v~0 12) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,265 INFO L290 TraceCheckUtils]: 76: Hoare triple {3487#(< (mod (+ main_~v~0 13) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3487#(< (mod (+ main_~v~0 13) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,266 INFO L290 TraceCheckUtils]: 75: Hoare triple {3494#(< (mod (+ main_~v~0 14) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3487#(< (mod (+ main_~v~0 13) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,266 INFO L290 TraceCheckUtils]: 74: Hoare triple {3494#(< (mod (+ main_~v~0 14) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3494#(< (mod (+ main_~v~0 14) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,267 INFO L290 TraceCheckUtils]: 73: Hoare triple {3501#(< (mod (+ main_~v~0 15) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3494#(< (mod (+ main_~v~0 14) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,267 INFO L290 TraceCheckUtils]: 72: Hoare triple {3501#(< (mod (+ main_~v~0 15) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3501#(< (mod (+ main_~v~0 15) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,268 INFO L290 TraceCheckUtils]: 71: Hoare triple {3508#(< (mod (+ main_~v~0 16) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3501#(< (mod (+ main_~v~0 15) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,268 INFO L290 TraceCheckUtils]: 70: Hoare triple {3508#(< (mod (+ main_~v~0 16) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3508#(< (mod (+ main_~v~0 16) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,269 INFO L290 TraceCheckUtils]: 69: Hoare triple {3515#(< (mod (+ main_~v~0 17) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3508#(< (mod (+ main_~v~0 16) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,269 INFO L290 TraceCheckUtils]: 68: Hoare triple {3515#(< (mod (+ main_~v~0 17) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3515#(< (mod (+ main_~v~0 17) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,270 INFO L290 TraceCheckUtils]: 67: Hoare triple {3522#(< (mod (+ main_~v~0 18) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3515#(< (mod (+ main_~v~0 17) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,270 INFO L290 TraceCheckUtils]: 66: Hoare triple {3522#(< (mod (+ main_~v~0 18) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3522#(< (mod (+ main_~v~0 18) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,271 INFO L290 TraceCheckUtils]: 65: Hoare triple {3529#(< (mod (+ 19 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3522#(< (mod (+ main_~v~0 18) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,271 INFO L290 TraceCheckUtils]: 64: Hoare triple {3529#(< (mod (+ 19 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3529#(< (mod (+ 19 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,274 INFO L290 TraceCheckUtils]: 63: Hoare triple {3536#(< (mod (+ main_~v~0 20) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3529#(< (mod (+ 19 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,274 INFO L290 TraceCheckUtils]: 62: Hoare triple {3536#(< (mod (+ main_~v~0 20) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3536#(< (mod (+ main_~v~0 20) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,274 INFO L290 TraceCheckUtils]: 61: Hoare triple {3543#(< (mod (+ main_~v~0 21) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3536#(< (mod (+ main_~v~0 20) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,275 INFO L290 TraceCheckUtils]: 60: Hoare triple {3543#(< (mod (+ main_~v~0 21) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3543#(< (mod (+ main_~v~0 21) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,276 INFO L290 TraceCheckUtils]: 59: Hoare triple {3550#(< (mod (+ main_~v~0 22) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3543#(< (mod (+ main_~v~0 21) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,276 INFO L290 TraceCheckUtils]: 58: Hoare triple {3550#(< (mod (+ main_~v~0 22) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3550#(< (mod (+ main_~v~0 22) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,277 INFO L290 TraceCheckUtils]: 57: Hoare triple {3557#(< (mod (+ 23 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3550#(< (mod (+ main_~v~0 22) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,277 INFO L290 TraceCheckUtils]: 56: Hoare triple {3557#(< (mod (+ 23 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3557#(< (mod (+ 23 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,278 INFO L290 TraceCheckUtils]: 55: Hoare triple {3564#(< (mod (+ main_~v~0 24) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3557#(< (mod (+ 23 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,278 INFO L290 TraceCheckUtils]: 54: Hoare triple {3564#(< (mod (+ main_~v~0 24) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3564#(< (mod (+ main_~v~0 24) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,279 INFO L290 TraceCheckUtils]: 53: Hoare triple {3571#(< (mod (+ main_~v~0 25) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3564#(< (mod (+ main_~v~0 24) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,279 INFO L290 TraceCheckUtils]: 52: Hoare triple {3571#(< (mod (+ main_~v~0 25) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3571#(< (mod (+ main_~v~0 25) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,280 INFO L290 TraceCheckUtils]: 51: Hoare triple {3578#(< (mod (+ main_~v~0 26) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3571#(< (mod (+ main_~v~0 25) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,280 INFO L290 TraceCheckUtils]: 50: Hoare triple {3578#(< (mod (+ main_~v~0 26) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3578#(< (mod (+ main_~v~0 26) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,280 INFO L290 TraceCheckUtils]: 49: Hoare triple {3585#(< (mod (+ main_~v~0 27) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3578#(< (mod (+ main_~v~0 26) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,281 INFO L290 TraceCheckUtils]: 48: Hoare triple {3585#(< (mod (+ main_~v~0 27) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3585#(< (mod (+ main_~v~0 27) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,281 INFO L290 TraceCheckUtils]: 47: Hoare triple {3592#(< (mod (+ main_~v~0 28) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3585#(< (mod (+ main_~v~0 27) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,281 INFO L290 TraceCheckUtils]: 46: Hoare triple {3592#(< (mod (+ main_~v~0 28) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3592#(< (mod (+ main_~v~0 28) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,282 INFO L290 TraceCheckUtils]: 45: Hoare triple {3599#(< (mod (+ 29 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3592#(< (mod (+ main_~v~0 28) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,282 INFO L290 TraceCheckUtils]: 44: Hoare triple {3599#(< (mod (+ 29 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3599#(< (mod (+ 29 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,283 INFO L290 TraceCheckUtils]: 43: Hoare triple {3606#(< (mod (+ 30 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3599#(< (mod (+ 29 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,283 INFO L290 TraceCheckUtils]: 42: Hoare triple {3606#(< (mod (+ 30 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3606#(< (mod (+ 30 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,284 INFO L290 TraceCheckUtils]: 41: Hoare triple {3613#(< (mod (+ main_~v~0 31) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3606#(< (mod (+ 30 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,284 INFO L290 TraceCheckUtils]: 40: Hoare triple {3613#(< (mod (+ main_~v~0 31) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3613#(< (mod (+ main_~v~0 31) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,284 INFO L290 TraceCheckUtils]: 39: Hoare triple {3620#(< (mod (+ 32 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3613#(< (mod (+ main_~v~0 31) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,285 INFO L290 TraceCheckUtils]: 38: Hoare triple {3620#(< (mod (+ 32 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3620#(< (mod (+ 32 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,285 INFO L290 TraceCheckUtils]: 37: Hoare triple {3627#(< (mod (+ main_~v~0 33) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3620#(< (mod (+ 32 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,286 INFO L290 TraceCheckUtils]: 36: Hoare triple {3627#(< (mod (+ main_~v~0 33) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3627#(< (mod (+ main_~v~0 33) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,286 INFO L290 TraceCheckUtils]: 35: Hoare triple {3634#(< (mod (+ main_~v~0 34) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3627#(< (mod (+ main_~v~0 33) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,286 INFO L290 TraceCheckUtils]: 34: Hoare triple {3634#(< (mod (+ main_~v~0 34) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3634#(< (mod (+ main_~v~0 34) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,287 INFO L290 TraceCheckUtils]: 33: Hoare triple {3641#(< (mod (+ 35 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3634#(< (mod (+ main_~v~0 34) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,287 INFO L290 TraceCheckUtils]: 32: Hoare triple {3641#(< (mod (+ 35 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3641#(< (mod (+ 35 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,288 INFO L290 TraceCheckUtils]: 31: Hoare triple {3648#(< (mod (+ main_~v~0 36) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3641#(< (mod (+ 35 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,288 INFO L290 TraceCheckUtils]: 30: Hoare triple {3648#(< (mod (+ main_~v~0 36) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3648#(< (mod (+ main_~v~0 36) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,289 INFO L290 TraceCheckUtils]: 29: Hoare triple {3655#(< (mod (+ main_~v~0 37) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3648#(< (mod (+ main_~v~0 36) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,289 INFO L290 TraceCheckUtils]: 28: Hoare triple {3655#(< (mod (+ main_~v~0 37) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3655#(< (mod (+ main_~v~0 37) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,289 INFO L290 TraceCheckUtils]: 27: Hoare triple {3662#(< (mod (+ main_~v~0 38) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3655#(< (mod (+ main_~v~0 37) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,290 INFO L290 TraceCheckUtils]: 26: Hoare triple {3662#(< (mod (+ main_~v~0 38) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3662#(< (mod (+ main_~v~0 38) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,290 INFO L290 TraceCheckUtils]: 25: Hoare triple {3669#(< (mod (+ main_~v~0 39) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3662#(< (mod (+ main_~v~0 38) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,290 INFO L290 TraceCheckUtils]: 24: Hoare triple {3669#(< (mod (+ main_~v~0 39) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3669#(< (mod (+ main_~v~0 39) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,291 INFO L290 TraceCheckUtils]: 23: Hoare triple {3676#(< (mod (+ 40 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3669#(< (mod (+ main_~v~0 39) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,291 INFO L290 TraceCheckUtils]: 22: Hoare triple {3676#(< (mod (+ 40 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3676#(< (mod (+ 40 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,292 INFO L290 TraceCheckUtils]: 21: Hoare triple {3683#(< (mod (+ 41 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3676#(< (mod (+ 40 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,292 INFO L290 TraceCheckUtils]: 20: Hoare triple {3683#(< (mod (+ 41 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3683#(< (mod (+ 41 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,293 INFO L290 TraceCheckUtils]: 19: Hoare triple {3690#(< (mod (+ 42 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3683#(< (mod (+ 41 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,293 INFO L290 TraceCheckUtils]: 18: Hoare triple {3690#(< (mod (+ 42 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3690#(< (mod (+ 42 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,308 INFO L290 TraceCheckUtils]: 17: Hoare triple {3697#(< (mod (+ main_~v~0 43) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3690#(< (mod (+ 42 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,308 INFO L290 TraceCheckUtils]: 16: Hoare triple {3697#(< (mod (+ main_~v~0 43) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3697#(< (mod (+ main_~v~0 43) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,309 INFO L290 TraceCheckUtils]: 15: Hoare triple {3704#(< (mod (+ 44 main_~v~0) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3697#(< (mod (+ main_~v~0 43) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,309 INFO L290 TraceCheckUtils]: 14: Hoare triple {3704#(< (mod (+ 44 main_~v~0) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3704#(< (mod (+ 44 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,310 INFO L290 TraceCheckUtils]: 13: Hoare triple {3711#(< (mod (+ main_~v~0 45) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3704#(< (mod (+ 44 main_~v~0) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,310 INFO L290 TraceCheckUtils]: 12: Hoare triple {3711#(< (mod (+ main_~v~0 45) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3711#(< (mod (+ main_~v~0 45) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,311 INFO L290 TraceCheckUtils]: 11: Hoare triple {3718#(< (mod (+ main_~v~0 46) 4294967296) 268435455)} [117] L24-2-->L24-3: Formula: (= v_main_~v~0_5 (+ v_main_~v~0_6 1)) InVars {main_~v~0=v_main_~v~0_6} OutVars{main_#t~post8=|v_main_#t~post8_1|, main_~v~0=v_main_~v~0_5} AuxVars[] AssignedVars[main_~v~0, main_#t~post8] {3711#(< (mod (+ main_~v~0 45) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,311 INFO L290 TraceCheckUtils]: 10: Hoare triple {3718#(< (mod (+ main_~v~0 46) 4294967296) 268435455)} [115] L24-3-->L24-2: Formula: (< (mod v_main_~v~0_4 4294967296) 268435455) InVars {main_~v~0=v_main_~v~0_4} OutVars{main_~v~0=v_main_~v~0_4} AuxVars[] AssignedVars[] {3718#(< (mod (+ main_~v~0 46) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,311 INFO L290 TraceCheckUtils]: 9: Hoare triple {3012#true} [111] L23-2-->L24-3: Formula: (and (= v_main_~v~0_2 0) (< (mod v_main_~z~0_3 4294967296) 10)) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~v~0=v_main_~v~0_2, main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[main_~v~0] {3718#(< (mod (+ main_~v~0 46) 4294967296) 268435455)} is VALID [2022-04-27 22:23:25,311 INFO L290 TraceCheckUtils]: 8: Hoare triple {3012#true} [107] L22-3-->L23-2: Formula: (and (< (mod v_main_~y~0_6 4294967296) 10) (= v_main_~z~0_6 0)) InVars {main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {3012#true} is VALID [2022-04-27 22:23:25,311 INFO L290 TraceCheckUtils]: 7: Hoare triple {3012#true} [102] L21-3-->L22-3: Formula: (and (< (mod v_main_~x~0_4 4294967296) 10) (= v_main_~y~0_2 0)) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_~y~0] {3012#true} is VALID [2022-04-27 22:23:25,312 INFO L290 TraceCheckUtils]: 6: Hoare triple {3012#true} [98] L19-3-->L21-3: Formula: (and (= v_main_~x~0_2 0) (< (mod v_main_~w~0_6 4294967296) 268435455)) InVars {main_~w~0=v_main_~w~0_6} OutVars{main_~x~0=v_main_~x~0_2, main_~w~0=v_main_~w~0_6} AuxVars[] AssignedVars[main_~x~0] {3012#true} is VALID [2022-04-27 22:23:25,312 INFO L290 TraceCheckUtils]: 5: Hoare triple {3012#true} [94] mainENTRY-->L19-3: Formula: (and (= v_main_~x~0_1 0) (= v_main_~w~0_3 0) (= v_main_~v~0_1 0) (= v_main_~z~0_2 0) (= v_main_~y~0_1 0)) InVars {} OutVars{main_~y~0=v_main_~y~0_1, main_~v~0=v_main_~v~0_1, main_~w~0=v_main_~w~0_3, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~v~0, main_~w~0, main_~x~0, main_~z~0, main_~y~0] {3012#true} is VALID [2022-04-27 22:23:25,312 INFO L272 TraceCheckUtils]: 4: Hoare triple {3012#true} [91] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:23:25,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3012#true} {3012#true} [125] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:23:25,312 INFO L290 TraceCheckUtils]: 2: Hoare triple {3012#true} [95] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:23:25,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {3012#true} [92] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3012#true} is VALID [2022-04-27 22:23:25,312 INFO L272 TraceCheckUtils]: 0: Hoare triple {3012#true} [90] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3012#true} is VALID [2022-04-27 22:23:25,313 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:23:25,313 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1557567713] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:23:25,313 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:23:25,313 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 49, 49] total 98 [2022-04-27 22:23:25,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409210170] [2022-04-27 22:23:25,314 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:23:25,315 INFO L78 Accepts]: Start accepts. Automaton has has 98 states, 98 states have (on average 2.0408163265306123) internal successors, (200), 97 states have internal predecessors, (200), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 107 [2022-04-27 22:23:25,315 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:23:25,315 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 98 states, 98 states have (on average 2.0408163265306123) internal successors, (200), 97 states have internal predecessors, (200), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:23:25,449 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 205 edges. 205 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:23:25,450 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 98 states [2022-04-27 22:23:25,450 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:23:25,451 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2022-04-27 22:23:25,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2496, Invalid=7010, Unknown=0, NotChecked=0, Total=9506 [2022-04-27 22:23:25,453 INFO L87 Difference]: Start difference. First operand 114 states and 118 transitions. Second operand has 98 states, 98 states have (on average 2.0408163265306123) internal successors, (200), 97 states have internal predecessors, (200), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:23:34,452 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (< (mod (+ c_main_~v~0 39) 4294967296) 268435455) (< (mod (+ 7 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 24) 4294967296) 268435455) (< (mod (+ c_main_~v~0 36) 4294967296) 268435455) (< (mod (+ 44 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 6) 4294967296) 268435455) (< (mod (+ c_main_~v~0 17) 4294967296) 268435455) (< (mod (+ c_main_~v~0 13) 4294967296) 268435455) (< (mod (+ c_main_~v~0 18) 4294967296) 268435455) (< (mod (+ 32 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 28) 4294967296) 268435455) (< (mod (+ c_main_~v~0 20) 4294967296) 268435455) (< (mod (+ 29 c_main_~v~0) 4294967296) 268435455) (< (mod (+ 22 c_main_~v~0) 4294967296) 268435455) (< (mod c_main_~v~0 4294967296) 268435455) (< (mod (+ c_main_~v~0 38) 4294967296) 268435455) (< (mod (+ 9 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 4) 4294967296) 268435455) (< (mod (+ c_main_~v~0 26) 4294967296) 268435455) (< (mod (+ 30 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 10) 4294967296) 268435455) (< (mod (+ 19 c_main_~v~0) 4294967296) 268435455) (< (mod (+ 40 c_main_~v~0) 4294967296) 268435455) (< (mod (+ 35 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 25) 4294967296) 268435455) (< (mod (+ 42 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 34) 4294967296) 268435455) (< (mod (+ c_main_~v~0 43) 4294967296) 268435455) (< (mod (+ c_main_~v~0 31) 4294967296) 268435455) (< (mod (+ 23 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 1) 4294967296) 268435455) (< (mod (+ c_main_~v~0 46) 4294967296) 268435455) (< (mod (+ 14 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 37) 4294967296) 268435455) (< (mod (+ c_main_~v~0 12) 4294967296) 268435455) (< (mod (+ c_main_~v~0 33) 4294967296) 268435455) (< (mod (+ 16 c_main_~v~0) 4294967296) 268435455) (< (mod (+ 2 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 45) 4294967296) 268435455) (< (mod (+ c_main_~v~0 11) 4294967296) 268435455) (< (mod (+ c_main_~v~0 15) 4294967296) 268435455) (< (mod (+ 5 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 8) 4294967296) 268435455) (< (mod (+ 41 c_main_~v~0) 4294967296) 268435455) (< (mod (+ c_main_~v~0 27) 4294967296) 268435455) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< (mod (+ 3 c_main_~v~0) 4294967296) 268435455) (< (mod (+ 21 c_main_~v~0) 4294967296) 268435455)) is different from false [2022-04-27 22:24:35,079 WARN L232 SmtUtils]: Spent 14.48s on a formula simplification. DAG size of input: 188 DAG size of output: 12 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:25:33,440 WARN L232 SmtUtils]: Spent 22.93s on a formula simplification. DAG size of input: 192 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:26:45,108 WARN L232 SmtUtils]: Spent 29.80s on a formula simplification. DAG size of input: 188 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:27:43,098 WARN L232 SmtUtils]: Spent 9.72s on a formula simplification. DAG size of input: 184 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:28:36,329 WARN L232 SmtUtils]: Spent 10.78s on a formula simplification. DAG size of input: 180 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:29:35,859 WARN L232 SmtUtils]: Spent 11.16s on a formula simplification. DAG size of input: 176 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:30:37,536 WARN L232 SmtUtils]: Spent 9.50s on a formula simplification. DAG size of input: 172 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:31:35,043 WARN L232 SmtUtils]: Spent 9.00s on a formula simplification. DAG size of input: 168 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:32:25,666 WARN L232 SmtUtils]: Spent 5.41s on a formula simplification. DAG size of input: 164 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:33:29,357 WARN L232 SmtUtils]: Spent 5.81s on a formula simplification. DAG size of input: 160 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)