/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loop-acceleration/simple_1-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 21:23:50,515 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 21:23:50,517 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 21:23:50,541 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 21:23:50,541 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 21:23:50,542 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 21:23:50,543 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 21:23:50,544 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 21:23:50,545 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 21:23:50,546 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 21:23:50,546 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 21:23:50,547 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 21:23:50,547 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 21:23:50,548 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 21:23:50,549 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 21:23:50,549 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 21:23:50,550 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 21:23:50,551 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 21:23:50,552 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 21:23:50,553 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 21:23:50,555 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 21:23:50,562 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 21:23:50,562 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 21:23:50,563 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 21:23:50,563 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 21:23:50,565 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 21:23:50,570 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 21:23:50,571 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 21:23:50,577 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 21:23:50,578 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 21:23:50,604 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 21:23:50,604 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 21:23:50,605 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 21:23:50,605 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 21:23:50,606 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 21:23:50,606 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 21:23:50,606 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 21:23:50,606 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 21:23:50,606 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 21:23:50,607 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 21:23:50,607 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 21:23:50,607 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 21:23:50,607 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 21:23:50,607 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 21:23:50,607 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 21:23:50,607 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 21:23:50,607 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 21:23:50,608 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 21:23:50,608 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 21:23:50,608 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:23:50,608 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 21:23:50,608 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 21:23:50,608 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 21:23:50,608 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 21:23:50,608 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 21:23:50,608 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 21:23:50,608 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 21:23:50,609 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 21:23:50,609 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 21:23:50,609 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 21:23:50,744 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 21:23:50,760 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 21:23:50,762 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 21:23:50,763 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 21:23:50,763 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 21:23:50,764 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/simple_1-1.c [2022-04-27 21:23:50,809 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ba6dea050/a98c7bf23dc047ecb674f35154ac4284/FLAGfb937a56f [2022-04-27 21:23:51,206 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 21:23:51,207 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/simple_1-1.c [2022-04-27 21:23:51,210 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ba6dea050/a98c7bf23dc047ecb674f35154ac4284/FLAGfb937a56f [2022-04-27 21:23:51,218 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ba6dea050/a98c7bf23dc047ecb674f35154ac4284 [2022-04-27 21:23:51,219 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 21:23:51,220 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 21:23:51,221 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 21:23:51,221 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 21:23:51,223 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 21:23:51,223 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,224 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4078fa8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51, skipping insertion in model container [2022-04-27 21:23:51,224 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,228 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 21:23:51,235 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 21:23:51,349 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/simple_1-1.c[322,335] [2022-04-27 21:23:51,354 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:23:51,378 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 21:23:51,385 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/simple_1-1.c[322,335] [2022-04-27 21:23:51,386 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:23:51,393 INFO L208 MainTranslator]: Completed translation [2022-04-27 21:23:51,394 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51 WrapperNode [2022-04-27 21:23:51,396 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 21:23:51,400 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 21:23:51,400 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 21:23:51,400 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 21:23:51,408 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,408 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,413 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,413 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,419 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,421 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,425 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,427 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 21:23:51,428 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 21:23:51,428 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 21:23:51,428 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 21:23:51,429 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,434 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:23:51,440 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:23:51,449 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 21:23:51,470 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 21:23:51,484 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 21:23:51,484 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 21:23:51,484 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 21:23:51,484 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 21:23:51,485 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 21:23:51,485 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 21:23:51,485 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 21:23:51,486 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 21:23:51,486 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 21:23:51,486 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 21:23:51,486 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 21:23:51,486 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 21:23:51,486 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 21:23:51,486 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 21:23:51,487 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 21:23:51,487 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 21:23:51,487 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 21:23:51,535 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 21:23:51,536 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 21:23:51,630 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 21:23:51,635 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 21:23:51,635 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-27 21:23:51,636 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:23:51 BoogieIcfgContainer [2022-04-27 21:23:51,636 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 21:23:51,636 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 21:23:51,636 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 21:23:51,637 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 21:23:51,639 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:23:51" (1/1) ... [2022-04-27 21:23:51,640 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 21:23:51,650 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:23:51 BasicIcfg [2022-04-27 21:23:51,650 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 21:23:51,651 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 21:23:51,651 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 21:23:51,653 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 21:23:51,653 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 09:23:51" (1/4) ... [2022-04-27 21:23:51,653 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c41dd8e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:23:51, skipping insertion in model container [2022-04-27 21:23:51,654 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:23:51" (2/4) ... [2022-04-27 21:23:51,654 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c41dd8e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:23:51, skipping insertion in model container [2022-04-27 21:23:51,654 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:23:51" (3/4) ... [2022-04-27 21:23:51,654 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c41dd8e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 09:23:51, skipping insertion in model container [2022-04-27 21:23:51,654 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:23:51" (4/4) ... [2022-04-27 21:23:51,655 INFO L111 eAbstractionObserver]: Analyzing ICFG simple_1-1.cqvasr [2022-04-27 21:23:51,663 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 21:23:51,663 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 21:23:51,689 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 21:23:51,693 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@2c174c95, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@398d294c [2022-04-27 21:23:51,693 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 21:23:51,698 INFO L276 IsEmpty]: Start isEmpty. Operand has 18 states, 10 states have (on average 1.4) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:23:51,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-27 21:23:51,703 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:23:51,704 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:23:51,704 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:23:51,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:23:51,720 INFO L85 PathProgramCache]: Analyzing trace with hash -1690616289, now seen corresponding path program 1 times [2022-04-27 21:23:51,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:23:51,726 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [155012790] [2022-04-27 21:23:51,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:23:51,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:23:51,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:51,869 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:23:51,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:51,881 INFO L290 TraceCheckUtils]: 0: Hoare triple {26#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21#true} is VALID [2022-04-27 21:23:51,881 INFO L290 TraceCheckUtils]: 1: Hoare triple {21#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21#true} is VALID [2022-04-27 21:23:51,881 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21#true} {21#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21#true} is VALID [2022-04-27 21:23:51,882 INFO L272 TraceCheckUtils]: 0: Hoare triple {21#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:23:51,883 INFO L290 TraceCheckUtils]: 1: Hoare triple {26#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21#true} is VALID [2022-04-27 21:23:51,883 INFO L290 TraceCheckUtils]: 2: Hoare triple {21#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21#true} is VALID [2022-04-27 21:23:51,883 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21#true} {21#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21#true} is VALID [2022-04-27 21:23:51,883 INFO L272 TraceCheckUtils]: 4: Hoare triple {21#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21#true} is VALID [2022-04-27 21:23:51,883 INFO L290 TraceCheckUtils]: 5: Hoare triple {21#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {21#true} is VALID [2022-04-27 21:23:51,884 INFO L290 TraceCheckUtils]: 6: Hoare triple {21#true} [45] L15-2-->L15-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {22#false} is VALID [2022-04-27 21:23:51,884 INFO L272 TraceCheckUtils]: 7: Hoare triple {22#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {22#false} is VALID [2022-04-27 21:23:51,884 INFO L290 TraceCheckUtils]: 8: Hoare triple {22#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {22#false} is VALID [2022-04-27 21:23:51,884 INFO L290 TraceCheckUtils]: 9: Hoare triple {22#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {22#false} is VALID [2022-04-27 21:23:51,885 INFO L290 TraceCheckUtils]: 10: Hoare triple {22#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#false} is VALID [2022-04-27 21:23:51,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:51,885 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:23:51,885 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [155012790] [2022-04-27 21:23:51,886 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [155012790] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:23:51,886 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:23:51,886 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 21:23:51,887 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1528839984] [2022-04-27 21:23:51,888 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:23:51,891 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 21:23:51,892 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:23:51,894 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:51,906 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:23:51,906 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 21:23:51,906 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:23:51,919 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 21:23:51,919 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:23:51,921 INFO L87 Difference]: Start difference. First operand has 18 states, 10 states have (on average 1.4) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:51,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:51,983 INFO L93 Difference]: Finished difference Result 29 states and 32 transitions. [2022-04-27 21:23:51,983 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 21:23:51,983 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 21:23:51,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:23:51,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:51,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 32 transitions. [2022-04-27 21:23:51,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:51,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 32 transitions. [2022-04-27 21:23:51,990 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 32 transitions. [2022-04-27 21:23:52,018 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:23:52,023 INFO L225 Difference]: With dead ends: 29 [2022-04-27 21:23:52,024 INFO L226 Difference]: Without dead ends: 12 [2022-04-27 21:23:52,025 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:23:52,028 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 9 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 20 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:23:52,028 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 20 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:23:52,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states. [2022-04-27 21:23:52,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2022-04-27 21:23:52,044 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:23:52,045 INFO L82 GeneralOperation]: Start isEquivalent. First operand 12 states. Second operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,045 INFO L74 IsIncluded]: Start isIncluded. First operand 12 states. Second operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,046 INFO L87 Difference]: Start difference. First operand 12 states. Second operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:52,047 INFO L93 Difference]: Finished difference Result 12 states and 12 transitions. [2022-04-27 21:23:52,047 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2022-04-27 21:23:52,047 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:23:52,047 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:23:52,048 INFO L74 IsIncluded]: Start isIncluded. First operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 12 states. [2022-04-27 21:23:52,048 INFO L87 Difference]: Start difference. First operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 12 states. [2022-04-27 21:23:52,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:52,049 INFO L93 Difference]: Finished difference Result 12 states and 12 transitions. [2022-04-27 21:23:52,049 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2022-04-27 21:23:52,049 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:23:52,049 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:23:52,049 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:23:52,049 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:23:52,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 12 transitions. [2022-04-27 21:23:52,051 INFO L78 Accepts]: Start accepts. Automaton has 12 states and 12 transitions. Word has length 11 [2022-04-27 21:23:52,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:23:52,052 INFO L495 AbstractCegarLoop]: Abstraction has 12 states and 12 transitions. [2022-04-27 21:23:52,052 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,052 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2022-04-27 21:23:52,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-27 21:23:52,052 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:23:52,052 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:23:52,053 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 21:23:52,053 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:23:52,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:23:52,053 INFO L85 PathProgramCache]: Analyzing trace with hash -1689692768, now seen corresponding path program 1 times [2022-04-27 21:23:52,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:23:52,054 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191014953] [2022-04-27 21:23:52,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:23:52,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:23:52,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:52,108 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:23:52,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:52,115 INFO L290 TraceCheckUtils]: 0: Hoare triple {116#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {110#true} is VALID [2022-04-27 21:23:52,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {110#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-27 21:23:52,116 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {110#true} {110#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-27 21:23:52,116 INFO L272 TraceCheckUtils]: 0: Hoare triple {110#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {116#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:23:52,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {116#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {110#true} is VALID [2022-04-27 21:23:52,117 INFO L290 TraceCheckUtils]: 2: Hoare triple {110#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-27 21:23:52,117 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {110#true} {110#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-27 21:23:52,117 INFO L272 TraceCheckUtils]: 4: Hoare triple {110#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-27 21:23:52,118 INFO L290 TraceCheckUtils]: 5: Hoare triple {110#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {115#(= main_~x~0 0)} is VALID [2022-04-27 21:23:52,118 INFO L290 TraceCheckUtils]: 6: Hoare triple {115#(= main_~x~0 0)} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-27 21:23:52,118 INFO L272 TraceCheckUtils]: 7: Hoare triple {111#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {111#false} is VALID [2022-04-27 21:23:52,118 INFO L290 TraceCheckUtils]: 8: Hoare triple {111#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {111#false} is VALID [2022-04-27 21:23:52,118 INFO L290 TraceCheckUtils]: 9: Hoare triple {111#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-27 21:23:52,119 INFO L290 TraceCheckUtils]: 10: Hoare triple {111#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-27 21:23:52,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:52,119 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:23:52,119 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191014953] [2022-04-27 21:23:52,119 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [191014953] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:23:52,119 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:23:52,119 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 21:23:52,119 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463836587] [2022-04-27 21:23:52,120 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:23:52,120 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 21:23:52,120 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:23:52,121 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,129 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:23:52,129 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 21:23:52,129 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:23:52,130 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 21:23:52,130 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 21:23:52,130 INFO L87 Difference]: Start difference. First operand 12 states and 12 transitions. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:52,162 INFO L93 Difference]: Finished difference Result 18 states and 18 transitions. [2022-04-27 21:23:52,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 21:23:52,162 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 21:23:52,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:23:52,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2022-04-27 21:23:52,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2022-04-27 21:23:52,164 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 18 transitions. [2022-04-27 21:23:52,179 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:23:52,179 INFO L225 Difference]: With dead ends: 18 [2022-04-27 21:23:52,179 INFO L226 Difference]: Without dead ends: 13 [2022-04-27 21:23:52,180 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 21:23:52,181 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 6 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:23:52,181 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 18 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:23:52,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2022-04-27 21:23:52,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2022-04-27 21:23:52,183 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:23:52,183 INFO L82 GeneralOperation]: Start isEquivalent. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,183 INFO L74 IsIncluded]: Start isIncluded. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,184 INFO L87 Difference]: Start difference. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:52,184 INFO L93 Difference]: Finished difference Result 13 states and 13 transitions. [2022-04-27 21:23:52,184 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2022-04-27 21:23:52,185 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:23:52,185 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:23:52,185 INFO L74 IsIncluded]: Start isIncluded. First operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-27 21:23:52,185 INFO L87 Difference]: Start difference. First operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-27 21:23:52,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:52,186 INFO L93 Difference]: Finished difference Result 13 states and 13 transitions. [2022-04-27 21:23:52,186 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2022-04-27 21:23:52,186 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:23:52,186 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:23:52,186 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:23:52,186 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:23:52,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2022-04-27 21:23:52,187 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 11 [2022-04-27 21:23:52,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:23:52,187 INFO L495 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2022-04-27 21:23:52,187 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,187 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2022-04-27 21:23:52,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-04-27 21:23:52,188 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:23:52,188 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:23:52,188 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 21:23:52,188 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:23:52,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:23:52,188 INFO L85 PathProgramCache]: Analyzing trace with hash -814146699, now seen corresponding path program 1 times [2022-04-27 21:23:52,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:23:52,189 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1865716099] [2022-04-27 21:23:52,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:23:52,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:23:52,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:52,240 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:23:52,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:52,246 INFO L290 TraceCheckUtils]: 0: Hoare triple {203#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {196#true} is VALID [2022-04-27 21:23:52,246 INFO L290 TraceCheckUtils]: 1: Hoare triple {196#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,246 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {196#true} {196#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,247 INFO L272 TraceCheckUtils]: 0: Hoare triple {196#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {203#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:23:52,247 INFO L290 TraceCheckUtils]: 1: Hoare triple {203#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {196#true} is VALID [2022-04-27 21:23:52,247 INFO L290 TraceCheckUtils]: 2: Hoare triple {196#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,248 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {196#true} {196#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,248 INFO L272 TraceCheckUtils]: 4: Hoare triple {196#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,248 INFO L290 TraceCheckUtils]: 5: Hoare triple {196#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {201#(= main_~x~0 0)} is VALID [2022-04-27 21:23:52,249 INFO L290 TraceCheckUtils]: 6: Hoare triple {201#(= main_~x~0 0)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {202#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 2))} is VALID [2022-04-27 21:23:52,249 INFO L290 TraceCheckUtils]: 7: Hoare triple {202#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 2))} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {197#false} is VALID [2022-04-27 21:23:52,249 INFO L272 TraceCheckUtils]: 8: Hoare triple {197#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {197#false} is VALID [2022-04-27 21:23:52,249 INFO L290 TraceCheckUtils]: 9: Hoare triple {197#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {197#false} is VALID [2022-04-27 21:23:52,250 INFO L290 TraceCheckUtils]: 10: Hoare triple {197#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {197#false} is VALID [2022-04-27 21:23:52,250 INFO L290 TraceCheckUtils]: 11: Hoare triple {197#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {197#false} is VALID [2022-04-27 21:23:52,250 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:52,250 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:23:52,250 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1865716099] [2022-04-27 21:23:52,250 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1865716099] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:23:52,250 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [342798180] [2022-04-27 21:23:52,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:23:52,251 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:23:52,251 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:23:52,291 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:23:52,341 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 21:23:52,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:52,381 INFO L263 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-27 21:23:52,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:52,396 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:23:52,455 INFO L272 TraceCheckUtils]: 0: Hoare triple {196#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,455 INFO L290 TraceCheckUtils]: 1: Hoare triple {196#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {196#true} is VALID [2022-04-27 21:23:52,456 INFO L290 TraceCheckUtils]: 2: Hoare triple {196#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,456 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {196#true} {196#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,456 INFO L272 TraceCheckUtils]: 4: Hoare triple {196#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,456 INFO L290 TraceCheckUtils]: 5: Hoare triple {196#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {201#(= main_~x~0 0)} is VALID [2022-04-27 21:23:52,459 INFO L290 TraceCheckUtils]: 6: Hoare triple {201#(= main_~x~0 0)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {225#(= main_~x~0 2)} is VALID [2022-04-27 21:23:52,459 INFO L290 TraceCheckUtils]: 7: Hoare triple {225#(= main_~x~0 2)} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {197#false} is VALID [2022-04-27 21:23:52,460 INFO L272 TraceCheckUtils]: 8: Hoare triple {197#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {197#false} is VALID [2022-04-27 21:23:52,460 INFO L290 TraceCheckUtils]: 9: Hoare triple {197#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {197#false} is VALID [2022-04-27 21:23:52,460 INFO L290 TraceCheckUtils]: 10: Hoare triple {197#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {197#false} is VALID [2022-04-27 21:23:52,460 INFO L290 TraceCheckUtils]: 11: Hoare triple {197#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {197#false} is VALID [2022-04-27 21:23:52,460 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:52,460 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:23:52,539 INFO L290 TraceCheckUtils]: 11: Hoare triple {197#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {197#false} is VALID [2022-04-27 21:23:52,539 INFO L290 TraceCheckUtils]: 10: Hoare triple {197#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {197#false} is VALID [2022-04-27 21:23:52,540 INFO L290 TraceCheckUtils]: 9: Hoare triple {197#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {197#false} is VALID [2022-04-27 21:23:52,540 INFO L272 TraceCheckUtils]: 8: Hoare triple {197#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {197#false} is VALID [2022-04-27 21:23:52,540 INFO L290 TraceCheckUtils]: 7: Hoare triple {253#(< (mod main_~x~0 4294967296) 268435455)} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {197#false} is VALID [2022-04-27 21:23:52,541 INFO L290 TraceCheckUtils]: 6: Hoare triple {257#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {253#(< (mod main_~x~0 4294967296) 268435455)} is VALID [2022-04-27 21:23:52,542 INFO L290 TraceCheckUtils]: 5: Hoare triple {196#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {257#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} is VALID [2022-04-27 21:23:52,542 INFO L272 TraceCheckUtils]: 4: Hoare triple {196#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,542 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {196#true} {196#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,542 INFO L290 TraceCheckUtils]: 2: Hoare triple {196#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,542 INFO L290 TraceCheckUtils]: 1: Hoare triple {196#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {196#true} is VALID [2022-04-27 21:23:52,543 INFO L272 TraceCheckUtils]: 0: Hoare triple {196#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {196#true} is VALID [2022-04-27 21:23:52,543 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:52,545 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [342798180] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:23:52,545 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:23:52,545 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2022-04-27 21:23:52,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1974704718] [2022-04-27 21:23:52,546 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:23:52,548 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-27 21:23:52,548 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:23:52,548 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,561 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:23:52,561 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 21:23:52,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:23:52,562 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 21:23:52,562 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2022-04-27 21:23:52,562 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:52,662 INFO L93 Difference]: Finished difference Result 21 states and 23 transitions. [2022-04-27 21:23:52,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 21:23:52,662 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-27 21:23:52,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:23:52,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 23 transitions. [2022-04-27 21:23:52,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 23 transitions. [2022-04-27 21:23:52,664 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 23 transitions. [2022-04-27 21:23:52,683 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:23:52,683 INFO L225 Difference]: With dead ends: 21 [2022-04-27 21:23:52,683 INFO L226 Difference]: Without dead ends: 16 [2022-04-27 21:23:52,684 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=83, Unknown=0, NotChecked=0, Total=132 [2022-04-27 21:23:52,684 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 6 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 23 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:23:52,685 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 23 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:23:52,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-27 21:23:52,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-27 21:23:52,688 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:23:52,689 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,689 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,689 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:52,690 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-04-27 21:23:52,690 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2022-04-27 21:23:52,690 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:23:52,690 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:23:52,690 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 21:23:52,690 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 21:23:52,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:52,691 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-04-27 21:23:52,691 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2022-04-27 21:23:52,691 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:23:52,691 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:23:52,691 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:23:52,691 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:23:52,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2022-04-27 21:23:52,692 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 12 [2022-04-27 21:23:52,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:23:52,692 INFO L495 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2022-04-27 21:23:52,693 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:52,693 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2022-04-27 21:23:52,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 21:23:52,693 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:23:52,693 INFO L195 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:23:52,724 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 21:23:52,924 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:23:52,924 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:23:52,925 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:23:52,925 INFO L85 PathProgramCache]: Analyzing trace with hash 200712928, now seen corresponding path program 2 times [2022-04-27 21:23:52,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:23:52,925 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1435856252] [2022-04-27 21:23:52,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:23:52,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:23:52,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:53,020 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:23:53,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:53,041 INFO L290 TraceCheckUtils]: 0: Hoare triple {389#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {379#true} is VALID [2022-04-27 21:23:53,041 INFO L290 TraceCheckUtils]: 1: Hoare triple {379#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,041 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {379#true} {379#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,042 INFO L272 TraceCheckUtils]: 0: Hoare triple {379#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:23:53,042 INFO L290 TraceCheckUtils]: 1: Hoare triple {389#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {379#true} is VALID [2022-04-27 21:23:53,042 INFO L290 TraceCheckUtils]: 2: Hoare triple {379#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,042 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {379#true} {379#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,042 INFO L272 TraceCheckUtils]: 4: Hoare triple {379#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,043 INFO L290 TraceCheckUtils]: 5: Hoare triple {379#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {384#(= main_~x~0 0)} is VALID [2022-04-27 21:23:53,043 INFO L290 TraceCheckUtils]: 6: Hoare triple {384#(= main_~x~0 0)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {385#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 21:23:53,044 INFO L290 TraceCheckUtils]: 7: Hoare triple {385#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {386#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 21:23:53,044 INFO L290 TraceCheckUtils]: 8: Hoare triple {386#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {387#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 21:23:53,045 INFO L290 TraceCheckUtils]: 9: Hoare triple {387#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {388#(and (<= main_~x~0 8) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 21:23:53,046 INFO L290 TraceCheckUtils]: 10: Hoare triple {388#(and (<= main_~x~0 8) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {380#false} is VALID [2022-04-27 21:23:53,046 INFO L272 TraceCheckUtils]: 11: Hoare triple {380#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {380#false} is VALID [2022-04-27 21:23:53,046 INFO L290 TraceCheckUtils]: 12: Hoare triple {380#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {380#false} is VALID [2022-04-27 21:23:53,046 INFO L290 TraceCheckUtils]: 13: Hoare triple {380#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {380#false} is VALID [2022-04-27 21:23:53,046 INFO L290 TraceCheckUtils]: 14: Hoare triple {380#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#false} is VALID [2022-04-27 21:23:53,046 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:53,046 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:23:53,047 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1435856252] [2022-04-27 21:23:53,047 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1435856252] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:23:53,047 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1276421525] [2022-04-27 21:23:53,047 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:23:53,047 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:23:53,047 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:23:53,048 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:23:53,049 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 21:23:53,077 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:23:53,077 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:23:53,077 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-27 21:23:53,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:53,081 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:23:53,279 INFO L272 TraceCheckUtils]: 0: Hoare triple {379#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {379#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {379#true} is VALID [2022-04-27 21:23:53,280 INFO L290 TraceCheckUtils]: 2: Hoare triple {379#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,280 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {379#true} {379#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,280 INFO L272 TraceCheckUtils]: 4: Hoare triple {379#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,281 INFO L290 TraceCheckUtils]: 5: Hoare triple {379#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {384#(= main_~x~0 0)} is VALID [2022-04-27 21:23:53,281 INFO L290 TraceCheckUtils]: 6: Hoare triple {384#(= main_~x~0 0)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {385#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 21:23:53,282 INFO L290 TraceCheckUtils]: 7: Hoare triple {385#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {386#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 21:23:53,282 INFO L290 TraceCheckUtils]: 8: Hoare triple {386#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {387#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 21:23:53,283 INFO L290 TraceCheckUtils]: 9: Hoare triple {387#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {420#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 21:23:53,284 INFO L290 TraceCheckUtils]: 10: Hoare triple {420#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {380#false} is VALID [2022-04-27 21:23:53,284 INFO L272 TraceCheckUtils]: 11: Hoare triple {380#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {380#false} is VALID [2022-04-27 21:23:53,284 INFO L290 TraceCheckUtils]: 12: Hoare triple {380#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {380#false} is VALID [2022-04-27 21:23:53,284 INFO L290 TraceCheckUtils]: 13: Hoare triple {380#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {380#false} is VALID [2022-04-27 21:23:53,284 INFO L290 TraceCheckUtils]: 14: Hoare triple {380#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#false} is VALID [2022-04-27 21:23:53,284 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:53,284 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:23:53,388 INFO L290 TraceCheckUtils]: 14: Hoare triple {380#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#false} is VALID [2022-04-27 21:23:53,389 INFO L290 TraceCheckUtils]: 13: Hoare triple {380#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {380#false} is VALID [2022-04-27 21:23:53,389 INFO L290 TraceCheckUtils]: 12: Hoare triple {380#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {380#false} is VALID [2022-04-27 21:23:53,389 INFO L272 TraceCheckUtils]: 11: Hoare triple {380#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {380#false} is VALID [2022-04-27 21:23:53,389 INFO L290 TraceCheckUtils]: 10: Hoare triple {448#(< (mod main_~x~0 4294967296) 268435455)} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {380#false} is VALID [2022-04-27 21:23:53,390 INFO L290 TraceCheckUtils]: 9: Hoare triple {452#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {448#(< (mod main_~x~0 4294967296) 268435455)} is VALID [2022-04-27 21:23:53,391 INFO L290 TraceCheckUtils]: 8: Hoare triple {456#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {452#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} is VALID [2022-04-27 21:23:53,392 INFO L290 TraceCheckUtils]: 7: Hoare triple {460#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {456#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} is VALID [2022-04-27 21:23:53,392 INFO L290 TraceCheckUtils]: 6: Hoare triple {464#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {460#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} is VALID [2022-04-27 21:23:53,393 INFO L290 TraceCheckUtils]: 5: Hoare triple {379#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {464#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} is VALID [2022-04-27 21:23:53,393 INFO L272 TraceCheckUtils]: 4: Hoare triple {379#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,393 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {379#true} {379#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,393 INFO L290 TraceCheckUtils]: 2: Hoare triple {379#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,393 INFO L290 TraceCheckUtils]: 1: Hoare triple {379#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {379#true} is VALID [2022-04-27 21:23:53,394 INFO L272 TraceCheckUtils]: 0: Hoare triple {379#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#true} is VALID [2022-04-27 21:23:53,394 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:53,394 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1276421525] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:23:53,394 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:23:53,394 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-04-27 21:23:53,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1611303100] [2022-04-27 21:23:53,394 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:23:53,395 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 13 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 21:23:53,395 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:23:53,395 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 13 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:53,413 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:23:53,413 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 21:23:53,413 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:23:53,414 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 21:23:53,415 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2022-04-27 21:23:53,416 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand has 14 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 13 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:53,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:53,976 INFO L93 Difference]: Finished difference Result 27 states and 32 transitions. [2022-04-27 21:23:53,976 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-27 21:23:53,976 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 13 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 21:23:53,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:23:53,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 13 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:53,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 32 transitions. [2022-04-27 21:23:53,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 13 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:53,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 32 transitions. [2022-04-27 21:23:53,979 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 32 transitions. [2022-04-27 21:23:54,018 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:23:54,019 INFO L225 Difference]: With dead ends: 27 [2022-04-27 21:23:54,019 INFO L226 Difference]: Without dead ends: 22 [2022-04-27 21:23:54,020 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=175, Invalid=377, Unknown=0, NotChecked=0, Total=552 [2022-04-27 21:23:54,020 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 6 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:23:54,021 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 38 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:23:54,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-27 21:23:54,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-27 21:23:54,035 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:23:54,035 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:54,035 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:54,035 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:54,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:54,036 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2022-04-27 21:23:54,036 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2022-04-27 21:23:54,036 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:23:54,036 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:23:54,037 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-27 21:23:54,037 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-27 21:23:54,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:23:54,038 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2022-04-27 21:23:54,038 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2022-04-27 21:23:54,038 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:23:54,038 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:23:54,038 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:23:54,038 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:23:54,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:54,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2022-04-27 21:23:54,039 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 15 [2022-04-27 21:23:54,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:23:54,039 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2022-04-27 21:23:54,039 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 13 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:54,039 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2022-04-27 21:23:54,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 21:23:54,040 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:23:54,040 INFO L195 NwaCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:23:54,057 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 21:23:54,240 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 21:23:54,241 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:23:54,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:23:54,241 INFO L85 PathProgramCache]: Analyzing trace with hash 270494400, now seen corresponding path program 3 times [2022-04-27 21:23:54,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:23:54,241 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [496802270] [2022-04-27 21:23:54,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:23:54,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:23:54,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:54,508 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:23:54,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:54,516 INFO L290 TraceCheckUtils]: 0: Hoare triple {650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {634#true} is VALID [2022-04-27 21:23:54,516 INFO L290 TraceCheckUtils]: 1: Hoare triple {634#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:54,516 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {634#true} {634#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:54,517 INFO L272 TraceCheckUtils]: 0: Hoare triple {634#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:23:54,517 INFO L290 TraceCheckUtils]: 1: Hoare triple {650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {634#true} is VALID [2022-04-27 21:23:54,517 INFO L290 TraceCheckUtils]: 2: Hoare triple {634#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:54,517 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {634#true} {634#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:54,517 INFO L272 TraceCheckUtils]: 4: Hoare triple {634#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:54,517 INFO L290 TraceCheckUtils]: 5: Hoare triple {634#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {639#(= main_~x~0 0)} is VALID [2022-04-27 21:23:54,518 INFO L290 TraceCheckUtils]: 6: Hoare triple {639#(= main_~x~0 0)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {640#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 21:23:54,518 INFO L290 TraceCheckUtils]: 7: Hoare triple {640#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {641#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 21:23:54,519 INFO L290 TraceCheckUtils]: 8: Hoare triple {641#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {642#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 21:23:54,519 INFO L290 TraceCheckUtils]: 9: Hoare triple {642#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {643#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 21:23:54,520 INFO L290 TraceCheckUtils]: 10: Hoare triple {643#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {644#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 21:23:54,520 INFO L290 TraceCheckUtils]: 11: Hoare triple {644#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {645#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 21:23:54,521 INFO L290 TraceCheckUtils]: 12: Hoare triple {645#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {646#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 21:23:54,521 INFO L290 TraceCheckUtils]: 13: Hoare triple {646#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {647#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 21:23:54,522 INFO L290 TraceCheckUtils]: 14: Hoare triple {647#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {648#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 21:23:54,523 INFO L290 TraceCheckUtils]: 15: Hoare triple {648#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {649#(and (<= main_~x~0 20) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 21:23:54,523 INFO L290 TraceCheckUtils]: 16: Hoare triple {649#(and (<= main_~x~0 20) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {635#false} is VALID [2022-04-27 21:23:54,523 INFO L272 TraceCheckUtils]: 17: Hoare triple {635#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {635#false} is VALID [2022-04-27 21:23:54,523 INFO L290 TraceCheckUtils]: 18: Hoare triple {635#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {635#false} is VALID [2022-04-27 21:23:54,523 INFO L290 TraceCheckUtils]: 19: Hoare triple {635#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {635#false} is VALID [2022-04-27 21:23:54,523 INFO L290 TraceCheckUtils]: 20: Hoare triple {635#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {635#false} is VALID [2022-04-27 21:23:54,524 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:54,524 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:23:54,524 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [496802270] [2022-04-27 21:23:54,524 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [496802270] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:23:54,524 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2010028774] [2022-04-27 21:23:54,524 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:23:54,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:23:54,524 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:23:54,525 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:23:54,526 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 21:23:54,560 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-04-27 21:23:54,560 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:23:54,560 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 23 conjunts are in the unsatisfiable core [2022-04-27 21:23:54,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:23:54,566 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:23:54,813 INFO L272 TraceCheckUtils]: 0: Hoare triple {634#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:54,814 INFO L290 TraceCheckUtils]: 1: Hoare triple {634#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {634#true} is VALID [2022-04-27 21:23:54,814 INFO L290 TraceCheckUtils]: 2: Hoare triple {634#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:54,814 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {634#true} {634#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:54,814 INFO L272 TraceCheckUtils]: 4: Hoare triple {634#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:54,814 INFO L290 TraceCheckUtils]: 5: Hoare triple {634#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {639#(= main_~x~0 0)} is VALID [2022-04-27 21:23:54,815 INFO L290 TraceCheckUtils]: 6: Hoare triple {639#(= main_~x~0 0)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {640#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 21:23:54,815 INFO L290 TraceCheckUtils]: 7: Hoare triple {640#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {641#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 21:23:54,816 INFO L290 TraceCheckUtils]: 8: Hoare triple {641#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {642#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 21:23:54,816 INFO L290 TraceCheckUtils]: 9: Hoare triple {642#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {643#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 21:23:54,817 INFO L290 TraceCheckUtils]: 10: Hoare triple {643#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {644#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 21:23:54,818 INFO L290 TraceCheckUtils]: 11: Hoare triple {644#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {645#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 21:23:54,818 INFO L290 TraceCheckUtils]: 12: Hoare triple {645#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {646#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 21:23:54,819 INFO L290 TraceCheckUtils]: 13: Hoare triple {646#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {647#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 21:23:54,819 INFO L290 TraceCheckUtils]: 14: Hoare triple {647#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {648#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 21:23:54,820 INFO L290 TraceCheckUtils]: 15: Hoare triple {648#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {699#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 21:23:54,820 INFO L290 TraceCheckUtils]: 16: Hoare triple {699#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {635#false} is VALID [2022-04-27 21:23:54,821 INFO L272 TraceCheckUtils]: 17: Hoare triple {635#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {635#false} is VALID [2022-04-27 21:23:54,821 INFO L290 TraceCheckUtils]: 18: Hoare triple {635#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {635#false} is VALID [2022-04-27 21:23:54,821 INFO L290 TraceCheckUtils]: 19: Hoare triple {635#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {635#false} is VALID [2022-04-27 21:23:54,821 INFO L290 TraceCheckUtils]: 20: Hoare triple {635#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {635#false} is VALID [2022-04-27 21:23:54,821 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:54,821 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:23:55,108 INFO L290 TraceCheckUtils]: 20: Hoare triple {635#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {635#false} is VALID [2022-04-27 21:23:55,109 INFO L290 TraceCheckUtils]: 19: Hoare triple {635#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {635#false} is VALID [2022-04-27 21:23:55,109 INFO L290 TraceCheckUtils]: 18: Hoare triple {635#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {635#false} is VALID [2022-04-27 21:23:55,109 INFO L272 TraceCheckUtils]: 17: Hoare triple {635#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {635#false} is VALID [2022-04-27 21:23:55,109 INFO L290 TraceCheckUtils]: 16: Hoare triple {727#(< (mod main_~x~0 4294967296) 268435455)} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {635#false} is VALID [2022-04-27 21:23:55,110 INFO L290 TraceCheckUtils]: 15: Hoare triple {731#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {727#(< (mod main_~x~0 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,111 INFO L290 TraceCheckUtils]: 14: Hoare triple {735#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {731#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,111 INFO L290 TraceCheckUtils]: 13: Hoare triple {739#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {735#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,112 INFO L290 TraceCheckUtils]: 12: Hoare triple {743#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {739#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,116 INFO L290 TraceCheckUtils]: 11: Hoare triple {747#(< (mod (+ main_~x~0 10) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {743#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,117 INFO L290 TraceCheckUtils]: 10: Hoare triple {751#(< (mod (+ main_~x~0 12) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {747#(< (mod (+ main_~x~0 10) 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,117 INFO L290 TraceCheckUtils]: 9: Hoare triple {755#(< (mod (+ main_~x~0 14) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {751#(< (mod (+ main_~x~0 12) 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,118 INFO L290 TraceCheckUtils]: 8: Hoare triple {759#(< (mod (+ main_~x~0 16) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {755#(< (mod (+ main_~x~0 14) 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,118 INFO L290 TraceCheckUtils]: 7: Hoare triple {763#(< (mod (+ main_~x~0 18) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {759#(< (mod (+ main_~x~0 16) 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,119 INFO L290 TraceCheckUtils]: 6: Hoare triple {767#(< (mod (+ main_~x~0 20) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {763#(< (mod (+ main_~x~0 18) 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,119 INFO L290 TraceCheckUtils]: 5: Hoare triple {634#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {767#(< (mod (+ main_~x~0 20) 4294967296) 268435455)} is VALID [2022-04-27 21:23:55,120 INFO L272 TraceCheckUtils]: 4: Hoare triple {634#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:55,120 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {634#true} {634#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:55,120 INFO L290 TraceCheckUtils]: 2: Hoare triple {634#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:55,120 INFO L290 TraceCheckUtils]: 1: Hoare triple {634#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {634#true} is VALID [2022-04-27 21:23:55,120 INFO L272 TraceCheckUtils]: 0: Hoare triple {634#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {634#true} is VALID [2022-04-27 21:23:55,120 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:23:55,120 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2010028774] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:23:55,120 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:23:55,121 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 26 [2022-04-27 21:23:55,121 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1930297256] [2022-04-27 21:23:55,121 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:23:55,121 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.2307692307692308) internal successors, (32), 25 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 21:23:55,121 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:23:55,122 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 1.2307692307692308) internal successors, (32), 25 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:23:55,143 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:23:55,143 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-27 21:23:55,143 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:23:55,144 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-27 21:23:55,144 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=458, Unknown=0, NotChecked=0, Total=650 [2022-04-27 21:23:55,144 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand has 26 states, 26 states have (on average 1.2307692307692308) internal successors, (32), 25 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:24:01,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:24:01,834 INFO L93 Difference]: Finished difference Result 39 states and 50 transitions. [2022-04-27 21:24:01,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-27 21:24:01,834 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.2307692307692308) internal successors, (32), 25 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 21:24:01,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:24:01,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.2307692307692308) internal successors, (32), 25 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:24:01,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 50 transitions. [2022-04-27 21:24:01,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.2307692307692308) internal successors, (32), 25 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:24:01,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 50 transitions. [2022-04-27 21:24:01,840 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 50 transitions. [2022-04-27 21:24:01,938 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:24:01,939 INFO L225 Difference]: With dead ends: 39 [2022-04-27 21:24:01,939 INFO L226 Difference]: Without dead ends: 34 [2022-04-27 21:24:01,940 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 268 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=643, Invalid=1613, Unknown=0, NotChecked=0, Total=2256 [2022-04-27 21:24:01,941 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 6 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 194 mSolverCounterSat, 36 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 36 IncrementalHoareTripleChecker+Valid, 194 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:24:01,941 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 73 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [36 Valid, 194 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 21:24:01,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-27 21:24:01,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2022-04-27 21:24:01,970 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:24:01,970 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:24:01,970 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:24:01,970 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:24:01,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:24:01,971 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2022-04-27 21:24:01,971 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2022-04-27 21:24:01,972 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:24:01,972 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:24:01,972 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-27 21:24:01,972 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-27 21:24:01,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:24:01,973 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2022-04-27 21:24:01,973 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2022-04-27 21:24:01,973 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:24:01,973 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:24:01,973 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:24:01,973 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:24:01,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:24:01,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2022-04-27 21:24:01,974 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 21 [2022-04-27 21:24:01,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:24:01,974 INFO L495 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2022-04-27 21:24:01,974 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 1.2307692307692308) internal successors, (32), 25 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:24:01,974 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2022-04-27 21:24:01,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 21:24:01,975 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:24:01,975 INFO L195 NwaCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:24:02,000 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 21:24:02,175 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:24:02,176 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:24:02,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:24:02,176 INFO L85 PathProgramCache]: Analyzing trace with hash 749126272, now seen corresponding path program 4 times [2022-04-27 21:24:02,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:24:02,176 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1020607389] [2022-04-27 21:24:02,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:24:02,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:24:02,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:24:02,621 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:24:02,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:24:02,627 INFO L290 TraceCheckUtils]: 0: Hoare triple {1061#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1033#true} is VALID [2022-04-27 21:24:02,627 INFO L290 TraceCheckUtils]: 1: Hoare triple {1033#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:02,627 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1033#true} {1033#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:02,629 INFO L272 TraceCheckUtils]: 0: Hoare triple {1033#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1061#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:24:02,629 INFO L290 TraceCheckUtils]: 1: Hoare triple {1061#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1033#true} is VALID [2022-04-27 21:24:02,629 INFO L290 TraceCheckUtils]: 2: Hoare triple {1033#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:02,629 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1033#true} {1033#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:02,629 INFO L272 TraceCheckUtils]: 4: Hoare triple {1033#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:02,631 INFO L290 TraceCheckUtils]: 5: Hoare triple {1033#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1038#(= main_~x~0 0)} is VALID [2022-04-27 21:24:02,632 INFO L290 TraceCheckUtils]: 6: Hoare triple {1038#(= main_~x~0 0)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1039#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 21:24:02,632 INFO L290 TraceCheckUtils]: 7: Hoare triple {1039#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1040#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 21:24:02,633 INFO L290 TraceCheckUtils]: 8: Hoare triple {1040#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1041#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 21:24:02,633 INFO L290 TraceCheckUtils]: 9: Hoare triple {1041#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1042#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 21:24:02,634 INFO L290 TraceCheckUtils]: 10: Hoare triple {1042#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1043#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 21:24:02,634 INFO L290 TraceCheckUtils]: 11: Hoare triple {1043#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1044#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 21:24:02,635 INFO L290 TraceCheckUtils]: 12: Hoare triple {1044#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1045#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 21:24:02,635 INFO L290 TraceCheckUtils]: 13: Hoare triple {1045#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1046#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 21:24:02,636 INFO L290 TraceCheckUtils]: 14: Hoare triple {1046#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1047#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 21:24:02,636 INFO L290 TraceCheckUtils]: 15: Hoare triple {1047#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1048#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 21:24:02,637 INFO L290 TraceCheckUtils]: 16: Hoare triple {1048#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1049#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 21:24:02,640 INFO L290 TraceCheckUtils]: 17: Hoare triple {1049#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1050#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 21:24:02,640 INFO L290 TraceCheckUtils]: 18: Hoare triple {1050#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1051#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 21:24:02,641 INFO L290 TraceCheckUtils]: 19: Hoare triple {1051#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1052#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 21:24:02,641 INFO L290 TraceCheckUtils]: 20: Hoare triple {1052#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1053#(and (<= 30 main_~x~0) (<= main_~x~0 30))} is VALID [2022-04-27 21:24:02,642 INFO L290 TraceCheckUtils]: 21: Hoare triple {1053#(and (<= 30 main_~x~0) (<= main_~x~0 30))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1054#(and (<= main_~x~0 32) (<= 32 main_~x~0))} is VALID [2022-04-27 21:24:02,642 INFO L290 TraceCheckUtils]: 22: Hoare triple {1054#(and (<= main_~x~0 32) (<= 32 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1055#(and (<= main_~x~0 34) (<= 34 main_~x~0))} is VALID [2022-04-27 21:24:02,643 INFO L290 TraceCheckUtils]: 23: Hoare triple {1055#(and (<= main_~x~0 34) (<= 34 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1056#(and (<= main_~x~0 36) (<= 36 main_~x~0))} is VALID [2022-04-27 21:24:02,643 INFO L290 TraceCheckUtils]: 24: Hoare triple {1056#(and (<= main_~x~0 36) (<= 36 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1057#(and (<= main_~x~0 38) (<= 38 main_~x~0))} is VALID [2022-04-27 21:24:02,644 INFO L290 TraceCheckUtils]: 25: Hoare triple {1057#(and (<= main_~x~0 38) (<= 38 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1058#(and (<= main_~x~0 40) (<= 40 main_~x~0))} is VALID [2022-04-27 21:24:02,644 INFO L290 TraceCheckUtils]: 26: Hoare triple {1058#(and (<= main_~x~0 40) (<= 40 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1059#(and (<= main_~x~0 42) (<= 42 main_~x~0))} is VALID [2022-04-27 21:24:02,645 INFO L290 TraceCheckUtils]: 27: Hoare triple {1059#(and (<= main_~x~0 42) (<= 42 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1060#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 44))} is VALID [2022-04-27 21:24:02,645 INFO L290 TraceCheckUtils]: 28: Hoare triple {1060#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 44))} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1034#false} is VALID [2022-04-27 21:24:02,645 INFO L272 TraceCheckUtils]: 29: Hoare triple {1034#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1034#false} is VALID [2022-04-27 21:24:02,645 INFO L290 TraceCheckUtils]: 30: Hoare triple {1034#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1034#false} is VALID [2022-04-27 21:24:02,645 INFO L290 TraceCheckUtils]: 31: Hoare triple {1034#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1034#false} is VALID [2022-04-27 21:24:02,646 INFO L290 TraceCheckUtils]: 32: Hoare triple {1034#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#false} is VALID [2022-04-27 21:24:02,646 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:24:02,646 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:24:02,646 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1020607389] [2022-04-27 21:24:02,646 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1020607389] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:24:02,646 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [296627374] [2022-04-27 21:24:02,646 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:24:02,646 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:24:02,646 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:24:02,668 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:24:02,668 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 21:24:02,706 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:24:02,706 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:24:02,707 INFO L263 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-27 21:24:02,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:24:02,716 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:24:03,041 INFO L272 TraceCheckUtils]: 0: Hoare triple {1033#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:03,042 INFO L290 TraceCheckUtils]: 1: Hoare triple {1033#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1033#true} is VALID [2022-04-27 21:24:03,042 INFO L290 TraceCheckUtils]: 2: Hoare triple {1033#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:03,042 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1033#true} {1033#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:03,042 INFO L272 TraceCheckUtils]: 4: Hoare triple {1033#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:03,042 INFO L290 TraceCheckUtils]: 5: Hoare triple {1033#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1038#(= main_~x~0 0)} is VALID [2022-04-27 21:24:03,043 INFO L290 TraceCheckUtils]: 6: Hoare triple {1038#(= main_~x~0 0)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1039#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 21:24:03,043 INFO L290 TraceCheckUtils]: 7: Hoare triple {1039#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1040#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 21:24:03,044 INFO L290 TraceCheckUtils]: 8: Hoare triple {1040#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1041#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 21:24:03,044 INFO L290 TraceCheckUtils]: 9: Hoare triple {1041#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1042#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 21:24:03,045 INFO L290 TraceCheckUtils]: 10: Hoare triple {1042#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1043#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 21:24:03,045 INFO L290 TraceCheckUtils]: 11: Hoare triple {1043#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1044#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 21:24:03,046 INFO L290 TraceCheckUtils]: 12: Hoare triple {1044#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1045#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 21:24:03,046 INFO L290 TraceCheckUtils]: 13: Hoare triple {1045#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1046#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 21:24:03,047 INFO L290 TraceCheckUtils]: 14: Hoare triple {1046#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1047#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 21:24:03,047 INFO L290 TraceCheckUtils]: 15: Hoare triple {1047#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1048#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 21:24:03,048 INFO L290 TraceCheckUtils]: 16: Hoare triple {1048#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1049#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 21:24:03,048 INFO L290 TraceCheckUtils]: 17: Hoare triple {1049#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1050#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 21:24:03,049 INFO L290 TraceCheckUtils]: 18: Hoare triple {1050#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1051#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 21:24:03,049 INFO L290 TraceCheckUtils]: 19: Hoare triple {1051#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1052#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 21:24:03,050 INFO L290 TraceCheckUtils]: 20: Hoare triple {1052#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1053#(and (<= 30 main_~x~0) (<= main_~x~0 30))} is VALID [2022-04-27 21:24:03,050 INFO L290 TraceCheckUtils]: 21: Hoare triple {1053#(and (<= 30 main_~x~0) (<= main_~x~0 30))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1054#(and (<= main_~x~0 32) (<= 32 main_~x~0))} is VALID [2022-04-27 21:24:03,051 INFO L290 TraceCheckUtils]: 22: Hoare triple {1054#(and (<= main_~x~0 32) (<= 32 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1055#(and (<= main_~x~0 34) (<= 34 main_~x~0))} is VALID [2022-04-27 21:24:03,051 INFO L290 TraceCheckUtils]: 23: Hoare triple {1055#(and (<= main_~x~0 34) (<= 34 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1056#(and (<= main_~x~0 36) (<= 36 main_~x~0))} is VALID [2022-04-27 21:24:03,052 INFO L290 TraceCheckUtils]: 24: Hoare triple {1056#(and (<= main_~x~0 36) (<= 36 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1057#(and (<= main_~x~0 38) (<= 38 main_~x~0))} is VALID [2022-04-27 21:24:03,052 INFO L290 TraceCheckUtils]: 25: Hoare triple {1057#(and (<= main_~x~0 38) (<= 38 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1058#(and (<= main_~x~0 40) (<= 40 main_~x~0))} is VALID [2022-04-27 21:24:03,053 INFO L290 TraceCheckUtils]: 26: Hoare triple {1058#(and (<= main_~x~0 40) (<= 40 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1059#(and (<= main_~x~0 42) (<= 42 main_~x~0))} is VALID [2022-04-27 21:24:03,053 INFO L290 TraceCheckUtils]: 27: Hoare triple {1059#(and (<= main_~x~0 42) (<= 42 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1146#(and (<= 44 main_~x~0) (<= main_~x~0 44))} is VALID [2022-04-27 21:24:03,054 INFO L290 TraceCheckUtils]: 28: Hoare triple {1146#(and (<= 44 main_~x~0) (<= main_~x~0 44))} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1034#false} is VALID [2022-04-27 21:24:03,054 INFO L272 TraceCheckUtils]: 29: Hoare triple {1034#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1034#false} is VALID [2022-04-27 21:24:03,054 INFO L290 TraceCheckUtils]: 30: Hoare triple {1034#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1034#false} is VALID [2022-04-27 21:24:03,054 INFO L290 TraceCheckUtils]: 31: Hoare triple {1034#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1034#false} is VALID [2022-04-27 21:24:03,054 INFO L290 TraceCheckUtils]: 32: Hoare triple {1034#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#false} is VALID [2022-04-27 21:24:03,054 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:24:03,054 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:24:03,946 INFO L290 TraceCheckUtils]: 32: Hoare triple {1034#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#false} is VALID [2022-04-27 21:24:03,947 INFO L290 TraceCheckUtils]: 31: Hoare triple {1034#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1034#false} is VALID [2022-04-27 21:24:03,947 INFO L290 TraceCheckUtils]: 30: Hoare triple {1034#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1034#false} is VALID [2022-04-27 21:24:03,947 INFO L272 TraceCheckUtils]: 29: Hoare triple {1034#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1034#false} is VALID [2022-04-27 21:24:03,947 INFO L290 TraceCheckUtils]: 28: Hoare triple {1174#(< (mod main_~x~0 4294967296) 268435455)} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1034#false} is VALID [2022-04-27 21:24:03,948 INFO L290 TraceCheckUtils]: 27: Hoare triple {1178#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1174#(< (mod main_~x~0 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,948 INFO L290 TraceCheckUtils]: 26: Hoare triple {1182#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1178#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,949 INFO L290 TraceCheckUtils]: 25: Hoare triple {1186#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1182#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,950 INFO L290 TraceCheckUtils]: 24: Hoare triple {1190#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1186#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,950 INFO L290 TraceCheckUtils]: 23: Hoare triple {1194#(< (mod (+ main_~x~0 10) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1190#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,951 INFO L290 TraceCheckUtils]: 22: Hoare triple {1198#(< (mod (+ main_~x~0 12) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1194#(< (mod (+ main_~x~0 10) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,951 INFO L290 TraceCheckUtils]: 21: Hoare triple {1202#(< (mod (+ main_~x~0 14) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1198#(< (mod (+ main_~x~0 12) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,952 INFO L290 TraceCheckUtils]: 20: Hoare triple {1206#(< (mod (+ main_~x~0 16) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1202#(< (mod (+ main_~x~0 14) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,953 INFO L290 TraceCheckUtils]: 19: Hoare triple {1210#(< (mod (+ main_~x~0 18) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1206#(< (mod (+ main_~x~0 16) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,953 INFO L290 TraceCheckUtils]: 18: Hoare triple {1214#(< (mod (+ main_~x~0 20) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1210#(< (mod (+ main_~x~0 18) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,954 INFO L290 TraceCheckUtils]: 17: Hoare triple {1218#(< (mod (+ main_~x~0 22) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1214#(< (mod (+ main_~x~0 20) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,954 INFO L290 TraceCheckUtils]: 16: Hoare triple {1222#(< (mod (+ main_~x~0 24) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1218#(< (mod (+ main_~x~0 22) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,955 INFO L290 TraceCheckUtils]: 15: Hoare triple {1226#(< (mod (+ main_~x~0 26) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1222#(< (mod (+ main_~x~0 24) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,957 INFO L290 TraceCheckUtils]: 14: Hoare triple {1230#(< (mod (+ main_~x~0 28) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1226#(< (mod (+ main_~x~0 26) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,957 INFO L290 TraceCheckUtils]: 13: Hoare triple {1234#(< (mod (+ 30 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1230#(< (mod (+ main_~x~0 28) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,958 INFO L290 TraceCheckUtils]: 12: Hoare triple {1238#(< (mod (+ 32 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1234#(< (mod (+ 30 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,958 INFO L290 TraceCheckUtils]: 11: Hoare triple {1242#(< (mod (+ main_~x~0 34) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1238#(< (mod (+ 32 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,959 INFO L290 TraceCheckUtils]: 10: Hoare triple {1246#(< (mod (+ main_~x~0 36) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1242#(< (mod (+ main_~x~0 34) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,960 INFO L290 TraceCheckUtils]: 9: Hoare triple {1250#(< (mod (+ main_~x~0 38) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1246#(< (mod (+ main_~x~0 36) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,962 INFO L290 TraceCheckUtils]: 8: Hoare triple {1254#(< (mod (+ 40 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1250#(< (mod (+ main_~x~0 38) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,963 INFO L290 TraceCheckUtils]: 7: Hoare triple {1258#(< (mod (+ 42 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1254#(< (mod (+ 40 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,963 INFO L290 TraceCheckUtils]: 6: Hoare triple {1262#(< (mod (+ 44 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1258#(< (mod (+ 42 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,963 INFO L290 TraceCheckUtils]: 5: Hoare triple {1033#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1262#(< (mod (+ 44 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:24:03,964 INFO L272 TraceCheckUtils]: 4: Hoare triple {1033#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:03,964 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1033#true} {1033#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:03,964 INFO L290 TraceCheckUtils]: 2: Hoare triple {1033#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:03,964 INFO L290 TraceCheckUtils]: 1: Hoare triple {1033#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1033#true} is VALID [2022-04-27 21:24:03,964 INFO L272 TraceCheckUtils]: 0: Hoare triple {1033#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#true} is VALID [2022-04-27 21:24:03,964 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:24:03,964 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [296627374] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:24:03,964 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:24:03,964 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 25] total 50 [2022-04-27 21:24:03,965 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [315780981] [2022-04-27 21:24:03,965 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:24:03,965 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 1.12) internal successors, (56), 49 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 21:24:03,966 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:24:03,966 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 50 states, 50 states have (on average 1.12) internal successors, (56), 49 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:24:04,002 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:24:04,002 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-04-27 21:24:04,002 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:24:04,003 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-04-27 21:24:04,003 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=672, Invalid=1778, Unknown=0, NotChecked=0, Total=2450 [2022-04-27 21:24:04,004 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand has 50 states, 50 states have (on average 1.12) internal successors, (56), 49 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:26:10,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:26:10,955 INFO L93 Difference]: Finished difference Result 63 states and 86 transitions. [2022-04-27 21:26:10,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2022-04-27 21:26:10,955 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 1.12) internal successors, (56), 49 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 21:26:10,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:26:10,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.12) internal successors, (56), 49 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:26:10,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 86 transitions. [2022-04-27 21:26:10,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.12) internal successors, (56), 49 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:26:10,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 86 transitions. [2022-04-27 21:26:10,959 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 49 states and 86 transitions. [2022-04-27 21:26:11,274 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:26:11,275 INFO L225 Difference]: With dead ends: 63 [2022-04-27 21:26:11,275 INFO L226 Difference]: Without dead ends: 58 [2022-04-27 21:26:11,277 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 44 SyntacticMatches, 1 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1110 ImplicationChecksByTransitivity, 126.6s TimeCoverageRelationStatistics Valid=2432, Invalid=6677, Unknown=11, NotChecked=0, Total=9120 [2022-04-27 21:26:11,278 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 6 mSDsluCounter, 122 mSDsCounter, 0 mSdLazyCounter, 694 mSolverCounterSat, 105 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 799 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 105 IncrementalHoareTripleChecker+Valid, 694 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 21:26:11,278 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 133 Invalid, 799 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [105 Valid, 694 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-27 21:26:11,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-04-27 21:26:11,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2022-04-27 21:26:11,345 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:26:11,346 INFO L82 GeneralOperation]: Start isEquivalent. First operand 58 states. Second operand has 58 states, 53 states have (on average 1.0188679245283019) internal successors, (54), 53 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:26:11,346 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand has 58 states, 53 states have (on average 1.0188679245283019) internal successors, (54), 53 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:26:11,346 INFO L87 Difference]: Start difference. First operand 58 states. Second operand has 58 states, 53 states have (on average 1.0188679245283019) internal successors, (54), 53 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:26:11,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:26:11,350 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2022-04-27 21:26:11,350 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2022-04-27 21:26:11,350 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:26:11,350 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:26:11,351 INFO L74 IsIncluded]: Start isIncluded. First operand has 58 states, 53 states have (on average 1.0188679245283019) internal successors, (54), 53 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-27 21:26:11,352 INFO L87 Difference]: Start difference. First operand has 58 states, 53 states have (on average 1.0188679245283019) internal successors, (54), 53 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-27 21:26:11,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:26:11,354 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2022-04-27 21:26:11,354 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2022-04-27 21:26:11,358 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:26:11,358 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:26:11,358 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:26:11,358 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:26:11,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 53 states have (on average 1.0188679245283019) internal successors, (54), 53 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:26:11,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2022-04-27 21:26:11,362 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 33 [2022-04-27 21:26:11,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:26:11,363 INFO L495 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2022-04-27 21:26:11,364 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 1.12) internal successors, (56), 49 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:26:11,364 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2022-04-27 21:26:11,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-04-27 21:26:11,366 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:26:11,366 INFO L195 NwaCegarLoop]: trace histogram [46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:26:11,382 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 21:26:11,579 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:26:11,579 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:26:11,580 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:26:11,580 INFO L85 PathProgramCache]: Analyzing trace with hash 1712624128, now seen corresponding path program 5 times [2022-04-27 21:26:11,580 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:26:11,580 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587899086] [2022-04-27 21:26:11,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:26:11,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:26:11,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:26:12,819 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:26:12,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:26:12,830 INFO L290 TraceCheckUtils]: 0: Hoare triple {1772#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1720#true} is VALID [2022-04-27 21:26:12,830 INFO L290 TraceCheckUtils]: 1: Hoare triple {1720#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:12,830 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1720#true} {1720#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:12,833 INFO L272 TraceCheckUtils]: 0: Hoare triple {1720#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1772#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:26:12,833 INFO L290 TraceCheckUtils]: 1: Hoare triple {1772#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1720#true} is VALID [2022-04-27 21:26:12,833 INFO L290 TraceCheckUtils]: 2: Hoare triple {1720#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:12,833 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1720#true} {1720#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:12,833 INFO L272 TraceCheckUtils]: 4: Hoare triple {1720#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:12,833 INFO L290 TraceCheckUtils]: 5: Hoare triple {1720#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1725#(= main_~x~0 0)} is VALID [2022-04-27 21:26:12,834 INFO L290 TraceCheckUtils]: 6: Hoare triple {1725#(= main_~x~0 0)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1726#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 21:26:12,834 INFO L290 TraceCheckUtils]: 7: Hoare triple {1726#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1727#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 21:26:12,835 INFO L290 TraceCheckUtils]: 8: Hoare triple {1727#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1728#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 21:26:12,835 INFO L290 TraceCheckUtils]: 9: Hoare triple {1728#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1729#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 21:26:12,836 INFO L290 TraceCheckUtils]: 10: Hoare triple {1729#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1730#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 21:26:12,836 INFO L290 TraceCheckUtils]: 11: Hoare triple {1730#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1731#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 21:26:12,836 INFO L290 TraceCheckUtils]: 12: Hoare triple {1731#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1732#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 21:26:12,837 INFO L290 TraceCheckUtils]: 13: Hoare triple {1732#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1733#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 21:26:12,839 INFO L290 TraceCheckUtils]: 14: Hoare triple {1733#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1734#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 21:26:12,840 INFO L290 TraceCheckUtils]: 15: Hoare triple {1734#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1735#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 21:26:12,840 INFO L290 TraceCheckUtils]: 16: Hoare triple {1735#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1736#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 21:26:12,841 INFO L290 TraceCheckUtils]: 17: Hoare triple {1736#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1737#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 21:26:12,842 INFO L290 TraceCheckUtils]: 18: Hoare triple {1737#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1738#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 21:26:12,842 INFO L290 TraceCheckUtils]: 19: Hoare triple {1738#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1739#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 21:26:12,843 INFO L290 TraceCheckUtils]: 20: Hoare triple {1739#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1740#(and (<= 30 main_~x~0) (<= main_~x~0 30))} is VALID [2022-04-27 21:26:12,843 INFO L290 TraceCheckUtils]: 21: Hoare triple {1740#(and (<= 30 main_~x~0) (<= main_~x~0 30))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1741#(and (<= main_~x~0 32) (<= 32 main_~x~0))} is VALID [2022-04-27 21:26:12,844 INFO L290 TraceCheckUtils]: 22: Hoare triple {1741#(and (<= main_~x~0 32) (<= 32 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1742#(and (<= main_~x~0 34) (<= 34 main_~x~0))} is VALID [2022-04-27 21:26:12,844 INFO L290 TraceCheckUtils]: 23: Hoare triple {1742#(and (<= main_~x~0 34) (<= 34 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1743#(and (<= main_~x~0 36) (<= 36 main_~x~0))} is VALID [2022-04-27 21:26:12,845 INFO L290 TraceCheckUtils]: 24: Hoare triple {1743#(and (<= main_~x~0 36) (<= 36 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1744#(and (<= main_~x~0 38) (<= 38 main_~x~0))} is VALID [2022-04-27 21:26:12,845 INFO L290 TraceCheckUtils]: 25: Hoare triple {1744#(and (<= main_~x~0 38) (<= 38 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1745#(and (<= main_~x~0 40) (<= 40 main_~x~0))} is VALID [2022-04-27 21:26:12,845 INFO L290 TraceCheckUtils]: 26: Hoare triple {1745#(and (<= main_~x~0 40) (<= 40 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1746#(and (<= main_~x~0 42) (<= 42 main_~x~0))} is VALID [2022-04-27 21:26:12,846 INFO L290 TraceCheckUtils]: 27: Hoare triple {1746#(and (<= main_~x~0 42) (<= 42 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1747#(and (<= 44 main_~x~0) (<= main_~x~0 44))} is VALID [2022-04-27 21:26:12,846 INFO L290 TraceCheckUtils]: 28: Hoare triple {1747#(and (<= 44 main_~x~0) (<= main_~x~0 44))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1748#(and (<= 46 main_~x~0) (<= main_~x~0 46))} is VALID [2022-04-27 21:26:12,847 INFO L290 TraceCheckUtils]: 29: Hoare triple {1748#(and (<= 46 main_~x~0) (<= main_~x~0 46))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1749#(and (<= main_~x~0 48) (<= 48 main_~x~0))} is VALID [2022-04-27 21:26:12,847 INFO L290 TraceCheckUtils]: 30: Hoare triple {1749#(and (<= main_~x~0 48) (<= 48 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1750#(and (<= main_~x~0 50) (<= 50 main_~x~0))} is VALID [2022-04-27 21:26:12,848 INFO L290 TraceCheckUtils]: 31: Hoare triple {1750#(and (<= main_~x~0 50) (<= 50 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1751#(and (<= main_~x~0 52) (<= 52 main_~x~0))} is VALID [2022-04-27 21:26:12,848 INFO L290 TraceCheckUtils]: 32: Hoare triple {1751#(and (<= main_~x~0 52) (<= 52 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1752#(and (<= main_~x~0 54) (<= 54 main_~x~0))} is VALID [2022-04-27 21:26:12,849 INFO L290 TraceCheckUtils]: 33: Hoare triple {1752#(and (<= main_~x~0 54) (<= 54 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1753#(and (<= main_~x~0 56) (<= 56 main_~x~0))} is VALID [2022-04-27 21:26:12,875 INFO L290 TraceCheckUtils]: 34: Hoare triple {1753#(and (<= main_~x~0 56) (<= 56 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1754#(and (<= 58 main_~x~0) (<= main_~x~0 58))} is VALID [2022-04-27 21:26:12,876 INFO L290 TraceCheckUtils]: 35: Hoare triple {1754#(and (<= 58 main_~x~0) (<= main_~x~0 58))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1755#(and (<= main_~x~0 60) (<= 60 main_~x~0))} is VALID [2022-04-27 21:26:12,877 INFO L290 TraceCheckUtils]: 36: Hoare triple {1755#(and (<= main_~x~0 60) (<= 60 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1756#(and (<= 62 main_~x~0) (<= main_~x~0 62))} is VALID [2022-04-27 21:26:12,877 INFO L290 TraceCheckUtils]: 37: Hoare triple {1756#(and (<= 62 main_~x~0) (<= main_~x~0 62))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1757#(and (<= main_~x~0 64) (<= 64 main_~x~0))} is VALID [2022-04-27 21:26:12,878 INFO L290 TraceCheckUtils]: 38: Hoare triple {1757#(and (<= main_~x~0 64) (<= 64 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1758#(and (<= 66 main_~x~0) (<= main_~x~0 66))} is VALID [2022-04-27 21:26:12,878 INFO L290 TraceCheckUtils]: 39: Hoare triple {1758#(and (<= 66 main_~x~0) (<= main_~x~0 66))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1759#(and (<= main_~x~0 68) (<= 68 main_~x~0))} is VALID [2022-04-27 21:26:12,878 INFO L290 TraceCheckUtils]: 40: Hoare triple {1759#(and (<= main_~x~0 68) (<= 68 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1760#(and (<= main_~x~0 70) (<= 70 main_~x~0))} is VALID [2022-04-27 21:26:12,879 INFO L290 TraceCheckUtils]: 41: Hoare triple {1760#(and (<= main_~x~0 70) (<= 70 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1761#(and (<= 72 main_~x~0) (<= main_~x~0 72))} is VALID [2022-04-27 21:26:12,879 INFO L290 TraceCheckUtils]: 42: Hoare triple {1761#(and (<= 72 main_~x~0) (<= main_~x~0 72))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1762#(and (<= 74 main_~x~0) (<= main_~x~0 74))} is VALID [2022-04-27 21:26:12,880 INFO L290 TraceCheckUtils]: 43: Hoare triple {1762#(and (<= 74 main_~x~0) (<= main_~x~0 74))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1763#(and (<= 76 main_~x~0) (<= main_~x~0 76))} is VALID [2022-04-27 21:26:12,880 INFO L290 TraceCheckUtils]: 44: Hoare triple {1763#(and (<= 76 main_~x~0) (<= main_~x~0 76))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1764#(and (<= 78 main_~x~0) (<= main_~x~0 78))} is VALID [2022-04-27 21:26:12,881 INFO L290 TraceCheckUtils]: 45: Hoare triple {1764#(and (<= 78 main_~x~0) (<= main_~x~0 78))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1765#(and (<= 80 main_~x~0) (<= main_~x~0 80))} is VALID [2022-04-27 21:26:12,881 INFO L290 TraceCheckUtils]: 46: Hoare triple {1765#(and (<= 80 main_~x~0) (<= main_~x~0 80))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1766#(and (<= 82 main_~x~0) (<= main_~x~0 82))} is VALID [2022-04-27 21:26:12,882 INFO L290 TraceCheckUtils]: 47: Hoare triple {1766#(and (<= 82 main_~x~0) (<= main_~x~0 82))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1767#(and (<= 84 main_~x~0) (<= main_~x~0 84))} is VALID [2022-04-27 21:26:12,882 INFO L290 TraceCheckUtils]: 48: Hoare triple {1767#(and (<= 84 main_~x~0) (<= main_~x~0 84))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1768#(and (<= main_~x~0 86) (<= 86 main_~x~0))} is VALID [2022-04-27 21:26:12,883 INFO L290 TraceCheckUtils]: 49: Hoare triple {1768#(and (<= main_~x~0 86) (<= 86 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1769#(and (<= main_~x~0 88) (<= 88 main_~x~0))} is VALID [2022-04-27 21:26:12,888 INFO L290 TraceCheckUtils]: 50: Hoare triple {1769#(and (<= main_~x~0 88) (<= 88 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1770#(and (<= 90 main_~x~0) (<= main_~x~0 90))} is VALID [2022-04-27 21:26:12,888 INFO L290 TraceCheckUtils]: 51: Hoare triple {1770#(and (<= 90 main_~x~0) (<= main_~x~0 90))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1771#(and (<= main_~x~0 92) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-27 21:26:12,889 INFO L290 TraceCheckUtils]: 52: Hoare triple {1771#(and (<= main_~x~0 92) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1721#false} is VALID [2022-04-27 21:26:12,889 INFO L272 TraceCheckUtils]: 53: Hoare triple {1721#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1721#false} is VALID [2022-04-27 21:26:12,889 INFO L290 TraceCheckUtils]: 54: Hoare triple {1721#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1721#false} is VALID [2022-04-27 21:26:12,889 INFO L290 TraceCheckUtils]: 55: Hoare triple {1721#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1721#false} is VALID [2022-04-27 21:26:12,889 INFO L290 TraceCheckUtils]: 56: Hoare triple {1721#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1721#false} is VALID [2022-04-27 21:26:12,890 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:26:12,890 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:26:12,890 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587899086] [2022-04-27 21:26:12,890 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [587899086] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:26:12,890 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [952702952] [2022-04-27 21:26:12,890 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 21:26:12,891 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:26:12,891 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:26:12,893 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:26:12,894 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 21:26:50,728 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2022-04-27 21:26:50,728 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:26:50,741 WARN L261 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 95 conjunts are in the unsatisfiable core [2022-04-27 21:26:50,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:26:50,758 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:26:51,384 INFO L272 TraceCheckUtils]: 0: Hoare triple {1720#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:51,384 INFO L290 TraceCheckUtils]: 1: Hoare triple {1720#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1720#true} is VALID [2022-04-27 21:26:51,384 INFO L290 TraceCheckUtils]: 2: Hoare triple {1720#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:51,384 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1720#true} {1720#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:51,384 INFO L272 TraceCheckUtils]: 4: Hoare triple {1720#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:51,384 INFO L290 TraceCheckUtils]: 5: Hoare triple {1720#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {1725#(= main_~x~0 0)} is VALID [2022-04-27 21:26:51,385 INFO L290 TraceCheckUtils]: 6: Hoare triple {1725#(= main_~x~0 0)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1726#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-27 21:26:51,385 INFO L290 TraceCheckUtils]: 7: Hoare triple {1726#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1727#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-27 21:26:51,386 INFO L290 TraceCheckUtils]: 8: Hoare triple {1727#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1728#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-27 21:26:51,386 INFO L290 TraceCheckUtils]: 9: Hoare triple {1728#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1729#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-27 21:26:51,387 INFO L290 TraceCheckUtils]: 10: Hoare triple {1729#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1730#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-27 21:26:51,387 INFO L290 TraceCheckUtils]: 11: Hoare triple {1730#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1731#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-27 21:26:51,388 INFO L290 TraceCheckUtils]: 12: Hoare triple {1731#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1732#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-27 21:26:51,388 INFO L290 TraceCheckUtils]: 13: Hoare triple {1732#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1733#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-27 21:26:51,389 INFO L290 TraceCheckUtils]: 14: Hoare triple {1733#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1734#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-27 21:26:51,389 INFO L290 TraceCheckUtils]: 15: Hoare triple {1734#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1735#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-27 21:26:51,390 INFO L290 TraceCheckUtils]: 16: Hoare triple {1735#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1736#(and (<= 22 main_~x~0) (<= main_~x~0 22))} is VALID [2022-04-27 21:26:51,390 INFO L290 TraceCheckUtils]: 17: Hoare triple {1736#(and (<= 22 main_~x~0) (<= main_~x~0 22))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1737#(and (<= main_~x~0 24) (<= 24 main_~x~0))} is VALID [2022-04-27 21:26:51,391 INFO L290 TraceCheckUtils]: 18: Hoare triple {1737#(and (<= main_~x~0 24) (<= 24 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1738#(and (<= main_~x~0 26) (<= 26 main_~x~0))} is VALID [2022-04-27 21:26:51,391 INFO L290 TraceCheckUtils]: 19: Hoare triple {1738#(and (<= main_~x~0 26) (<= 26 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1739#(and (<= 28 main_~x~0) (<= main_~x~0 28))} is VALID [2022-04-27 21:26:51,392 INFO L290 TraceCheckUtils]: 20: Hoare triple {1739#(and (<= 28 main_~x~0) (<= main_~x~0 28))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1740#(and (<= 30 main_~x~0) (<= main_~x~0 30))} is VALID [2022-04-27 21:26:51,398 INFO L290 TraceCheckUtils]: 21: Hoare triple {1740#(and (<= 30 main_~x~0) (<= main_~x~0 30))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1741#(and (<= main_~x~0 32) (<= 32 main_~x~0))} is VALID [2022-04-27 21:26:51,398 INFO L290 TraceCheckUtils]: 22: Hoare triple {1741#(and (<= main_~x~0 32) (<= 32 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1742#(and (<= main_~x~0 34) (<= 34 main_~x~0))} is VALID [2022-04-27 21:26:51,399 INFO L290 TraceCheckUtils]: 23: Hoare triple {1742#(and (<= main_~x~0 34) (<= 34 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1743#(and (<= main_~x~0 36) (<= 36 main_~x~0))} is VALID [2022-04-27 21:26:51,400 INFO L290 TraceCheckUtils]: 24: Hoare triple {1743#(and (<= main_~x~0 36) (<= 36 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1744#(and (<= main_~x~0 38) (<= 38 main_~x~0))} is VALID [2022-04-27 21:26:51,400 INFO L290 TraceCheckUtils]: 25: Hoare triple {1744#(and (<= main_~x~0 38) (<= 38 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1745#(and (<= main_~x~0 40) (<= 40 main_~x~0))} is VALID [2022-04-27 21:26:51,400 INFO L290 TraceCheckUtils]: 26: Hoare triple {1745#(and (<= main_~x~0 40) (<= 40 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1746#(and (<= main_~x~0 42) (<= 42 main_~x~0))} is VALID [2022-04-27 21:26:51,401 INFO L290 TraceCheckUtils]: 27: Hoare triple {1746#(and (<= main_~x~0 42) (<= 42 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1747#(and (<= 44 main_~x~0) (<= main_~x~0 44))} is VALID [2022-04-27 21:26:51,402 INFO L290 TraceCheckUtils]: 28: Hoare triple {1747#(and (<= 44 main_~x~0) (<= main_~x~0 44))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1748#(and (<= 46 main_~x~0) (<= main_~x~0 46))} is VALID [2022-04-27 21:26:51,403 INFO L290 TraceCheckUtils]: 29: Hoare triple {1748#(and (<= 46 main_~x~0) (<= main_~x~0 46))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1749#(and (<= main_~x~0 48) (<= 48 main_~x~0))} is VALID [2022-04-27 21:26:51,403 INFO L290 TraceCheckUtils]: 30: Hoare triple {1749#(and (<= main_~x~0 48) (<= 48 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1750#(and (<= main_~x~0 50) (<= 50 main_~x~0))} is VALID [2022-04-27 21:26:51,404 INFO L290 TraceCheckUtils]: 31: Hoare triple {1750#(and (<= main_~x~0 50) (<= 50 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1751#(and (<= main_~x~0 52) (<= 52 main_~x~0))} is VALID [2022-04-27 21:26:51,409 INFO L290 TraceCheckUtils]: 32: Hoare triple {1751#(and (<= main_~x~0 52) (<= 52 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1752#(and (<= main_~x~0 54) (<= 54 main_~x~0))} is VALID [2022-04-27 21:26:51,410 INFO L290 TraceCheckUtils]: 33: Hoare triple {1752#(and (<= main_~x~0 54) (<= 54 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1753#(and (<= main_~x~0 56) (<= 56 main_~x~0))} is VALID [2022-04-27 21:26:51,411 INFO L290 TraceCheckUtils]: 34: Hoare triple {1753#(and (<= main_~x~0 56) (<= 56 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1754#(and (<= 58 main_~x~0) (<= main_~x~0 58))} is VALID [2022-04-27 21:26:51,411 INFO L290 TraceCheckUtils]: 35: Hoare triple {1754#(and (<= 58 main_~x~0) (<= main_~x~0 58))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1755#(and (<= main_~x~0 60) (<= 60 main_~x~0))} is VALID [2022-04-27 21:26:51,412 INFO L290 TraceCheckUtils]: 36: Hoare triple {1755#(and (<= main_~x~0 60) (<= 60 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1756#(and (<= 62 main_~x~0) (<= main_~x~0 62))} is VALID [2022-04-27 21:26:51,412 INFO L290 TraceCheckUtils]: 37: Hoare triple {1756#(and (<= 62 main_~x~0) (<= main_~x~0 62))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1757#(and (<= main_~x~0 64) (<= 64 main_~x~0))} is VALID [2022-04-27 21:26:51,414 INFO L290 TraceCheckUtils]: 38: Hoare triple {1757#(and (<= main_~x~0 64) (<= 64 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1758#(and (<= 66 main_~x~0) (<= main_~x~0 66))} is VALID [2022-04-27 21:26:51,415 INFO L290 TraceCheckUtils]: 39: Hoare triple {1758#(and (<= 66 main_~x~0) (<= main_~x~0 66))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1759#(and (<= main_~x~0 68) (<= 68 main_~x~0))} is VALID [2022-04-27 21:26:51,416 INFO L290 TraceCheckUtils]: 40: Hoare triple {1759#(and (<= main_~x~0 68) (<= 68 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1760#(and (<= main_~x~0 70) (<= 70 main_~x~0))} is VALID [2022-04-27 21:26:51,416 INFO L290 TraceCheckUtils]: 41: Hoare triple {1760#(and (<= main_~x~0 70) (<= 70 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1761#(and (<= 72 main_~x~0) (<= main_~x~0 72))} is VALID [2022-04-27 21:26:51,417 INFO L290 TraceCheckUtils]: 42: Hoare triple {1761#(and (<= 72 main_~x~0) (<= main_~x~0 72))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1762#(and (<= 74 main_~x~0) (<= main_~x~0 74))} is VALID [2022-04-27 21:26:51,417 INFO L290 TraceCheckUtils]: 43: Hoare triple {1762#(and (<= 74 main_~x~0) (<= main_~x~0 74))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1763#(and (<= 76 main_~x~0) (<= main_~x~0 76))} is VALID [2022-04-27 21:26:51,420 INFO L290 TraceCheckUtils]: 44: Hoare triple {1763#(and (<= 76 main_~x~0) (<= main_~x~0 76))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1764#(and (<= 78 main_~x~0) (<= main_~x~0 78))} is VALID [2022-04-27 21:26:51,420 INFO L290 TraceCheckUtils]: 45: Hoare triple {1764#(and (<= 78 main_~x~0) (<= main_~x~0 78))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1765#(and (<= 80 main_~x~0) (<= main_~x~0 80))} is VALID [2022-04-27 21:26:51,421 INFO L290 TraceCheckUtils]: 46: Hoare triple {1765#(and (<= 80 main_~x~0) (<= main_~x~0 80))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1766#(and (<= 82 main_~x~0) (<= main_~x~0 82))} is VALID [2022-04-27 21:26:51,421 INFO L290 TraceCheckUtils]: 47: Hoare triple {1766#(and (<= 82 main_~x~0) (<= main_~x~0 82))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1767#(and (<= 84 main_~x~0) (<= main_~x~0 84))} is VALID [2022-04-27 21:26:51,422 INFO L290 TraceCheckUtils]: 48: Hoare triple {1767#(and (<= 84 main_~x~0) (<= main_~x~0 84))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1768#(and (<= main_~x~0 86) (<= 86 main_~x~0))} is VALID [2022-04-27 21:26:51,422 INFO L290 TraceCheckUtils]: 49: Hoare triple {1768#(and (<= main_~x~0 86) (<= 86 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1769#(and (<= main_~x~0 88) (<= 88 main_~x~0))} is VALID [2022-04-27 21:26:51,423 INFO L290 TraceCheckUtils]: 50: Hoare triple {1769#(and (<= main_~x~0 88) (<= 88 main_~x~0))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1770#(and (<= 90 main_~x~0) (<= main_~x~0 90))} is VALID [2022-04-27 21:26:51,423 INFO L290 TraceCheckUtils]: 51: Hoare triple {1770#(and (<= 90 main_~x~0) (<= main_~x~0 90))} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1929#(and (<= main_~x~0 92) (<= 92 main_~x~0))} is VALID [2022-04-27 21:26:51,424 INFO L290 TraceCheckUtils]: 52: Hoare triple {1929#(and (<= main_~x~0 92) (<= 92 main_~x~0))} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1721#false} is VALID [2022-04-27 21:26:51,424 INFO L272 TraceCheckUtils]: 53: Hoare triple {1721#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1721#false} is VALID [2022-04-27 21:26:51,424 INFO L290 TraceCheckUtils]: 54: Hoare triple {1721#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1721#false} is VALID [2022-04-27 21:26:51,424 INFO L290 TraceCheckUtils]: 55: Hoare triple {1721#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1721#false} is VALID [2022-04-27 21:26:51,424 INFO L290 TraceCheckUtils]: 56: Hoare triple {1721#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1721#false} is VALID [2022-04-27 21:26:51,425 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:26:51,425 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:26:54,587 INFO L290 TraceCheckUtils]: 56: Hoare triple {1721#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1721#false} is VALID [2022-04-27 21:26:54,587 INFO L290 TraceCheckUtils]: 55: Hoare triple {1721#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1721#false} is VALID [2022-04-27 21:26:54,587 INFO L290 TraceCheckUtils]: 54: Hoare triple {1721#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1721#false} is VALID [2022-04-27 21:26:54,587 INFO L272 TraceCheckUtils]: 53: Hoare triple {1721#false} [48] L15-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (mod v_main_~x~0_6 2)) InVars {main_~x~0=v_main_~x~0_6} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1721#false} is VALID [2022-04-27 21:26:54,588 INFO L290 TraceCheckUtils]: 52: Hoare triple {1957#(< (mod main_~x~0 4294967296) 268435455)} [46] L15-2-->L15-3: Formula: (not (< (mod v_main_~x~0_5 4294967296) 268435455)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1721#false} is VALID [2022-04-27 21:26:54,588 INFO L290 TraceCheckUtils]: 51: Hoare triple {1961#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1957#(< (mod main_~x~0 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,589 INFO L290 TraceCheckUtils]: 50: Hoare triple {1965#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1961#(< (mod (+ main_~x~0 2) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,590 INFO L290 TraceCheckUtils]: 49: Hoare triple {1969#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1965#(< (mod (+ main_~x~0 4) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,590 INFO L290 TraceCheckUtils]: 48: Hoare triple {1973#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1969#(< (mod (+ main_~x~0 6) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,591 INFO L290 TraceCheckUtils]: 47: Hoare triple {1977#(< (mod (+ main_~x~0 10) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1973#(< (mod (+ main_~x~0 8) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,591 INFO L290 TraceCheckUtils]: 46: Hoare triple {1981#(< (mod (+ main_~x~0 12) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1977#(< (mod (+ main_~x~0 10) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,592 INFO L290 TraceCheckUtils]: 45: Hoare triple {1985#(< (mod (+ main_~x~0 14) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1981#(< (mod (+ main_~x~0 12) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,593 INFO L290 TraceCheckUtils]: 44: Hoare triple {1989#(< (mod (+ main_~x~0 16) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1985#(< (mod (+ main_~x~0 14) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,593 INFO L290 TraceCheckUtils]: 43: Hoare triple {1993#(< (mod (+ main_~x~0 18) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1989#(< (mod (+ main_~x~0 16) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,594 INFO L290 TraceCheckUtils]: 42: Hoare triple {1997#(< (mod (+ main_~x~0 20) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1993#(< (mod (+ main_~x~0 18) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,594 INFO L290 TraceCheckUtils]: 41: Hoare triple {2001#(< (mod (+ main_~x~0 22) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {1997#(< (mod (+ main_~x~0 20) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,595 INFO L290 TraceCheckUtils]: 40: Hoare triple {2005#(< (mod (+ main_~x~0 24) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2001#(< (mod (+ main_~x~0 22) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,596 INFO L290 TraceCheckUtils]: 39: Hoare triple {2009#(< (mod (+ main_~x~0 26) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2005#(< (mod (+ main_~x~0 24) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,596 INFO L290 TraceCheckUtils]: 38: Hoare triple {2013#(< (mod (+ main_~x~0 28) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2009#(< (mod (+ main_~x~0 26) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,597 INFO L290 TraceCheckUtils]: 37: Hoare triple {2017#(< (mod (+ 30 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2013#(< (mod (+ main_~x~0 28) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,597 INFO L290 TraceCheckUtils]: 36: Hoare triple {2021#(< (mod (+ 32 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2017#(< (mod (+ 30 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,598 INFO L290 TraceCheckUtils]: 35: Hoare triple {2025#(< (mod (+ main_~x~0 34) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2021#(< (mod (+ 32 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,598 INFO L290 TraceCheckUtils]: 34: Hoare triple {2029#(< (mod (+ main_~x~0 36) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2025#(< (mod (+ main_~x~0 34) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,599 INFO L290 TraceCheckUtils]: 33: Hoare triple {2033#(< (mod (+ main_~x~0 38) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2029#(< (mod (+ main_~x~0 36) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,600 INFO L290 TraceCheckUtils]: 32: Hoare triple {2037#(< (mod (+ 40 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2033#(< (mod (+ main_~x~0 38) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,600 INFO L290 TraceCheckUtils]: 31: Hoare triple {2041#(< (mod (+ 42 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2037#(< (mod (+ 40 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,601 INFO L290 TraceCheckUtils]: 30: Hoare triple {2045#(< (mod (+ 44 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2041#(< (mod (+ 42 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,601 INFO L290 TraceCheckUtils]: 29: Hoare triple {2049#(< (mod (+ main_~x~0 46) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2045#(< (mod (+ 44 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,602 INFO L290 TraceCheckUtils]: 28: Hoare triple {2053#(< (mod (+ main_~x~0 48) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2049#(< (mod (+ main_~x~0 46) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,603 INFO L290 TraceCheckUtils]: 27: Hoare triple {2057#(< (mod (+ main_~x~0 50) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2053#(< (mod (+ main_~x~0 48) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,603 INFO L290 TraceCheckUtils]: 26: Hoare triple {2061#(< (mod (+ main_~x~0 52) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2057#(< (mod (+ main_~x~0 50) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,604 INFO L290 TraceCheckUtils]: 25: Hoare triple {2065#(< (mod (+ main_~x~0 54) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2061#(< (mod (+ main_~x~0 52) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,604 INFO L290 TraceCheckUtils]: 24: Hoare triple {2069#(< (mod (+ 56 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2065#(< (mod (+ main_~x~0 54) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,605 INFO L290 TraceCheckUtils]: 23: Hoare triple {2073#(< (mod (+ main_~x~0 58) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2069#(< (mod (+ 56 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,606 INFO L290 TraceCheckUtils]: 22: Hoare triple {2077#(< (mod (+ main_~x~0 60) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2073#(< (mod (+ main_~x~0 58) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,606 INFO L290 TraceCheckUtils]: 21: Hoare triple {2081#(< (mod (+ main_~x~0 62) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2077#(< (mod (+ main_~x~0 60) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,607 INFO L290 TraceCheckUtils]: 20: Hoare triple {2085#(< (mod (+ 64 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2081#(< (mod (+ main_~x~0 62) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,607 INFO L290 TraceCheckUtils]: 19: Hoare triple {2089#(< (mod (+ 66 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2085#(< (mod (+ 64 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,608 INFO L290 TraceCheckUtils]: 18: Hoare triple {2093#(< (mod (+ 68 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2089#(< (mod (+ 66 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,609 INFO L290 TraceCheckUtils]: 17: Hoare triple {2097#(< (mod (+ main_~x~0 70) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2093#(< (mod (+ 68 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,609 INFO L290 TraceCheckUtils]: 16: Hoare triple {2101#(< (mod (+ 72 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2097#(< (mod (+ main_~x~0 70) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,610 INFO L290 TraceCheckUtils]: 15: Hoare triple {2105#(< (mod (+ main_~x~0 74) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2101#(< (mod (+ 72 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,610 INFO L290 TraceCheckUtils]: 14: Hoare triple {2109#(< (mod (+ 76 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2105#(< (mod (+ main_~x~0 74) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,611 INFO L290 TraceCheckUtils]: 13: Hoare triple {2113#(< (mod (+ main_~x~0 78) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2109#(< (mod (+ 76 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,611 INFO L290 TraceCheckUtils]: 12: Hoare triple {2117#(< (mod (+ main_~x~0 80) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2113#(< (mod (+ main_~x~0 78) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,612 INFO L290 TraceCheckUtils]: 11: Hoare triple {2121#(< (mod (+ main_~x~0 82) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2117#(< (mod (+ main_~x~0 80) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,613 INFO L290 TraceCheckUtils]: 10: Hoare triple {2125#(< (mod (+ 84 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2121#(< (mod (+ main_~x~0 82) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,613 INFO L290 TraceCheckUtils]: 9: Hoare triple {2129#(< (mod (+ main_~x~0 86) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2125#(< (mod (+ 84 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,614 INFO L290 TraceCheckUtils]: 8: Hoare triple {2133#(< (mod (+ 88 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2129#(< (mod (+ main_~x~0 86) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,614 INFO L290 TraceCheckUtils]: 7: Hoare triple {2137#(< (mod (+ main_~x~0 90) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2133#(< (mod (+ 88 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,615 INFO L290 TraceCheckUtils]: 6: Hoare triple {2141#(< (mod (+ 92 main_~x~0) 4294967296) 268435455)} [47] L15-2-->L15-2: Formula: (and (< (mod v_main_~x~0_2 4294967296) 268435455) (= v_main_~x~0_1 (+ v_main_~x~0_2 2))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0] {2137#(< (mod (+ main_~x~0 90) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,615 INFO L290 TraceCheckUtils]: 5: Hoare triple {1720#true} [43] mainENTRY-->L15-2: Formula: (= v_main_~x~0_4 0) InVars {} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[main_~x~0] {2141#(< (mod (+ 92 main_~x~0) 4294967296) 268435455)} is VALID [2022-04-27 21:26:54,616 INFO L272 TraceCheckUtils]: 4: Hoare triple {1720#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:54,616 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1720#true} {1720#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:54,616 INFO L290 TraceCheckUtils]: 2: Hoare triple {1720#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:54,616 INFO L290 TraceCheckUtils]: 1: Hoare triple {1720#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 13) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1720#true} is VALID [2022-04-27 21:26:54,616 INFO L272 TraceCheckUtils]: 0: Hoare triple {1720#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1720#true} is VALID [2022-04-27 21:26:54,617 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:26:54,617 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [952702952] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:26:54,617 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:26:54,617 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 49, 49] total 98 [2022-04-27 21:26:54,617 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917827092] [2022-04-27 21:26:54,617 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:26:54,618 INFO L78 Accepts]: Start accepts. Automaton has has 98 states, 98 states have (on average 1.0612244897959184) internal successors, (104), 97 states have internal predecessors, (104), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 57 [2022-04-27 21:26:54,618 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:26:54,618 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 98 states, 98 states have (on average 1.0612244897959184) internal successors, (104), 97 states have internal predecessors, (104), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:26:54,689 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 109 edges. 109 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:26:54,689 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 98 states [2022-04-27 21:26:54,689 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:26:54,690 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2022-04-27 21:26:54,692 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2496, Invalid=7010, Unknown=0, NotChecked=0, Total=9506 [2022-04-27 21:26:54,692 INFO L87 Difference]: Start difference. First operand 58 states and 58 transitions. Second operand has 98 states, 98 states have (on average 1.0612244897959184) internal successors, (104), 97 states have internal predecessors, (104), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:27:01,149 WARN L833 $PredicateComparison]: unable to prove that (and (< (mod (+ c_main_~x~0 24) 4294967296) 268435455) (< (mod (+ 20 c_main_~x~0) 4294967296) 268435455) (= |c_#NULL.base| |c_old(#NULL.base)|) (< (mod (+ 6 c_main_~x~0) 4294967296) 268435455) (< (mod (+ c_main_~x~0 54) 4294967296) 268435455) (< (mod (+ 82 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 14 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 52 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 48 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 70 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 68 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 38 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 62 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 56 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 4 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 66 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 74 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 78 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 34 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 58 c_main_~x~0) 4294967296) 268435455) (< (mod c_main_~x~0 4294967296) 268435455) (< (mod (+ 30 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 18 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 40 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 28 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 32 c_main_~x~0) 4294967296) 268435455) (< (mod (+ c_main_~x~0 86) 4294967296) 268435455) (< (mod (+ c_main_~x~0 80) 4294967296) 268435455) (< (mod (+ 76 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 42 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 2 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 44 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 16 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 60 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 88 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 8 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 92 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 26 c_main_~x~0) 4294967296) 268435455) (< (mod (+ c_main_~x~0 50) 4294967296) 268435455) (< (mod (+ 84 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 72 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 46 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 10 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 90 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 12 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 36 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 64 c_main_~x~0) 4294967296) 268435455) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< (mod (+ 22 c_main_~x~0) 4294967296) 268435455)) is different from false [2022-04-27 21:27:58,736 WARN L232 SmtUtils]: Spent 18.52s on a formula simplification. DAG size of input: 186 DAG size of output: 10 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:29:06,944 WARN L232 SmtUtils]: Spent 13.65s on a formula simplification. DAG size of input: 188 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:30:11,602 WARN L232 SmtUtils]: Spent 15.89s on a formula simplification. DAG size of input: 184 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:30:13,656 WARN L833 $PredicateComparison]: unable to prove that (and (< (mod (+ c_main_~x~0 24) 4294967296) 268435455) (< (mod (+ 20 c_main_~x~0) 4294967296) 268435455) (= |c_#NULL.base| |c_old(#NULL.base)|) (< (mod (+ 6 c_main_~x~0) 4294967296) 268435455) (< (mod (+ c_main_~x~0 54) 4294967296) 268435455) (< (mod (+ 82 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 14 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 52 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 48 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 70 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 68 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 38 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 62 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 56 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 4 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 66 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 74 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 78 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 34 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 58 c_main_~x~0) 4294967296) 268435455) (< (mod c_main_~x~0 4294967296) 268435455) (< (mod (+ 30 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 18 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 40 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 28 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 32 c_main_~x~0) 4294967296) 268435455) (< (mod (+ c_main_~x~0 80) 4294967296) 268435455) (< (mod (+ 76 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 42 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 2 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 44 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 16 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 60 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 8 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 26 c_main_~x~0) 4294967296) 268435455) (< (mod (+ c_main_~x~0 50) 4294967296) 268435455) (< (mod (+ 84 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 72 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 46 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 10 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 12 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 36 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 64 c_main_~x~0) 4294967296) 268435455) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< (mod (+ 22 c_main_~x~0) 4294967296) 268435455)) is different from false [2022-04-27 21:31:13,554 WARN L232 SmtUtils]: Spent 12.02s on a formula simplification. DAG size of input: 170 DAG size of output: 10 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:32:17,928 WARN L232 SmtUtils]: Spent 11.50s on a formula simplification. DAG size of input: 172 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:33:13,408 WARN L232 SmtUtils]: Spent 10.84s on a formula simplification. DAG size of input: 168 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:33:15,466 WARN L833 $PredicateComparison]: unable to prove that (and (< (mod (+ c_main_~x~0 24) 4294967296) 268435455) (< (mod (+ 20 c_main_~x~0) 4294967296) 268435455) (= |c_#NULL.base| |c_old(#NULL.base)|) (< (mod (+ 6 c_main_~x~0) 4294967296) 268435455) (< (mod (+ c_main_~x~0 54) 4294967296) 268435455) (< (mod (+ 14 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 52 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 48 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 70 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 68 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 38 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 62 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 56 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 4 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 66 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 74 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 34 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 58 c_main_~x~0) 4294967296) 268435455) (< (mod c_main_~x~0 4294967296) 268435455) (< (mod (+ 30 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 18 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 40 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 28 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 32 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 76 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 42 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 2 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 44 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 16 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 60 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 8 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 26 c_main_~x~0) 4294967296) 268435455) (< (mod (+ c_main_~x~0 50) 4294967296) 268435455) (< (mod (+ 72 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 46 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 10 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 12 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 36 c_main_~x~0) 4294967296) 268435455) (< (mod (+ 64 c_main_~x~0) 4294967296) 268435455) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< (mod (+ 22 c_main_~x~0) 4294967296) 268435455)) is different from false [2022-04-27 21:34:23,941 WARN L232 SmtUtils]: Spent 12.15s on a formula simplification. DAG size of input: 154 DAG size of output: 10 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:35:15,204 WARN L232 SmtUtils]: Spent 7.99s on a formula simplification. DAG size of input: 156 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:36:14,608 WARN L232 SmtUtils]: Spent 11.48s on a formula simplification. DAG size of input: 152 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:37:15,655 WARN L232 SmtUtils]: Spent 6.92s on a formula simplification. DAG size of input: 148 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:38:20,168 WARN L232 SmtUtils]: Spent 8.33s on a formula simplification. DAG size of input: 144 DAG size of output: 16 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)