/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/locks/test_locks_12.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-28 02:01:21,801 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-28 02:01:21,803 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-28 02:01:21,847 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-28 02:01:21,860 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-28 02:01:21,862 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-28 02:01:21,863 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-28 02:01:21,866 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-28 02:01:21,866 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-28 02:01:21,867 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-28 02:01:21,869 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-28 02:01:21,873 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-28 02:01:21,875 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-28 02:01:21,876 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-28 02:01:21,876 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-28 02:01:21,877 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-28 02:01:21,878 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-28 02:01:21,880 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-28 02:01:21,885 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-28 02:01:21,886 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-28 02:01:21,887 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-28 02:01:21,888 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-28 02:01:21,911 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-28 02:01:21,911 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-28 02:01:21,912 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-28 02:01:21,912 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-28 02:01:21,913 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-28 02:01:21,913 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-28 02:01:21,913 INFO L138 SettingsManager]: * Use SBE=true [2022-04-28 02:01:21,913 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-28 02:01:21,913 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-28 02:01:21,914 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-28 02:01:21,914 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-28 02:01:21,914 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-28 02:01:21,914 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-28 02:01:21,914 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-28 02:01:21,915 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-28 02:01:21,915 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-28 02:01:21,915 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-28 02:01:21,915 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-28 02:01:21,915 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-28 02:01:21,915 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 02:01:21,915 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-28 02:01:21,916 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-28 02:01:21,916 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-28 02:01:21,916 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-28 02:01:21,916 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-28 02:01:21,916 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-28 02:01:21,916 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-28 02:01:21,917 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-28 02:01:21,918 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-28 02:01:21,918 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-28 02:01:22,143 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-28 02:01:22,163 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-28 02:01:22,165 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-28 02:01:22,166 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-28 02:01:22,167 INFO L275 PluginConnector]: CDTParser initialized [2022-04-28 02:01:22,169 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/locks/test_locks_12.c [2022-04-28 02:01:22,227 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a51fb2e17/a8d137f169404a60b2a4aea99dece1c7/FLAG1d182be2b [2022-04-28 02:01:22,578 INFO L306 CDTParser]: Found 1 translation units. [2022-04-28 02:01:22,578 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_12.c [2022-04-28 02:01:22,586 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a51fb2e17/a8d137f169404a60b2a4aea99dece1c7/FLAG1d182be2b [2022-04-28 02:01:22,596 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a51fb2e17/a8d137f169404a60b2a4aea99dece1c7 [2022-04-28 02:01:22,598 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-28 02:01:22,599 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-28 02:01:22,605 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-28 02:01:22,605 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-28 02:01:22,607 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-28 02:01:22,608 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 02:01:22" (1/1) ... [2022-04-28 02:01:22,609 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@c4d4370 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22, skipping insertion in model container [2022-04-28 02:01:22,609 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 02:01:22" (1/1) ... [2022-04-28 02:01:22,615 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-28 02:01:22,633 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-28 02:01:22,789 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_12.c[4591,4604] [2022-04-28 02:01:22,806 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 02:01:22,813 INFO L203 MainTranslator]: Completed pre-run [2022-04-28 02:01:22,854 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_12.c[4591,4604] [2022-04-28 02:01:22,856 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 02:01:22,866 INFO L208 MainTranslator]: Completed translation [2022-04-28 02:01:22,866 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22 WrapperNode [2022-04-28 02:01:22,867 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-28 02:01:22,868 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-28 02:01:22,868 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-28 02:01:22,868 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-28 02:01:22,875 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22" (1/1) ... [2022-04-28 02:01:22,876 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22" (1/1) ... [2022-04-28 02:01:22,881 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22" (1/1) ... [2022-04-28 02:01:22,881 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22" (1/1) ... [2022-04-28 02:01:22,888 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22" (1/1) ... [2022-04-28 02:01:22,895 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22" (1/1) ... [2022-04-28 02:01:22,897 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22" (1/1) ... [2022-04-28 02:01:22,898 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-28 02:01:22,899 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-28 02:01:22,899 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-28 02:01:22,899 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-28 02:01:22,900 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22" (1/1) ... [2022-04-28 02:01:22,913 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 02:01:22,928 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 02:01:22,938 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-28 02:01:22,949 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-28 02:01:22,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-28 02:01:22,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-28 02:01:22,977 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-28 02:01:22,977 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-28 02:01:22,977 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-28 02:01:22,977 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-28 02:01:22,978 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-28 02:01:22,978 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-28 02:01:22,979 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-28 02:01:22,979 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-28 02:01:22,979 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-28 02:01:22,979 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-28 02:01:22,979 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-28 02:01:22,979 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-28 02:01:22,979 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-28 02:01:22,980 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-28 02:01:23,039 INFO L234 CfgBuilder]: Building ICFG [2022-04-28 02:01:23,040 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-28 02:01:23,261 INFO L275 CfgBuilder]: Performing block encoding [2022-04-28 02:01:23,270 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-28 02:01:23,270 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-28 02:01:23,272 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 02:01:23 BoogieIcfgContainer [2022-04-28 02:01:23,272 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-28 02:01:23,273 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-28 02:01:23,273 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-28 02:01:23,275 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-28 02:01:23,292 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 02:01:23" (1/1) ... [2022-04-28 02:01:23,294 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-28 02:01:23,335 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.04 02:01:23 BasicIcfg [2022-04-28 02:01:23,335 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-28 02:01:23,337 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-28 02:01:23,337 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-28 02:01:23,339 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-28 02:01:23,339 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.04 02:01:22" (1/4) ... [2022-04-28 02:01:23,340 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@752f8761 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 02:01:23, skipping insertion in model container [2022-04-28 02:01:23,340 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:01:22" (2/4) ... [2022-04-28 02:01:23,340 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@752f8761 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 02:01:23, skipping insertion in model container [2022-04-28 02:01:23,340 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 02:01:23" (3/4) ... [2022-04-28 02:01:23,341 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@752f8761 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.04 02:01:23, skipping insertion in model container [2022-04-28 02:01:23,341 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.04 02:01:23" (4/4) ... [2022-04-28 02:01:23,341 INFO L111 eAbstractionObserver]: Analyzing ICFG test_locks_12.cqvasr [2022-04-28 02:01:23,355 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-28 02:01:23,355 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-28 02:01:23,396 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-28 02:01:23,401 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@5bacede9, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@328a1839 [2022-04-28 02:01:23,401 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-28 02:01:23,409 INFO L276 IsEmpty]: Start isEmpty. Operand has 51 states, 45 states have (on average 1.8888888888888888) internal successors, (85), 46 states have internal predecessors, (85), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-28 02:01:23,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-28 02:01:23,415 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:23,415 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:23,416 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:23,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:23,420 INFO L85 PathProgramCache]: Analyzing trace with hash -1823990193, now seen corresponding path program 1 times [2022-04-28 02:01:23,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:23,428 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775159846] [2022-04-28 02:01:23,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:23,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:23,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:23,721 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:23,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:23,748 INFO L290 TraceCheckUtils]: 0: Hoare triple {60#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {54#true} is VALID [2022-04-28 02:01:23,749 INFO L290 TraceCheckUtils]: 1: Hoare triple {54#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54#true} is VALID [2022-04-28 02:01:23,749 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {54#true} {54#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54#true} is VALID [2022-04-28 02:01:23,756 INFO L272 TraceCheckUtils]: 0: Hoare triple {54#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:23,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {60#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {54#true} is VALID [2022-04-28 02:01:23,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {54#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54#true} is VALID [2022-04-28 02:01:23,757 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {54#true} {54#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54#true} is VALID [2022-04-28 02:01:23,757 INFO L272 TraceCheckUtils]: 4: Hoare triple {54#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54#true} is VALID [2022-04-28 02:01:23,758 INFO L290 TraceCheckUtils]: 5: Hoare triple {54#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {54#true} is VALID [2022-04-28 02:01:23,758 INFO L290 TraceCheckUtils]: 6: Hoare triple {54#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {54#true} is VALID [2022-04-28 02:01:23,758 INFO L290 TraceCheckUtils]: 7: Hoare triple {54#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {54#true} is VALID [2022-04-28 02:01:23,762 INFO L290 TraceCheckUtils]: 8: Hoare triple {54#true} [250] L78-->L78-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,763 INFO L290 TraceCheckUtils]: 9: Hoare triple {59#(= main_~lk1~0 1)} [252] L78-2-->L82-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,764 INFO L290 TraceCheckUtils]: 10: Hoare triple {59#(= main_~lk1~0 1)} [254] L82-1-->L86-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,765 INFO L290 TraceCheckUtils]: 11: Hoare triple {59#(= main_~lk1~0 1)} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,765 INFO L290 TraceCheckUtils]: 12: Hoare triple {59#(= main_~lk1~0 1)} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,766 INFO L290 TraceCheckUtils]: 13: Hoare triple {59#(= main_~lk1~0 1)} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,766 INFO L290 TraceCheckUtils]: 14: Hoare triple {59#(= main_~lk1~0 1)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,768 INFO L290 TraceCheckUtils]: 15: Hoare triple {59#(= main_~lk1~0 1)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,769 INFO L290 TraceCheckUtils]: 16: Hoare triple {59#(= main_~lk1~0 1)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,769 INFO L290 TraceCheckUtils]: 17: Hoare triple {59#(= main_~lk1~0 1)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,771 INFO L290 TraceCheckUtils]: 18: Hoare triple {59#(= main_~lk1~0 1)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,775 INFO L290 TraceCheckUtils]: 19: Hoare triple {59#(= main_~lk1~0 1)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,775 INFO L290 TraceCheckUtils]: 20: Hoare triple {59#(= main_~lk1~0 1)} [274] L122-1-->L129: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {59#(= main_~lk1~0 1)} is VALID [2022-04-28 02:01:23,776 INFO L290 TraceCheckUtils]: 21: Hoare triple {59#(= main_~lk1~0 1)} [276] L129-->L184-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {55#false} is VALID [2022-04-28 02:01:23,776 INFO L290 TraceCheckUtils]: 22: Hoare triple {55#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {55#false} is VALID [2022-04-28 02:01:23,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:23,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:23,777 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775159846] [2022-04-28 02:01:23,778 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [775159846] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:23,778 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:23,778 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:23,779 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551695320] [2022-04-28 02:01:23,780 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:23,784 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-28 02:01:23,786 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:23,788 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:23,820 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:23,820 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:23,821 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:23,841 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:23,842 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:23,847 INFO L87 Difference]: Start difference. First operand has 51 states, 45 states have (on average 1.8888888888888888) internal successors, (85), 46 states have internal predecessors, (85), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:24,237 INFO L93 Difference]: Finished difference Result 100 states and 175 transitions. [2022-04-28 02:01:24,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:24,237 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-28 02:01:24,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:24,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-28 02:01:24,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-28 02:01:24,252 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 175 transitions. [2022-04-28 02:01:24,522 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 175 edges. 175 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:24,535 INFO L225 Difference]: With dead ends: 100 [2022-04-28 02:01:24,535 INFO L226 Difference]: Without dead ends: 85 [2022-04-28 02:01:24,537 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:24,540 INFO L413 NwaCegarLoop]: 92 mSDtfsCounter, 208 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:24,541 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [208 Valid, 101 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:24,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-28 02:01:24,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 59. [2022-04-28 02:01:24,570 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:24,571 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 59 states, 55 states have (on average 1.8727272727272728) internal successors, (103), 55 states have internal predecessors, (103), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,572 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 59 states, 55 states have (on average 1.8727272727272728) internal successors, (103), 55 states have internal predecessors, (103), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,572 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 59 states, 55 states have (on average 1.8727272727272728) internal successors, (103), 55 states have internal predecessors, (103), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:24,578 INFO L93 Difference]: Finished difference Result 85 states and 153 transitions. [2022-04-28 02:01:24,578 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 153 transitions. [2022-04-28 02:01:24,579 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:24,579 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:24,580 INFO L74 IsIncluded]: Start isIncluded. First operand has 59 states, 55 states have (on average 1.8727272727272728) internal successors, (103), 55 states have internal predecessors, (103), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-28 02:01:24,580 INFO L87 Difference]: Start difference. First operand has 59 states, 55 states have (on average 1.8727272727272728) internal successors, (103), 55 states have internal predecessors, (103), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-28 02:01:24,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:24,586 INFO L93 Difference]: Finished difference Result 85 states and 153 transitions. [2022-04-28 02:01:24,586 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 153 transitions. [2022-04-28 02:01:24,587 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:24,587 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:24,587 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:24,587 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:24,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 55 states have (on average 1.8727272727272728) internal successors, (103), 55 states have internal predecessors, (103), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 106 transitions. [2022-04-28 02:01:24,592 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 106 transitions. Word has length 23 [2022-04-28 02:01:24,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:24,592 INFO L495 AbstractCegarLoop]: Abstraction has 59 states and 106 transitions. [2022-04-28 02:01:24,592 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,592 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 106 transitions. [2022-04-28 02:01:24,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-28 02:01:24,593 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:24,593 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:24,594 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-28 02:01:24,594 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:24,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:24,594 INFO L85 PathProgramCache]: Analyzing trace with hash -316438384, now seen corresponding path program 1 times [2022-04-28 02:01:24,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:24,595 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [640508492] [2022-04-28 02:01:24,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:24,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:24,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:24,675 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:24,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:24,683 INFO L290 TraceCheckUtils]: 0: Hoare triple {419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {413#true} is VALID [2022-04-28 02:01:24,683 INFO L290 TraceCheckUtils]: 1: Hoare triple {413#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {413#true} is VALID [2022-04-28 02:01:24,684 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {413#true} {413#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {413#true} is VALID [2022-04-28 02:01:24,684 INFO L272 TraceCheckUtils]: 0: Hoare triple {413#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:24,685 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {413#true} is VALID [2022-04-28 02:01:24,685 INFO L290 TraceCheckUtils]: 2: Hoare triple {413#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {413#true} is VALID [2022-04-28 02:01:24,685 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {413#true} {413#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {413#true} is VALID [2022-04-28 02:01:24,685 INFO L272 TraceCheckUtils]: 4: Hoare triple {413#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {413#true} is VALID [2022-04-28 02:01:24,686 INFO L290 TraceCheckUtils]: 5: Hoare triple {413#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {413#true} is VALID [2022-04-28 02:01:24,686 INFO L290 TraceCheckUtils]: 6: Hoare triple {413#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {413#true} is VALID [2022-04-28 02:01:24,686 INFO L290 TraceCheckUtils]: 7: Hoare triple {413#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {413#true} is VALID [2022-04-28 02:01:24,687 INFO L290 TraceCheckUtils]: 8: Hoare triple {413#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,687 INFO L290 TraceCheckUtils]: 9: Hoare triple {418#(= main_~p1~0 0)} [252] L78-2-->L82-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,688 INFO L290 TraceCheckUtils]: 10: Hoare triple {418#(= main_~p1~0 0)} [254] L82-1-->L86-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,688 INFO L290 TraceCheckUtils]: 11: Hoare triple {418#(= main_~p1~0 0)} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,689 INFO L290 TraceCheckUtils]: 12: Hoare triple {418#(= main_~p1~0 0)} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,689 INFO L290 TraceCheckUtils]: 13: Hoare triple {418#(= main_~p1~0 0)} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,689 INFO L290 TraceCheckUtils]: 14: Hoare triple {418#(= main_~p1~0 0)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,690 INFO L290 TraceCheckUtils]: 15: Hoare triple {418#(= main_~p1~0 0)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,690 INFO L290 TraceCheckUtils]: 16: Hoare triple {418#(= main_~p1~0 0)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,691 INFO L290 TraceCheckUtils]: 17: Hoare triple {418#(= main_~p1~0 0)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,691 INFO L290 TraceCheckUtils]: 18: Hoare triple {418#(= main_~p1~0 0)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,692 INFO L290 TraceCheckUtils]: 19: Hoare triple {418#(= main_~p1~0 0)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {418#(= main_~p1~0 0)} is VALID [2022-04-28 02:01:24,692 INFO L290 TraceCheckUtils]: 20: Hoare triple {418#(= main_~p1~0 0)} [274] L122-1-->L129: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {414#false} is VALID [2022-04-28 02:01:24,692 INFO L290 TraceCheckUtils]: 21: Hoare triple {414#false} [276] L129-->L184-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {414#false} is VALID [2022-04-28 02:01:24,693 INFO L290 TraceCheckUtils]: 22: Hoare triple {414#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {414#false} is VALID [2022-04-28 02:01:24,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:24,693 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:24,693 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [640508492] [2022-04-28 02:01:24,694 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [640508492] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:24,694 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:24,694 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:24,694 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [550105373] [2022-04-28 02:01:24,694 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:24,695 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-28 02:01:24,695 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:24,696 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,713 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:24,714 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:24,714 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:24,714 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:24,715 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:24,715 INFO L87 Difference]: Start difference. First operand 59 states and 106 transitions. Second operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:24,993 INFO L93 Difference]: Finished difference Result 138 states and 253 transitions. [2022-04-28 02:01:24,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:24,993 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-28 02:01:24,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:24,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:24,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 228 transitions. [2022-04-28 02:01:24,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 228 transitions. [2022-04-28 02:01:25,000 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 228 transitions. [2022-04-28 02:01:25,198 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 228 edges. 228 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:25,201 INFO L225 Difference]: With dead ends: 138 [2022-04-28 02:01:25,201 INFO L226 Difference]: Without dead ends: 85 [2022-04-28 02:01:25,202 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:25,203 INFO L413 NwaCegarLoop]: 104 mSDtfsCounter, 178 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 178 SdHoareTripleChecker+Valid, 111 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:25,204 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [178 Valid, 111 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:25,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-28 02:01:25,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 83. [2022-04-28 02:01:25,210 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:25,211 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 83 states, 79 states have (on average 1.860759493670886) internal successors, (147), 79 states have internal predecessors, (147), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,211 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 83 states, 79 states have (on average 1.860759493670886) internal successors, (147), 79 states have internal predecessors, (147), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,212 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 83 states, 79 states have (on average 1.860759493670886) internal successors, (147), 79 states have internal predecessors, (147), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:25,216 INFO L93 Difference]: Finished difference Result 85 states and 151 transitions. [2022-04-28 02:01:25,216 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 151 transitions. [2022-04-28 02:01:25,217 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:25,217 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:25,217 INFO L74 IsIncluded]: Start isIncluded. First operand has 83 states, 79 states have (on average 1.860759493670886) internal successors, (147), 79 states have internal predecessors, (147), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-28 02:01:25,217 INFO L87 Difference]: Start difference. First operand has 83 states, 79 states have (on average 1.860759493670886) internal successors, (147), 79 states have internal predecessors, (147), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-28 02:01:25,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:25,221 INFO L93 Difference]: Finished difference Result 85 states and 151 transitions. [2022-04-28 02:01:25,221 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 151 transitions. [2022-04-28 02:01:25,222 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:25,222 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:25,222 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:25,222 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:25,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 79 states have (on average 1.860759493670886) internal successors, (147), 79 states have internal predecessors, (147), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 150 transitions. [2022-04-28 02:01:25,226 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 150 transitions. Word has length 23 [2022-04-28 02:01:25,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:25,226 INFO L495 AbstractCegarLoop]: Abstraction has 83 states and 150 transitions. [2022-04-28 02:01:25,226 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,227 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 150 transitions. [2022-04-28 02:01:25,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-28 02:01:25,227 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:25,228 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:25,228 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-28 02:01:25,228 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:25,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:25,229 INFO L85 PathProgramCache]: Analyzing trace with hash -709089080, now seen corresponding path program 1 times [2022-04-28 02:01:25,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:25,229 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1653897739] [2022-04-28 02:01:25,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:25,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:25,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:25,280 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:25,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:25,286 INFO L290 TraceCheckUtils]: 0: Hoare triple {839#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {833#true} is VALID [2022-04-28 02:01:25,286 INFO L290 TraceCheckUtils]: 1: Hoare triple {833#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-28 02:01:25,286 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {833#true} {833#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-28 02:01:25,287 INFO L272 TraceCheckUtils]: 0: Hoare triple {833#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {839#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:25,287 INFO L290 TraceCheckUtils]: 1: Hoare triple {839#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {833#true} is VALID [2022-04-28 02:01:25,288 INFO L290 TraceCheckUtils]: 2: Hoare triple {833#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-28 02:01:25,288 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {833#true} {833#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-28 02:01:25,288 INFO L272 TraceCheckUtils]: 4: Hoare triple {833#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-28 02:01:25,288 INFO L290 TraceCheckUtils]: 5: Hoare triple {833#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {833#true} is VALID [2022-04-28 02:01:25,289 INFO L290 TraceCheckUtils]: 6: Hoare triple {833#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {833#true} is VALID [2022-04-28 02:01:25,289 INFO L290 TraceCheckUtils]: 7: Hoare triple {833#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {833#true} is VALID [2022-04-28 02:01:25,289 INFO L290 TraceCheckUtils]: 8: Hoare triple {833#true} [250] L78-->L78-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,290 INFO L290 TraceCheckUtils]: 9: Hoare triple {838#(not (= main_~p1~0 0))} [252] L78-2-->L82-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,290 INFO L290 TraceCheckUtils]: 10: Hoare triple {838#(not (= main_~p1~0 0))} [254] L82-1-->L86-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,291 INFO L290 TraceCheckUtils]: 11: Hoare triple {838#(not (= main_~p1~0 0))} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,291 INFO L290 TraceCheckUtils]: 12: Hoare triple {838#(not (= main_~p1~0 0))} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,292 INFO L290 TraceCheckUtils]: 13: Hoare triple {838#(not (= main_~p1~0 0))} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,292 INFO L290 TraceCheckUtils]: 14: Hoare triple {838#(not (= main_~p1~0 0))} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,292 INFO L290 TraceCheckUtils]: 15: Hoare triple {838#(not (= main_~p1~0 0))} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,293 INFO L290 TraceCheckUtils]: 16: Hoare triple {838#(not (= main_~p1~0 0))} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,293 INFO L290 TraceCheckUtils]: 17: Hoare triple {838#(not (= main_~p1~0 0))} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,294 INFO L290 TraceCheckUtils]: 18: Hoare triple {838#(not (= main_~p1~0 0))} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,294 INFO L290 TraceCheckUtils]: 19: Hoare triple {838#(not (= main_~p1~0 0))} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {838#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:01:25,295 INFO L290 TraceCheckUtils]: 20: Hoare triple {838#(not (= main_~p1~0 0))} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {834#false} is VALID [2022-04-28 02:01:25,295 INFO L290 TraceCheckUtils]: 21: Hoare triple {834#false} [278] L128-1-->L134: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {834#false} is VALID [2022-04-28 02:01:25,295 INFO L290 TraceCheckUtils]: 22: Hoare triple {834#false} [282] L134-->L184-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {834#false} is VALID [2022-04-28 02:01:25,295 INFO L290 TraceCheckUtils]: 23: Hoare triple {834#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {834#false} is VALID [2022-04-28 02:01:25,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:25,296 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:25,296 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1653897739] [2022-04-28 02:01:25,296 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1653897739] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:25,296 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:25,296 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:25,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [552849894] [2022-04-28 02:01:25,297 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:25,297 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-28 02:01:25,298 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:25,298 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,314 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:25,314 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:25,314 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:25,314 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:25,315 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:25,315 INFO L87 Difference]: Start difference. First operand 83 states and 150 transitions. Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:25,518 INFO L93 Difference]: Finished difference Result 127 states and 226 transitions. [2022-04-28 02:01:25,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:25,519 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-28 02:01:25,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:25,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 223 transitions. [2022-04-28 02:01:25,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 223 transitions. [2022-04-28 02:01:25,525 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 223 transitions. [2022-04-28 02:01:25,716 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 223 edges. 223 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:25,719 INFO L225 Difference]: With dead ends: 127 [2022-04-28 02:01:25,719 INFO L226 Difference]: Without dead ends: 88 [2022-04-28 02:01:25,724 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:25,728 INFO L413 NwaCegarLoop]: 126 mSDtfsCounter, 157 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:25,729 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [157 Valid, 133 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:25,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2022-04-28 02:01:25,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 86. [2022-04-28 02:01:25,738 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:25,739 INFO L82 GeneralOperation]: Start isEquivalent. First operand 88 states. Second operand has 86 states, 82 states have (on average 1.8170731707317074) internal successors, (149), 82 states have internal predecessors, (149), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,739 INFO L74 IsIncluded]: Start isIncluded. First operand 88 states. Second operand has 86 states, 82 states have (on average 1.8170731707317074) internal successors, (149), 82 states have internal predecessors, (149), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,739 INFO L87 Difference]: Start difference. First operand 88 states. Second operand has 86 states, 82 states have (on average 1.8170731707317074) internal successors, (149), 82 states have internal predecessors, (149), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:25,742 INFO L93 Difference]: Finished difference Result 88 states and 153 transitions. [2022-04-28 02:01:25,743 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 153 transitions. [2022-04-28 02:01:25,751 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:25,751 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:25,752 INFO L74 IsIncluded]: Start isIncluded. First operand has 86 states, 82 states have (on average 1.8170731707317074) internal successors, (149), 82 states have internal predecessors, (149), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 88 states. [2022-04-28 02:01:25,752 INFO L87 Difference]: Start difference. First operand has 86 states, 82 states have (on average 1.8170731707317074) internal successors, (149), 82 states have internal predecessors, (149), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 88 states. [2022-04-28 02:01:25,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:25,760 INFO L93 Difference]: Finished difference Result 88 states and 153 transitions. [2022-04-28 02:01:25,760 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 153 transitions. [2022-04-28 02:01:25,760 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:25,760 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:25,760 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:25,761 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:25,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 82 states have (on average 1.8170731707317074) internal successors, (149), 82 states have internal predecessors, (149), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 152 transitions. [2022-04-28 02:01:25,764 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 152 transitions. Word has length 24 [2022-04-28 02:01:25,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:25,764 INFO L495 AbstractCegarLoop]: Abstraction has 86 states and 152 transitions. [2022-04-28 02:01:25,764 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,765 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 152 transitions. [2022-04-28 02:01:25,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-28 02:01:25,765 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:25,765 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:25,765 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-28 02:01:25,766 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:25,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:25,766 INFO L85 PathProgramCache]: Analyzing trace with hash -1219623257, now seen corresponding path program 1 times [2022-04-28 02:01:25,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:25,766 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [847194512] [2022-04-28 02:01:25,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:25,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:25,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:25,845 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:25,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:25,850 INFO L290 TraceCheckUtils]: 0: Hoare triple {1259#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1253#true} is VALID [2022-04-28 02:01:25,850 INFO L290 TraceCheckUtils]: 1: Hoare triple {1253#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1253#true} is VALID [2022-04-28 02:01:25,851 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1253#true} {1253#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1253#true} is VALID [2022-04-28 02:01:25,851 INFO L272 TraceCheckUtils]: 0: Hoare triple {1253#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1259#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:25,852 INFO L290 TraceCheckUtils]: 1: Hoare triple {1259#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1253#true} is VALID [2022-04-28 02:01:25,852 INFO L290 TraceCheckUtils]: 2: Hoare triple {1253#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1253#true} is VALID [2022-04-28 02:01:25,852 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1253#true} {1253#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1253#true} is VALID [2022-04-28 02:01:25,852 INFO L272 TraceCheckUtils]: 4: Hoare triple {1253#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1253#true} is VALID [2022-04-28 02:01:25,853 INFO L290 TraceCheckUtils]: 5: Hoare triple {1253#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1253#true} is VALID [2022-04-28 02:01:25,853 INFO L290 TraceCheckUtils]: 6: Hoare triple {1253#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {1253#true} is VALID [2022-04-28 02:01:25,853 INFO L290 TraceCheckUtils]: 7: Hoare triple {1253#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {1253#true} is VALID [2022-04-28 02:01:25,853 INFO L290 TraceCheckUtils]: 8: Hoare triple {1253#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1253#true} is VALID [2022-04-28 02:01:25,854 INFO L290 TraceCheckUtils]: 9: Hoare triple {1253#true} [252] L78-2-->L82-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,854 INFO L290 TraceCheckUtils]: 10: Hoare triple {1258#(= main_~lk2~0 1)} [254] L82-1-->L86-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,855 INFO L290 TraceCheckUtils]: 11: Hoare triple {1258#(= main_~lk2~0 1)} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,855 INFO L290 TraceCheckUtils]: 12: Hoare triple {1258#(= main_~lk2~0 1)} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,855 INFO L290 TraceCheckUtils]: 13: Hoare triple {1258#(= main_~lk2~0 1)} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,856 INFO L290 TraceCheckUtils]: 14: Hoare triple {1258#(= main_~lk2~0 1)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,856 INFO L290 TraceCheckUtils]: 15: Hoare triple {1258#(= main_~lk2~0 1)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,857 INFO L290 TraceCheckUtils]: 16: Hoare triple {1258#(= main_~lk2~0 1)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,857 INFO L290 TraceCheckUtils]: 17: Hoare triple {1258#(= main_~lk2~0 1)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,857 INFO L290 TraceCheckUtils]: 18: Hoare triple {1258#(= main_~lk2~0 1)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,858 INFO L290 TraceCheckUtils]: 19: Hoare triple {1258#(= main_~lk2~0 1)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,858 INFO L290 TraceCheckUtils]: 20: Hoare triple {1258#(= main_~lk2~0 1)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,859 INFO L290 TraceCheckUtils]: 21: Hoare triple {1258#(= main_~lk2~0 1)} [278] L128-1-->L134: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1258#(= main_~lk2~0 1)} is VALID [2022-04-28 02:01:25,859 INFO L290 TraceCheckUtils]: 22: Hoare triple {1258#(= main_~lk2~0 1)} [282] L134-->L184-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1254#false} is VALID [2022-04-28 02:01:25,859 INFO L290 TraceCheckUtils]: 23: Hoare triple {1254#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1254#false} is VALID [2022-04-28 02:01:25,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:25,860 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:25,860 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [847194512] [2022-04-28 02:01:25,860 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [847194512] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:25,861 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:25,861 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:25,861 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [106739778] [2022-04-28 02:01:25,861 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:25,861 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-28 02:01:25,862 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:25,862 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:25,877 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:25,877 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:25,878 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:25,879 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:25,879 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:25,879 INFO L87 Difference]: Start difference. First operand 86 states and 152 transitions. Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:26,102 INFO L93 Difference]: Finished difference Result 161 states and 289 transitions. [2022-04-28 02:01:26,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:26,102 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-28 02:01:26,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:26,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 151 transitions. [2022-04-28 02:01:26,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 151 transitions. [2022-04-28 02:01:26,107 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 151 transitions. [2022-04-28 02:01:26,232 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 151 edges. 151 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:26,235 INFO L225 Difference]: With dead ends: 161 [2022-04-28 02:01:26,235 INFO L226 Difference]: Without dead ends: 159 [2022-04-28 02:01:26,236 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:26,237 INFO L413 NwaCegarLoop]: 82 mSDtfsCounter, 195 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 195 SdHoareTripleChecker+Valid, 89 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:26,237 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [195 Valid, 89 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 77 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:26,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2022-04-28 02:01:26,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 113. [2022-04-28 02:01:26,244 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:26,244 INFO L82 GeneralOperation]: Start isEquivalent. First operand 159 states. Second operand has 113 states, 109 states have (on average 1.81651376146789) internal successors, (198), 109 states have internal predecessors, (198), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,245 INFO L74 IsIncluded]: Start isIncluded. First operand 159 states. Second operand has 113 states, 109 states have (on average 1.81651376146789) internal successors, (198), 109 states have internal predecessors, (198), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,245 INFO L87 Difference]: Start difference. First operand 159 states. Second operand has 113 states, 109 states have (on average 1.81651376146789) internal successors, (198), 109 states have internal predecessors, (198), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:26,250 INFO L93 Difference]: Finished difference Result 159 states and 286 transitions. [2022-04-28 02:01:26,251 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 286 transitions. [2022-04-28 02:01:26,251 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:26,251 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:26,251 INFO L74 IsIncluded]: Start isIncluded. First operand has 113 states, 109 states have (on average 1.81651376146789) internal successors, (198), 109 states have internal predecessors, (198), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 159 states. [2022-04-28 02:01:26,252 INFO L87 Difference]: Start difference. First operand has 113 states, 109 states have (on average 1.81651376146789) internal successors, (198), 109 states have internal predecessors, (198), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 159 states. [2022-04-28 02:01:26,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:26,257 INFO L93 Difference]: Finished difference Result 159 states and 286 transitions. [2022-04-28 02:01:26,257 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 286 transitions. [2022-04-28 02:01:26,258 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:26,258 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:26,258 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:26,258 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:26,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 113 states, 109 states have (on average 1.81651376146789) internal successors, (198), 109 states have internal predecessors, (198), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 201 transitions. [2022-04-28 02:01:26,262 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 201 transitions. Word has length 24 [2022-04-28 02:01:26,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:26,262 INFO L495 AbstractCegarLoop]: Abstraction has 113 states and 201 transitions. [2022-04-28 02:01:26,263 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,263 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 201 transitions. [2022-04-28 02:01:26,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-28 02:01:26,263 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:26,263 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:26,263 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-28 02:01:26,264 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:26,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:26,264 INFO L85 PathProgramCache]: Analyzing trace with hash 287928552, now seen corresponding path program 1 times [2022-04-28 02:01:26,264 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:26,264 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356013431] [2022-04-28 02:01:26,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:26,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:26,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:26,308 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:26,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:26,313 INFO L290 TraceCheckUtils]: 0: Hoare triple {1883#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1877#true} is VALID [2022-04-28 02:01:26,313 INFO L290 TraceCheckUtils]: 1: Hoare triple {1877#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1877#true} is VALID [2022-04-28 02:01:26,314 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1877#true} {1877#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1877#true} is VALID [2022-04-28 02:01:26,314 INFO L272 TraceCheckUtils]: 0: Hoare triple {1877#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1883#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:26,314 INFO L290 TraceCheckUtils]: 1: Hoare triple {1883#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1877#true} is VALID [2022-04-28 02:01:26,315 INFO L290 TraceCheckUtils]: 2: Hoare triple {1877#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1877#true} is VALID [2022-04-28 02:01:26,315 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1877#true} {1877#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1877#true} is VALID [2022-04-28 02:01:26,315 INFO L272 TraceCheckUtils]: 4: Hoare triple {1877#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1877#true} is VALID [2022-04-28 02:01:26,315 INFO L290 TraceCheckUtils]: 5: Hoare triple {1877#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1877#true} is VALID [2022-04-28 02:01:26,316 INFO L290 TraceCheckUtils]: 6: Hoare triple {1877#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {1877#true} is VALID [2022-04-28 02:01:26,316 INFO L290 TraceCheckUtils]: 7: Hoare triple {1877#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {1877#true} is VALID [2022-04-28 02:01:26,316 INFO L290 TraceCheckUtils]: 8: Hoare triple {1877#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1877#true} is VALID [2022-04-28 02:01:26,316 INFO L290 TraceCheckUtils]: 9: Hoare triple {1877#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,317 INFO L290 TraceCheckUtils]: 10: Hoare triple {1882#(= main_~p2~0 0)} [254] L82-1-->L86-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,317 INFO L290 TraceCheckUtils]: 11: Hoare triple {1882#(= main_~p2~0 0)} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,318 INFO L290 TraceCheckUtils]: 12: Hoare triple {1882#(= main_~p2~0 0)} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,318 INFO L290 TraceCheckUtils]: 13: Hoare triple {1882#(= main_~p2~0 0)} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,319 INFO L290 TraceCheckUtils]: 14: Hoare triple {1882#(= main_~p2~0 0)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,319 INFO L290 TraceCheckUtils]: 15: Hoare triple {1882#(= main_~p2~0 0)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,319 INFO L290 TraceCheckUtils]: 16: Hoare triple {1882#(= main_~p2~0 0)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,320 INFO L290 TraceCheckUtils]: 17: Hoare triple {1882#(= main_~p2~0 0)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,320 INFO L290 TraceCheckUtils]: 18: Hoare triple {1882#(= main_~p2~0 0)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,321 INFO L290 TraceCheckUtils]: 19: Hoare triple {1882#(= main_~p2~0 0)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,321 INFO L290 TraceCheckUtils]: 20: Hoare triple {1882#(= main_~p2~0 0)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1882#(= main_~p2~0 0)} is VALID [2022-04-28 02:01:26,321 INFO L290 TraceCheckUtils]: 21: Hoare triple {1882#(= main_~p2~0 0)} [278] L128-1-->L134: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1878#false} is VALID [2022-04-28 02:01:26,322 INFO L290 TraceCheckUtils]: 22: Hoare triple {1878#false} [282] L134-->L184-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1878#false} is VALID [2022-04-28 02:01:26,322 INFO L290 TraceCheckUtils]: 23: Hoare triple {1878#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1878#false} is VALID [2022-04-28 02:01:26,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:26,322 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:26,322 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356013431] [2022-04-28 02:01:26,323 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1356013431] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:26,323 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:26,323 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:26,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1923229998] [2022-04-28 02:01:26,323 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:26,324 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-28 02:01:26,324 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:26,324 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,341 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:26,341 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:26,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:26,342 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:26,342 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:26,342 INFO L87 Difference]: Start difference. First operand 113 states and 201 transitions. Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:26,564 INFO L93 Difference]: Finished difference Result 265 states and 479 transitions. [2022-04-28 02:01:26,564 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:26,564 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-28 02:01:26,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:26,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 225 transitions. [2022-04-28 02:01:26,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 225 transitions. [2022-04-28 02:01:26,571 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 225 transitions. [2022-04-28 02:01:26,770 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 225 edges. 225 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:26,773 INFO L225 Difference]: With dead ends: 265 [2022-04-28 02:01:26,773 INFO L226 Difference]: Without dead ends: 161 [2022-04-28 02:01:26,774 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:26,775 INFO L413 NwaCegarLoop]: 106 mSDtfsCounter, 172 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 172 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:26,775 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [172 Valid, 113 Invalid, 78 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:26,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2022-04-28 02:01:26,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 159. [2022-04-28 02:01:26,782 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:26,782 INFO L82 GeneralOperation]: Start isEquivalent. First operand 161 states. Second operand has 159 states, 155 states have (on average 1.8064516129032258) internal successors, (280), 155 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,783 INFO L74 IsIncluded]: Start isIncluded. First operand 161 states. Second operand has 159 states, 155 states have (on average 1.8064516129032258) internal successors, (280), 155 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,783 INFO L87 Difference]: Start difference. First operand 161 states. Second operand has 159 states, 155 states have (on average 1.8064516129032258) internal successors, (280), 155 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:26,788 INFO L93 Difference]: Finished difference Result 161 states and 284 transitions. [2022-04-28 02:01:26,788 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 284 transitions. [2022-04-28 02:01:26,788 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:26,788 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:26,789 INFO L74 IsIncluded]: Start isIncluded. First operand has 159 states, 155 states have (on average 1.8064516129032258) internal successors, (280), 155 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 161 states. [2022-04-28 02:01:26,790 INFO L87 Difference]: Start difference. First operand has 159 states, 155 states have (on average 1.8064516129032258) internal successors, (280), 155 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 161 states. [2022-04-28 02:01:26,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:26,794 INFO L93 Difference]: Finished difference Result 161 states and 284 transitions. [2022-04-28 02:01:26,794 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 284 transitions. [2022-04-28 02:01:26,794 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:26,795 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:26,795 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:26,795 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:26,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 159 states, 155 states have (on average 1.8064516129032258) internal successors, (280), 155 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 283 transitions. [2022-04-28 02:01:26,799 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 283 transitions. Word has length 24 [2022-04-28 02:01:26,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:26,800 INFO L495 AbstractCegarLoop]: Abstraction has 159 states and 283 transitions. [2022-04-28 02:01:26,800 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,800 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 283 transitions. [2022-04-28 02:01:26,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-28 02:01:26,801 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:26,801 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:26,801 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-28 02:01:26,801 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:26,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:26,801 INFO L85 PathProgramCache]: Analyzing trace with hash 846416876, now seen corresponding path program 1 times [2022-04-28 02:01:26,802 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:26,802 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434993485] [2022-04-28 02:01:26,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:26,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:26,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:26,840 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:26,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:26,844 INFO L290 TraceCheckUtils]: 0: Hoare triple {2665#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2659#true} is VALID [2022-04-28 02:01:26,845 INFO L290 TraceCheckUtils]: 1: Hoare triple {2659#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2659#true} is VALID [2022-04-28 02:01:26,845 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2659#true} {2659#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2659#true} is VALID [2022-04-28 02:01:26,845 INFO L272 TraceCheckUtils]: 0: Hoare triple {2659#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2665#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:26,846 INFO L290 TraceCheckUtils]: 1: Hoare triple {2665#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2659#true} is VALID [2022-04-28 02:01:26,846 INFO L290 TraceCheckUtils]: 2: Hoare triple {2659#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2659#true} is VALID [2022-04-28 02:01:26,846 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2659#true} {2659#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2659#true} is VALID [2022-04-28 02:01:26,846 INFO L272 TraceCheckUtils]: 4: Hoare triple {2659#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2659#true} is VALID [2022-04-28 02:01:26,846 INFO L290 TraceCheckUtils]: 5: Hoare triple {2659#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {2659#true} is VALID [2022-04-28 02:01:26,847 INFO L290 TraceCheckUtils]: 6: Hoare triple {2659#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {2659#true} is VALID [2022-04-28 02:01:26,847 INFO L290 TraceCheckUtils]: 7: Hoare triple {2659#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {2659#true} is VALID [2022-04-28 02:01:26,847 INFO L290 TraceCheckUtils]: 8: Hoare triple {2659#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {2659#true} is VALID [2022-04-28 02:01:26,847 INFO L290 TraceCheckUtils]: 9: Hoare triple {2659#true} [252] L78-2-->L82-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,848 INFO L290 TraceCheckUtils]: 10: Hoare triple {2664#(not (= main_~p2~0 0))} [254] L82-1-->L86-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,848 INFO L290 TraceCheckUtils]: 11: Hoare triple {2664#(not (= main_~p2~0 0))} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,849 INFO L290 TraceCheckUtils]: 12: Hoare triple {2664#(not (= main_~p2~0 0))} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,849 INFO L290 TraceCheckUtils]: 13: Hoare triple {2664#(not (= main_~p2~0 0))} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,849 INFO L290 TraceCheckUtils]: 14: Hoare triple {2664#(not (= main_~p2~0 0))} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,850 INFO L290 TraceCheckUtils]: 15: Hoare triple {2664#(not (= main_~p2~0 0))} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,850 INFO L290 TraceCheckUtils]: 16: Hoare triple {2664#(not (= main_~p2~0 0))} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,850 INFO L290 TraceCheckUtils]: 17: Hoare triple {2664#(not (= main_~p2~0 0))} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,851 INFO L290 TraceCheckUtils]: 18: Hoare triple {2664#(not (= main_~p2~0 0))} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,851 INFO L290 TraceCheckUtils]: 19: Hoare triple {2664#(not (= main_~p2~0 0))} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,852 INFO L290 TraceCheckUtils]: 20: Hoare triple {2664#(not (= main_~p2~0 0))} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {2664#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:01:26,852 INFO L290 TraceCheckUtils]: 21: Hoare triple {2664#(not (= main_~p2~0 0))} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {2660#false} is VALID [2022-04-28 02:01:26,852 INFO L290 TraceCheckUtils]: 22: Hoare triple {2660#false} [284] L133-1-->L139: Formula: (not (= v_main_~p3~0_4 0)) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {2660#false} is VALID [2022-04-28 02:01:26,852 INFO L290 TraceCheckUtils]: 23: Hoare triple {2660#false} [286] L139-->L184-1: Formula: (not (= v_main_~lk3~0_4 1)) InVars {main_~lk3~0=v_main_~lk3~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4} AuxVars[] AssignedVars[] {2660#false} is VALID [2022-04-28 02:01:26,853 INFO L290 TraceCheckUtils]: 24: Hoare triple {2660#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2660#false} is VALID [2022-04-28 02:01:26,853 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:26,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:26,853 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434993485] [2022-04-28 02:01:26,853 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1434993485] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:26,853 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:26,853 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:26,854 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [840030697] [2022-04-28 02:01:26,854 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:26,854 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-28 02:01:26,854 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:26,855 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:26,870 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:26,870 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:26,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:26,871 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:26,871 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:26,871 INFO L87 Difference]: Start difference. First operand 159 states and 283 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:27,073 INFO L93 Difference]: Finished difference Result 238 states and 422 transitions. [2022-04-28 02:01:27,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:27,074 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-28 02:01:27,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:27,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 220 transitions. [2022-04-28 02:01:27,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 220 transitions. [2022-04-28 02:01:27,079 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 220 transitions. [2022-04-28 02:01:27,264 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 220 edges. 220 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:27,266 INFO L225 Difference]: With dead ends: 238 [2022-04-28 02:01:27,267 INFO L226 Difference]: Without dead ends: 163 [2022-04-28 02:01:27,267 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:27,268 INFO L413 NwaCegarLoop]: 123 mSDtfsCounter, 156 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 156 SdHoareTripleChecker+Valid, 130 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:27,268 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [156 Valid, 130 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:27,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2022-04-28 02:01:27,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 161. [2022-04-28 02:01:27,274 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:27,275 INFO L82 GeneralOperation]: Start isEquivalent. First operand 163 states. Second operand has 161 states, 157 states have (on average 1.78343949044586) internal successors, (280), 157 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,275 INFO L74 IsIncluded]: Start isIncluded. First operand 163 states. Second operand has 161 states, 157 states have (on average 1.78343949044586) internal successors, (280), 157 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,276 INFO L87 Difference]: Start difference. First operand 163 states. Second operand has 161 states, 157 states have (on average 1.78343949044586) internal successors, (280), 157 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:27,280 INFO L93 Difference]: Finished difference Result 163 states and 284 transitions. [2022-04-28 02:01:27,280 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 284 transitions. [2022-04-28 02:01:27,280 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:27,280 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:27,281 INFO L74 IsIncluded]: Start isIncluded. First operand has 161 states, 157 states have (on average 1.78343949044586) internal successors, (280), 157 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 163 states. [2022-04-28 02:01:27,281 INFO L87 Difference]: Start difference. First operand has 161 states, 157 states have (on average 1.78343949044586) internal successors, (280), 157 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 163 states. [2022-04-28 02:01:27,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:27,286 INFO L93 Difference]: Finished difference Result 163 states and 284 transitions. [2022-04-28 02:01:27,286 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 284 transitions. [2022-04-28 02:01:27,286 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:27,286 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:27,287 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:27,287 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:27,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 161 states, 157 states have (on average 1.78343949044586) internal successors, (280), 157 states have internal predecessors, (280), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 283 transitions. [2022-04-28 02:01:27,292 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 283 transitions. Word has length 25 [2022-04-28 02:01:27,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:27,292 INFO L495 AbstractCegarLoop]: Abstraction has 161 states and 283 transitions. [2022-04-28 02:01:27,292 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,292 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 283 transitions. [2022-04-28 02:01:27,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-28 02:01:27,293 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:27,293 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:27,293 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-04-28 02:01:27,293 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:27,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:27,294 INFO L85 PathProgramCache]: Analyzing trace with hash 335882699, now seen corresponding path program 1 times [2022-04-28 02:01:27,294 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:27,294 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321418785] [2022-04-28 02:01:27,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:27,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:27,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:27,368 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:27,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:27,373 INFO L290 TraceCheckUtils]: 0: Hoare triple {3426#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3420#true} is VALID [2022-04-28 02:01:27,373 INFO L290 TraceCheckUtils]: 1: Hoare triple {3420#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3420#true} is VALID [2022-04-28 02:01:27,373 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3420#true} {3420#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3420#true} is VALID [2022-04-28 02:01:27,373 INFO L272 TraceCheckUtils]: 0: Hoare triple {3420#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3426#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:27,374 INFO L290 TraceCheckUtils]: 1: Hoare triple {3426#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3420#true} is VALID [2022-04-28 02:01:27,374 INFO L290 TraceCheckUtils]: 2: Hoare triple {3420#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3420#true} is VALID [2022-04-28 02:01:27,374 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3420#true} {3420#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3420#true} is VALID [2022-04-28 02:01:27,374 INFO L272 TraceCheckUtils]: 4: Hoare triple {3420#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3420#true} is VALID [2022-04-28 02:01:27,374 INFO L290 TraceCheckUtils]: 5: Hoare triple {3420#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {3420#true} is VALID [2022-04-28 02:01:27,375 INFO L290 TraceCheckUtils]: 6: Hoare triple {3420#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {3420#true} is VALID [2022-04-28 02:01:27,375 INFO L290 TraceCheckUtils]: 7: Hoare triple {3420#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {3420#true} is VALID [2022-04-28 02:01:27,375 INFO L290 TraceCheckUtils]: 8: Hoare triple {3420#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {3420#true} is VALID [2022-04-28 02:01:27,375 INFO L290 TraceCheckUtils]: 9: Hoare triple {3420#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {3420#true} is VALID [2022-04-28 02:01:27,375 INFO L290 TraceCheckUtils]: 10: Hoare triple {3420#true} [254] L82-1-->L86-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,382 INFO L290 TraceCheckUtils]: 11: Hoare triple {3425#(= main_~lk3~0 1)} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,382 INFO L290 TraceCheckUtils]: 12: Hoare triple {3425#(= main_~lk3~0 1)} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,382 INFO L290 TraceCheckUtils]: 13: Hoare triple {3425#(= main_~lk3~0 1)} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,383 INFO L290 TraceCheckUtils]: 14: Hoare triple {3425#(= main_~lk3~0 1)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,383 INFO L290 TraceCheckUtils]: 15: Hoare triple {3425#(= main_~lk3~0 1)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,383 INFO L290 TraceCheckUtils]: 16: Hoare triple {3425#(= main_~lk3~0 1)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,384 INFO L290 TraceCheckUtils]: 17: Hoare triple {3425#(= main_~lk3~0 1)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,384 INFO L290 TraceCheckUtils]: 18: Hoare triple {3425#(= main_~lk3~0 1)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,384 INFO L290 TraceCheckUtils]: 19: Hoare triple {3425#(= main_~lk3~0 1)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,385 INFO L290 TraceCheckUtils]: 20: Hoare triple {3425#(= main_~lk3~0 1)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,385 INFO L290 TraceCheckUtils]: 21: Hoare triple {3425#(= main_~lk3~0 1)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,392 INFO L290 TraceCheckUtils]: 22: Hoare triple {3425#(= main_~lk3~0 1)} [284] L133-1-->L139: Formula: (not (= v_main_~p3~0_4 0)) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {3425#(= main_~lk3~0 1)} is VALID [2022-04-28 02:01:27,392 INFO L290 TraceCheckUtils]: 23: Hoare triple {3425#(= main_~lk3~0 1)} [286] L139-->L184-1: Formula: (not (= v_main_~lk3~0_4 1)) InVars {main_~lk3~0=v_main_~lk3~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4} AuxVars[] AssignedVars[] {3421#false} is VALID [2022-04-28 02:01:27,392 INFO L290 TraceCheckUtils]: 24: Hoare triple {3421#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3421#false} is VALID [2022-04-28 02:01:27,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:27,393 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:27,393 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1321418785] [2022-04-28 02:01:27,393 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1321418785] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:27,393 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:27,393 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:27,393 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005117055] [2022-04-28 02:01:27,393 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:27,394 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-28 02:01:27,394 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:27,394 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,413 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:27,414 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:27,414 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:27,414 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:27,414 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:27,414 INFO L87 Difference]: Start difference. First operand 161 states and 283 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:27,617 INFO L93 Difference]: Finished difference Result 301 states and 537 transitions. [2022-04-28 02:01:27,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:27,617 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-28 02:01:27,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:27,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 147 transitions. [2022-04-28 02:01:27,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 147 transitions. [2022-04-28 02:01:27,621 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 147 transitions. [2022-04-28 02:01:27,733 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 147 edges. 147 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:27,739 INFO L225 Difference]: With dead ends: 301 [2022-04-28 02:01:27,739 INFO L226 Difference]: Without dead ends: 299 [2022-04-28 02:01:27,740 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:27,740 INFO L413 NwaCegarLoop]: 81 mSDtfsCounter, 188 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 188 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:27,741 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [188 Valid, 88 Invalid, 78 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:27,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299 states. [2022-04-28 02:01:27,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299 to 217. [2022-04-28 02:01:27,748 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:27,749 INFO L82 GeneralOperation]: Start isEquivalent. First operand 299 states. Second operand has 217 states, 213 states have (on average 1.7652582159624413) internal successors, (376), 213 states have internal predecessors, (376), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,749 INFO L74 IsIncluded]: Start isIncluded. First operand 299 states. Second operand has 217 states, 213 states have (on average 1.7652582159624413) internal successors, (376), 213 states have internal predecessors, (376), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,750 INFO L87 Difference]: Start difference. First operand 299 states. Second operand has 217 states, 213 states have (on average 1.7652582159624413) internal successors, (376), 213 states have internal predecessors, (376), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:27,773 INFO L93 Difference]: Finished difference Result 299 states and 532 transitions. [2022-04-28 02:01:27,773 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 532 transitions. [2022-04-28 02:01:27,774 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:27,774 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:27,775 INFO L74 IsIncluded]: Start isIncluded. First operand has 217 states, 213 states have (on average 1.7652582159624413) internal successors, (376), 213 states have internal predecessors, (376), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 299 states. [2022-04-28 02:01:27,776 INFO L87 Difference]: Start difference. First operand has 217 states, 213 states have (on average 1.7652582159624413) internal successors, (376), 213 states have internal predecessors, (376), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 299 states. [2022-04-28 02:01:27,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:27,783 INFO L93 Difference]: Finished difference Result 299 states and 532 transitions. [2022-04-28 02:01:27,783 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 532 transitions. [2022-04-28 02:01:27,784 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:27,784 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:27,784 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:27,784 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:27,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 217 states, 213 states have (on average 1.7652582159624413) internal successors, (376), 213 states have internal predecessors, (376), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 379 transitions. [2022-04-28 02:01:27,789 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 379 transitions. Word has length 25 [2022-04-28 02:01:27,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:27,789 INFO L495 AbstractCegarLoop]: Abstraction has 217 states and 379 transitions. [2022-04-28 02:01:27,789 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,790 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 379 transitions. [2022-04-28 02:01:27,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-28 02:01:27,790 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:27,790 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:27,790 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-04-28 02:01:27,791 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:27,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:27,791 INFO L85 PathProgramCache]: Analyzing trace with hash 1843434508, now seen corresponding path program 1 times [2022-04-28 02:01:27,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:27,791 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [755391301] [2022-04-28 02:01:27,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:27,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:27,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:27,826 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:27,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:27,831 INFO L290 TraceCheckUtils]: 0: Hoare triple {4580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4574#true} is VALID [2022-04-28 02:01:27,831 INFO L290 TraceCheckUtils]: 1: Hoare triple {4574#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4574#true} is VALID [2022-04-28 02:01:27,832 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4574#true} {4574#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4574#true} is VALID [2022-04-28 02:01:27,832 INFO L272 TraceCheckUtils]: 0: Hoare triple {4574#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:27,832 INFO L290 TraceCheckUtils]: 1: Hoare triple {4580#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4574#true} is VALID [2022-04-28 02:01:27,832 INFO L290 TraceCheckUtils]: 2: Hoare triple {4574#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4574#true} is VALID [2022-04-28 02:01:27,833 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4574#true} {4574#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4574#true} is VALID [2022-04-28 02:01:27,833 INFO L272 TraceCheckUtils]: 4: Hoare triple {4574#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4574#true} is VALID [2022-04-28 02:01:27,833 INFO L290 TraceCheckUtils]: 5: Hoare triple {4574#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {4574#true} is VALID [2022-04-28 02:01:27,833 INFO L290 TraceCheckUtils]: 6: Hoare triple {4574#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {4574#true} is VALID [2022-04-28 02:01:27,833 INFO L290 TraceCheckUtils]: 7: Hoare triple {4574#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {4574#true} is VALID [2022-04-28 02:01:27,834 INFO L290 TraceCheckUtils]: 8: Hoare triple {4574#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {4574#true} is VALID [2022-04-28 02:01:27,834 INFO L290 TraceCheckUtils]: 9: Hoare triple {4574#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {4574#true} is VALID [2022-04-28 02:01:27,834 INFO L290 TraceCheckUtils]: 10: Hoare triple {4574#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,835 INFO L290 TraceCheckUtils]: 11: Hoare triple {4579#(= main_~p3~0 0)} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,835 INFO L290 TraceCheckUtils]: 12: Hoare triple {4579#(= main_~p3~0 0)} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,835 INFO L290 TraceCheckUtils]: 13: Hoare triple {4579#(= main_~p3~0 0)} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,836 INFO L290 TraceCheckUtils]: 14: Hoare triple {4579#(= main_~p3~0 0)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,836 INFO L290 TraceCheckUtils]: 15: Hoare triple {4579#(= main_~p3~0 0)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,836 INFO L290 TraceCheckUtils]: 16: Hoare triple {4579#(= main_~p3~0 0)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,837 INFO L290 TraceCheckUtils]: 17: Hoare triple {4579#(= main_~p3~0 0)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,837 INFO L290 TraceCheckUtils]: 18: Hoare triple {4579#(= main_~p3~0 0)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,838 INFO L290 TraceCheckUtils]: 19: Hoare triple {4579#(= main_~p3~0 0)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,838 INFO L290 TraceCheckUtils]: 20: Hoare triple {4579#(= main_~p3~0 0)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,838 INFO L290 TraceCheckUtils]: 21: Hoare triple {4579#(= main_~p3~0 0)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {4579#(= main_~p3~0 0)} is VALID [2022-04-28 02:01:27,839 INFO L290 TraceCheckUtils]: 22: Hoare triple {4579#(= main_~p3~0 0)} [284] L133-1-->L139: Formula: (not (= v_main_~p3~0_4 0)) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {4575#false} is VALID [2022-04-28 02:01:27,839 INFO L290 TraceCheckUtils]: 23: Hoare triple {4575#false} [286] L139-->L184-1: Formula: (not (= v_main_~lk3~0_4 1)) InVars {main_~lk3~0=v_main_~lk3~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4} AuxVars[] AssignedVars[] {4575#false} is VALID [2022-04-28 02:01:27,839 INFO L290 TraceCheckUtils]: 24: Hoare triple {4575#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4575#false} is VALID [2022-04-28 02:01:27,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:27,840 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:27,840 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [755391301] [2022-04-28 02:01:27,840 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [755391301] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:27,840 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:27,840 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:27,840 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [574745315] [2022-04-28 02:01:27,840 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:27,841 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-28 02:01:27,841 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:27,841 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:27,857 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:27,858 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:27,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:27,858 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:27,858 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:27,858 INFO L87 Difference]: Start difference. First operand 217 states and 379 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:28,090 INFO L93 Difference]: Finished difference Result 513 states and 905 transitions. [2022-04-28 02:01:28,090 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:28,091 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-28 02:01:28,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:28,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 222 transitions. [2022-04-28 02:01:28,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 222 transitions. [2022-04-28 02:01:28,095 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 222 transitions. [2022-04-28 02:01:28,250 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 222 edges. 222 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:28,256 INFO L225 Difference]: With dead ends: 513 [2022-04-28 02:01:28,256 INFO L226 Difference]: Without dead ends: 307 [2022-04-28 02:01:28,257 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:28,258 INFO L413 NwaCegarLoop]: 108 mSDtfsCounter, 166 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 166 SdHoareTripleChecker+Valid, 115 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:28,258 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [166 Valid, 115 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:28,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307 states. [2022-04-28 02:01:28,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307 to 305. [2022-04-28 02:01:28,265 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:28,266 INFO L82 GeneralOperation]: Start isEquivalent. First operand 307 states. Second operand has 305 states, 301 states have (on average 1.7541528239202657) internal successors, (528), 301 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,267 INFO L74 IsIncluded]: Start isIncluded. First operand 307 states. Second operand has 305 states, 301 states have (on average 1.7541528239202657) internal successors, (528), 301 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,267 INFO L87 Difference]: Start difference. First operand 307 states. Second operand has 305 states, 301 states have (on average 1.7541528239202657) internal successors, (528), 301 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:28,274 INFO L93 Difference]: Finished difference Result 307 states and 532 transitions. [2022-04-28 02:01:28,274 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 532 transitions. [2022-04-28 02:01:28,275 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:28,275 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:28,276 INFO L74 IsIncluded]: Start isIncluded. First operand has 305 states, 301 states have (on average 1.7541528239202657) internal successors, (528), 301 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 307 states. [2022-04-28 02:01:28,276 INFO L87 Difference]: Start difference. First operand has 305 states, 301 states have (on average 1.7541528239202657) internal successors, (528), 301 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 307 states. [2022-04-28 02:01:28,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:28,283 INFO L93 Difference]: Finished difference Result 307 states and 532 transitions. [2022-04-28 02:01:28,283 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 532 transitions. [2022-04-28 02:01:28,284 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:28,284 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:28,284 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:28,284 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:28,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 305 states, 301 states have (on average 1.7541528239202657) internal successors, (528), 301 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 531 transitions. [2022-04-28 02:01:28,292 INFO L78 Accepts]: Start accepts. Automaton has 305 states and 531 transitions. Word has length 25 [2022-04-28 02:01:28,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:28,293 INFO L495 AbstractCegarLoop]: Abstraction has 305 states and 531 transitions. [2022-04-28 02:01:28,293 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,293 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 531 transitions. [2022-04-28 02:01:28,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-28 02:01:28,293 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:28,293 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:28,294 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-04-28 02:01:28,294 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:28,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:28,294 INFO L85 PathProgramCache]: Analyzing trace with hash 1822461380, now seen corresponding path program 1 times [2022-04-28 02:01:28,294 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:28,294 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [487870252] [2022-04-28 02:01:28,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:28,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:28,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:28,327 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:28,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:28,332 INFO L290 TraceCheckUtils]: 0: Hoare triple {6058#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6052#true} is VALID [2022-04-28 02:01:28,332 INFO L290 TraceCheckUtils]: 1: Hoare triple {6052#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6052#true} is VALID [2022-04-28 02:01:28,332 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6052#true} {6052#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6052#true} is VALID [2022-04-28 02:01:28,333 INFO L272 TraceCheckUtils]: 0: Hoare triple {6052#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6058#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:28,333 INFO L290 TraceCheckUtils]: 1: Hoare triple {6058#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6052#true} is VALID [2022-04-28 02:01:28,333 INFO L290 TraceCheckUtils]: 2: Hoare triple {6052#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6052#true} is VALID [2022-04-28 02:01:28,333 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6052#true} {6052#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6052#true} is VALID [2022-04-28 02:01:28,333 INFO L272 TraceCheckUtils]: 4: Hoare triple {6052#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6052#true} is VALID [2022-04-28 02:01:28,333 INFO L290 TraceCheckUtils]: 5: Hoare triple {6052#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {6052#true} is VALID [2022-04-28 02:01:28,333 INFO L290 TraceCheckUtils]: 6: Hoare triple {6052#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {6052#true} is VALID [2022-04-28 02:01:28,334 INFO L290 TraceCheckUtils]: 7: Hoare triple {6052#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {6052#true} is VALID [2022-04-28 02:01:28,334 INFO L290 TraceCheckUtils]: 8: Hoare triple {6052#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {6052#true} is VALID [2022-04-28 02:01:28,334 INFO L290 TraceCheckUtils]: 9: Hoare triple {6052#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {6052#true} is VALID [2022-04-28 02:01:28,334 INFO L290 TraceCheckUtils]: 10: Hoare triple {6052#true} [254] L82-1-->L86-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,335 INFO L290 TraceCheckUtils]: 11: Hoare triple {6057#(not (= main_~p3~0 0))} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,335 INFO L290 TraceCheckUtils]: 12: Hoare triple {6057#(not (= main_~p3~0 0))} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,335 INFO L290 TraceCheckUtils]: 13: Hoare triple {6057#(not (= main_~p3~0 0))} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,336 INFO L290 TraceCheckUtils]: 14: Hoare triple {6057#(not (= main_~p3~0 0))} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,336 INFO L290 TraceCheckUtils]: 15: Hoare triple {6057#(not (= main_~p3~0 0))} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,336 INFO L290 TraceCheckUtils]: 16: Hoare triple {6057#(not (= main_~p3~0 0))} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,337 INFO L290 TraceCheckUtils]: 17: Hoare triple {6057#(not (= main_~p3~0 0))} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,337 INFO L290 TraceCheckUtils]: 18: Hoare triple {6057#(not (= main_~p3~0 0))} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,337 INFO L290 TraceCheckUtils]: 19: Hoare triple {6057#(not (= main_~p3~0 0))} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,338 INFO L290 TraceCheckUtils]: 20: Hoare triple {6057#(not (= main_~p3~0 0))} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,338 INFO L290 TraceCheckUtils]: 21: Hoare triple {6057#(not (= main_~p3~0 0))} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {6057#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:01:28,338 INFO L290 TraceCheckUtils]: 22: Hoare triple {6057#(not (= main_~p3~0 0))} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {6053#false} is VALID [2022-04-28 02:01:28,339 INFO L290 TraceCheckUtils]: 23: Hoare triple {6053#false} [288] L138-1-->L144: Formula: (not (= v_main_~p4~0_1 0)) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {6053#false} is VALID [2022-04-28 02:01:28,339 INFO L290 TraceCheckUtils]: 24: Hoare triple {6053#false} [290] L144-->L184-1: Formula: (not (= v_main_~lk4~0_1 1)) InVars {main_~lk4~0=v_main_~lk4~0_1} OutVars{main_~lk4~0=v_main_~lk4~0_1} AuxVars[] AssignedVars[] {6053#false} is VALID [2022-04-28 02:01:28,339 INFO L290 TraceCheckUtils]: 25: Hoare triple {6053#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6053#false} is VALID [2022-04-28 02:01:28,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:28,339 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:28,339 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [487870252] [2022-04-28 02:01:28,339 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [487870252] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:28,340 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:28,340 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:28,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936329911] [2022-04-28 02:01:28,340 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:28,340 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:01:28,340 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:28,340 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,357 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:28,357 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:28,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:28,357 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:28,358 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:28,358 INFO L87 Difference]: Start difference. First operand 305 states and 531 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:28,567 INFO L93 Difference]: Finished difference Result 457 states and 793 transitions. [2022-04-28 02:01:28,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:28,567 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:01:28,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:28,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 217 transitions. [2022-04-28 02:01:28,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 217 transitions. [2022-04-28 02:01:28,572 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 217 transitions. [2022-04-28 02:01:28,731 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 217 edges. 217 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:28,737 INFO L225 Difference]: With dead ends: 457 [2022-04-28 02:01:28,737 INFO L226 Difference]: Without dead ends: 311 [2022-04-28 02:01:28,737 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:28,738 INFO L413 NwaCegarLoop]: 120 mSDtfsCounter, 155 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 73 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 155 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 73 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:28,738 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [155 Valid, 127 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 73 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:28,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311 states. [2022-04-28 02:01:28,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311 to 309. [2022-04-28 02:01:28,745 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:28,746 INFO L82 GeneralOperation]: Start isEquivalent. First operand 311 states. Second operand has 309 states, 305 states have (on average 1.7311475409836066) internal successors, (528), 305 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,746 INFO L74 IsIncluded]: Start isIncluded. First operand 311 states. Second operand has 309 states, 305 states have (on average 1.7311475409836066) internal successors, (528), 305 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,747 INFO L87 Difference]: Start difference. First operand 311 states. Second operand has 309 states, 305 states have (on average 1.7311475409836066) internal successors, (528), 305 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:28,753 INFO L93 Difference]: Finished difference Result 311 states and 532 transitions. [2022-04-28 02:01:28,753 INFO L276 IsEmpty]: Start isEmpty. Operand 311 states and 532 transitions. [2022-04-28 02:01:28,754 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:28,754 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:28,754 INFO L74 IsIncluded]: Start isIncluded. First operand has 309 states, 305 states have (on average 1.7311475409836066) internal successors, (528), 305 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 311 states. [2022-04-28 02:01:28,755 INFO L87 Difference]: Start difference. First operand has 309 states, 305 states have (on average 1.7311475409836066) internal successors, (528), 305 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 311 states. [2022-04-28 02:01:28,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:28,762 INFO L93 Difference]: Finished difference Result 311 states and 532 transitions. [2022-04-28 02:01:28,762 INFO L276 IsEmpty]: Start isEmpty. Operand 311 states and 532 transitions. [2022-04-28 02:01:28,762 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:28,762 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:28,763 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:28,763 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:28,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 309 states, 305 states have (on average 1.7311475409836066) internal successors, (528), 305 states have internal predecessors, (528), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 309 states to 309 states and 531 transitions. [2022-04-28 02:01:28,769 INFO L78 Accepts]: Start accepts. Automaton has 309 states and 531 transitions. Word has length 26 [2022-04-28 02:01:28,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:28,770 INFO L495 AbstractCegarLoop]: Abstraction has 309 states and 531 transitions. [2022-04-28 02:01:28,770 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,770 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 531 transitions. [2022-04-28 02:01:28,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-28 02:01:28,770 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:28,771 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:28,771 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-04-28 02:01:28,771 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:28,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:28,771 INFO L85 PathProgramCache]: Analyzing trace with hash 1311927203, now seen corresponding path program 1 times [2022-04-28 02:01:28,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:28,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546363454] [2022-04-28 02:01:28,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:28,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:28,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:28,804 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:28,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:28,809 INFO L290 TraceCheckUtils]: 0: Hoare triple {7492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7486#true} is VALID [2022-04-28 02:01:28,809 INFO L290 TraceCheckUtils]: 1: Hoare triple {7486#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7486#true} is VALID [2022-04-28 02:01:28,809 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7486#true} {7486#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7486#true} is VALID [2022-04-28 02:01:28,810 INFO L272 TraceCheckUtils]: 0: Hoare triple {7486#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:28,810 INFO L290 TraceCheckUtils]: 1: Hoare triple {7492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7486#true} is VALID [2022-04-28 02:01:28,810 INFO L290 TraceCheckUtils]: 2: Hoare triple {7486#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7486#true} is VALID [2022-04-28 02:01:28,810 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7486#true} {7486#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7486#true} is VALID [2022-04-28 02:01:28,810 INFO L272 TraceCheckUtils]: 4: Hoare triple {7486#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7486#true} is VALID [2022-04-28 02:01:28,810 INFO L290 TraceCheckUtils]: 5: Hoare triple {7486#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {7486#true} is VALID [2022-04-28 02:01:28,811 INFO L290 TraceCheckUtils]: 6: Hoare triple {7486#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {7486#true} is VALID [2022-04-28 02:01:28,811 INFO L290 TraceCheckUtils]: 7: Hoare triple {7486#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {7486#true} is VALID [2022-04-28 02:01:28,811 INFO L290 TraceCheckUtils]: 8: Hoare triple {7486#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {7486#true} is VALID [2022-04-28 02:01:28,811 INFO L290 TraceCheckUtils]: 9: Hoare triple {7486#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {7486#true} is VALID [2022-04-28 02:01:28,811 INFO L290 TraceCheckUtils]: 10: Hoare triple {7486#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {7486#true} is VALID [2022-04-28 02:01:28,811 INFO L290 TraceCheckUtils]: 11: Hoare triple {7486#true} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,812 INFO L290 TraceCheckUtils]: 12: Hoare triple {7491#(= main_~lk4~0 1)} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,812 INFO L290 TraceCheckUtils]: 13: Hoare triple {7491#(= main_~lk4~0 1)} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,813 INFO L290 TraceCheckUtils]: 14: Hoare triple {7491#(= main_~lk4~0 1)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,813 INFO L290 TraceCheckUtils]: 15: Hoare triple {7491#(= main_~lk4~0 1)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,813 INFO L290 TraceCheckUtils]: 16: Hoare triple {7491#(= main_~lk4~0 1)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,814 INFO L290 TraceCheckUtils]: 17: Hoare triple {7491#(= main_~lk4~0 1)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,814 INFO L290 TraceCheckUtils]: 18: Hoare triple {7491#(= main_~lk4~0 1)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,814 INFO L290 TraceCheckUtils]: 19: Hoare triple {7491#(= main_~lk4~0 1)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,815 INFO L290 TraceCheckUtils]: 20: Hoare triple {7491#(= main_~lk4~0 1)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,815 INFO L290 TraceCheckUtils]: 21: Hoare triple {7491#(= main_~lk4~0 1)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,815 INFO L290 TraceCheckUtils]: 22: Hoare triple {7491#(= main_~lk4~0 1)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,816 INFO L290 TraceCheckUtils]: 23: Hoare triple {7491#(= main_~lk4~0 1)} [288] L138-1-->L144: Formula: (not (= v_main_~p4~0_1 0)) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {7491#(= main_~lk4~0 1)} is VALID [2022-04-28 02:01:28,816 INFO L290 TraceCheckUtils]: 24: Hoare triple {7491#(= main_~lk4~0 1)} [290] L144-->L184-1: Formula: (not (= v_main_~lk4~0_1 1)) InVars {main_~lk4~0=v_main_~lk4~0_1} OutVars{main_~lk4~0=v_main_~lk4~0_1} AuxVars[] AssignedVars[] {7487#false} is VALID [2022-04-28 02:01:28,816 INFO L290 TraceCheckUtils]: 25: Hoare triple {7487#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7487#false} is VALID [2022-04-28 02:01:28,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:28,817 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:28,817 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [546363454] [2022-04-28 02:01:28,817 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [546363454] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:28,817 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:28,817 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:28,817 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2145637513] [2022-04-28 02:01:28,817 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:28,818 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:01:28,818 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:28,818 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:28,836 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:28,836 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:28,836 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:28,836 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:28,836 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:28,837 INFO L87 Difference]: Start difference. First operand 309 states and 531 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:29,061 INFO L93 Difference]: Finished difference Result 573 states and 1001 transitions. [2022-04-28 02:01:29,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:29,062 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:01:29,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:29,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 143 transitions. [2022-04-28 02:01:29,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 143 transitions. [2022-04-28 02:01:29,065 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 143 transitions. [2022-04-28 02:01:29,170 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 143 edges. 143 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:29,185 INFO L225 Difference]: With dead ends: 573 [2022-04-28 02:01:29,186 INFO L226 Difference]: Without dead ends: 571 [2022-04-28 02:01:29,186 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:29,188 INFO L413 NwaCegarLoop]: 80 mSDtfsCounter, 181 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 181 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:29,188 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [181 Valid, 87 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:29,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 571 states. [2022-04-28 02:01:29,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 571 to 425. [2022-04-28 02:01:29,199 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:29,200 INFO L82 GeneralOperation]: Start isEquivalent. First operand 571 states. Second operand has 425 states, 421 states have (on average 1.700712589073634) internal successors, (716), 421 states have internal predecessors, (716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,201 INFO L74 IsIncluded]: Start isIncluded. First operand 571 states. Second operand has 425 states, 421 states have (on average 1.700712589073634) internal successors, (716), 421 states have internal predecessors, (716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,202 INFO L87 Difference]: Start difference. First operand 571 states. Second operand has 425 states, 421 states have (on average 1.700712589073634) internal successors, (716), 421 states have internal predecessors, (716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:29,219 INFO L93 Difference]: Finished difference Result 571 states and 992 transitions. [2022-04-28 02:01:29,219 INFO L276 IsEmpty]: Start isEmpty. Operand 571 states and 992 transitions. [2022-04-28 02:01:29,219 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:29,220 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:29,220 INFO L74 IsIncluded]: Start isIncluded. First operand has 425 states, 421 states have (on average 1.700712589073634) internal successors, (716), 421 states have internal predecessors, (716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 571 states. [2022-04-28 02:01:29,221 INFO L87 Difference]: Start difference. First operand has 425 states, 421 states have (on average 1.700712589073634) internal successors, (716), 421 states have internal predecessors, (716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 571 states. [2022-04-28 02:01:29,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:29,238 INFO L93 Difference]: Finished difference Result 571 states and 992 transitions. [2022-04-28 02:01:29,238 INFO L276 IsEmpty]: Start isEmpty. Operand 571 states and 992 transitions. [2022-04-28 02:01:29,239 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:29,240 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:29,240 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:29,240 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:29,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 425 states, 421 states have (on average 1.700712589073634) internal successors, (716), 421 states have internal predecessors, (716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 719 transitions. [2022-04-28 02:01:29,251 INFO L78 Accepts]: Start accepts. Automaton has 425 states and 719 transitions. Word has length 26 [2022-04-28 02:01:29,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:29,251 INFO L495 AbstractCegarLoop]: Abstraction has 425 states and 719 transitions. [2022-04-28 02:01:29,251 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,251 INFO L276 IsEmpty]: Start isEmpty. Operand 425 states and 719 transitions. [2022-04-28 02:01:29,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-28 02:01:29,253 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:29,253 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:29,253 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-28 02:01:29,253 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:29,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:29,254 INFO L85 PathProgramCache]: Analyzing trace with hash -1475488284, now seen corresponding path program 1 times [2022-04-28 02:01:29,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:29,254 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1182465208] [2022-04-28 02:01:29,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:29,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:29,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:29,303 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:29,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:29,308 INFO L290 TraceCheckUtils]: 0: Hoare triple {9682#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9676#true} is VALID [2022-04-28 02:01:29,308 INFO L290 TraceCheckUtils]: 1: Hoare triple {9676#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9676#true} is VALID [2022-04-28 02:01:29,309 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9676#true} {9676#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9676#true} is VALID [2022-04-28 02:01:29,310 INFO L272 TraceCheckUtils]: 0: Hoare triple {9676#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9682#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:29,310 INFO L290 TraceCheckUtils]: 1: Hoare triple {9682#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9676#true} is VALID [2022-04-28 02:01:29,311 INFO L290 TraceCheckUtils]: 2: Hoare triple {9676#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9676#true} is VALID [2022-04-28 02:01:29,311 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9676#true} {9676#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9676#true} is VALID [2022-04-28 02:01:29,311 INFO L272 TraceCheckUtils]: 4: Hoare triple {9676#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9676#true} is VALID [2022-04-28 02:01:29,311 INFO L290 TraceCheckUtils]: 5: Hoare triple {9676#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {9676#true} is VALID [2022-04-28 02:01:29,311 INFO L290 TraceCheckUtils]: 6: Hoare triple {9676#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {9676#true} is VALID [2022-04-28 02:01:29,311 INFO L290 TraceCheckUtils]: 7: Hoare triple {9676#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {9676#true} is VALID [2022-04-28 02:01:29,312 INFO L290 TraceCheckUtils]: 8: Hoare triple {9676#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {9676#true} is VALID [2022-04-28 02:01:29,312 INFO L290 TraceCheckUtils]: 9: Hoare triple {9676#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {9676#true} is VALID [2022-04-28 02:01:29,312 INFO L290 TraceCheckUtils]: 10: Hoare triple {9676#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {9676#true} is VALID [2022-04-28 02:01:29,312 INFO L290 TraceCheckUtils]: 11: Hoare triple {9676#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,312 INFO L290 TraceCheckUtils]: 12: Hoare triple {9681#(= main_~p4~0 0)} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,313 INFO L290 TraceCheckUtils]: 13: Hoare triple {9681#(= main_~p4~0 0)} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,313 INFO L290 TraceCheckUtils]: 14: Hoare triple {9681#(= main_~p4~0 0)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,313 INFO L290 TraceCheckUtils]: 15: Hoare triple {9681#(= main_~p4~0 0)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,314 INFO L290 TraceCheckUtils]: 16: Hoare triple {9681#(= main_~p4~0 0)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,314 INFO L290 TraceCheckUtils]: 17: Hoare triple {9681#(= main_~p4~0 0)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,314 INFO L290 TraceCheckUtils]: 18: Hoare triple {9681#(= main_~p4~0 0)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,315 INFO L290 TraceCheckUtils]: 19: Hoare triple {9681#(= main_~p4~0 0)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,315 INFO L290 TraceCheckUtils]: 20: Hoare triple {9681#(= main_~p4~0 0)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,316 INFO L290 TraceCheckUtils]: 21: Hoare triple {9681#(= main_~p4~0 0)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,316 INFO L290 TraceCheckUtils]: 22: Hoare triple {9681#(= main_~p4~0 0)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {9681#(= main_~p4~0 0)} is VALID [2022-04-28 02:01:29,316 INFO L290 TraceCheckUtils]: 23: Hoare triple {9681#(= main_~p4~0 0)} [288] L138-1-->L144: Formula: (not (= v_main_~p4~0_1 0)) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {9677#false} is VALID [2022-04-28 02:01:29,317 INFO L290 TraceCheckUtils]: 24: Hoare triple {9677#false} [290] L144-->L184-1: Formula: (not (= v_main_~lk4~0_1 1)) InVars {main_~lk4~0=v_main_~lk4~0_1} OutVars{main_~lk4~0=v_main_~lk4~0_1} AuxVars[] AssignedVars[] {9677#false} is VALID [2022-04-28 02:01:29,317 INFO L290 TraceCheckUtils]: 25: Hoare triple {9677#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9677#false} is VALID [2022-04-28 02:01:29,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:29,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:29,317 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1182465208] [2022-04-28 02:01:29,317 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1182465208] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:29,317 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:29,318 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:29,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [684176942] [2022-04-28 02:01:29,318 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:29,318 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:01:29,318 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:29,318 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,334 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:29,334 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:29,334 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:29,335 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:29,335 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:29,335 INFO L87 Difference]: Start difference. First operand 425 states and 719 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:29,569 INFO L93 Difference]: Finished difference Result 1005 states and 1713 transitions. [2022-04-28 02:01:29,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:29,569 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:01:29,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:29,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 219 transitions. [2022-04-28 02:01:29,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 219 transitions. [2022-04-28 02:01:29,572 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 219 transitions. [2022-04-28 02:01:29,718 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 219 edges. 219 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:29,735 INFO L225 Difference]: With dead ends: 1005 [2022-04-28 02:01:29,736 INFO L226 Difference]: Without dead ends: 595 [2022-04-28 02:01:29,737 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:29,737 INFO L413 NwaCegarLoop]: 110 mSDtfsCounter, 160 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 73 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 117 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 73 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:29,737 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [160 Valid, 117 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 73 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:29,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 595 states. [2022-04-28 02:01:29,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 595 to 593. [2022-04-28 02:01:29,749 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:29,750 INFO L82 GeneralOperation]: Start isEquivalent. First operand 595 states. Second operand has 593 states, 589 states have (on average 1.6910016977928692) internal successors, (996), 589 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,751 INFO L74 IsIncluded]: Start isIncluded. First operand 595 states. Second operand has 593 states, 589 states have (on average 1.6910016977928692) internal successors, (996), 589 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,751 INFO L87 Difference]: Start difference. First operand 595 states. Second operand has 593 states, 589 states have (on average 1.6910016977928692) internal successors, (996), 589 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:29,768 INFO L93 Difference]: Finished difference Result 595 states and 1000 transitions. [2022-04-28 02:01:29,769 INFO L276 IsEmpty]: Start isEmpty. Operand 595 states and 1000 transitions. [2022-04-28 02:01:29,770 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:29,770 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:29,771 INFO L74 IsIncluded]: Start isIncluded. First operand has 593 states, 589 states have (on average 1.6910016977928692) internal successors, (996), 589 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 595 states. [2022-04-28 02:01:29,772 INFO L87 Difference]: Start difference. First operand has 593 states, 589 states have (on average 1.6910016977928692) internal successors, (996), 589 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 595 states. [2022-04-28 02:01:29,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:29,789 INFO L93 Difference]: Finished difference Result 595 states and 1000 transitions. [2022-04-28 02:01:29,790 INFO L276 IsEmpty]: Start isEmpty. Operand 595 states and 1000 transitions. [2022-04-28 02:01:29,790 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:29,791 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:29,791 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:29,791 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:29,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 593 states, 589 states have (on average 1.6910016977928692) internal successors, (996), 589 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 593 states to 593 states and 999 transitions. [2022-04-28 02:01:29,810 INFO L78 Accepts]: Start accepts. Automaton has 593 states and 999 transitions. Word has length 26 [2022-04-28 02:01:29,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:29,810 INFO L495 AbstractCegarLoop]: Abstraction has 593 states and 999 transitions. [2022-04-28 02:01:29,810 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,810 INFO L276 IsEmpty]: Start isEmpty. Operand 593 states and 999 transitions. [2022-04-28 02:01:29,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-28 02:01:29,811 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:29,811 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:29,811 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-04-28 02:01:29,812 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:29,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:29,812 INFO L85 PathProgramCache]: Analyzing trace with hash 2015070056, now seen corresponding path program 1 times [2022-04-28 02:01:29,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:29,812 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441337543] [2022-04-28 02:01:29,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:29,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:29,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:29,844 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:29,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:29,847 INFO L290 TraceCheckUtils]: 0: Hoare triple {12536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12530#true} is VALID [2022-04-28 02:01:29,848 INFO L290 TraceCheckUtils]: 1: Hoare triple {12530#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12530#true} is VALID [2022-04-28 02:01:29,848 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12530#true} {12530#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12530#true} is VALID [2022-04-28 02:01:29,848 INFO L272 TraceCheckUtils]: 0: Hoare triple {12530#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:29,848 INFO L290 TraceCheckUtils]: 1: Hoare triple {12536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12530#true} is VALID [2022-04-28 02:01:29,849 INFO L290 TraceCheckUtils]: 2: Hoare triple {12530#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12530#true} is VALID [2022-04-28 02:01:29,849 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12530#true} {12530#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12530#true} is VALID [2022-04-28 02:01:29,849 INFO L272 TraceCheckUtils]: 4: Hoare triple {12530#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12530#true} is VALID [2022-04-28 02:01:29,849 INFO L290 TraceCheckUtils]: 5: Hoare triple {12530#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {12530#true} is VALID [2022-04-28 02:01:29,849 INFO L290 TraceCheckUtils]: 6: Hoare triple {12530#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {12530#true} is VALID [2022-04-28 02:01:29,849 INFO L290 TraceCheckUtils]: 7: Hoare triple {12530#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {12530#true} is VALID [2022-04-28 02:01:29,850 INFO L290 TraceCheckUtils]: 8: Hoare triple {12530#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {12530#true} is VALID [2022-04-28 02:01:29,850 INFO L290 TraceCheckUtils]: 9: Hoare triple {12530#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {12530#true} is VALID [2022-04-28 02:01:29,850 INFO L290 TraceCheckUtils]: 10: Hoare triple {12530#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {12530#true} is VALID [2022-04-28 02:01:29,851 INFO L290 TraceCheckUtils]: 11: Hoare triple {12530#true} [256] L86-1-->L90-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,852 INFO L290 TraceCheckUtils]: 12: Hoare triple {12535#(not (= main_~p4~0 0))} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,852 INFO L290 TraceCheckUtils]: 13: Hoare triple {12535#(not (= main_~p4~0 0))} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,852 INFO L290 TraceCheckUtils]: 14: Hoare triple {12535#(not (= main_~p4~0 0))} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,853 INFO L290 TraceCheckUtils]: 15: Hoare triple {12535#(not (= main_~p4~0 0))} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,853 INFO L290 TraceCheckUtils]: 16: Hoare triple {12535#(not (= main_~p4~0 0))} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,853 INFO L290 TraceCheckUtils]: 17: Hoare triple {12535#(not (= main_~p4~0 0))} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,854 INFO L290 TraceCheckUtils]: 18: Hoare triple {12535#(not (= main_~p4~0 0))} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,854 INFO L290 TraceCheckUtils]: 19: Hoare triple {12535#(not (= main_~p4~0 0))} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,854 INFO L290 TraceCheckUtils]: 20: Hoare triple {12535#(not (= main_~p4~0 0))} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,855 INFO L290 TraceCheckUtils]: 21: Hoare triple {12535#(not (= main_~p4~0 0))} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,855 INFO L290 TraceCheckUtils]: 22: Hoare triple {12535#(not (= main_~p4~0 0))} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {12535#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:01:29,856 INFO L290 TraceCheckUtils]: 23: Hoare triple {12535#(not (= main_~p4~0 0))} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {12531#false} is VALID [2022-04-28 02:01:29,856 INFO L290 TraceCheckUtils]: 24: Hoare triple {12531#false} [292] L143-1-->L149: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {12531#false} is VALID [2022-04-28 02:01:29,856 INFO L290 TraceCheckUtils]: 25: Hoare triple {12531#false} [294] L149-->L184-1: Formula: (not (= v_main_~lk5~0_2 1)) InVars {main_~lk5~0=v_main_~lk5~0_2} OutVars{main_~lk5~0=v_main_~lk5~0_2} AuxVars[] AssignedVars[] {12531#false} is VALID [2022-04-28 02:01:29,856 INFO L290 TraceCheckUtils]: 26: Hoare triple {12531#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12531#false} is VALID [2022-04-28 02:01:29,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:29,856 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:29,856 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441337543] [2022-04-28 02:01:29,857 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [441337543] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:29,857 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:29,857 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:29,857 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [306339911] [2022-04-28 02:01:29,857 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:29,857 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:01:29,858 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:29,858 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:29,875 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:29,875 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:29,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:29,875 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:29,875 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:29,875 INFO L87 Difference]: Start difference. First operand 593 states and 999 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:30,082 INFO L93 Difference]: Finished difference Result 889 states and 1493 transitions. [2022-04-28 02:01:30,082 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:30,082 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:01:30,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:30,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 214 transitions. [2022-04-28 02:01:30,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 214 transitions. [2022-04-28 02:01:30,087 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 214 transitions. [2022-04-28 02:01:30,276 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 214 edges. 214 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:30,293 INFO L225 Difference]: With dead ends: 889 [2022-04-28 02:01:30,293 INFO L226 Difference]: Without dead ends: 603 [2022-04-28 02:01:30,295 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:30,295 INFO L413 NwaCegarLoop]: 117 mSDtfsCounter, 154 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 124 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:30,296 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [154 Valid, 124 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:01:30,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 603 states. [2022-04-28 02:01:30,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 603 to 601. [2022-04-28 02:01:30,307 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:30,308 INFO L82 GeneralOperation]: Start isEquivalent. First operand 603 states. Second operand has 601 states, 597 states have (on average 1.6683417085427135) internal successors, (996), 597 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,309 INFO L74 IsIncluded]: Start isIncluded. First operand 603 states. Second operand has 601 states, 597 states have (on average 1.6683417085427135) internal successors, (996), 597 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,309 INFO L87 Difference]: Start difference. First operand 603 states. Second operand has 601 states, 597 states have (on average 1.6683417085427135) internal successors, (996), 597 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:30,327 INFO L93 Difference]: Finished difference Result 603 states and 1000 transitions. [2022-04-28 02:01:30,327 INFO L276 IsEmpty]: Start isEmpty. Operand 603 states and 1000 transitions. [2022-04-28 02:01:30,328 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:30,329 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:30,330 INFO L74 IsIncluded]: Start isIncluded. First operand has 601 states, 597 states have (on average 1.6683417085427135) internal successors, (996), 597 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 603 states. [2022-04-28 02:01:30,331 INFO L87 Difference]: Start difference. First operand has 601 states, 597 states have (on average 1.6683417085427135) internal successors, (996), 597 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 603 states. [2022-04-28 02:01:30,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:30,349 INFO L93 Difference]: Finished difference Result 603 states and 1000 transitions. [2022-04-28 02:01:30,349 INFO L276 IsEmpty]: Start isEmpty. Operand 603 states and 1000 transitions. [2022-04-28 02:01:30,350 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:30,350 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:30,350 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:30,350 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:30,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 601 states, 597 states have (on average 1.6683417085427135) internal successors, (996), 597 states have internal predecessors, (996), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 601 states to 601 states and 999 transitions. [2022-04-28 02:01:30,372 INFO L78 Accepts]: Start accepts. Automaton has 601 states and 999 transitions. Word has length 27 [2022-04-28 02:01:30,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:30,372 INFO L495 AbstractCegarLoop]: Abstraction has 601 states and 999 transitions. [2022-04-28 02:01:30,372 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,372 INFO L276 IsEmpty]: Start isEmpty. Operand 601 states and 999 transitions. [2022-04-28 02:01:30,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-28 02:01:30,373 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:30,373 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:30,373 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-04-28 02:01:30,374 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:30,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:30,374 INFO L85 PathProgramCache]: Analyzing trace with hash 1504535879, now seen corresponding path program 1 times [2022-04-28 02:01:30,374 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:30,374 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188702658] [2022-04-28 02:01:30,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:30,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:30,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:30,418 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:30,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:30,427 INFO L290 TraceCheckUtils]: 0: Hoare triple {15298#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15292#true} is VALID [2022-04-28 02:01:30,427 INFO L290 TraceCheckUtils]: 1: Hoare triple {15292#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15292#true} is VALID [2022-04-28 02:01:30,428 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15292#true} {15292#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15292#true} is VALID [2022-04-28 02:01:30,428 INFO L272 TraceCheckUtils]: 0: Hoare triple {15292#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15298#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:30,428 INFO L290 TraceCheckUtils]: 1: Hoare triple {15298#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15292#true} is VALID [2022-04-28 02:01:30,429 INFO L290 TraceCheckUtils]: 2: Hoare triple {15292#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15292#true} is VALID [2022-04-28 02:01:30,429 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15292#true} {15292#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15292#true} is VALID [2022-04-28 02:01:30,429 INFO L272 TraceCheckUtils]: 4: Hoare triple {15292#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15292#true} is VALID [2022-04-28 02:01:30,429 INFO L290 TraceCheckUtils]: 5: Hoare triple {15292#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {15292#true} is VALID [2022-04-28 02:01:30,429 INFO L290 TraceCheckUtils]: 6: Hoare triple {15292#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {15292#true} is VALID [2022-04-28 02:01:30,429 INFO L290 TraceCheckUtils]: 7: Hoare triple {15292#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {15292#true} is VALID [2022-04-28 02:01:30,429 INFO L290 TraceCheckUtils]: 8: Hoare triple {15292#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {15292#true} is VALID [2022-04-28 02:01:30,430 INFO L290 TraceCheckUtils]: 9: Hoare triple {15292#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {15292#true} is VALID [2022-04-28 02:01:30,430 INFO L290 TraceCheckUtils]: 10: Hoare triple {15292#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {15292#true} is VALID [2022-04-28 02:01:30,430 INFO L290 TraceCheckUtils]: 11: Hoare triple {15292#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {15292#true} is VALID [2022-04-28 02:01:30,430 INFO L290 TraceCheckUtils]: 12: Hoare triple {15292#true} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,431 INFO L290 TraceCheckUtils]: 13: Hoare triple {15297#(= main_~lk5~0 1)} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,431 INFO L290 TraceCheckUtils]: 14: Hoare triple {15297#(= main_~lk5~0 1)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,431 INFO L290 TraceCheckUtils]: 15: Hoare triple {15297#(= main_~lk5~0 1)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,432 INFO L290 TraceCheckUtils]: 16: Hoare triple {15297#(= main_~lk5~0 1)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,432 INFO L290 TraceCheckUtils]: 17: Hoare triple {15297#(= main_~lk5~0 1)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,432 INFO L290 TraceCheckUtils]: 18: Hoare triple {15297#(= main_~lk5~0 1)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,433 INFO L290 TraceCheckUtils]: 19: Hoare triple {15297#(= main_~lk5~0 1)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,433 INFO L290 TraceCheckUtils]: 20: Hoare triple {15297#(= main_~lk5~0 1)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,434 INFO L290 TraceCheckUtils]: 21: Hoare triple {15297#(= main_~lk5~0 1)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,434 INFO L290 TraceCheckUtils]: 22: Hoare triple {15297#(= main_~lk5~0 1)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,434 INFO L290 TraceCheckUtils]: 23: Hoare triple {15297#(= main_~lk5~0 1)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,435 INFO L290 TraceCheckUtils]: 24: Hoare triple {15297#(= main_~lk5~0 1)} [292] L143-1-->L149: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {15297#(= main_~lk5~0 1)} is VALID [2022-04-28 02:01:30,435 INFO L290 TraceCheckUtils]: 25: Hoare triple {15297#(= main_~lk5~0 1)} [294] L149-->L184-1: Formula: (not (= v_main_~lk5~0_2 1)) InVars {main_~lk5~0=v_main_~lk5~0_2} OutVars{main_~lk5~0=v_main_~lk5~0_2} AuxVars[] AssignedVars[] {15293#false} is VALID [2022-04-28 02:01:30,435 INFO L290 TraceCheckUtils]: 26: Hoare triple {15293#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15293#false} is VALID [2022-04-28 02:01:30,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:30,436 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:30,436 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [188702658] [2022-04-28 02:01:30,436 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [188702658] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:30,436 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:30,436 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:30,436 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [738374313] [2022-04-28 02:01:30,436 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:30,437 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:01:30,437 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:30,437 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,456 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:30,456 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:30,456 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:30,457 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:30,457 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:30,457 INFO L87 Difference]: Start difference. First operand 601 states and 999 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:30,707 INFO L93 Difference]: Finished difference Result 1101 states and 1865 transitions. [2022-04-28 02:01:30,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:30,708 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:01:30,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:30,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 139 transitions. [2022-04-28 02:01:30,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 139 transitions. [2022-04-28 02:01:30,712 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 139 transitions. [2022-04-28 02:01:30,814 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 139 edges. 139 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:30,869 INFO L225 Difference]: With dead ends: 1101 [2022-04-28 02:01:30,870 INFO L226 Difference]: Without dead ends: 1099 [2022-04-28 02:01:30,870 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:30,871 INFO L413 NwaCegarLoop]: 79 mSDtfsCounter, 174 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 174 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:30,871 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [174 Valid, 86 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:30,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1099 states. [2022-04-28 02:01:30,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1099 to 841. [2022-04-28 02:01:30,888 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:30,889 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1099 states. Second operand has 841 states, 837 states have (on average 1.6296296296296295) internal successors, (1364), 837 states have internal predecessors, (1364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,890 INFO L74 IsIncluded]: Start isIncluded. First operand 1099 states. Second operand has 841 states, 837 states have (on average 1.6296296296296295) internal successors, (1364), 837 states have internal predecessors, (1364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,892 INFO L87 Difference]: Start difference. First operand 1099 states. Second operand has 841 states, 837 states have (on average 1.6296296296296295) internal successors, (1364), 837 states have internal predecessors, (1364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:30,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:30,941 INFO L93 Difference]: Finished difference Result 1099 states and 1848 transitions. [2022-04-28 02:01:30,941 INFO L276 IsEmpty]: Start isEmpty. Operand 1099 states and 1848 transitions. [2022-04-28 02:01:30,943 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:30,943 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:30,944 INFO L74 IsIncluded]: Start isIncluded. First operand has 841 states, 837 states have (on average 1.6296296296296295) internal successors, (1364), 837 states have internal predecessors, (1364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1099 states. [2022-04-28 02:01:30,945 INFO L87 Difference]: Start difference. First operand has 841 states, 837 states have (on average 1.6296296296296295) internal successors, (1364), 837 states have internal predecessors, (1364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1099 states. [2022-04-28 02:01:30,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:30,995 INFO L93 Difference]: Finished difference Result 1099 states and 1848 transitions. [2022-04-28 02:01:30,995 INFO L276 IsEmpty]: Start isEmpty. Operand 1099 states and 1848 transitions. [2022-04-28 02:01:30,997 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:30,997 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:30,997 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:30,997 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:30,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 841 states, 837 states have (on average 1.6296296296296295) internal successors, (1364), 837 states have internal predecessors, (1364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 841 states to 841 states and 1367 transitions. [2022-04-28 02:01:31,032 INFO L78 Accepts]: Start accepts. Automaton has 841 states and 1367 transitions. Word has length 27 [2022-04-28 02:01:31,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:31,032 INFO L495 AbstractCegarLoop]: Abstraction has 841 states and 1367 transitions. [2022-04-28 02:01:31,032 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,032 INFO L276 IsEmpty]: Start isEmpty. Operand 841 states and 1367 transitions. [2022-04-28 02:01:31,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-28 02:01:31,033 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:31,033 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:31,034 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-04-28 02:01:31,034 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:31,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:31,034 INFO L85 PathProgramCache]: Analyzing trace with hash -1282879608, now seen corresponding path program 1 times [2022-04-28 02:01:31,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:31,034 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343153538] [2022-04-28 02:01:31,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:31,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:31,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:31,064 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:31,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:31,069 INFO L290 TraceCheckUtils]: 0: Hoare triple {19512#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19506#true} is VALID [2022-04-28 02:01:31,069 INFO L290 TraceCheckUtils]: 1: Hoare triple {19506#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19506#true} is VALID [2022-04-28 02:01:31,070 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19506#true} {19506#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19506#true} is VALID [2022-04-28 02:01:31,070 INFO L272 TraceCheckUtils]: 0: Hoare triple {19506#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19512#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:31,070 INFO L290 TraceCheckUtils]: 1: Hoare triple {19512#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19506#true} is VALID [2022-04-28 02:01:31,070 INFO L290 TraceCheckUtils]: 2: Hoare triple {19506#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19506#true} is VALID [2022-04-28 02:01:31,071 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19506#true} {19506#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19506#true} is VALID [2022-04-28 02:01:31,071 INFO L272 TraceCheckUtils]: 4: Hoare triple {19506#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19506#true} is VALID [2022-04-28 02:01:31,071 INFO L290 TraceCheckUtils]: 5: Hoare triple {19506#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {19506#true} is VALID [2022-04-28 02:01:31,073 INFO L290 TraceCheckUtils]: 6: Hoare triple {19506#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {19506#true} is VALID [2022-04-28 02:01:31,075 INFO L290 TraceCheckUtils]: 7: Hoare triple {19506#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {19506#true} is VALID [2022-04-28 02:01:31,076 INFO L290 TraceCheckUtils]: 8: Hoare triple {19506#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {19506#true} is VALID [2022-04-28 02:01:31,076 INFO L290 TraceCheckUtils]: 9: Hoare triple {19506#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {19506#true} is VALID [2022-04-28 02:01:31,076 INFO L290 TraceCheckUtils]: 10: Hoare triple {19506#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {19506#true} is VALID [2022-04-28 02:01:31,076 INFO L290 TraceCheckUtils]: 11: Hoare triple {19506#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {19506#true} is VALID [2022-04-28 02:01:31,077 INFO L290 TraceCheckUtils]: 12: Hoare triple {19506#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,078 INFO L290 TraceCheckUtils]: 13: Hoare triple {19511#(= main_~p5~0 0)} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,078 INFO L290 TraceCheckUtils]: 14: Hoare triple {19511#(= main_~p5~0 0)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,082 INFO L290 TraceCheckUtils]: 15: Hoare triple {19511#(= main_~p5~0 0)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,084 INFO L290 TraceCheckUtils]: 16: Hoare triple {19511#(= main_~p5~0 0)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,085 INFO L290 TraceCheckUtils]: 17: Hoare triple {19511#(= main_~p5~0 0)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,085 INFO L290 TraceCheckUtils]: 18: Hoare triple {19511#(= main_~p5~0 0)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,085 INFO L290 TraceCheckUtils]: 19: Hoare triple {19511#(= main_~p5~0 0)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,086 INFO L290 TraceCheckUtils]: 20: Hoare triple {19511#(= main_~p5~0 0)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,086 INFO L290 TraceCheckUtils]: 21: Hoare triple {19511#(= main_~p5~0 0)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,086 INFO L290 TraceCheckUtils]: 22: Hoare triple {19511#(= main_~p5~0 0)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,087 INFO L290 TraceCheckUtils]: 23: Hoare triple {19511#(= main_~p5~0 0)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {19511#(= main_~p5~0 0)} is VALID [2022-04-28 02:01:31,087 INFO L290 TraceCheckUtils]: 24: Hoare triple {19511#(= main_~p5~0 0)} [292] L143-1-->L149: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {19507#false} is VALID [2022-04-28 02:01:31,087 INFO L290 TraceCheckUtils]: 25: Hoare triple {19507#false} [294] L149-->L184-1: Formula: (not (= v_main_~lk5~0_2 1)) InVars {main_~lk5~0=v_main_~lk5~0_2} OutVars{main_~lk5~0=v_main_~lk5~0_2} AuxVars[] AssignedVars[] {19507#false} is VALID [2022-04-28 02:01:31,087 INFO L290 TraceCheckUtils]: 26: Hoare triple {19507#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19507#false} is VALID [2022-04-28 02:01:31,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:31,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:31,088 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343153538] [2022-04-28 02:01:31,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1343153538] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:31,089 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:31,089 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:31,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1407558254] [2022-04-28 02:01:31,089 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:31,089 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:01:31,089 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:31,090 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,106 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:31,106 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:31,106 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:31,107 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:31,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:31,107 INFO L87 Difference]: Start difference. First operand 841 states and 1367 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:31,482 INFO L93 Difference]: Finished difference Result 1981 states and 3241 transitions. [2022-04-28 02:01:31,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:31,482 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:01:31,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:31,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 216 transitions. [2022-04-28 02:01:31,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 216 transitions. [2022-04-28 02:01:31,485 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 216 transitions. [2022-04-28 02:01:31,654 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 216 edges. 216 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:31,712 INFO L225 Difference]: With dead ends: 1981 [2022-04-28 02:01:31,712 INFO L226 Difference]: Without dead ends: 1163 [2022-04-28 02:01:31,714 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:31,714 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 154 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:31,714 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [154 Valid, 119 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:31,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1163 states. [2022-04-28 02:01:31,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1163 to 1161. [2022-04-28 02:01:31,736 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:31,738 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1163 states. Second operand has 1161 states, 1157 states have (on average 1.6214347450302506) internal successors, (1876), 1157 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,739 INFO L74 IsIncluded]: Start isIncluded. First operand 1163 states. Second operand has 1161 states, 1157 states have (on average 1.6214347450302506) internal successors, (1876), 1157 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,740 INFO L87 Difference]: Start difference. First operand 1163 states. Second operand has 1161 states, 1157 states have (on average 1.6214347450302506) internal successors, (1876), 1157 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:31,792 INFO L93 Difference]: Finished difference Result 1163 states and 1880 transitions. [2022-04-28 02:01:31,792 INFO L276 IsEmpty]: Start isEmpty. Operand 1163 states and 1880 transitions. [2022-04-28 02:01:31,794 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:31,794 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:31,796 INFO L74 IsIncluded]: Start isIncluded. First operand has 1161 states, 1157 states have (on average 1.6214347450302506) internal successors, (1876), 1157 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1163 states. [2022-04-28 02:01:31,797 INFO L87 Difference]: Start difference. First operand has 1161 states, 1157 states have (on average 1.6214347450302506) internal successors, (1876), 1157 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1163 states. [2022-04-28 02:01:31,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:31,850 INFO L93 Difference]: Finished difference Result 1163 states and 1880 transitions. [2022-04-28 02:01:31,850 INFO L276 IsEmpty]: Start isEmpty. Operand 1163 states and 1880 transitions. [2022-04-28 02:01:31,852 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:31,852 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:31,852 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:31,852 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:31,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1161 states, 1157 states have (on average 1.6214347450302506) internal successors, (1876), 1157 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1161 states to 1161 states and 1879 transitions. [2022-04-28 02:01:31,907 INFO L78 Accepts]: Start accepts. Automaton has 1161 states and 1879 transitions. Word has length 27 [2022-04-28 02:01:31,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:31,907 INFO L495 AbstractCegarLoop]: Abstraction has 1161 states and 1879 transitions. [2022-04-28 02:01:31,908 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,908 INFO L276 IsEmpty]: Start isEmpty. Operand 1161 states and 1879 transitions. [2022-04-28 02:01:31,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-28 02:01:31,909 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:31,909 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:31,909 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-04-28 02:01:31,909 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:31,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:31,910 INFO L85 PathProgramCache]: Analyzing trace with hash -603995456, now seen corresponding path program 1 times [2022-04-28 02:01:31,910 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:31,910 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126878348] [2022-04-28 02:01:31,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:31,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:31,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:31,938 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:31,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:31,942 INFO L290 TraceCheckUtils]: 0: Hoare triple {25086#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25080#true} is VALID [2022-04-28 02:01:31,942 INFO L290 TraceCheckUtils]: 1: Hoare triple {25080#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25080#true} is VALID [2022-04-28 02:01:31,942 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25080#true} {25080#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25080#true} is VALID [2022-04-28 02:01:31,943 INFO L272 TraceCheckUtils]: 0: Hoare triple {25080#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25086#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:31,943 INFO L290 TraceCheckUtils]: 1: Hoare triple {25086#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25080#true} is VALID [2022-04-28 02:01:31,943 INFO L290 TraceCheckUtils]: 2: Hoare triple {25080#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25080#true} is VALID [2022-04-28 02:01:31,943 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25080#true} {25080#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25080#true} is VALID [2022-04-28 02:01:31,943 INFO L272 TraceCheckUtils]: 4: Hoare triple {25080#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25080#true} is VALID [2022-04-28 02:01:31,944 INFO L290 TraceCheckUtils]: 5: Hoare triple {25080#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {25080#true} is VALID [2022-04-28 02:01:31,944 INFO L290 TraceCheckUtils]: 6: Hoare triple {25080#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {25080#true} is VALID [2022-04-28 02:01:31,944 INFO L290 TraceCheckUtils]: 7: Hoare triple {25080#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {25080#true} is VALID [2022-04-28 02:01:31,944 INFO L290 TraceCheckUtils]: 8: Hoare triple {25080#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {25080#true} is VALID [2022-04-28 02:01:31,944 INFO L290 TraceCheckUtils]: 9: Hoare triple {25080#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {25080#true} is VALID [2022-04-28 02:01:31,944 INFO L290 TraceCheckUtils]: 10: Hoare triple {25080#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {25080#true} is VALID [2022-04-28 02:01:31,944 INFO L290 TraceCheckUtils]: 11: Hoare triple {25080#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {25080#true} is VALID [2022-04-28 02:01:31,945 INFO L290 TraceCheckUtils]: 12: Hoare triple {25080#true} [258] L90-1-->L94-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,945 INFO L290 TraceCheckUtils]: 13: Hoare triple {25085#(not (= main_~p5~0 0))} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,945 INFO L290 TraceCheckUtils]: 14: Hoare triple {25085#(not (= main_~p5~0 0))} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,946 INFO L290 TraceCheckUtils]: 15: Hoare triple {25085#(not (= main_~p5~0 0))} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,946 INFO L290 TraceCheckUtils]: 16: Hoare triple {25085#(not (= main_~p5~0 0))} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,946 INFO L290 TraceCheckUtils]: 17: Hoare triple {25085#(not (= main_~p5~0 0))} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,947 INFO L290 TraceCheckUtils]: 18: Hoare triple {25085#(not (= main_~p5~0 0))} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,947 INFO L290 TraceCheckUtils]: 19: Hoare triple {25085#(not (= main_~p5~0 0))} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,947 INFO L290 TraceCheckUtils]: 20: Hoare triple {25085#(not (= main_~p5~0 0))} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,948 INFO L290 TraceCheckUtils]: 21: Hoare triple {25085#(not (= main_~p5~0 0))} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,948 INFO L290 TraceCheckUtils]: 22: Hoare triple {25085#(not (= main_~p5~0 0))} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,948 INFO L290 TraceCheckUtils]: 23: Hoare triple {25085#(not (= main_~p5~0 0))} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {25085#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:01:31,949 INFO L290 TraceCheckUtils]: 24: Hoare triple {25085#(not (= main_~p5~0 0))} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {25081#false} is VALID [2022-04-28 02:01:31,949 INFO L290 TraceCheckUtils]: 25: Hoare triple {25081#false} [296] L148-1-->L154: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {25081#false} is VALID [2022-04-28 02:01:31,949 INFO L290 TraceCheckUtils]: 26: Hoare triple {25081#false} [298] L154-->L184-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {25081#false} is VALID [2022-04-28 02:01:31,949 INFO L290 TraceCheckUtils]: 27: Hoare triple {25081#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25081#false} is VALID [2022-04-28 02:01:31,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:31,949 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:31,950 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126878348] [2022-04-28 02:01:31,950 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2126878348] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:31,950 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:31,950 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:31,950 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762954258] [2022-04-28 02:01:31,950 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:31,950 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:01:31,950 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:31,951 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:31,969 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:31,969 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:31,969 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:31,969 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:31,969 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:31,970 INFO L87 Difference]: Start difference. First operand 1161 states and 1879 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:32,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:32,280 INFO L93 Difference]: Finished difference Result 1741 states and 2809 transitions. [2022-04-28 02:01:32,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:32,280 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:01:32,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:32,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:32,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 211 transitions. [2022-04-28 02:01:32,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:32,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 211 transitions. [2022-04-28 02:01:32,283 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 211 transitions. [2022-04-28 02:01:32,452 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 211 edges. 211 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:32,494 INFO L225 Difference]: With dead ends: 1741 [2022-04-28 02:01:32,494 INFO L226 Difference]: Without dead ends: 1179 [2022-04-28 02:01:32,495 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:32,496 INFO L413 NwaCegarLoop]: 114 mSDtfsCounter, 153 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 71 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 153 SdHoareTripleChecker+Valid, 121 SdHoareTripleChecker+Invalid, 73 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 71 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:32,496 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [153 Valid, 121 Invalid, 73 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 71 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:01:32,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1179 states. [2022-04-28 02:01:32,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1179 to 1177. [2022-04-28 02:01:32,517 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:32,519 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1179 states. Second operand has 1177 states, 1173 states have (on average 1.5993179880647912) internal successors, (1876), 1173 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:32,520 INFO L74 IsIncluded]: Start isIncluded. First operand 1179 states. Second operand has 1177 states, 1173 states have (on average 1.5993179880647912) internal successors, (1876), 1173 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:32,521 INFO L87 Difference]: Start difference. First operand 1179 states. Second operand has 1177 states, 1173 states have (on average 1.5993179880647912) internal successors, (1876), 1173 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:32,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:32,586 INFO L93 Difference]: Finished difference Result 1179 states and 1880 transitions. [2022-04-28 02:01:32,586 INFO L276 IsEmpty]: Start isEmpty. Operand 1179 states and 1880 transitions. [2022-04-28 02:01:32,587 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:32,587 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:32,589 INFO L74 IsIncluded]: Start isIncluded. First operand has 1177 states, 1173 states have (on average 1.5993179880647912) internal successors, (1876), 1173 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1179 states. [2022-04-28 02:01:32,590 INFO L87 Difference]: Start difference. First operand has 1177 states, 1173 states have (on average 1.5993179880647912) internal successors, (1876), 1173 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1179 states. [2022-04-28 02:01:32,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:32,644 INFO L93 Difference]: Finished difference Result 1179 states and 1880 transitions. [2022-04-28 02:01:32,644 INFO L276 IsEmpty]: Start isEmpty. Operand 1179 states and 1880 transitions. [2022-04-28 02:01:32,645 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:32,645 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:32,645 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:32,645 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:32,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1177 states, 1173 states have (on average 1.5993179880647912) internal successors, (1876), 1173 states have internal predecessors, (1876), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:32,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1177 states to 1177 states and 1879 transitions. [2022-04-28 02:01:32,695 INFO L78 Accepts]: Start accepts. Automaton has 1177 states and 1879 transitions. Word has length 28 [2022-04-28 02:01:32,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:32,695 INFO L495 AbstractCegarLoop]: Abstraction has 1177 states and 1879 transitions. [2022-04-28 02:01:32,696 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:32,696 INFO L276 IsEmpty]: Start isEmpty. Operand 1177 states and 1879 transitions. [2022-04-28 02:01:32,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-28 02:01:32,697 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:32,697 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:32,697 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-04-28 02:01:32,697 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:32,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:32,698 INFO L85 PathProgramCache]: Analyzing trace with hash -1114529633, now seen corresponding path program 1 times [2022-04-28 02:01:32,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:32,698 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204291049] [2022-04-28 02:01:32,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:32,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:32,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:32,729 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:32,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:32,736 INFO L290 TraceCheckUtils]: 0: Hoare triple {30468#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30462#true} is VALID [2022-04-28 02:01:32,736 INFO L290 TraceCheckUtils]: 1: Hoare triple {30462#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30462#true} is VALID [2022-04-28 02:01:32,736 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30462#true} {30462#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30462#true} is VALID [2022-04-28 02:01:32,737 INFO L272 TraceCheckUtils]: 0: Hoare triple {30462#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30468#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:32,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {30468#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30462#true} is VALID [2022-04-28 02:01:32,737 INFO L290 TraceCheckUtils]: 2: Hoare triple {30462#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30462#true} is VALID [2022-04-28 02:01:32,738 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30462#true} {30462#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30462#true} is VALID [2022-04-28 02:01:32,738 INFO L272 TraceCheckUtils]: 4: Hoare triple {30462#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30462#true} is VALID [2022-04-28 02:01:32,738 INFO L290 TraceCheckUtils]: 5: Hoare triple {30462#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {30462#true} is VALID [2022-04-28 02:01:32,738 INFO L290 TraceCheckUtils]: 6: Hoare triple {30462#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {30462#true} is VALID [2022-04-28 02:01:32,738 INFO L290 TraceCheckUtils]: 7: Hoare triple {30462#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {30462#true} is VALID [2022-04-28 02:01:32,738 INFO L290 TraceCheckUtils]: 8: Hoare triple {30462#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {30462#true} is VALID [2022-04-28 02:01:32,738 INFO L290 TraceCheckUtils]: 9: Hoare triple {30462#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {30462#true} is VALID [2022-04-28 02:01:32,739 INFO L290 TraceCheckUtils]: 10: Hoare triple {30462#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {30462#true} is VALID [2022-04-28 02:01:32,739 INFO L290 TraceCheckUtils]: 11: Hoare triple {30462#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {30462#true} is VALID [2022-04-28 02:01:32,739 INFO L290 TraceCheckUtils]: 12: Hoare triple {30462#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {30462#true} is VALID [2022-04-28 02:01:32,739 INFO L290 TraceCheckUtils]: 13: Hoare triple {30462#true} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,740 INFO L290 TraceCheckUtils]: 14: Hoare triple {30467#(= main_~lk6~0 1)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,740 INFO L290 TraceCheckUtils]: 15: Hoare triple {30467#(= main_~lk6~0 1)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,740 INFO L290 TraceCheckUtils]: 16: Hoare triple {30467#(= main_~lk6~0 1)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,741 INFO L290 TraceCheckUtils]: 17: Hoare triple {30467#(= main_~lk6~0 1)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,741 INFO L290 TraceCheckUtils]: 18: Hoare triple {30467#(= main_~lk6~0 1)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,741 INFO L290 TraceCheckUtils]: 19: Hoare triple {30467#(= main_~lk6~0 1)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,741 INFO L290 TraceCheckUtils]: 20: Hoare triple {30467#(= main_~lk6~0 1)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,742 INFO L290 TraceCheckUtils]: 21: Hoare triple {30467#(= main_~lk6~0 1)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,742 INFO L290 TraceCheckUtils]: 22: Hoare triple {30467#(= main_~lk6~0 1)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,742 INFO L290 TraceCheckUtils]: 23: Hoare triple {30467#(= main_~lk6~0 1)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,743 INFO L290 TraceCheckUtils]: 24: Hoare triple {30467#(= main_~lk6~0 1)} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,743 INFO L290 TraceCheckUtils]: 25: Hoare triple {30467#(= main_~lk6~0 1)} [296] L148-1-->L154: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {30467#(= main_~lk6~0 1)} is VALID [2022-04-28 02:01:32,743 INFO L290 TraceCheckUtils]: 26: Hoare triple {30467#(= main_~lk6~0 1)} [298] L154-->L184-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {30463#false} is VALID [2022-04-28 02:01:32,744 INFO L290 TraceCheckUtils]: 27: Hoare triple {30463#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30463#false} is VALID [2022-04-28 02:01:32,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:32,744 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:32,744 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1204291049] [2022-04-28 02:01:32,744 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1204291049] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:32,744 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:32,744 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:32,744 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [192619454] [2022-04-28 02:01:32,744 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:32,745 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:01:32,745 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:32,745 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:32,762 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:32,762 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:32,762 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:32,763 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:32,763 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:32,763 INFO L87 Difference]: Start difference. First operand 1177 states and 1879 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:33,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:33,074 INFO L93 Difference]: Finished difference Result 2125 states and 3465 transitions. [2022-04-28 02:01:33,074 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:33,074 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:01:33,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:33,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:33,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 135 transitions. [2022-04-28 02:01:33,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:33,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 135 transitions. [2022-04-28 02:01:33,077 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 135 transitions. [2022-04-28 02:01:33,166 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 135 edges. 135 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:33,287 INFO L225 Difference]: With dead ends: 2125 [2022-04-28 02:01:33,288 INFO L226 Difference]: Without dead ends: 2123 [2022-04-28 02:01:33,288 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:33,289 INFO L413 NwaCegarLoop]: 78 mSDtfsCounter, 167 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 73 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 167 SdHoareTripleChecker+Valid, 85 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 73 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:33,289 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [167 Valid, 85 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 73 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:33,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2123 states. [2022-04-28 02:01:33,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2123 to 1673. [2022-04-28 02:01:33,318 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:33,321 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2123 states. Second operand has 1673 states, 1669 states have (on average 1.555422408627921) internal successors, (2596), 1669 states have internal predecessors, (2596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:33,322 INFO L74 IsIncluded]: Start isIncluded. First operand 2123 states. Second operand has 1673 states, 1669 states have (on average 1.555422408627921) internal successors, (2596), 1669 states have internal predecessors, (2596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:33,324 INFO L87 Difference]: Start difference. First operand 2123 states. Second operand has 1673 states, 1669 states have (on average 1.555422408627921) internal successors, (2596), 1669 states have internal predecessors, (2596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:33,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:33,464 INFO L93 Difference]: Finished difference Result 2123 states and 3432 transitions. [2022-04-28 02:01:33,464 INFO L276 IsEmpty]: Start isEmpty. Operand 2123 states and 3432 transitions. [2022-04-28 02:01:33,465 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:33,466 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:33,468 INFO L74 IsIncluded]: Start isIncluded. First operand has 1673 states, 1669 states have (on average 1.555422408627921) internal successors, (2596), 1669 states have internal predecessors, (2596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2123 states. [2022-04-28 02:01:33,469 INFO L87 Difference]: Start difference. First operand has 1673 states, 1669 states have (on average 1.555422408627921) internal successors, (2596), 1669 states have internal predecessors, (2596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2123 states. [2022-04-28 02:01:33,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:33,597 INFO L93 Difference]: Finished difference Result 2123 states and 3432 transitions. [2022-04-28 02:01:33,597 INFO L276 IsEmpty]: Start isEmpty. Operand 2123 states and 3432 transitions. [2022-04-28 02:01:33,599 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:33,599 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:33,599 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:33,599 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:33,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1673 states, 1669 states have (on average 1.555422408627921) internal successors, (2596), 1669 states have internal predecessors, (2596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:33,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1673 states to 1673 states and 2599 transitions. [2022-04-28 02:01:33,720 INFO L78 Accepts]: Start accepts. Automaton has 1673 states and 2599 transitions. Word has length 28 [2022-04-28 02:01:33,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:33,720 INFO L495 AbstractCegarLoop]: Abstraction has 1673 states and 2599 transitions. [2022-04-28 02:01:33,720 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:33,720 INFO L276 IsEmpty]: Start isEmpty. Operand 1673 states and 2599 transitions. [2022-04-28 02:01:33,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-28 02:01:33,722 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:33,722 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:33,741 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-04-28 02:01:33,742 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:33,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:33,742 INFO L85 PathProgramCache]: Analyzing trace with hash 393022176, now seen corresponding path program 1 times [2022-04-28 02:01:33,742 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:33,742 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1000855184] [2022-04-28 02:01:33,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:33,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:33,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:33,778 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:33,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:33,783 INFO L290 TraceCheckUtils]: 0: Hoare triple {38634#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {38628#true} is VALID [2022-04-28 02:01:33,783 INFO L290 TraceCheckUtils]: 1: Hoare triple {38628#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38628#true} is VALID [2022-04-28 02:01:33,783 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {38628#true} {38628#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38628#true} is VALID [2022-04-28 02:01:33,783 INFO L272 TraceCheckUtils]: 0: Hoare triple {38628#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38634#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:33,784 INFO L290 TraceCheckUtils]: 1: Hoare triple {38634#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {38628#true} is VALID [2022-04-28 02:01:33,784 INFO L290 TraceCheckUtils]: 2: Hoare triple {38628#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38628#true} is VALID [2022-04-28 02:01:33,784 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38628#true} {38628#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38628#true} is VALID [2022-04-28 02:01:33,784 INFO L272 TraceCheckUtils]: 4: Hoare triple {38628#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38628#true} is VALID [2022-04-28 02:01:33,784 INFO L290 TraceCheckUtils]: 5: Hoare triple {38628#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {38628#true} is VALID [2022-04-28 02:01:33,784 INFO L290 TraceCheckUtils]: 6: Hoare triple {38628#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {38628#true} is VALID [2022-04-28 02:01:33,785 INFO L290 TraceCheckUtils]: 7: Hoare triple {38628#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {38628#true} is VALID [2022-04-28 02:01:33,785 INFO L290 TraceCheckUtils]: 8: Hoare triple {38628#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {38628#true} is VALID [2022-04-28 02:01:33,785 INFO L290 TraceCheckUtils]: 9: Hoare triple {38628#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {38628#true} is VALID [2022-04-28 02:01:33,785 INFO L290 TraceCheckUtils]: 10: Hoare triple {38628#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {38628#true} is VALID [2022-04-28 02:01:33,785 INFO L290 TraceCheckUtils]: 11: Hoare triple {38628#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {38628#true} is VALID [2022-04-28 02:01:33,785 INFO L290 TraceCheckUtils]: 12: Hoare triple {38628#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {38628#true} is VALID [2022-04-28 02:01:33,785 INFO L290 TraceCheckUtils]: 13: Hoare triple {38628#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,786 INFO L290 TraceCheckUtils]: 14: Hoare triple {38633#(= main_~p6~0 0)} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,786 INFO L290 TraceCheckUtils]: 15: Hoare triple {38633#(= main_~p6~0 0)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,786 INFO L290 TraceCheckUtils]: 16: Hoare triple {38633#(= main_~p6~0 0)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,787 INFO L290 TraceCheckUtils]: 17: Hoare triple {38633#(= main_~p6~0 0)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,787 INFO L290 TraceCheckUtils]: 18: Hoare triple {38633#(= main_~p6~0 0)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,787 INFO L290 TraceCheckUtils]: 19: Hoare triple {38633#(= main_~p6~0 0)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,788 INFO L290 TraceCheckUtils]: 20: Hoare triple {38633#(= main_~p6~0 0)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,788 INFO L290 TraceCheckUtils]: 21: Hoare triple {38633#(= main_~p6~0 0)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,788 INFO L290 TraceCheckUtils]: 22: Hoare triple {38633#(= main_~p6~0 0)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,789 INFO L290 TraceCheckUtils]: 23: Hoare triple {38633#(= main_~p6~0 0)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,789 INFO L290 TraceCheckUtils]: 24: Hoare triple {38633#(= main_~p6~0 0)} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {38633#(= main_~p6~0 0)} is VALID [2022-04-28 02:01:33,789 INFO L290 TraceCheckUtils]: 25: Hoare triple {38633#(= main_~p6~0 0)} [296] L148-1-->L154: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {38629#false} is VALID [2022-04-28 02:01:33,790 INFO L290 TraceCheckUtils]: 26: Hoare triple {38629#false} [298] L154-->L184-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {38629#false} is VALID [2022-04-28 02:01:33,790 INFO L290 TraceCheckUtils]: 27: Hoare triple {38629#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38629#false} is VALID [2022-04-28 02:01:33,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:33,790 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:33,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1000855184] [2022-04-28 02:01:33,790 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1000855184] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:33,790 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:33,790 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:33,791 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1938704090] [2022-04-28 02:01:33,791 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:33,792 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:01:33,792 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:33,792 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:33,809 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:33,809 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:33,810 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:33,810 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:33,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:33,810 INFO L87 Difference]: Start difference. First operand 1673 states and 2599 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:34,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:34,616 INFO L93 Difference]: Finished difference Result 3917 states and 6121 transitions. [2022-04-28 02:01:34,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:34,616 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:01:34,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:34,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:34,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 213 transitions. [2022-04-28 02:01:34,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:34,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 213 transitions. [2022-04-28 02:01:34,619 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 213 transitions. [2022-04-28 02:01:34,766 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 213 edges. 213 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:34,907 INFO L225 Difference]: With dead ends: 3917 [2022-04-28 02:01:34,907 INFO L226 Difference]: Without dead ends: 2283 [2022-04-28 02:01:34,910 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:34,910 INFO L413 NwaCegarLoop]: 114 mSDtfsCounter, 148 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 71 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 148 SdHoareTripleChecker+Valid, 121 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 71 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:34,911 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [148 Valid, 121 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 71 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:34,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2283 states. [2022-04-28 02:01:34,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2283 to 2281. [2022-04-28 02:01:34,952 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:34,954 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2283 states. Second operand has 2281 states, 2277 states have (on average 1.5476504172156347) internal successors, (3524), 2277 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:34,957 INFO L74 IsIncluded]: Start isIncluded. First operand 2283 states. Second operand has 2281 states, 2277 states have (on average 1.5476504172156347) internal successors, (3524), 2277 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:34,958 INFO L87 Difference]: Start difference. First operand 2283 states. Second operand has 2281 states, 2277 states have (on average 1.5476504172156347) internal successors, (3524), 2277 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:35,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:35,119 INFO L93 Difference]: Finished difference Result 2283 states and 3528 transitions. [2022-04-28 02:01:35,119 INFO L276 IsEmpty]: Start isEmpty. Operand 2283 states and 3528 transitions. [2022-04-28 02:01:35,121 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:35,121 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:35,124 INFO L74 IsIncluded]: Start isIncluded. First operand has 2281 states, 2277 states have (on average 1.5476504172156347) internal successors, (3524), 2277 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2283 states. [2022-04-28 02:01:35,126 INFO L87 Difference]: Start difference. First operand has 2281 states, 2277 states have (on average 1.5476504172156347) internal successors, (3524), 2277 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2283 states. [2022-04-28 02:01:35,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:35,309 INFO L93 Difference]: Finished difference Result 2283 states and 3528 transitions. [2022-04-28 02:01:35,309 INFO L276 IsEmpty]: Start isEmpty. Operand 2283 states and 3528 transitions. [2022-04-28 02:01:35,312 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:35,312 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:35,312 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:35,312 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:35,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2281 states, 2277 states have (on average 1.5476504172156347) internal successors, (3524), 2277 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:35,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2281 states to 2281 states and 3527 transitions. [2022-04-28 02:01:35,520 INFO L78 Accepts]: Start accepts. Automaton has 2281 states and 3527 transitions. Word has length 28 [2022-04-28 02:01:35,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:35,520 INFO L495 AbstractCegarLoop]: Abstraction has 2281 states and 3527 transitions. [2022-04-28 02:01:35,520 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:35,521 INFO L276 IsEmpty]: Start isEmpty. Operand 2281 states and 3527 transitions. [2022-04-28 02:01:35,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-28 02:01:35,522 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:35,522 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:35,522 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-04-28 02:01:35,522 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:35,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:35,523 INFO L85 PathProgramCache]: Analyzing trace with hash -190647580, now seen corresponding path program 1 times [2022-04-28 02:01:35,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:35,523 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079225727] [2022-04-28 02:01:35,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:35,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:35,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:35,564 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:35,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:35,567 INFO L290 TraceCheckUtils]: 0: Hoare triple {49584#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {49578#true} is VALID [2022-04-28 02:01:35,567 INFO L290 TraceCheckUtils]: 1: Hoare triple {49578#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {49578#true} is VALID [2022-04-28 02:01:35,567 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {49578#true} {49578#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {49578#true} is VALID [2022-04-28 02:01:35,568 INFO L272 TraceCheckUtils]: 0: Hoare triple {49578#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {49584#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:35,568 INFO L290 TraceCheckUtils]: 1: Hoare triple {49584#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {49578#true} is VALID [2022-04-28 02:01:35,568 INFO L290 TraceCheckUtils]: 2: Hoare triple {49578#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {49578#true} is VALID [2022-04-28 02:01:35,568 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {49578#true} {49578#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {49578#true} is VALID [2022-04-28 02:01:35,568 INFO L272 TraceCheckUtils]: 4: Hoare triple {49578#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {49578#true} is VALID [2022-04-28 02:01:35,569 INFO L290 TraceCheckUtils]: 5: Hoare triple {49578#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {49578#true} is VALID [2022-04-28 02:01:35,569 INFO L290 TraceCheckUtils]: 6: Hoare triple {49578#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {49578#true} is VALID [2022-04-28 02:01:35,569 INFO L290 TraceCheckUtils]: 7: Hoare triple {49578#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {49578#true} is VALID [2022-04-28 02:01:35,569 INFO L290 TraceCheckUtils]: 8: Hoare triple {49578#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {49578#true} is VALID [2022-04-28 02:01:35,570 INFO L290 TraceCheckUtils]: 9: Hoare triple {49578#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {49578#true} is VALID [2022-04-28 02:01:35,570 INFO L290 TraceCheckUtils]: 10: Hoare triple {49578#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {49578#true} is VALID [2022-04-28 02:01:35,572 INFO L290 TraceCheckUtils]: 11: Hoare triple {49578#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {49578#true} is VALID [2022-04-28 02:01:35,573 INFO L290 TraceCheckUtils]: 12: Hoare triple {49578#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {49578#true} is VALID [2022-04-28 02:01:35,573 INFO L290 TraceCheckUtils]: 13: Hoare triple {49578#true} [260] L94-1-->L98-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,573 INFO L290 TraceCheckUtils]: 14: Hoare triple {49583#(not (= main_~p6~0 0))} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,574 INFO L290 TraceCheckUtils]: 15: Hoare triple {49583#(not (= main_~p6~0 0))} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,574 INFO L290 TraceCheckUtils]: 16: Hoare triple {49583#(not (= main_~p6~0 0))} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,574 INFO L290 TraceCheckUtils]: 17: Hoare triple {49583#(not (= main_~p6~0 0))} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,575 INFO L290 TraceCheckUtils]: 18: Hoare triple {49583#(not (= main_~p6~0 0))} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,575 INFO L290 TraceCheckUtils]: 19: Hoare triple {49583#(not (= main_~p6~0 0))} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,575 INFO L290 TraceCheckUtils]: 20: Hoare triple {49583#(not (= main_~p6~0 0))} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,575 INFO L290 TraceCheckUtils]: 21: Hoare triple {49583#(not (= main_~p6~0 0))} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,576 INFO L290 TraceCheckUtils]: 22: Hoare triple {49583#(not (= main_~p6~0 0))} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,576 INFO L290 TraceCheckUtils]: 23: Hoare triple {49583#(not (= main_~p6~0 0))} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,576 INFO L290 TraceCheckUtils]: 24: Hoare triple {49583#(not (= main_~p6~0 0))} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {49583#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:01:35,577 INFO L290 TraceCheckUtils]: 25: Hoare triple {49583#(not (= main_~p6~0 0))} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {49579#false} is VALID [2022-04-28 02:01:35,577 INFO L290 TraceCheckUtils]: 26: Hoare triple {49579#false} [300] L153-1-->L159: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {49579#false} is VALID [2022-04-28 02:01:35,577 INFO L290 TraceCheckUtils]: 27: Hoare triple {49579#false} [302] L159-->L184-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {49579#false} is VALID [2022-04-28 02:01:35,577 INFO L290 TraceCheckUtils]: 28: Hoare triple {49579#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {49579#false} is VALID [2022-04-28 02:01:35,577 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:35,577 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:35,578 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079225727] [2022-04-28 02:01:35,578 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1079225727] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:35,578 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:35,578 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:35,578 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238872473] [2022-04-28 02:01:35,578 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:35,578 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:01:35,578 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:35,579 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:35,597 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:35,597 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:35,597 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:35,597 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:35,597 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:35,597 INFO L87 Difference]: Start difference. First operand 2281 states and 3527 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:36,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:36,238 INFO L93 Difference]: Finished difference Result 3421 states and 5273 transitions. [2022-04-28 02:01:36,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:36,239 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:01:36,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:36,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:36,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 208 transitions. [2022-04-28 02:01:36,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:36,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 208 transitions. [2022-04-28 02:01:36,241 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 208 transitions. [2022-04-28 02:01:36,401 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 208 edges. 208 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:36,599 INFO L225 Difference]: With dead ends: 3421 [2022-04-28 02:01:36,600 INFO L226 Difference]: Without dead ends: 2315 [2022-04-28 02:01:36,601 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:36,602 INFO L413 NwaCegarLoop]: 111 mSDtfsCounter, 152 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 152 SdHoareTripleChecker+Valid, 118 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:36,602 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [152 Valid, 118 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:36,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2315 states. [2022-04-28 02:01:36,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2315 to 2313. [2022-04-28 02:01:36,643 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:36,646 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2315 states. Second operand has 2313 states, 2309 states have (on average 1.5262018189692508) internal successors, (3524), 2309 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:36,648 INFO L74 IsIncluded]: Start isIncluded. First operand 2315 states. Second operand has 2313 states, 2309 states have (on average 1.5262018189692508) internal successors, (3524), 2309 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:36,651 INFO L87 Difference]: Start difference. First operand 2315 states. Second operand has 2313 states, 2309 states have (on average 1.5262018189692508) internal successors, (3524), 2309 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:36,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:36,793 INFO L93 Difference]: Finished difference Result 2315 states and 3528 transitions. [2022-04-28 02:01:36,793 INFO L276 IsEmpty]: Start isEmpty. Operand 2315 states and 3528 transitions. [2022-04-28 02:01:36,795 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:36,795 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:36,798 INFO L74 IsIncluded]: Start isIncluded. First operand has 2313 states, 2309 states have (on average 1.5262018189692508) internal successors, (3524), 2309 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2315 states. [2022-04-28 02:01:36,801 INFO L87 Difference]: Start difference. First operand has 2313 states, 2309 states have (on average 1.5262018189692508) internal successors, (3524), 2309 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2315 states. [2022-04-28 02:01:36,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:36,992 INFO L93 Difference]: Finished difference Result 2315 states and 3528 transitions. [2022-04-28 02:01:36,992 INFO L276 IsEmpty]: Start isEmpty. Operand 2315 states and 3528 transitions. [2022-04-28 02:01:36,995 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:36,995 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:36,995 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:36,995 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:36,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2313 states, 2309 states have (on average 1.5262018189692508) internal successors, (3524), 2309 states have internal predecessors, (3524), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:37,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2313 states to 2313 states and 3527 transitions. [2022-04-28 02:01:37,204 INFO L78 Accepts]: Start accepts. Automaton has 2313 states and 3527 transitions. Word has length 29 [2022-04-28 02:01:37,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:37,205 INFO L495 AbstractCegarLoop]: Abstraction has 2313 states and 3527 transitions. [2022-04-28 02:01:37,205 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:37,205 INFO L276 IsEmpty]: Start isEmpty. Operand 2313 states and 3527 transitions. [2022-04-28 02:01:37,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-28 02:01:37,207 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:37,207 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:37,207 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-04-28 02:01:37,207 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:37,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:37,208 INFO L85 PathProgramCache]: Analyzing trace with hash -701181757, now seen corresponding path program 1 times [2022-04-28 02:01:37,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:37,208 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250836845] [2022-04-28 02:01:37,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:37,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:37,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:37,254 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:37,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:37,259 INFO L290 TraceCheckUtils]: 0: Hoare triple {60134#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {60128#true} is VALID [2022-04-28 02:01:37,259 INFO L290 TraceCheckUtils]: 1: Hoare triple {60128#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,259 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {60128#true} {60128#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,260 INFO L272 TraceCheckUtils]: 0: Hoare triple {60128#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60134#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:37,260 INFO L290 TraceCheckUtils]: 1: Hoare triple {60134#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {60128#true} is VALID [2022-04-28 02:01:37,260 INFO L290 TraceCheckUtils]: 2: Hoare triple {60128#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,260 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {60128#true} {60128#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,260 INFO L272 TraceCheckUtils]: 4: Hoare triple {60128#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,261 INFO L290 TraceCheckUtils]: 5: Hoare triple {60128#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {60128#true} is VALID [2022-04-28 02:01:37,261 INFO L290 TraceCheckUtils]: 6: Hoare triple {60128#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {60128#true} is VALID [2022-04-28 02:01:37,261 INFO L290 TraceCheckUtils]: 7: Hoare triple {60128#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {60128#true} is VALID [2022-04-28 02:01:37,261 INFO L290 TraceCheckUtils]: 8: Hoare triple {60128#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,261 INFO L290 TraceCheckUtils]: 9: Hoare triple {60128#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,261 INFO L290 TraceCheckUtils]: 10: Hoare triple {60128#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,261 INFO L290 TraceCheckUtils]: 11: Hoare triple {60128#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,261 INFO L290 TraceCheckUtils]: 12: Hoare triple {60128#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,261 INFO L290 TraceCheckUtils]: 13: Hoare triple {60128#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {60128#true} is VALID [2022-04-28 02:01:37,262 INFO L290 TraceCheckUtils]: 14: Hoare triple {60128#true} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,262 INFO L290 TraceCheckUtils]: 15: Hoare triple {60133#(= main_~lk7~0 1)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,262 INFO L290 TraceCheckUtils]: 16: Hoare triple {60133#(= main_~lk7~0 1)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,263 INFO L290 TraceCheckUtils]: 17: Hoare triple {60133#(= main_~lk7~0 1)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,263 INFO L290 TraceCheckUtils]: 18: Hoare triple {60133#(= main_~lk7~0 1)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,263 INFO L290 TraceCheckUtils]: 19: Hoare triple {60133#(= main_~lk7~0 1)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,264 INFO L290 TraceCheckUtils]: 20: Hoare triple {60133#(= main_~lk7~0 1)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,264 INFO L290 TraceCheckUtils]: 21: Hoare triple {60133#(= main_~lk7~0 1)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,264 INFO L290 TraceCheckUtils]: 22: Hoare triple {60133#(= main_~lk7~0 1)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,265 INFO L290 TraceCheckUtils]: 23: Hoare triple {60133#(= main_~lk7~0 1)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,265 INFO L290 TraceCheckUtils]: 24: Hoare triple {60133#(= main_~lk7~0 1)} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,265 INFO L290 TraceCheckUtils]: 25: Hoare triple {60133#(= main_~lk7~0 1)} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,266 INFO L290 TraceCheckUtils]: 26: Hoare triple {60133#(= main_~lk7~0 1)} [300] L153-1-->L159: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {60133#(= main_~lk7~0 1)} is VALID [2022-04-28 02:01:37,266 INFO L290 TraceCheckUtils]: 27: Hoare triple {60133#(= main_~lk7~0 1)} [302] L159-->L184-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {60129#false} is VALID [2022-04-28 02:01:37,266 INFO L290 TraceCheckUtils]: 28: Hoare triple {60129#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60129#false} is VALID [2022-04-28 02:01:37,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:37,267 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:37,267 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [250836845] [2022-04-28 02:01:37,267 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [250836845] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:37,267 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:37,267 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:37,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [183920622] [2022-04-28 02:01:37,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:37,268 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:01:37,269 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:37,269 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:37,289 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:37,289 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:37,289 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:37,290 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:37,290 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:37,290 INFO L87 Difference]: Start difference. First operand 2313 states and 3527 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:37,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:37,996 INFO L93 Difference]: Finished difference Result 4109 states and 6409 transitions. [2022-04-28 02:01:37,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:37,997 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:01:37,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:37,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:38,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 131 transitions. [2022-04-28 02:01:38,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:38,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 131 transitions. [2022-04-28 02:01:38,004 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 131 transitions. [2022-04-28 02:01:38,141 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 131 edges. 131 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:38,717 INFO L225 Difference]: With dead ends: 4109 [2022-04-28 02:01:38,717 INFO L226 Difference]: Without dead ends: 4107 [2022-04-28 02:01:38,718 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:38,718 INFO L413 NwaCegarLoop]: 77 mSDtfsCounter, 160 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:38,718 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [160 Valid, 84 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:38,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4107 states. [2022-04-28 02:01:38,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4107 to 3337. [2022-04-28 02:01:38,778 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:38,781 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4107 states. Second operand has 3337 states, 3333 states have (on average 1.4797479747974798) internal successors, (4932), 3333 states have internal predecessors, (4932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:38,784 INFO L74 IsIncluded]: Start isIncluded. First operand 4107 states. Second operand has 3337 states, 3333 states have (on average 1.4797479747974798) internal successors, (4932), 3333 states have internal predecessors, (4932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:38,786 INFO L87 Difference]: Start difference. First operand 4107 states. Second operand has 3337 states, 3333 states have (on average 1.4797479747974798) internal successors, (4932), 3333 states have internal predecessors, (4932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:39,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:39,261 INFO L93 Difference]: Finished difference Result 4107 states and 6344 transitions. [2022-04-28 02:01:39,261 INFO L276 IsEmpty]: Start isEmpty. Operand 4107 states and 6344 transitions. [2022-04-28 02:01:39,265 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:39,265 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:39,268 INFO L74 IsIncluded]: Start isIncluded. First operand has 3337 states, 3333 states have (on average 1.4797479747974798) internal successors, (4932), 3333 states have internal predecessors, (4932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4107 states. [2022-04-28 02:01:39,270 INFO L87 Difference]: Start difference. First operand has 3337 states, 3333 states have (on average 1.4797479747974798) internal successors, (4932), 3333 states have internal predecessors, (4932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4107 states. [2022-04-28 02:01:39,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:39,727 INFO L93 Difference]: Finished difference Result 4107 states and 6344 transitions. [2022-04-28 02:01:39,727 INFO L276 IsEmpty]: Start isEmpty. Operand 4107 states and 6344 transitions. [2022-04-28 02:01:39,731 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:39,731 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:39,731 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:39,731 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:39,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3337 states, 3333 states have (on average 1.4797479747974798) internal successors, (4932), 3333 states have internal predecessors, (4932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:40,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3337 states to 3337 states and 4935 transitions. [2022-04-28 02:01:40,086 INFO L78 Accepts]: Start accepts. Automaton has 3337 states and 4935 transitions. Word has length 29 [2022-04-28 02:01:40,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:40,087 INFO L495 AbstractCegarLoop]: Abstraction has 3337 states and 4935 transitions. [2022-04-28 02:01:40,087 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:40,087 INFO L276 IsEmpty]: Start isEmpty. Operand 3337 states and 4935 transitions. [2022-04-28 02:01:40,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-28 02:01:40,089 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:40,089 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:40,089 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-04-28 02:01:40,089 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:40,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:40,090 INFO L85 PathProgramCache]: Analyzing trace with hash 806370052, now seen corresponding path program 1 times [2022-04-28 02:01:40,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:40,090 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833544245] [2022-04-28 02:01:40,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:40,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:40,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:40,120 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:40,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:40,124 INFO L290 TraceCheckUtils]: 0: Hoare triple {76012#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {76006#true} is VALID [2022-04-28 02:01:40,124 INFO L290 TraceCheckUtils]: 1: Hoare triple {76006#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,124 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {76006#true} {76006#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,125 INFO L272 TraceCheckUtils]: 0: Hoare triple {76006#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {76012#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:40,125 INFO L290 TraceCheckUtils]: 1: Hoare triple {76012#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {76006#true} is VALID [2022-04-28 02:01:40,125 INFO L290 TraceCheckUtils]: 2: Hoare triple {76006#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,125 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {76006#true} {76006#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,125 INFO L272 TraceCheckUtils]: 4: Hoare triple {76006#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,125 INFO L290 TraceCheckUtils]: 5: Hoare triple {76006#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {76006#true} is VALID [2022-04-28 02:01:40,126 INFO L290 TraceCheckUtils]: 6: Hoare triple {76006#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {76006#true} is VALID [2022-04-28 02:01:40,126 INFO L290 TraceCheckUtils]: 7: Hoare triple {76006#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {76006#true} is VALID [2022-04-28 02:01:40,126 INFO L290 TraceCheckUtils]: 8: Hoare triple {76006#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,126 INFO L290 TraceCheckUtils]: 9: Hoare triple {76006#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,126 INFO L290 TraceCheckUtils]: 10: Hoare triple {76006#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,126 INFO L290 TraceCheckUtils]: 11: Hoare triple {76006#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,126 INFO L290 TraceCheckUtils]: 12: Hoare triple {76006#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,126 INFO L290 TraceCheckUtils]: 13: Hoare triple {76006#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {76006#true} is VALID [2022-04-28 02:01:40,127 INFO L290 TraceCheckUtils]: 14: Hoare triple {76006#true} [263] L98-1-->L102-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,127 INFO L290 TraceCheckUtils]: 15: Hoare triple {76011#(= main_~p7~0 0)} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,127 INFO L290 TraceCheckUtils]: 16: Hoare triple {76011#(= main_~p7~0 0)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,128 INFO L290 TraceCheckUtils]: 17: Hoare triple {76011#(= main_~p7~0 0)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,128 INFO L290 TraceCheckUtils]: 18: Hoare triple {76011#(= main_~p7~0 0)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,128 INFO L290 TraceCheckUtils]: 19: Hoare triple {76011#(= main_~p7~0 0)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,129 INFO L290 TraceCheckUtils]: 20: Hoare triple {76011#(= main_~p7~0 0)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,129 INFO L290 TraceCheckUtils]: 21: Hoare triple {76011#(= main_~p7~0 0)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,129 INFO L290 TraceCheckUtils]: 22: Hoare triple {76011#(= main_~p7~0 0)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,130 INFO L290 TraceCheckUtils]: 23: Hoare triple {76011#(= main_~p7~0 0)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,130 INFO L290 TraceCheckUtils]: 24: Hoare triple {76011#(= main_~p7~0 0)} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,130 INFO L290 TraceCheckUtils]: 25: Hoare triple {76011#(= main_~p7~0 0)} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {76011#(= main_~p7~0 0)} is VALID [2022-04-28 02:01:40,130 INFO L290 TraceCheckUtils]: 26: Hoare triple {76011#(= main_~p7~0 0)} [300] L153-1-->L159: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {76007#false} is VALID [2022-04-28 02:01:40,131 INFO L290 TraceCheckUtils]: 27: Hoare triple {76007#false} [302] L159-->L184-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {76007#false} is VALID [2022-04-28 02:01:40,131 INFO L290 TraceCheckUtils]: 28: Hoare triple {76007#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {76007#false} is VALID [2022-04-28 02:01:40,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:40,131 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:40,131 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833544245] [2022-04-28 02:01:40,131 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1833544245] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:40,131 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:40,131 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:40,131 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240465799] [2022-04-28 02:01:40,132 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:40,132 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:01:40,132 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:40,132 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:40,152 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:40,153 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:40,153 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:40,153 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:40,153 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:40,153 INFO L87 Difference]: Start difference. First operand 3337 states and 4935 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:42,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:42,151 INFO L93 Difference]: Finished difference Result 7757 states and 11529 transitions. [2022-04-28 02:01:42,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:42,152 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:01:42,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:42,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:42,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 210 transitions. [2022-04-28 02:01:42,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:42,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 210 transitions. [2022-04-28 02:01:42,154 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 210 transitions. [2022-04-28 02:01:42,283 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 210 edges. 210 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:42,896 INFO L225 Difference]: With dead ends: 7757 [2022-04-28 02:01:42,896 INFO L226 Difference]: Without dead ends: 4491 [2022-04-28 02:01:42,899 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:42,900 INFO L413 NwaCegarLoop]: 116 mSDtfsCounter, 142 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 142 SdHoareTripleChecker+Valid, 123 SdHoareTripleChecker+Invalid, 73 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:42,900 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [142 Valid, 123 Invalid, 73 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:42,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4491 states. [2022-04-28 02:01:42,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4491 to 4489. [2022-04-28 02:01:42,993 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:42,998 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4491 states. Second operand has 4489 states, 4485 states have (on average 1.470680044593088) internal successors, (6596), 4485 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:43,001 INFO L74 IsIncluded]: Start isIncluded. First operand 4491 states. Second operand has 4489 states, 4485 states have (on average 1.470680044593088) internal successors, (6596), 4485 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:43,004 INFO L87 Difference]: Start difference. First operand 4491 states. Second operand has 4489 states, 4485 states have (on average 1.470680044593088) internal successors, (6596), 4485 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:43,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:43,547 INFO L93 Difference]: Finished difference Result 4491 states and 6600 transitions. [2022-04-28 02:01:43,547 INFO L276 IsEmpty]: Start isEmpty. Operand 4491 states and 6600 transitions. [2022-04-28 02:01:43,551 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:43,551 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:43,555 INFO L74 IsIncluded]: Start isIncluded. First operand has 4489 states, 4485 states have (on average 1.470680044593088) internal successors, (6596), 4485 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4491 states. [2022-04-28 02:01:43,557 INFO L87 Difference]: Start difference. First operand has 4489 states, 4485 states have (on average 1.470680044593088) internal successors, (6596), 4485 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4491 states. [2022-04-28 02:01:44,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:44,091 INFO L93 Difference]: Finished difference Result 4491 states and 6600 transitions. [2022-04-28 02:01:44,091 INFO L276 IsEmpty]: Start isEmpty. Operand 4491 states and 6600 transitions. [2022-04-28 02:01:44,095 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:44,095 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:44,095 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:44,095 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:44,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4489 states, 4485 states have (on average 1.470680044593088) internal successors, (6596), 4485 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:44,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4489 states to 4489 states and 6599 transitions. [2022-04-28 02:01:44,685 INFO L78 Accepts]: Start accepts. Automaton has 4489 states and 6599 transitions. Word has length 29 [2022-04-28 02:01:44,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:44,685 INFO L495 AbstractCegarLoop]: Abstraction has 4489 states and 6599 transitions. [2022-04-28 02:01:44,685 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:44,686 INFO L276 IsEmpty]: Start isEmpty. Operand 4489 states and 6599 transitions. [2022-04-28 02:01:44,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-28 02:01:44,688 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:44,688 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:44,688 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-04-28 02:01:44,688 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:44,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:44,689 INFO L85 PathProgramCache]: Analyzing trace with hash -261765188, now seen corresponding path program 1 times [2022-04-28 02:01:44,689 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:44,689 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [512639738] [2022-04-28 02:01:44,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:44,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:44,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:44,716 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:44,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:44,719 INFO L290 TraceCheckUtils]: 0: Hoare triple {97586#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {97580#true} is VALID [2022-04-28 02:01:44,719 INFO L290 TraceCheckUtils]: 1: Hoare triple {97580#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,719 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {97580#true} {97580#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,720 INFO L272 TraceCheckUtils]: 0: Hoare triple {97580#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {97586#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:44,720 INFO L290 TraceCheckUtils]: 1: Hoare triple {97586#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {97580#true} is VALID [2022-04-28 02:01:44,720 INFO L290 TraceCheckUtils]: 2: Hoare triple {97580#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,720 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {97580#true} {97580#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,720 INFO L272 TraceCheckUtils]: 4: Hoare triple {97580#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,720 INFO L290 TraceCheckUtils]: 5: Hoare triple {97580#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {97580#true} is VALID [2022-04-28 02:01:44,720 INFO L290 TraceCheckUtils]: 6: Hoare triple {97580#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {97580#true} is VALID [2022-04-28 02:01:44,721 INFO L290 TraceCheckUtils]: 7: Hoare triple {97580#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {97580#true} is VALID [2022-04-28 02:01:44,721 INFO L290 TraceCheckUtils]: 8: Hoare triple {97580#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,721 INFO L290 TraceCheckUtils]: 9: Hoare triple {97580#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,721 INFO L290 TraceCheckUtils]: 10: Hoare triple {97580#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,721 INFO L290 TraceCheckUtils]: 11: Hoare triple {97580#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,721 INFO L290 TraceCheckUtils]: 12: Hoare triple {97580#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,721 INFO L290 TraceCheckUtils]: 13: Hoare triple {97580#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {97580#true} is VALID [2022-04-28 02:01:44,721 INFO L290 TraceCheckUtils]: 14: Hoare triple {97580#true} [262] L98-1-->L102-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,722 INFO L290 TraceCheckUtils]: 15: Hoare triple {97585#(not (= main_~p7~0 0))} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,722 INFO L290 TraceCheckUtils]: 16: Hoare triple {97585#(not (= main_~p7~0 0))} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,722 INFO L290 TraceCheckUtils]: 17: Hoare triple {97585#(not (= main_~p7~0 0))} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,723 INFO L290 TraceCheckUtils]: 18: Hoare triple {97585#(not (= main_~p7~0 0))} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,723 INFO L290 TraceCheckUtils]: 19: Hoare triple {97585#(not (= main_~p7~0 0))} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,723 INFO L290 TraceCheckUtils]: 20: Hoare triple {97585#(not (= main_~p7~0 0))} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,723 INFO L290 TraceCheckUtils]: 21: Hoare triple {97585#(not (= main_~p7~0 0))} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,724 INFO L290 TraceCheckUtils]: 22: Hoare triple {97585#(not (= main_~p7~0 0))} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,724 INFO L290 TraceCheckUtils]: 23: Hoare triple {97585#(not (= main_~p7~0 0))} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,724 INFO L290 TraceCheckUtils]: 24: Hoare triple {97585#(not (= main_~p7~0 0))} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,725 INFO L290 TraceCheckUtils]: 25: Hoare triple {97585#(not (= main_~p7~0 0))} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {97585#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:01:44,725 INFO L290 TraceCheckUtils]: 26: Hoare triple {97585#(not (= main_~p7~0 0))} [301] L153-1-->L158-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {97581#false} is VALID [2022-04-28 02:01:44,725 INFO L290 TraceCheckUtils]: 27: Hoare triple {97581#false} [304] L158-1-->L164: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {97581#false} is VALID [2022-04-28 02:01:44,725 INFO L290 TraceCheckUtils]: 28: Hoare triple {97581#false} [306] L164-->L184-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {97581#false} is VALID [2022-04-28 02:01:44,725 INFO L290 TraceCheckUtils]: 29: Hoare triple {97581#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {97581#false} is VALID [2022-04-28 02:01:44,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:44,726 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:44,726 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [512639738] [2022-04-28 02:01:44,726 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [512639738] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:44,726 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:44,726 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:44,726 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2078017918] [2022-04-28 02:01:44,726 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:44,726 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:01:44,727 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:44,727 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:44,744 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:44,745 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:44,745 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:44,745 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:44,745 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:44,745 INFO L87 Difference]: Start difference. First operand 4489 states and 6599 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:46,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:46,207 INFO L93 Difference]: Finished difference Result 6733 states and 9865 transitions. [2022-04-28 02:01:46,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:46,208 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:01:46,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:46,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:46,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 205 transitions. [2022-04-28 02:01:46,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:46,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 205 transitions. [2022-04-28 02:01:46,211 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 205 transitions. [2022-04-28 02:01:46,340 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 205 edges. 205 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:46,907 INFO L225 Difference]: With dead ends: 6733 [2022-04-28 02:01:46,907 INFO L226 Difference]: Without dead ends: 4555 [2022-04-28 02:01:46,909 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:46,910 INFO L413 NwaCegarLoop]: 108 mSDtfsCounter, 151 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 115 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:46,910 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [151 Valid, 115 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:01:46,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4555 states. [2022-04-28 02:01:46,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4555 to 4553. [2022-04-28 02:01:46,982 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:46,989 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4555 states. Second operand has 4553 states, 4549 states have (on average 1.449989008573313) internal successors, (6596), 4549 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:46,992 INFO L74 IsIncluded]: Start isIncluded. First operand 4555 states. Second operand has 4553 states, 4549 states have (on average 1.449989008573313) internal successors, (6596), 4549 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:46,995 INFO L87 Difference]: Start difference. First operand 4555 states. Second operand has 4553 states, 4549 states have (on average 1.449989008573313) internal successors, (6596), 4549 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:47,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:47,589 INFO L93 Difference]: Finished difference Result 4555 states and 6600 transitions. [2022-04-28 02:01:47,589 INFO L276 IsEmpty]: Start isEmpty. Operand 4555 states and 6600 transitions. [2022-04-28 02:01:47,595 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:47,595 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:47,599 INFO L74 IsIncluded]: Start isIncluded. First operand has 4553 states, 4549 states have (on average 1.449989008573313) internal successors, (6596), 4549 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4555 states. [2022-04-28 02:01:47,602 INFO L87 Difference]: Start difference. First operand has 4553 states, 4549 states have (on average 1.449989008573313) internal successors, (6596), 4549 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4555 states. [2022-04-28 02:01:48,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:48,144 INFO L93 Difference]: Finished difference Result 4555 states and 6600 transitions. [2022-04-28 02:01:48,144 INFO L276 IsEmpty]: Start isEmpty. Operand 4555 states and 6600 transitions. [2022-04-28 02:01:48,148 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:48,148 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:48,148 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:48,148 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:48,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4553 states, 4549 states have (on average 1.449989008573313) internal successors, (6596), 4549 states have internal predecessors, (6596), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:48,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4553 states to 4553 states and 6599 transitions. [2022-04-28 02:01:48,667 INFO L78 Accepts]: Start accepts. Automaton has 4553 states and 6599 transitions. Word has length 30 [2022-04-28 02:01:48,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:48,667 INFO L495 AbstractCegarLoop]: Abstraction has 4553 states and 6599 transitions. [2022-04-28 02:01:48,667 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:48,667 INFO L276 IsEmpty]: Start isEmpty. Operand 4553 states and 6599 transitions. [2022-04-28 02:01:48,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-28 02:01:48,669 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:48,669 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:48,669 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-04-28 02:01:48,670 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:48,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:48,671 INFO L85 PathProgramCache]: Analyzing trace with hash -772299365, now seen corresponding path program 1 times [2022-04-28 02:01:48,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:48,671 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1060490391] [2022-04-28 02:01:48,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:48,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:48,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:48,711 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:48,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:48,717 INFO L290 TraceCheckUtils]: 0: Hoare triple {118328#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {118322#true} is VALID [2022-04-28 02:01:48,717 INFO L290 TraceCheckUtils]: 1: Hoare triple {118322#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,717 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {118322#true} {118322#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,717 INFO L272 TraceCheckUtils]: 0: Hoare triple {118322#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {118328#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:48,718 INFO L290 TraceCheckUtils]: 1: Hoare triple {118328#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {118322#true} is VALID [2022-04-28 02:01:48,718 INFO L290 TraceCheckUtils]: 2: Hoare triple {118322#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,718 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {118322#true} {118322#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,718 INFO L272 TraceCheckUtils]: 4: Hoare triple {118322#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,718 INFO L290 TraceCheckUtils]: 5: Hoare triple {118322#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {118322#true} is VALID [2022-04-28 02:01:48,718 INFO L290 TraceCheckUtils]: 6: Hoare triple {118322#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {118322#true} is VALID [2022-04-28 02:01:48,718 INFO L290 TraceCheckUtils]: 7: Hoare triple {118322#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {118322#true} is VALID [2022-04-28 02:01:48,718 INFO L290 TraceCheckUtils]: 8: Hoare triple {118322#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,719 INFO L290 TraceCheckUtils]: 9: Hoare triple {118322#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,719 INFO L290 TraceCheckUtils]: 10: Hoare triple {118322#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,719 INFO L290 TraceCheckUtils]: 11: Hoare triple {118322#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,719 INFO L290 TraceCheckUtils]: 12: Hoare triple {118322#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,719 INFO L290 TraceCheckUtils]: 13: Hoare triple {118322#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,719 INFO L290 TraceCheckUtils]: 14: Hoare triple {118322#true} [263] L98-1-->L102-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {118322#true} is VALID [2022-04-28 02:01:48,719 INFO L290 TraceCheckUtils]: 15: Hoare triple {118322#true} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,720 INFO L290 TraceCheckUtils]: 16: Hoare triple {118327#(= main_~lk8~0 1)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,720 INFO L290 TraceCheckUtils]: 17: Hoare triple {118327#(= main_~lk8~0 1)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,720 INFO L290 TraceCheckUtils]: 18: Hoare triple {118327#(= main_~lk8~0 1)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,721 INFO L290 TraceCheckUtils]: 19: Hoare triple {118327#(= main_~lk8~0 1)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,721 INFO L290 TraceCheckUtils]: 20: Hoare triple {118327#(= main_~lk8~0 1)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,721 INFO L290 TraceCheckUtils]: 21: Hoare triple {118327#(= main_~lk8~0 1)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,722 INFO L290 TraceCheckUtils]: 22: Hoare triple {118327#(= main_~lk8~0 1)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,722 INFO L290 TraceCheckUtils]: 23: Hoare triple {118327#(= main_~lk8~0 1)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,722 INFO L290 TraceCheckUtils]: 24: Hoare triple {118327#(= main_~lk8~0 1)} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,723 INFO L290 TraceCheckUtils]: 25: Hoare triple {118327#(= main_~lk8~0 1)} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,723 INFO L290 TraceCheckUtils]: 26: Hoare triple {118327#(= main_~lk8~0 1)} [301] L153-1-->L158-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,723 INFO L290 TraceCheckUtils]: 27: Hoare triple {118327#(= main_~lk8~0 1)} [304] L158-1-->L164: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {118327#(= main_~lk8~0 1)} is VALID [2022-04-28 02:01:48,724 INFO L290 TraceCheckUtils]: 28: Hoare triple {118327#(= main_~lk8~0 1)} [306] L164-->L184-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {118323#false} is VALID [2022-04-28 02:01:48,724 INFO L290 TraceCheckUtils]: 29: Hoare triple {118323#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {118323#false} is VALID [2022-04-28 02:01:48,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:48,724 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:48,724 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1060490391] [2022-04-28 02:01:48,724 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1060490391] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:48,724 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:48,724 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:48,724 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2021685191] [2022-04-28 02:01:48,725 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:48,725 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:01:48,725 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:48,725 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:48,746 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:48,746 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:48,746 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:48,747 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:48,747 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:48,747 INFO L87 Difference]: Start difference. First operand 4553 states and 6599 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:50,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:50,785 INFO L93 Difference]: Finished difference Result 7949 states and 11785 transitions. [2022-04-28 02:01:50,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:01:50,785 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:01:50,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:01:50,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:50,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 127 transitions. [2022-04-28 02:01:50,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:50,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 127 transitions. [2022-04-28 02:01:50,787 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 127 transitions. [2022-04-28 02:01:50,902 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 127 edges. 127 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:52,741 INFO L225 Difference]: With dead ends: 7949 [2022-04-28 02:01:52,741 INFO L226 Difference]: Without dead ends: 7947 [2022-04-28 02:01:52,742 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:01:52,742 INFO L413 NwaCegarLoop]: 76 mSDtfsCounter, 153 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 71 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 153 SdHoareTripleChecker+Valid, 83 SdHoareTripleChecker+Invalid, 73 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 71 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:01:52,743 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [153 Valid, 83 Invalid, 73 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 71 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:01:52,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7947 states. [2022-04-28 02:01:52,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7947 to 6665. [2022-04-28 02:01:52,835 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:01:52,842 INFO L82 GeneralOperation]: Start isEquivalent. First operand 7947 states. Second operand has 6665 states, 6661 states have (on average 1.4033928839513587) internal successors, (9348), 6661 states have internal predecessors, (9348), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:52,848 INFO L74 IsIncluded]: Start isIncluded. First operand 7947 states. Second operand has 6665 states, 6661 states have (on average 1.4033928839513587) internal successors, (9348), 6661 states have internal predecessors, (9348), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:52,853 INFO L87 Difference]: Start difference. First operand 7947 states. Second operand has 6665 states, 6661 states have (on average 1.4033928839513587) internal successors, (9348), 6661 states have internal predecessors, (9348), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:54,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:54,616 INFO L93 Difference]: Finished difference Result 7947 states and 11656 transitions. [2022-04-28 02:01:54,616 INFO L276 IsEmpty]: Start isEmpty. Operand 7947 states and 11656 transitions. [2022-04-28 02:01:54,622 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:54,622 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:54,629 INFO L74 IsIncluded]: Start isIncluded. First operand has 6665 states, 6661 states have (on average 1.4033928839513587) internal successors, (9348), 6661 states have internal predecessors, (9348), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 7947 states. [2022-04-28 02:01:54,632 INFO L87 Difference]: Start difference. First operand has 6665 states, 6661 states have (on average 1.4033928839513587) internal successors, (9348), 6661 states have internal predecessors, (9348), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 7947 states. [2022-04-28 02:01:56,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:01:56,122 INFO L93 Difference]: Finished difference Result 7947 states and 11656 transitions. [2022-04-28 02:01:56,122 INFO L276 IsEmpty]: Start isEmpty. Operand 7947 states and 11656 transitions. [2022-04-28 02:01:56,127 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:01:56,127 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:01:56,127 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:01:56,127 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:01:56,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6665 states, 6661 states have (on average 1.4033928839513587) internal successors, (9348), 6661 states have internal predecessors, (9348), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:57,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6665 states to 6665 states and 9351 transitions. [2022-04-28 02:01:57,361 INFO L78 Accepts]: Start accepts. Automaton has 6665 states and 9351 transitions. Word has length 30 [2022-04-28 02:01:57,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:01:57,361 INFO L495 AbstractCegarLoop]: Abstraction has 6665 states and 9351 transitions. [2022-04-28 02:01:57,362 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:57,362 INFO L276 IsEmpty]: Start isEmpty. Operand 6665 states and 9351 transitions. [2022-04-28 02:01:57,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-28 02:01:57,365 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:01:57,365 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:01:57,365 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-04-28 02:01:57,365 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:01:57,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:01:57,365 INFO L85 PathProgramCache]: Analyzing trace with hash 735252444, now seen corresponding path program 1 times [2022-04-28 02:01:57,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:01:57,366 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448837719] [2022-04-28 02:01:57,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:01:57,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:01:57,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:57,392 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:01:57,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:01:57,395 INFO L290 TraceCheckUtils]: 0: Hoare triple {149246#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {149240#true} is VALID [2022-04-28 02:01:57,395 INFO L290 TraceCheckUtils]: 1: Hoare triple {149240#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,395 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {149240#true} {149240#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,396 INFO L272 TraceCheckUtils]: 0: Hoare triple {149240#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {149246#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:01:57,396 INFO L290 TraceCheckUtils]: 1: Hoare triple {149246#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {149240#true} is VALID [2022-04-28 02:01:57,396 INFO L290 TraceCheckUtils]: 2: Hoare triple {149240#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,396 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {149240#true} {149240#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,396 INFO L272 TraceCheckUtils]: 4: Hoare triple {149240#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,396 INFO L290 TraceCheckUtils]: 5: Hoare triple {149240#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {149240#true} is VALID [2022-04-28 02:01:57,396 INFO L290 TraceCheckUtils]: 6: Hoare triple {149240#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {149240#true} is VALID [2022-04-28 02:01:57,397 INFO L290 TraceCheckUtils]: 7: Hoare triple {149240#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {149240#true} is VALID [2022-04-28 02:01:57,397 INFO L290 TraceCheckUtils]: 8: Hoare triple {149240#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,397 INFO L290 TraceCheckUtils]: 9: Hoare triple {149240#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,397 INFO L290 TraceCheckUtils]: 10: Hoare triple {149240#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,397 INFO L290 TraceCheckUtils]: 11: Hoare triple {149240#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,397 INFO L290 TraceCheckUtils]: 12: Hoare triple {149240#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,397 INFO L290 TraceCheckUtils]: 13: Hoare triple {149240#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,397 INFO L290 TraceCheckUtils]: 14: Hoare triple {149240#true} [263] L98-1-->L102-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {149240#true} is VALID [2022-04-28 02:01:57,398 INFO L290 TraceCheckUtils]: 15: Hoare triple {149240#true} [265] L102-1-->L106-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,398 INFO L290 TraceCheckUtils]: 16: Hoare triple {149245#(= main_~p8~0 0)} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,398 INFO L290 TraceCheckUtils]: 17: Hoare triple {149245#(= main_~p8~0 0)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,399 INFO L290 TraceCheckUtils]: 18: Hoare triple {149245#(= main_~p8~0 0)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,399 INFO L290 TraceCheckUtils]: 19: Hoare triple {149245#(= main_~p8~0 0)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,399 INFO L290 TraceCheckUtils]: 20: Hoare triple {149245#(= main_~p8~0 0)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,400 INFO L290 TraceCheckUtils]: 21: Hoare triple {149245#(= main_~p8~0 0)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,400 INFO L290 TraceCheckUtils]: 22: Hoare triple {149245#(= main_~p8~0 0)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,400 INFO L290 TraceCheckUtils]: 23: Hoare triple {149245#(= main_~p8~0 0)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,401 INFO L290 TraceCheckUtils]: 24: Hoare triple {149245#(= main_~p8~0 0)} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,401 INFO L290 TraceCheckUtils]: 25: Hoare triple {149245#(= main_~p8~0 0)} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,401 INFO L290 TraceCheckUtils]: 26: Hoare triple {149245#(= main_~p8~0 0)} [301] L153-1-->L158-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {149245#(= main_~p8~0 0)} is VALID [2022-04-28 02:01:57,401 INFO L290 TraceCheckUtils]: 27: Hoare triple {149245#(= main_~p8~0 0)} [304] L158-1-->L164: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {149241#false} is VALID [2022-04-28 02:01:57,402 INFO L290 TraceCheckUtils]: 28: Hoare triple {149241#false} [306] L164-->L184-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {149241#false} is VALID [2022-04-28 02:01:57,402 INFO L290 TraceCheckUtils]: 29: Hoare triple {149241#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {149241#false} is VALID [2022-04-28 02:01:57,402 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:01:57,402 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:01:57,402 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448837719] [2022-04-28 02:01:57,402 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1448837719] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:01:57,402 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:01:57,402 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:01:57,402 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1880076694] [2022-04-28 02:01:57,403 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:01:57,403 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:01:57,403 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:01:57,403 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:01:57,423 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:01:57,423 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:01:57,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:01:57,423 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:01:57,423 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:01:57,423 INFO L87 Difference]: Start difference. First operand 6665 states and 9351 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:03,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:03,717 INFO L93 Difference]: Finished difference Result 15373 states and 21641 transitions. [2022-04-28 02:02:03,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:03,717 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:02:03,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:03,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:03,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 207 transitions. [2022-04-28 02:02:03,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:03,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 207 transitions. [2022-04-28 02:02:03,721 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 207 transitions. [2022-04-28 02:02:03,849 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 207 edges. 207 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:06,101 INFO L225 Difference]: With dead ends: 15373 [2022-04-28 02:02:06,101 INFO L226 Difference]: Without dead ends: 8843 [2022-04-28 02:02:06,105 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:06,106 INFO L413 NwaCegarLoop]: 118 mSDtfsCounter, 136 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 136 SdHoareTripleChecker+Valid, 125 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:06,106 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [136 Valid, 125 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:06,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8843 states. [2022-04-28 02:02:06,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8843 to 8841. [2022-04-28 02:02:06,266 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:06,275 INFO L82 GeneralOperation]: Start isEquivalent. First operand 8843 states. Second operand has 8841 states, 8837 states have (on average 1.3909697861265136) internal successors, (12292), 8837 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:06,279 INFO L74 IsIncluded]: Start isIncluded. First operand 8843 states. Second operand has 8841 states, 8837 states have (on average 1.3909697861265136) internal successors, (12292), 8837 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:06,283 INFO L87 Difference]: Start difference. First operand 8843 states. Second operand has 8841 states, 8837 states have (on average 1.3909697861265136) internal successors, (12292), 8837 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:08,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:08,312 INFO L93 Difference]: Finished difference Result 8843 states and 12296 transitions. [2022-04-28 02:02:08,312 INFO L276 IsEmpty]: Start isEmpty. Operand 8843 states and 12296 transitions. [2022-04-28 02:02:08,318 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:08,318 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:08,324 INFO L74 IsIncluded]: Start isIncluded. First operand has 8841 states, 8837 states have (on average 1.3909697861265136) internal successors, (12292), 8837 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 8843 states. [2022-04-28 02:02:08,328 INFO L87 Difference]: Start difference. First operand has 8841 states, 8837 states have (on average 1.3909697861265136) internal successors, (12292), 8837 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 8843 states. [2022-04-28 02:02:10,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:10,414 INFO L93 Difference]: Finished difference Result 8843 states and 12296 transitions. [2022-04-28 02:02:10,414 INFO L276 IsEmpty]: Start isEmpty. Operand 8843 states and 12296 transitions. [2022-04-28 02:02:10,421 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:10,421 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:10,421 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:10,422 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:10,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8841 states, 8837 states have (on average 1.3909697861265136) internal successors, (12292), 8837 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:12,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8841 states to 8841 states and 12295 transitions. [2022-04-28 02:02:12,718 INFO L78 Accepts]: Start accepts. Automaton has 8841 states and 12295 transitions. Word has length 30 [2022-04-28 02:02:12,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:12,718 INFO L495 AbstractCegarLoop]: Abstraction has 8841 states and 12295 transitions. [2022-04-28 02:02:12,718 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:12,718 INFO L276 IsEmpty]: Start isEmpty. Operand 8841 states and 12295 transitions. [2022-04-28 02:02:12,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-28 02:02:12,722 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:12,722 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:12,722 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-04-28 02:02:12,722 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:12,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:12,722 INFO L85 PathProgramCache]: Analyzing trace with hash 1828556384, now seen corresponding path program 1 times [2022-04-28 02:02:12,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:12,722 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012205829] [2022-04-28 02:02:12,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:12,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:12,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:12,751 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:12,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:12,755 INFO L290 TraceCheckUtils]: 0: Hoare triple {191812#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {191806#true} is VALID [2022-04-28 02:02:12,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {191806#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,755 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {191806#true} {191806#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,756 INFO L272 TraceCheckUtils]: 0: Hoare triple {191806#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191812#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:12,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {191812#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {191806#true} is VALID [2022-04-28 02:02:12,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {191806#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {191806#true} {191806#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {191806#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {191806#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {191806#true} is VALID [2022-04-28 02:02:12,757 INFO L290 TraceCheckUtils]: 6: Hoare triple {191806#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {191806#true} is VALID [2022-04-28 02:02:12,757 INFO L290 TraceCheckUtils]: 7: Hoare triple {191806#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {191806#true} is VALID [2022-04-28 02:02:12,757 INFO L290 TraceCheckUtils]: 8: Hoare triple {191806#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,757 INFO L290 TraceCheckUtils]: 9: Hoare triple {191806#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,757 INFO L290 TraceCheckUtils]: 10: Hoare triple {191806#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,757 INFO L290 TraceCheckUtils]: 11: Hoare triple {191806#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,757 INFO L290 TraceCheckUtils]: 12: Hoare triple {191806#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,757 INFO L290 TraceCheckUtils]: 13: Hoare triple {191806#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,757 INFO L290 TraceCheckUtils]: 14: Hoare triple {191806#true} [263] L98-1-->L102-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {191806#true} is VALID [2022-04-28 02:02:12,758 INFO L290 TraceCheckUtils]: 15: Hoare triple {191806#true} [264] L102-1-->L106-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,758 INFO L290 TraceCheckUtils]: 16: Hoare triple {191811#(not (= main_~p8~0 0))} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,758 INFO L290 TraceCheckUtils]: 17: Hoare triple {191811#(not (= main_~p8~0 0))} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,759 INFO L290 TraceCheckUtils]: 18: Hoare triple {191811#(not (= main_~p8~0 0))} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,759 INFO L290 TraceCheckUtils]: 19: Hoare triple {191811#(not (= main_~p8~0 0))} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,759 INFO L290 TraceCheckUtils]: 20: Hoare triple {191811#(not (= main_~p8~0 0))} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,760 INFO L290 TraceCheckUtils]: 21: Hoare triple {191811#(not (= main_~p8~0 0))} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,760 INFO L290 TraceCheckUtils]: 22: Hoare triple {191811#(not (= main_~p8~0 0))} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,760 INFO L290 TraceCheckUtils]: 23: Hoare triple {191811#(not (= main_~p8~0 0))} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,760 INFO L290 TraceCheckUtils]: 24: Hoare triple {191811#(not (= main_~p8~0 0))} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,761 INFO L290 TraceCheckUtils]: 25: Hoare triple {191811#(not (= main_~p8~0 0))} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,761 INFO L290 TraceCheckUtils]: 26: Hoare triple {191811#(not (= main_~p8~0 0))} [301] L153-1-->L158-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {191811#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:02:12,761 INFO L290 TraceCheckUtils]: 27: Hoare triple {191811#(not (= main_~p8~0 0))} [305] L158-1-->L163-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {191807#false} is VALID [2022-04-28 02:02:12,761 INFO L290 TraceCheckUtils]: 28: Hoare triple {191807#false} [308] L163-1-->L169: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {191807#false} is VALID [2022-04-28 02:02:12,761 INFO L290 TraceCheckUtils]: 29: Hoare triple {191807#false} [310] L169-->L184-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {191807#false} is VALID [2022-04-28 02:02:12,762 INFO L290 TraceCheckUtils]: 30: Hoare triple {191807#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {191807#false} is VALID [2022-04-28 02:02:12,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:12,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:12,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1012205829] [2022-04-28 02:02:12,762 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1012205829] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:12,762 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:12,762 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:12,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625232703] [2022-04-28 02:02:12,762 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:12,763 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:12,763 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:12,763 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:12,783 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:12,783 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:12,783 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:12,783 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:12,783 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:12,783 INFO L87 Difference]: Start difference. First operand 8841 states and 12295 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:17,932 INFO L93 Difference]: Finished difference Result 13261 states and 18377 transitions. [2022-04-28 02:02:17,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:17,932 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:17,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:17,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 202 transitions. [2022-04-28 02:02:17,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 202 transitions. [2022-04-28 02:02:17,934 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 202 transitions. [2022-04-28 02:02:18,067 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 202 edges. 202 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:20,517 INFO L225 Difference]: With dead ends: 13261 [2022-04-28 02:02:20,518 INFO L226 Difference]: Without dead ends: 8971 [2022-04-28 02:02:20,521 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:20,521 INFO L413 NwaCegarLoop]: 105 mSDtfsCounter, 150 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 112 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:20,521 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [150 Valid, 112 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:02:20,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8971 states. [2022-04-28 02:02:20,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8971 to 8969. [2022-04-28 02:02:20,662 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:20,673 INFO L82 GeneralOperation]: Start isEquivalent. First operand 8971 states. Second operand has 8969 states, 8965 states have (on average 1.3711098717233687) internal successors, (12292), 8965 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,682 INFO L74 IsIncluded]: Start isIncluded. First operand 8971 states. Second operand has 8969 states, 8965 states have (on average 1.3711098717233687) internal successors, (12292), 8965 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,689 INFO L87 Difference]: Start difference. First operand 8971 states. Second operand has 8969 states, 8965 states have (on average 1.3711098717233687) internal successors, (12292), 8965 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:22,801 INFO L93 Difference]: Finished difference Result 8971 states and 12296 transitions. [2022-04-28 02:02:22,801 INFO L276 IsEmpty]: Start isEmpty. Operand 8971 states and 12296 transitions. [2022-04-28 02:02:22,808 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:22,808 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:22,817 INFO L74 IsIncluded]: Start isIncluded. First operand has 8969 states, 8965 states have (on average 1.3711098717233687) internal successors, (12292), 8965 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 8971 states. [2022-04-28 02:02:22,824 INFO L87 Difference]: Start difference. First operand has 8969 states, 8965 states have (on average 1.3711098717233687) internal successors, (12292), 8965 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 8971 states. [2022-04-28 02:02:25,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:25,062 INFO L93 Difference]: Finished difference Result 8971 states and 12296 transitions. [2022-04-28 02:02:25,062 INFO L276 IsEmpty]: Start isEmpty. Operand 8971 states and 12296 transitions. [2022-04-28 02:02:25,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:25,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:25,069 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:25,069 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:25,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8969 states, 8965 states have (on average 1.3711098717233687) internal successors, (12292), 8965 states have internal predecessors, (12292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:27,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8969 states to 8969 states and 12295 transitions. [2022-04-28 02:02:27,403 INFO L78 Accepts]: Start accepts. Automaton has 8969 states and 12295 transitions. Word has length 31 [2022-04-28 02:02:27,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:27,403 INFO L495 AbstractCegarLoop]: Abstraction has 8969 states and 12295 transitions. [2022-04-28 02:02:27,403 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:27,403 INFO L276 IsEmpty]: Start isEmpty. Operand 8969 states and 12295 transitions. [2022-04-28 02:02:27,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-28 02:02:27,406 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:27,406 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:27,406 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-04-28 02:02:27,406 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:27,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:27,407 INFO L85 PathProgramCache]: Analyzing trace with hash 1318022207, now seen corresponding path program 1 times [2022-04-28 02:02:27,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:27,407 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645834167] [2022-04-28 02:02:27,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:27,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:27,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:27,435 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:27,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:27,438 INFO L290 TraceCheckUtils]: 0: Hoare triple {232650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {232644#true} is VALID [2022-04-28 02:02:27,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {232644#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,438 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {232644#true} {232644#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,439 INFO L272 TraceCheckUtils]: 0: Hoare triple {232644#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:27,439 INFO L290 TraceCheckUtils]: 1: Hoare triple {232650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {232644#true} is VALID [2022-04-28 02:02:27,439 INFO L290 TraceCheckUtils]: 2: Hoare triple {232644#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,439 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {232644#true} {232644#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,439 INFO L272 TraceCheckUtils]: 4: Hoare triple {232644#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,439 INFO L290 TraceCheckUtils]: 5: Hoare triple {232644#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {232644#true} is VALID [2022-04-28 02:02:27,440 INFO L290 TraceCheckUtils]: 6: Hoare triple {232644#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {232644#true} is VALID [2022-04-28 02:02:27,440 INFO L290 TraceCheckUtils]: 7: Hoare triple {232644#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {232644#true} is VALID [2022-04-28 02:02:27,440 INFO L290 TraceCheckUtils]: 8: Hoare triple {232644#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,440 INFO L290 TraceCheckUtils]: 9: Hoare triple {232644#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,440 INFO L290 TraceCheckUtils]: 10: Hoare triple {232644#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,440 INFO L290 TraceCheckUtils]: 11: Hoare triple {232644#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,440 INFO L290 TraceCheckUtils]: 12: Hoare triple {232644#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,440 INFO L290 TraceCheckUtils]: 13: Hoare triple {232644#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,440 INFO L290 TraceCheckUtils]: 14: Hoare triple {232644#true} [263] L98-1-->L102-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,440 INFO L290 TraceCheckUtils]: 15: Hoare triple {232644#true} [265] L102-1-->L106-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {232644#true} is VALID [2022-04-28 02:02:27,441 INFO L290 TraceCheckUtils]: 16: Hoare triple {232644#true} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,441 INFO L290 TraceCheckUtils]: 17: Hoare triple {232649#(= main_~lk9~0 1)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,442 INFO L290 TraceCheckUtils]: 18: Hoare triple {232649#(= main_~lk9~0 1)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,442 INFO L290 TraceCheckUtils]: 19: Hoare triple {232649#(= main_~lk9~0 1)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,442 INFO L290 TraceCheckUtils]: 20: Hoare triple {232649#(= main_~lk9~0 1)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,442 INFO L290 TraceCheckUtils]: 21: Hoare triple {232649#(= main_~lk9~0 1)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,443 INFO L290 TraceCheckUtils]: 22: Hoare triple {232649#(= main_~lk9~0 1)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,443 INFO L290 TraceCheckUtils]: 23: Hoare triple {232649#(= main_~lk9~0 1)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,443 INFO L290 TraceCheckUtils]: 24: Hoare triple {232649#(= main_~lk9~0 1)} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,444 INFO L290 TraceCheckUtils]: 25: Hoare triple {232649#(= main_~lk9~0 1)} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,444 INFO L290 TraceCheckUtils]: 26: Hoare triple {232649#(= main_~lk9~0 1)} [301] L153-1-->L158-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,444 INFO L290 TraceCheckUtils]: 27: Hoare triple {232649#(= main_~lk9~0 1)} [305] L158-1-->L163-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,444 INFO L290 TraceCheckUtils]: 28: Hoare triple {232649#(= main_~lk9~0 1)} [308] L163-1-->L169: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {232649#(= main_~lk9~0 1)} is VALID [2022-04-28 02:02:27,445 INFO L290 TraceCheckUtils]: 29: Hoare triple {232649#(= main_~lk9~0 1)} [310] L169-->L184-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {232645#false} is VALID [2022-04-28 02:02:27,445 INFO L290 TraceCheckUtils]: 30: Hoare triple {232645#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232645#false} is VALID [2022-04-28 02:02:27,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:27,445 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:27,445 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1645834167] [2022-04-28 02:02:27,445 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1645834167] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:27,446 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:27,446 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:27,446 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1220340804] [2022-04-28 02:02:27,446 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:27,446 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:27,446 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:27,447 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:27,465 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:27,465 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:27,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:27,465 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:27,465 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:27,466 INFO L87 Difference]: Start difference. First operand 8969 states and 12295 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:33,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:33,891 INFO L93 Difference]: Finished difference Result 15373 states and 21513 transitions. [2022-04-28 02:02:33,891 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:33,891 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:33,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:33,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:33,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 123 transitions. [2022-04-28 02:02:33,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:33,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 123 transitions. [2022-04-28 02:02:33,893 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 123 transitions. [2022-04-28 02:02:33,976 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 123 edges. 123 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:40,669 INFO L225 Difference]: With dead ends: 15373 [2022-04-28 02:02:40,669 INFO L226 Difference]: Without dead ends: 15371 [2022-04-28 02:02:40,671 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:40,672 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 146 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 146 SdHoareTripleChecker+Valid, 82 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:40,672 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [146 Valid, 82 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:40,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15371 states. [2022-04-28 02:02:40,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15371 to 13321. [2022-04-28 02:02:40,850 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:40,867 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15371 states. Second operand has 13321 states, 13317 states have (on average 1.326725238417061) internal successors, (17668), 13317 states have internal predecessors, (17668), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:40,883 INFO L74 IsIncluded]: Start isIncluded. First operand 15371 states. Second operand has 13321 states, 13317 states have (on average 1.326725238417061) internal successors, (17668), 13317 states have internal predecessors, (17668), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:40,901 INFO L87 Difference]: Start difference. First operand 15371 states. Second operand has 13321 states, 13317 states have (on average 1.326725238417061) internal successors, (17668), 13317 states have internal predecessors, (17668), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:46,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:46,831 INFO L93 Difference]: Finished difference Result 15371 states and 21256 transitions. [2022-04-28 02:02:46,831 INFO L276 IsEmpty]: Start isEmpty. Operand 15371 states and 21256 transitions. [2022-04-28 02:02:46,839 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:46,839 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:46,848 INFO L74 IsIncluded]: Start isIncluded. First operand has 13321 states, 13317 states have (on average 1.326725238417061) internal successors, (17668), 13317 states have internal predecessors, (17668), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15371 states. [2022-04-28 02:02:46,855 INFO L87 Difference]: Start difference. First operand has 13321 states, 13317 states have (on average 1.326725238417061) internal successors, (17668), 13317 states have internal predecessors, (17668), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15371 states. [2022-04-28 02:02:53,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:53,156 INFO L93 Difference]: Finished difference Result 15371 states and 21256 transitions. [2022-04-28 02:02:53,156 INFO L276 IsEmpty]: Start isEmpty. Operand 15371 states and 21256 transitions. [2022-04-28 02:02:53,193 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:53,193 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:53,193 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:53,194 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:53,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13321 states, 13317 states have (on average 1.326725238417061) internal successors, (17668), 13317 states have internal predecessors, (17668), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:57,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13321 states to 13321 states and 17671 transitions. [2022-04-28 02:02:57,918 INFO L78 Accepts]: Start accepts. Automaton has 13321 states and 17671 transitions. Word has length 31 [2022-04-28 02:02:57,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:57,918 INFO L495 AbstractCegarLoop]: Abstraction has 13321 states and 17671 transitions. [2022-04-28 02:02:57,918 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:57,918 INFO L276 IsEmpty]: Start isEmpty. Operand 13321 states and 17671 transitions. [2022-04-28 02:02:57,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-28 02:02:57,924 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:57,924 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:57,924 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-04-28 02:02:57,924 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:57,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:57,924 INFO L85 PathProgramCache]: Analyzing trace with hash -1469393280, now seen corresponding path program 1 times [2022-04-28 02:02:57,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:57,925 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363596926] [2022-04-28 02:02:57,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:57,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:57,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:57,960 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:57,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:57,964 INFO L290 TraceCheckUtils]: 0: Hoare triple {292880#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {292874#true} is VALID [2022-04-28 02:02:57,964 INFO L290 TraceCheckUtils]: 1: Hoare triple {292874#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,964 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {292874#true} {292874#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,964 INFO L272 TraceCheckUtils]: 0: Hoare triple {292874#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292880#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:57,964 INFO L290 TraceCheckUtils]: 1: Hoare triple {292880#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {292874#true} is VALID [2022-04-28 02:02:57,965 INFO L290 TraceCheckUtils]: 2: Hoare triple {292874#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,965 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {292874#true} {292874#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,965 INFO L272 TraceCheckUtils]: 4: Hoare triple {292874#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,965 INFO L290 TraceCheckUtils]: 5: Hoare triple {292874#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {292874#true} is VALID [2022-04-28 02:02:57,965 INFO L290 TraceCheckUtils]: 6: Hoare triple {292874#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {292874#true} is VALID [2022-04-28 02:02:57,965 INFO L290 TraceCheckUtils]: 7: Hoare triple {292874#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {292874#true} is VALID [2022-04-28 02:02:57,965 INFO L290 TraceCheckUtils]: 8: Hoare triple {292874#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,966 INFO L290 TraceCheckUtils]: 9: Hoare triple {292874#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,966 INFO L290 TraceCheckUtils]: 10: Hoare triple {292874#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,966 INFO L290 TraceCheckUtils]: 11: Hoare triple {292874#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,966 INFO L290 TraceCheckUtils]: 12: Hoare triple {292874#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,966 INFO L290 TraceCheckUtils]: 13: Hoare triple {292874#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,966 INFO L290 TraceCheckUtils]: 14: Hoare triple {292874#true} [263] L98-1-->L102-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,966 INFO L290 TraceCheckUtils]: 15: Hoare triple {292874#true} [265] L102-1-->L106-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {292874#true} is VALID [2022-04-28 02:02:57,966 INFO L290 TraceCheckUtils]: 16: Hoare triple {292874#true} [267] L106-1-->L110-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,967 INFO L290 TraceCheckUtils]: 17: Hoare triple {292879#(= main_~p9~0 0)} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,967 INFO L290 TraceCheckUtils]: 18: Hoare triple {292879#(= main_~p9~0 0)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,967 INFO L290 TraceCheckUtils]: 19: Hoare triple {292879#(= main_~p9~0 0)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,968 INFO L290 TraceCheckUtils]: 20: Hoare triple {292879#(= main_~p9~0 0)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,968 INFO L290 TraceCheckUtils]: 21: Hoare triple {292879#(= main_~p9~0 0)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,968 INFO L290 TraceCheckUtils]: 22: Hoare triple {292879#(= main_~p9~0 0)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,969 INFO L290 TraceCheckUtils]: 23: Hoare triple {292879#(= main_~p9~0 0)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,969 INFO L290 TraceCheckUtils]: 24: Hoare triple {292879#(= main_~p9~0 0)} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,969 INFO L290 TraceCheckUtils]: 25: Hoare triple {292879#(= main_~p9~0 0)} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,970 INFO L290 TraceCheckUtils]: 26: Hoare triple {292879#(= main_~p9~0 0)} [301] L153-1-->L158-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,970 INFO L290 TraceCheckUtils]: 27: Hoare triple {292879#(= main_~p9~0 0)} [305] L158-1-->L163-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {292879#(= main_~p9~0 0)} is VALID [2022-04-28 02:02:57,970 INFO L290 TraceCheckUtils]: 28: Hoare triple {292879#(= main_~p9~0 0)} [308] L163-1-->L169: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {292875#false} is VALID [2022-04-28 02:02:57,970 INFO L290 TraceCheckUtils]: 29: Hoare triple {292875#false} [310] L169-->L184-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {292875#false} is VALID [2022-04-28 02:02:57,971 INFO L290 TraceCheckUtils]: 30: Hoare triple {292875#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292875#false} is VALID [2022-04-28 02:02:57,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:57,971 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:57,971 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1363596926] [2022-04-28 02:02:57,971 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1363596926] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:57,971 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:57,971 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:57,971 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526243010] [2022-04-28 02:02:57,971 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:57,972 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:57,972 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:57,972 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:58,003 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:58,003 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:58,003 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:58,004 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:58,004 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:58,004 INFO L87 Difference]: Start difference. First operand 13321 states and 17671 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:22,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:03:22,441 INFO L93 Difference]: Finished difference Result 30477 states and 40457 transitions. [2022-04-28 02:03:22,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:03:22,441 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:03:22,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:03:22,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:22,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 204 transitions. [2022-04-28 02:03:22,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:22,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 204 transitions. [2022-04-28 02:03:22,443 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 204 transitions. [2022-04-28 02:03:22,563 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 204 edges. 204 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:03:31,015 INFO L225 Difference]: With dead ends: 30477 [2022-04-28 02:03:31,015 INFO L226 Difference]: Without dead ends: 17419 [2022-04-28 02:03:31,024 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:03:31,024 INFO L413 NwaCegarLoop]: 120 mSDtfsCounter, 130 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 130 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:03:31,024 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [130 Valid, 127 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:03:31,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17419 states. [2022-04-28 02:03:31,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17419 to 17417. [2022-04-28 02:03:31,245 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:03:31,264 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17419 states. Second operand has 17417 states, 17413 states have (on average 1.3086774249124218) internal successors, (22788), 17413 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:31,282 INFO L74 IsIncluded]: Start isIncluded. First operand 17419 states. Second operand has 17417 states, 17413 states have (on average 1.3086774249124218) internal successors, (22788), 17413 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:31,300 INFO L87 Difference]: Start difference. First operand 17419 states. Second operand has 17417 states, 17413 states have (on average 1.3086774249124218) internal successors, (22788), 17413 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:38,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:03:38,615 INFO L93 Difference]: Finished difference Result 17419 states and 22792 transitions. [2022-04-28 02:03:38,615 INFO L276 IsEmpty]: Start isEmpty. Operand 17419 states and 22792 transitions. [2022-04-28 02:03:38,625 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:03:38,625 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:03:38,641 INFO L74 IsIncluded]: Start isIncluded. First operand has 17417 states, 17413 states have (on average 1.3086774249124218) internal successors, (22788), 17413 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17419 states. [2022-04-28 02:03:38,656 INFO L87 Difference]: Start difference. First operand has 17417 states, 17413 states have (on average 1.3086774249124218) internal successors, (22788), 17413 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17419 states. [2022-04-28 02:03:47,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:03:47,094 INFO L93 Difference]: Finished difference Result 17419 states and 22792 transitions. [2022-04-28 02:03:47,094 INFO L276 IsEmpty]: Start isEmpty. Operand 17419 states and 22792 transitions. [2022-04-28 02:03:47,105 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:03:47,105 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:03:47,105 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:03:47,105 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:03:47,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17417 states, 17413 states have (on average 1.3086774249124218) internal successors, (22788), 17413 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:54,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17417 states to 17417 states and 22791 transitions. [2022-04-28 02:03:54,897 INFO L78 Accepts]: Start accepts. Automaton has 17417 states and 22791 transitions. Word has length 31 [2022-04-28 02:03:54,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:03:54,897 INFO L495 AbstractCegarLoop]: Abstraction has 17417 states and 22791 transitions. [2022-04-28 02:03:54,897 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:54,897 INFO L276 IsEmpty]: Start isEmpty. Operand 17417 states and 22791 transitions. [2022-04-28 02:03:54,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-28 02:03:54,917 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:03:54,917 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:03:54,917 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-04-28 02:03:54,917 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:03:54,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:03:54,918 INFO L85 PathProgramCache]: Analyzing trace with hash -2090951496, now seen corresponding path program 1 times [2022-04-28 02:03:54,918 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:03:54,918 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1714210456] [2022-04-28 02:03:54,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:03:54,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:03:54,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:03:54,953 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:03:54,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:03:54,957 INFO L290 TraceCheckUtils]: 0: Hoare triple {376918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {376912#true} is VALID [2022-04-28 02:03:54,957 INFO L290 TraceCheckUtils]: 1: Hoare triple {376912#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,957 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {376912#true} {376912#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,957 INFO L272 TraceCheckUtils]: 0: Hoare triple {376912#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {376918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:03:54,958 INFO L290 TraceCheckUtils]: 1: Hoare triple {376918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L290 TraceCheckUtils]: 2: Hoare triple {376912#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {376912#true} {376912#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L272 TraceCheckUtils]: 4: Hoare triple {376912#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L290 TraceCheckUtils]: 5: Hoare triple {376912#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L290 TraceCheckUtils]: 6: Hoare triple {376912#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L290 TraceCheckUtils]: 7: Hoare triple {376912#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L290 TraceCheckUtils]: 8: Hoare triple {376912#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L290 TraceCheckUtils]: 9: Hoare triple {376912#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L290 TraceCheckUtils]: 10: Hoare triple {376912#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L290 TraceCheckUtils]: 11: Hoare triple {376912#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,958 INFO L290 TraceCheckUtils]: 12: Hoare triple {376912#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,959 INFO L290 TraceCheckUtils]: 13: Hoare triple {376912#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,959 INFO L290 TraceCheckUtils]: 14: Hoare triple {376912#true} [263] L98-1-->L102-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,959 INFO L290 TraceCheckUtils]: 15: Hoare triple {376912#true} [265] L102-1-->L106-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {376912#true} is VALID [2022-04-28 02:03:54,959 INFO L290 TraceCheckUtils]: 16: Hoare triple {376912#true} [266] L106-1-->L110-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,959 INFO L290 TraceCheckUtils]: 17: Hoare triple {376917#(not (= main_~p9~0 0))} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,960 INFO L290 TraceCheckUtils]: 18: Hoare triple {376917#(not (= main_~p9~0 0))} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,960 INFO L290 TraceCheckUtils]: 19: Hoare triple {376917#(not (= main_~p9~0 0))} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,960 INFO L290 TraceCheckUtils]: 20: Hoare triple {376917#(not (= main_~p9~0 0))} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,960 INFO L290 TraceCheckUtils]: 21: Hoare triple {376917#(not (= main_~p9~0 0))} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,961 INFO L290 TraceCheckUtils]: 22: Hoare triple {376917#(not (= main_~p9~0 0))} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,961 INFO L290 TraceCheckUtils]: 23: Hoare triple {376917#(not (= main_~p9~0 0))} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,961 INFO L290 TraceCheckUtils]: 24: Hoare triple {376917#(not (= main_~p9~0 0))} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,961 INFO L290 TraceCheckUtils]: 25: Hoare triple {376917#(not (= main_~p9~0 0))} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,962 INFO L290 TraceCheckUtils]: 26: Hoare triple {376917#(not (= main_~p9~0 0))} [301] L153-1-->L158-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,962 INFO L290 TraceCheckUtils]: 27: Hoare triple {376917#(not (= main_~p9~0 0))} [305] L158-1-->L163-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {376917#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:03:54,962 INFO L290 TraceCheckUtils]: 28: Hoare triple {376917#(not (= main_~p9~0 0))} [309] L163-1-->L168-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {376913#false} is VALID [2022-04-28 02:03:54,962 INFO L290 TraceCheckUtils]: 29: Hoare triple {376913#false} [312] L168-1-->L174: Formula: (not (= v_main_~p10~0_2 0)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[] {376913#false} is VALID [2022-04-28 02:03:54,962 INFO L290 TraceCheckUtils]: 30: Hoare triple {376913#false} [314] L174-->L184-1: Formula: (not (= v_main_~lk10~0_3 1)) InVars {main_~lk10~0=v_main_~lk10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_3} AuxVars[] AssignedVars[] {376913#false} is VALID [2022-04-28 02:03:54,963 INFO L290 TraceCheckUtils]: 31: Hoare triple {376913#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {376913#false} is VALID [2022-04-28 02:03:54,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:03:54,963 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:03:54,963 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1714210456] [2022-04-28 02:03:54,963 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1714210456] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:03:54,963 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:03:54,963 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:03:54,963 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302116303] [2022-04-28 02:03:54,963 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:03:54,963 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:03:54,964 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:03:54,964 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:54,982 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:03:54,982 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:03:54,982 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:03:54,982 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:03:54,982 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:03:54,982 INFO L87 Difference]: Start difference. First operand 17417 states and 22791 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:13,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:04:13,240 INFO L93 Difference]: Finished difference Result 26125 states and 34057 transitions. [2022-04-28 02:04:13,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:04:13,240 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:04:13,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:04:13,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:13,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 199 transitions. [2022-04-28 02:04:13,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:13,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 199 transitions. [2022-04-28 02:04:13,242 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 199 transitions. [2022-04-28 02:04:13,363 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 199 edges. 199 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:04:22,105 INFO L225 Difference]: With dead ends: 26125 [2022-04-28 02:04:22,106 INFO L226 Difference]: Without dead ends: 17675 [2022-04-28 02:04:22,112 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:04:22,112 INFO L413 NwaCegarLoop]: 102 mSDtfsCounter, 149 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 149 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:04:22,112 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [149 Valid, 109 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:04:22,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17675 states. [2022-04-28 02:04:22,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17675 to 17673. [2022-04-28 02:04:22,345 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:04:22,363 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17675 states. Second operand has 17673 states, 17669 states have (on average 1.2897164525440037) internal successors, (22788), 17669 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:22,408 INFO L74 IsIncluded]: Start isIncluded. First operand 17675 states. Second operand has 17673 states, 17669 states have (on average 1.2897164525440037) internal successors, (22788), 17669 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:22,420 INFO L87 Difference]: Start difference. First operand 17675 states. Second operand has 17673 states, 17669 states have (on average 1.2897164525440037) internal successors, (22788), 17669 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:30,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:04:30,766 INFO L93 Difference]: Finished difference Result 17675 states and 22792 transitions. [2022-04-28 02:04:30,766 INFO L276 IsEmpty]: Start isEmpty. Operand 17675 states and 22792 transitions. [2022-04-28 02:04:30,777 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:04:30,777 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:04:30,789 INFO L74 IsIncluded]: Start isIncluded. First operand has 17673 states, 17669 states have (on average 1.2897164525440037) internal successors, (22788), 17669 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17675 states. [2022-04-28 02:04:30,799 INFO L87 Difference]: Start difference. First operand has 17673 states, 17669 states have (on average 1.2897164525440037) internal successors, (22788), 17669 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17675 states. [2022-04-28 02:04:38,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:04:38,529 INFO L93 Difference]: Finished difference Result 17675 states and 22792 transitions. [2022-04-28 02:04:38,529 INFO L276 IsEmpty]: Start isEmpty. Operand 17675 states and 22792 transitions. [2022-04-28 02:04:38,541 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:04:38,541 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:04:38,541 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:04:38,542 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:04:38,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17673 states, 17669 states have (on average 1.2897164525440037) internal successors, (22788), 17669 states have internal predecessors, (22788), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:46,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17673 states to 17673 states and 22791 transitions. [2022-04-28 02:04:46,244 INFO L78 Accepts]: Start accepts. Automaton has 17673 states and 22791 transitions. Word has length 32 [2022-04-28 02:04:46,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:04:46,244 INFO L495 AbstractCegarLoop]: Abstraction has 17673 states and 22791 transitions. [2022-04-28 02:04:46,244 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:46,244 INFO L276 IsEmpty]: Start isEmpty. Operand 17673 states and 22791 transitions. [2022-04-28 02:04:46,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-28 02:04:46,250 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:04:46,250 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:04:46,250 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-04-28 02:04:46,250 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:04:46,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:04:46,251 INFO L85 PathProgramCache]: Analyzing trace with hash 1693481623, now seen corresponding path program 1 times [2022-04-28 02:04:46,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:04:46,251 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931396933] [2022-04-28 02:04:46,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:04:46,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:04:46,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:04:46,291 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:04:46,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:04:46,294 INFO L290 TraceCheckUtils]: 0: Hoare triple {457372#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {457366#true} is VALID [2022-04-28 02:04:46,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {457366#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,294 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {457366#true} {457366#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,295 INFO L272 TraceCheckUtils]: 0: Hoare triple {457366#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {457372#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:04:46,295 INFO L290 TraceCheckUtils]: 1: Hoare triple {457372#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {457366#true} is VALID [2022-04-28 02:04:46,295 INFO L290 TraceCheckUtils]: 2: Hoare triple {457366#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,295 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {457366#true} {457366#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,295 INFO L272 TraceCheckUtils]: 4: Hoare triple {457366#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,296 INFO L290 TraceCheckUtils]: 5: Hoare triple {457366#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {457366#true} is VALID [2022-04-28 02:04:46,296 INFO L290 TraceCheckUtils]: 6: Hoare triple {457366#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {457366#true} is VALID [2022-04-28 02:04:46,296 INFO L290 TraceCheckUtils]: 7: Hoare triple {457366#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {457366#true} is VALID [2022-04-28 02:04:46,296 INFO L290 TraceCheckUtils]: 8: Hoare triple {457366#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,296 INFO L290 TraceCheckUtils]: 9: Hoare triple {457366#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,296 INFO L290 TraceCheckUtils]: 10: Hoare triple {457366#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,296 INFO L290 TraceCheckUtils]: 11: Hoare triple {457366#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,296 INFO L290 TraceCheckUtils]: 12: Hoare triple {457366#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,296 INFO L290 TraceCheckUtils]: 13: Hoare triple {457366#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,296 INFO L290 TraceCheckUtils]: 14: Hoare triple {457366#true} [263] L98-1-->L102-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,297 INFO L290 TraceCheckUtils]: 15: Hoare triple {457366#true} [265] L102-1-->L106-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,297 INFO L290 TraceCheckUtils]: 16: Hoare triple {457366#true} [267] L106-1-->L110-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {457366#true} is VALID [2022-04-28 02:04:46,297 INFO L290 TraceCheckUtils]: 17: Hoare triple {457366#true} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,297 INFO L290 TraceCheckUtils]: 18: Hoare triple {457371#(= main_~lk10~0 1)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,298 INFO L290 TraceCheckUtils]: 19: Hoare triple {457371#(= main_~lk10~0 1)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,298 INFO L290 TraceCheckUtils]: 20: Hoare triple {457371#(= main_~lk10~0 1)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,298 INFO L290 TraceCheckUtils]: 21: Hoare triple {457371#(= main_~lk10~0 1)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,298 INFO L290 TraceCheckUtils]: 22: Hoare triple {457371#(= main_~lk10~0 1)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,299 INFO L290 TraceCheckUtils]: 23: Hoare triple {457371#(= main_~lk10~0 1)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,299 INFO L290 TraceCheckUtils]: 24: Hoare triple {457371#(= main_~lk10~0 1)} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,299 INFO L290 TraceCheckUtils]: 25: Hoare triple {457371#(= main_~lk10~0 1)} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,300 INFO L290 TraceCheckUtils]: 26: Hoare triple {457371#(= main_~lk10~0 1)} [301] L153-1-->L158-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,300 INFO L290 TraceCheckUtils]: 27: Hoare triple {457371#(= main_~lk10~0 1)} [305] L158-1-->L163-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,300 INFO L290 TraceCheckUtils]: 28: Hoare triple {457371#(= main_~lk10~0 1)} [309] L163-1-->L168-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,301 INFO L290 TraceCheckUtils]: 29: Hoare triple {457371#(= main_~lk10~0 1)} [312] L168-1-->L174: Formula: (not (= v_main_~p10~0_2 0)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[] {457371#(= main_~lk10~0 1)} is VALID [2022-04-28 02:04:46,301 INFO L290 TraceCheckUtils]: 30: Hoare triple {457371#(= main_~lk10~0 1)} [314] L174-->L184-1: Formula: (not (= v_main_~lk10~0_3 1)) InVars {main_~lk10~0=v_main_~lk10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_3} AuxVars[] AssignedVars[] {457367#false} is VALID [2022-04-28 02:04:46,301 INFO L290 TraceCheckUtils]: 31: Hoare triple {457367#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {457367#false} is VALID [2022-04-28 02:04:46,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:04:46,301 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:04:46,301 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [931396933] [2022-04-28 02:04:46,301 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [931396933] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:04:46,302 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:04:46,302 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:04:46,302 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1183912178] [2022-04-28 02:04:46,302 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:04:46,302 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:04:46,302 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:04:46,303 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:46,322 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:04:46,322 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:04:46,322 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:04:46,323 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:04:46,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:04:46,323 INFO L87 Difference]: Start difference. First operand 17673 states and 22791 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:05:09,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:05:09,455 INFO L93 Difference]: Finished difference Result 29709 states and 38921 transitions. [2022-04-28 02:05:09,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:05:09,455 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:05:09,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:05:09,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:05:09,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 119 transitions. [2022-04-28 02:05:09,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:05:09,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 119 transitions. [2022-04-28 02:05:09,457 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 119 transitions. [2022-04-28 02:05:09,533 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 119 edges. 119 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:05:33,465 INFO L225 Difference]: With dead ends: 29709 [2022-04-28 02:05:33,465 INFO L226 Difference]: Without dead ends: 29707 [2022-04-28 02:05:33,468 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:05:33,468 INFO L413 NwaCegarLoop]: 74 mSDtfsCounter, 139 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 139 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:05:33,469 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [139 Valid, 81 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:05:33,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29707 states. [2022-04-28 02:05:33,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29707 to 26633. [2022-04-28 02:05:33,821 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:05:33,848 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29707 states. Second operand has 26633 states, 26629 states have (on average 1.249915505651733) internal successors, (33284), 26629 states have internal predecessors, (33284), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:05:33,875 INFO L74 IsIncluded]: Start isIncluded. First operand 29707 states. Second operand has 26633 states, 26629 states have (on average 1.249915505651733) internal successors, (33284), 26629 states have internal predecessors, (33284), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:05:33,904 INFO L87 Difference]: Start difference. First operand 29707 states. Second operand has 26633 states, 26629 states have (on average 1.249915505651733) internal successors, (33284), 26629 states have internal predecessors, (33284), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:05:55,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:05:55,610 INFO L93 Difference]: Finished difference Result 29707 states and 38408 transitions. [2022-04-28 02:05:55,611 INFO L276 IsEmpty]: Start isEmpty. Operand 29707 states and 38408 transitions. [2022-04-28 02:05:55,627 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:05:55,627 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:05:55,652 INFO L74 IsIncluded]: Start isIncluded. First operand has 26633 states, 26629 states have (on average 1.249915505651733) internal successors, (33284), 26629 states have internal predecessors, (33284), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29707 states. [2022-04-28 02:05:55,678 INFO L87 Difference]: Start difference. First operand has 26633 states, 26629 states have (on average 1.249915505651733) internal successors, (33284), 26629 states have internal predecessors, (33284), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29707 states. [2022-04-28 02:06:18,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:06:18,603 INFO L93 Difference]: Finished difference Result 29707 states and 38408 transitions. [2022-04-28 02:06:18,604 INFO L276 IsEmpty]: Start isEmpty. Operand 29707 states and 38408 transitions. [2022-04-28 02:06:18,620 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:06:18,620 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:06:18,620 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:06:18,620 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:06:18,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26633 states, 26629 states have (on average 1.249915505651733) internal successors, (33284), 26629 states have internal predecessors, (33284), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:06:38,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26633 states to 26633 states and 33287 transitions. [2022-04-28 02:06:38,393 INFO L78 Accepts]: Start accepts. Automaton has 26633 states and 33287 transitions. Word has length 32 [2022-04-28 02:06:38,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:06:38,394 INFO L495 AbstractCegarLoop]: Abstraction has 26633 states and 33287 transitions. [2022-04-28 02:06:38,394 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:06:38,394 INFO L276 IsEmpty]: Start isEmpty. Operand 26633 states and 33287 transitions. [2022-04-28 02:06:38,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-28 02:06:38,405 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:06:38,405 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:06:38,405 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2022-04-28 02:06:38,406 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:06:38,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:06:38,406 INFO L85 PathProgramCache]: Analyzing trace with hash -1093933864, now seen corresponding path program 1 times [2022-04-28 02:06:38,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:06:38,406 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256257830] [2022-04-28 02:06:38,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:06:38,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:06:38,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:06:38,434 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:06:38,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:06:38,438 INFO L290 TraceCheckUtils]: 0: Hoare triple {574690#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {574684#true} is VALID [2022-04-28 02:06:38,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {574684#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,438 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {574684#true} {574684#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,439 INFO L272 TraceCheckUtils]: 0: Hoare triple {574684#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {574690#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:06:38,439 INFO L290 TraceCheckUtils]: 1: Hoare triple {574690#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {574684#true} is VALID [2022-04-28 02:06:38,439 INFO L290 TraceCheckUtils]: 2: Hoare triple {574684#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,439 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {574684#true} {574684#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,439 INFO L272 TraceCheckUtils]: 4: Hoare triple {574684#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,439 INFO L290 TraceCheckUtils]: 5: Hoare triple {574684#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {574684#true} is VALID [2022-04-28 02:06:38,439 INFO L290 TraceCheckUtils]: 6: Hoare triple {574684#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {574684#true} is VALID [2022-04-28 02:06:38,440 INFO L290 TraceCheckUtils]: 7: Hoare triple {574684#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {574684#true} is VALID [2022-04-28 02:06:38,440 INFO L290 TraceCheckUtils]: 8: Hoare triple {574684#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,440 INFO L290 TraceCheckUtils]: 9: Hoare triple {574684#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,440 INFO L290 TraceCheckUtils]: 10: Hoare triple {574684#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,440 INFO L290 TraceCheckUtils]: 11: Hoare triple {574684#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,440 INFO L290 TraceCheckUtils]: 12: Hoare triple {574684#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,440 INFO L290 TraceCheckUtils]: 13: Hoare triple {574684#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,440 INFO L290 TraceCheckUtils]: 14: Hoare triple {574684#true} [263] L98-1-->L102-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,440 INFO L290 TraceCheckUtils]: 15: Hoare triple {574684#true} [265] L102-1-->L106-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,441 INFO L290 TraceCheckUtils]: 16: Hoare triple {574684#true} [267] L106-1-->L110-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {574684#true} is VALID [2022-04-28 02:06:38,441 INFO L290 TraceCheckUtils]: 17: Hoare triple {574684#true} [269] L110-1-->L114-1: Formula: (= v_main_~p10~0_5 0) InVars {main_~p10~0=v_main_~p10~0_5} OutVars{main_~p10~0=v_main_~p10~0_5} AuxVars[] AssignedVars[] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,441 INFO L290 TraceCheckUtils]: 18: Hoare triple {574689#(= main_~p10~0 0)} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,442 INFO L290 TraceCheckUtils]: 19: Hoare triple {574689#(= main_~p10~0 0)} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,442 INFO L290 TraceCheckUtils]: 20: Hoare triple {574689#(= main_~p10~0 0)} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,442 INFO L290 TraceCheckUtils]: 21: Hoare triple {574689#(= main_~p10~0 0)} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,442 INFO L290 TraceCheckUtils]: 22: Hoare triple {574689#(= main_~p10~0 0)} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,443 INFO L290 TraceCheckUtils]: 23: Hoare triple {574689#(= main_~p10~0 0)} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,443 INFO L290 TraceCheckUtils]: 24: Hoare triple {574689#(= main_~p10~0 0)} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,443 INFO L290 TraceCheckUtils]: 25: Hoare triple {574689#(= main_~p10~0 0)} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,444 INFO L290 TraceCheckUtils]: 26: Hoare triple {574689#(= main_~p10~0 0)} [301] L153-1-->L158-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,444 INFO L290 TraceCheckUtils]: 27: Hoare triple {574689#(= main_~p10~0 0)} [305] L158-1-->L163-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,444 INFO L290 TraceCheckUtils]: 28: Hoare triple {574689#(= main_~p10~0 0)} [309] L163-1-->L168-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {574689#(= main_~p10~0 0)} is VALID [2022-04-28 02:06:38,445 INFO L290 TraceCheckUtils]: 29: Hoare triple {574689#(= main_~p10~0 0)} [312] L168-1-->L174: Formula: (not (= v_main_~p10~0_2 0)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[] {574685#false} is VALID [2022-04-28 02:06:38,445 INFO L290 TraceCheckUtils]: 30: Hoare triple {574685#false} [314] L174-->L184-1: Formula: (not (= v_main_~lk10~0_3 1)) InVars {main_~lk10~0=v_main_~lk10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_3} AuxVars[] AssignedVars[] {574685#false} is VALID [2022-04-28 02:06:38,445 INFO L290 TraceCheckUtils]: 31: Hoare triple {574685#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {574685#false} is VALID [2022-04-28 02:06:38,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:06:38,445 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:06:38,445 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256257830] [2022-04-28 02:06:38,446 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1256257830] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:06:38,446 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:06:38,446 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:06:38,446 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243615052] [2022-04-28 02:06:38,446 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:06:38,446 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:06:38,446 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:06:38,447 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:06:38,465 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:06:38,465 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:06:38,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:06:38,466 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:06:38,466 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:06:38,466 INFO L87 Difference]: Start difference. First operand 26633 states and 33287 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:09:57,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:09:57,965 INFO L93 Difference]: Finished difference Result 60429 states and 75273 transitions. [2022-04-28 02:09:57,965 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:09:57,965 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:09:57,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:09:57,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:09:57,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 201 transitions. [2022-04-28 02:09:57,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:09:57,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 201 transitions. [2022-04-28 02:09:57,967 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 201 transitions. [2022-04-28 02:09:58,085 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 201 edges. 201 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:10:30,518 INFO L225 Difference]: With dead ends: 60429 [2022-04-28 02:10:30,519 INFO L226 Difference]: Without dead ends: 34315 [2022-04-28 02:10:30,534 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:10:30,535 INFO L413 NwaCegarLoop]: 122 mSDtfsCounter, 124 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 124 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:10:30,535 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [124 Valid, 129 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:10:30,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34315 states. [2022-04-28 02:10:31,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34315 to 34313. [2022-04-28 02:10:31,068 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:10:31,107 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34315 states. Second operand has 34313 states, 34309 states have (on average 1.2238188230493456) internal successors, (41988), 34309 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:10:31,143 INFO L74 IsIncluded]: Start isIncluded. First operand 34315 states. Second operand has 34313 states, 34309 states have (on average 1.2238188230493456) internal successors, (41988), 34309 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:10:31,179 INFO L87 Difference]: Start difference. First operand 34315 states. Second operand has 34313 states, 34309 states have (on average 1.2238188230493456) internal successors, (41988), 34309 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:10:59,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:10:59,817 INFO L93 Difference]: Finished difference Result 34315 states and 41992 transitions. [2022-04-28 02:10:59,817 INFO L276 IsEmpty]: Start isEmpty. Operand 34315 states and 41992 transitions. [2022-04-28 02:10:59,839 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:10:59,839 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:10:59,864 INFO L74 IsIncluded]: Start isIncluded. First operand has 34313 states, 34309 states have (on average 1.2238188230493456) internal successors, (41988), 34309 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34315 states. [2022-04-28 02:10:59,888 INFO L87 Difference]: Start difference. First operand has 34313 states, 34309 states have (on average 1.2238188230493456) internal successors, (41988), 34309 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34315 states. [2022-04-28 02:11:27,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:11:27,775 INFO L93 Difference]: Finished difference Result 34315 states and 41992 transitions. [2022-04-28 02:11:27,775 INFO L276 IsEmpty]: Start isEmpty. Operand 34315 states and 41992 transitions. [2022-04-28 02:11:27,799 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:11:27,799 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:11:27,799 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:11:27,799 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:11:27,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34313 states, 34309 states have (on average 1.2238188230493456) internal successors, (41988), 34309 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:11:57,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34313 states to 34313 states and 41991 transitions. [2022-04-28 02:11:57,040 INFO L78 Accepts]: Start accepts. Automaton has 34313 states and 41991 transitions. Word has length 32 [2022-04-28 02:11:57,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:11:57,040 INFO L495 AbstractCegarLoop]: Abstraction has 34313 states and 41991 transitions. [2022-04-28 02:11:57,040 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:11:57,040 INFO L276 IsEmpty]: Start isEmpty. Operand 34313 states and 41991 transitions. [2022-04-28 02:11:57,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-28 02:11:57,053 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:11:57,053 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:11:57,053 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2022-04-28 02:11:57,053 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:11:57,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:11:57,053 INFO L85 PathProgramCache]: Analyzing trace with hash 958355932, now seen corresponding path program 1 times [2022-04-28 02:11:57,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:11:57,054 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873574232] [2022-04-28 02:11:57,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:11:57,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:11:57,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:11:57,087 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:11:57,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:11:57,090 INFO L290 TraceCheckUtils]: 0: Hoare triple {740648#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {740642#true} is VALID [2022-04-28 02:11:57,091 INFO L290 TraceCheckUtils]: 1: Hoare triple {740642#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,091 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {740642#true} {740642#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,091 INFO L272 TraceCheckUtils]: 0: Hoare triple {740642#true} [237] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {740648#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:11:57,091 INFO L290 TraceCheckUtils]: 1: Hoare triple {740648#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [239] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {740642#true} is VALID [2022-04-28 02:11:57,091 INFO L290 TraceCheckUtils]: 2: Hoare triple {740642#true} [242] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,092 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {740642#true} {740642#true} [324] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,092 INFO L272 TraceCheckUtils]: 4: Hoare triple {740642#true} [238] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,092 INFO L290 TraceCheckUtils]: 5: Hoare triple {740642#true} [241] mainENTRY-->L183-1: Formula: (and (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk4~0=v_main_~lk4~0_4, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {740642#true} is VALID [2022-04-28 02:11:57,092 INFO L290 TraceCheckUtils]: 6: Hoare triple {740642#true} [245] L183-1-->L49: Formula: (and (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (= |v_main_#t~nondet16_2| v_main_~cond~0_2) (<= |v_main_#t~nondet16_2| 2147483647)) InVars {main_#t~nondet16=|v_main_#t~nondet16_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet16, main_~cond~0] {740642#true} is VALID [2022-04-28 02:11:57,092 INFO L290 TraceCheckUtils]: 7: Hoare triple {740642#true} [248] L49-->L78: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk5~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {740642#true} is VALID [2022-04-28 02:11:57,092 INFO L290 TraceCheckUtils]: 8: Hoare triple {740642#true} [251] L78-->L78-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,092 INFO L290 TraceCheckUtils]: 9: Hoare triple {740642#true} [253] L78-2-->L82-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,092 INFO L290 TraceCheckUtils]: 10: Hoare triple {740642#true} [255] L82-1-->L86-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,093 INFO L290 TraceCheckUtils]: 11: Hoare triple {740642#true} [257] L86-1-->L90-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,093 INFO L290 TraceCheckUtils]: 12: Hoare triple {740642#true} [259] L90-1-->L94-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,093 INFO L290 TraceCheckUtils]: 13: Hoare triple {740642#true} [261] L94-1-->L98-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,093 INFO L290 TraceCheckUtils]: 14: Hoare triple {740642#true} [263] L98-1-->L102-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,093 INFO L290 TraceCheckUtils]: 15: Hoare triple {740642#true} [265] L102-1-->L106-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,093 INFO L290 TraceCheckUtils]: 16: Hoare triple {740642#true} [267] L106-1-->L110-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {740642#true} is VALID [2022-04-28 02:11:57,093 INFO L290 TraceCheckUtils]: 17: Hoare triple {740642#true} [268] L110-1-->L114-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,094 INFO L290 TraceCheckUtils]: 18: Hoare triple {740647#(not (= main_~p10~0 0))} [270] L114-1-->L118-1: Formula: (and (not (= v_main_~p11~0_3 0)) (= v_main_~lk11~0_6 1)) InVars {main_~p11~0=v_main_~p11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_3} AuxVars[] AssignedVars[main_~lk11~0] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,094 INFO L290 TraceCheckUtils]: 19: Hoare triple {740647#(not (= main_~p10~0 0))} [272] L118-1-->L122-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_3 0))) InVars {main_~p12~0=v_main_~p12~0_3} OutVars{main_~p12~0=v_main_~p12~0_3, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,094 INFO L290 TraceCheckUtils]: 20: Hoare triple {740647#(not (= main_~p10~0 0))} [275] L122-1-->L128-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,095 INFO L290 TraceCheckUtils]: 21: Hoare triple {740647#(not (= main_~p10~0 0))} [279] L128-1-->L133-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,095 INFO L290 TraceCheckUtils]: 22: Hoare triple {740647#(not (= main_~p10~0 0))} [285] L133-1-->L138-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,095 INFO L290 TraceCheckUtils]: 23: Hoare triple {740647#(not (= main_~p10~0 0))} [289] L138-1-->L143-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,096 INFO L290 TraceCheckUtils]: 24: Hoare triple {740647#(not (= main_~p10~0 0))} [293] L143-1-->L148-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,096 INFO L290 TraceCheckUtils]: 25: Hoare triple {740647#(not (= main_~p10~0 0))} [297] L148-1-->L153-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,096 INFO L290 TraceCheckUtils]: 26: Hoare triple {740647#(not (= main_~p10~0 0))} [301] L153-1-->L158-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,097 INFO L290 TraceCheckUtils]: 27: Hoare triple {740647#(not (= main_~p10~0 0))} [305] L158-1-->L163-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,097 INFO L290 TraceCheckUtils]: 28: Hoare triple {740647#(not (= main_~p10~0 0))} [309] L163-1-->L168-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {740647#(not (= main_~p10~0 0))} is VALID [2022-04-28 02:11:57,097 INFO L290 TraceCheckUtils]: 29: Hoare triple {740647#(not (= main_~p10~0 0))} [313] L168-1-->L173-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {740643#false} is VALID [2022-04-28 02:11:57,097 INFO L290 TraceCheckUtils]: 30: Hoare triple {740643#false} [316] L173-1-->L179: Formula: (not (= v_main_~p11~0_2 0)) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[] {740643#false} is VALID [2022-04-28 02:11:57,097 INFO L290 TraceCheckUtils]: 31: Hoare triple {740643#false} [318] L179-->L184-1: Formula: (not (= v_main_~lk11~0_3 1)) InVars {main_~lk11~0=v_main_~lk11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_3} AuxVars[] AssignedVars[] {740643#false} is VALID [2022-04-28 02:11:57,098 INFO L290 TraceCheckUtils]: 32: Hoare triple {740643#false} [280] L184-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {740643#false} is VALID [2022-04-28 02:11:57,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:11:57,098 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:11:57,098 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [873574232] [2022-04-28 02:11:57,098 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [873574232] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:11:57,098 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:11:57,098 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:11:57,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1697855962] [2022-04-28 02:11:57,098 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:11:57,099 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-28 02:11:57,099 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:11:57,099 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:11:57,118 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:11:57,118 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:11:57,118 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:11:57,118 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:11:57,118 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:11:57,118 INFO L87 Difference]: Start difference. First operand 34313 states and 41991 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:13:44,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:13:44,439 INFO L93 Difference]: Finished difference Result 51469 states and 62729 transitions. [2022-04-28 02:13:44,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:13:44,439 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-28 02:13:44,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:13:44,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:13:44,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 196 transitions. [2022-04-28 02:13:44,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:13:44,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 196 transitions. [2022-04-28 02:13:44,441 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 196 transitions. [2022-04-28 02:13:44,554 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 196 edges. 196 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:14:17,544 INFO L225 Difference]: With dead ends: 51469 [2022-04-28 02:14:17,544 INFO L226 Difference]: Without dead ends: 34827 [2022-04-28 02:14:17,561 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:14:17,562 INFO L413 NwaCegarLoop]: 99 mSDtfsCounter, 148 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 148 SdHoareTripleChecker+Valid, 106 SdHoareTripleChecker+Invalid, 68 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:14:17,562 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [148 Valid, 106 Invalid, 68 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:14:17,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34827 states. [2022-04-28 02:14:18,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34827 to 34825. [2022-04-28 02:14:18,196 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:14:18,235 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34827 states. Second operand has 34825 states, 34821 states have (on average 1.2058240716808821) internal successors, (41988), 34821 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:14:18,265 INFO L74 IsIncluded]: Start isIncluded. First operand 34827 states. Second operand has 34825 states, 34821 states have (on average 1.2058240716808821) internal successors, (41988), 34821 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:14:18,293 INFO L87 Difference]: Start difference. First operand 34827 states. Second operand has 34825 states, 34821 states have (on average 1.2058240716808821) internal successors, (41988), 34821 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:14:48,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:14:48,434 INFO L93 Difference]: Finished difference Result 34827 states and 41992 transitions. [2022-04-28 02:14:48,434 INFO L276 IsEmpty]: Start isEmpty. Operand 34827 states and 41992 transitions. [2022-04-28 02:14:48,457 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:14:48,457 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:14:48,486 INFO L74 IsIncluded]: Start isIncluded. First operand has 34825 states, 34821 states have (on average 1.2058240716808821) internal successors, (41988), 34821 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34827 states. [2022-04-28 02:14:48,516 INFO L87 Difference]: Start difference. First operand has 34825 states, 34821 states have (on average 1.2058240716808821) internal successors, (41988), 34821 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34827 states. [2022-04-28 02:15:21,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:15:21,997 INFO L93 Difference]: Finished difference Result 34827 states and 41992 transitions. [2022-04-28 02:15:21,997 INFO L276 IsEmpty]: Start isEmpty. Operand 34827 states and 41992 transitions. [2022-04-28 02:15:22,027 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:15:22,027 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:15:22,027 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:15:22,027 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:15:22,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34825 states, 34821 states have (on average 1.2058240716808821) internal successors, (41988), 34821 states have internal predecessors, (41988), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)