/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/locks/test_locks_14-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-28 02:02:13,715 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-28 02:02:13,717 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-28 02:02:13,757 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-28 02:02:13,764 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-28 02:02:13,765 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-28 02:02:13,766 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-28 02:02:13,767 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-28 02:02:13,767 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-28 02:02:13,768 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-28 02:02:13,770 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-28 02:02:13,771 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-28 02:02:13,772 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-28 02:02:13,773 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-28 02:02:13,774 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-28 02:02:13,775 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-28 02:02:13,776 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-28 02:02:13,778 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-28 02:02:13,785 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-28 02:02:13,785 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-28 02:02:13,788 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-28 02:02:13,789 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-28 02:02:13,817 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-28 02:02:13,818 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-28 02:02:13,818 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-28 02:02:13,818 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-28 02:02:13,819 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-28 02:02:13,819 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-28 02:02:13,819 INFO L138 SettingsManager]: * Use SBE=true [2022-04-28 02:02:13,820 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-28 02:02:13,820 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-28 02:02:13,820 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-28 02:02:13,821 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-28 02:02:13,821 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-28 02:02:13,821 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-28 02:02:13,821 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-28 02:02:13,821 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-28 02:02:13,821 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-28 02:02:13,821 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-28 02:02:13,821 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-28 02:02:13,821 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-28 02:02:13,822 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 02:02:13,822 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-28 02:02:13,822 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-28 02:02:13,822 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-28 02:02:13,822 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-28 02:02:13,822 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-28 02:02:13,822 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-28 02:02:13,822 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-28 02:02:13,823 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-28 02:02:13,824 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-28 02:02:13,824 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-28 02:02:14,020 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-28 02:02:14,040 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-28 02:02:14,042 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-28 02:02:14,043 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-28 02:02:14,044 INFO L275 PluginConnector]: CDTParser initialized [2022-04-28 02:02:14,045 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/locks/test_locks_14-1.c [2022-04-28 02:02:14,116 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bcf36d1a8/82835564e380479bba742608b34f02e6/FLAG0efc18e79 [2022-04-28 02:02:14,517 INFO L306 CDTParser]: Found 1 translation units. [2022-04-28 02:02:14,518 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c [2022-04-28 02:02:14,527 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bcf36d1a8/82835564e380479bba742608b34f02e6/FLAG0efc18e79 [2022-04-28 02:02:14,903 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bcf36d1a8/82835564e380479bba742608b34f02e6 [2022-04-28 02:02:14,906 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-28 02:02:14,907 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-28 02:02:14,911 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-28 02:02:14,911 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-28 02:02:14,915 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-28 02:02:14,916 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 02:02:14" (1/1) ... [2022-04-28 02:02:14,917 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3b9e2de1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:14, skipping insertion in model container [2022-04-28 02:02:14,917 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.04 02:02:14" (1/1) ... [2022-04-28 02:02:14,923 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-28 02:02:14,939 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-28 02:02:15,107 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c[5283,5296] [2022-04-28 02:02:15,110 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 02:02:15,117 INFO L203 MainTranslator]: Completed pre-run [2022-04-28 02:02:15,141 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c[5283,5296] [2022-04-28 02:02:15,143 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-28 02:02:15,154 INFO L208 MainTranslator]: Completed translation [2022-04-28 02:02:15,154 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:15 WrapperNode [2022-04-28 02:02:15,154 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-28 02:02:15,157 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-28 02:02:15,157 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-28 02:02:15,157 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-28 02:02:15,166 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:15" (1/1) ... [2022-04-28 02:02:15,166 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:15" (1/1) ... [2022-04-28 02:02:15,172 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:15" (1/1) ... [2022-04-28 02:02:15,172 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:15" (1/1) ... [2022-04-28 02:02:15,180 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:15" (1/1) ... [2022-04-28 02:02:15,188 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:15" (1/1) ... [2022-04-28 02:02:15,189 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:15" (1/1) ... [2022-04-28 02:02:15,192 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-28 02:02:15,193 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-28 02:02:15,193 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-28 02:02:15,193 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-28 02:02:15,204 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:15" (1/1) ... [2022-04-28 02:02:15,209 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-28 02:02:15,219 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-28 02:02:15,229 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-28 02:02:15,247 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-28 02:02:15,261 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-28 02:02:15,261 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-28 02:02:15,262 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-28 02:02:15,262 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-28 02:02:15,262 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-28 02:02:15,262 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-28 02:02:15,262 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-28 02:02:15,262 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-28 02:02:15,263 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-28 02:02:15,263 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-28 02:02:15,263 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-28 02:02:15,263 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-28 02:02:15,263 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-28 02:02:15,264 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-28 02:02:15,264 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-28 02:02:15,264 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-28 02:02:15,331 INFO L234 CfgBuilder]: Building ICFG [2022-04-28 02:02:15,332 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-28 02:02:15,547 INFO L275 CfgBuilder]: Performing block encoding [2022-04-28 02:02:15,554 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-28 02:02:15,554 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-28 02:02:15,556 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 02:02:15 BoogieIcfgContainer [2022-04-28 02:02:15,556 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-28 02:02:15,556 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-28 02:02:15,557 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-28 02:02:15,557 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-28 02:02:15,560 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 02:02:15" (1/1) ... [2022-04-28 02:02:15,562 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-28 02:02:15,636 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.04 02:02:15 BasicIcfg [2022-04-28 02:02:15,636 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-28 02:02:15,637 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-28 02:02:15,637 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-28 02:02:15,642 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-28 02:02:15,642 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.04 02:02:14" (1/4) ... [2022-04-28 02:02:15,643 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@185ddd09 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 02:02:15, skipping insertion in model container [2022-04-28 02:02:15,643 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.04 02:02:15" (2/4) ... [2022-04-28 02:02:15,643 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@185ddd09 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.04 02:02:15, skipping insertion in model container [2022-04-28 02:02:15,643 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.04 02:02:15" (3/4) ... [2022-04-28 02:02:15,643 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@185ddd09 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.04 02:02:15, skipping insertion in model container [2022-04-28 02:02:15,643 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.04 02:02:15" (4/4) ... [2022-04-28 02:02:15,644 INFO L111 eAbstractionObserver]: Analyzing ICFG test_locks_14-1.cqvasr [2022-04-28 02:02:15,658 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-28 02:02:15,658 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-28 02:02:15,700 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-28 02:02:15,706 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@1b35c107, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@60ea8d6b [2022-04-28 02:02:15,706 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-28 02:02:15,714 INFO L276 IsEmpty]: Start isEmpty. Operand has 57 states, 51 states have (on average 1.9019607843137254) internal successors, (97), 52 states have internal predecessors, (97), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-28 02:02:15,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-28 02:02:15,721 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:15,721 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:15,722 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:15,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:15,726 INFO L85 PathProgramCache]: Analyzing trace with hash 267710119, now seen corresponding path program 1 times [2022-04-28 02:02:15,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:15,734 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1909960198] [2022-04-28 02:02:15,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:15,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:15,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:15,930 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:15,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:15,946 INFO L290 TraceCheckUtils]: 0: Hoare triple {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {60#true} is VALID [2022-04-28 02:02:15,946 INFO L290 TraceCheckUtils]: 1: Hoare triple {60#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-28 02:02:15,947 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {60#true} {60#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-28 02:02:15,948 INFO L272 TraceCheckUtils]: 0: Hoare triple {60#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:15,949 INFO L290 TraceCheckUtils]: 1: Hoare triple {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {60#true} is VALID [2022-04-28 02:02:15,949 INFO L290 TraceCheckUtils]: 2: Hoare triple {60#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-28 02:02:15,949 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {60#true} {60#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-28 02:02:15,950 INFO L272 TraceCheckUtils]: 4: Hoare triple {60#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-28 02:02:15,950 INFO L290 TraceCheckUtils]: 5: Hoare triple {60#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {60#true} is VALID [2022-04-28 02:02:15,951 INFO L290 TraceCheckUtils]: 6: Hoare triple {60#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {60#true} is VALID [2022-04-28 02:02:15,951 INFO L290 TraceCheckUtils]: 7: Hoare triple {60#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {60#true} is VALID [2022-04-28 02:02:15,952 INFO L290 TraceCheckUtils]: 8: Hoare triple {60#true} [284] L88-->L88-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,952 INFO L290 TraceCheckUtils]: 9: Hoare triple {65#(= main_~lk1~0 1)} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,953 INFO L290 TraceCheckUtils]: 10: Hoare triple {65#(= main_~lk1~0 1)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,954 INFO L290 TraceCheckUtils]: 11: Hoare triple {65#(= main_~lk1~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,954 INFO L290 TraceCheckUtils]: 12: Hoare triple {65#(= main_~lk1~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,955 INFO L290 TraceCheckUtils]: 13: Hoare triple {65#(= main_~lk1~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,956 INFO L290 TraceCheckUtils]: 14: Hoare triple {65#(= main_~lk1~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,956 INFO L290 TraceCheckUtils]: 15: Hoare triple {65#(= main_~lk1~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,957 INFO L290 TraceCheckUtils]: 16: Hoare triple {65#(= main_~lk1~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,957 INFO L290 TraceCheckUtils]: 17: Hoare triple {65#(= main_~lk1~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,958 INFO L290 TraceCheckUtils]: 18: Hoare triple {65#(= main_~lk1~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,959 INFO L290 TraceCheckUtils]: 19: Hoare triple {65#(= main_~lk1~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,959 INFO L290 TraceCheckUtils]: 20: Hoare triple {65#(= main_~lk1~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,960 INFO L290 TraceCheckUtils]: 21: Hoare triple {65#(= main_~lk1~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,960 INFO L290 TraceCheckUtils]: 22: Hoare triple {65#(= main_~lk1~0 1)} [312] L140-1-->L147: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {65#(= main_~lk1~0 1)} is VALID [2022-04-28 02:02:15,961 INFO L290 TraceCheckUtils]: 23: Hoare triple {65#(= main_~lk1~0 1)} [314] L147-->L212-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {61#false} is VALID [2022-04-28 02:02:15,961 INFO L290 TraceCheckUtils]: 24: Hoare triple {61#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61#false} is VALID [2022-04-28 02:02:15,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:15,962 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:15,962 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1909960198] [2022-04-28 02:02:15,963 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1909960198] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:15,963 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:15,963 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:15,965 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1582877233] [2022-04-28 02:02:15,966 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:15,970 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-28 02:02:15,972 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:15,975 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:16,002 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:16,003 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:16,003 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:16,022 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:16,022 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:16,025 INFO L87 Difference]: Start difference. First operand has 57 states, 51 states have (on average 1.9019607843137254) internal successors, (97), 52 states have internal predecessors, (97), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:16,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:16,447 INFO L93 Difference]: Finished difference Result 112 states and 199 transitions. [2022-04-28 02:02:16,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:16,448 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-28 02:02:16,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:16,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:16,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 199 transitions. [2022-04-28 02:02:16,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:16,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 199 transitions. [2022-04-28 02:02:16,466 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 199 transitions. [2022-04-28 02:02:16,673 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 199 edges. 199 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:16,692 INFO L225 Difference]: With dead ends: 112 [2022-04-28 02:02:16,693 INFO L226 Difference]: Without dead ends: 97 [2022-04-28 02:02:16,696 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:16,700 INFO L413 NwaCegarLoop]: 104 mSDtfsCounter, 242 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 97 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 242 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 99 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 97 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:16,700 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [242 Valid, 113 Invalid, 99 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 97 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:16,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-28 02:02:16,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 67. [2022-04-28 02:02:16,730 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:16,732 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:16,733 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:16,733 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:16,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:16,740 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2022-04-28 02:02:16,741 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 177 transitions. [2022-04-28 02:02:16,741 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:16,742 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:16,742 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-28 02:02:16,743 INFO L87 Difference]: Start difference. First operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-28 02:02:16,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:16,749 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2022-04-28 02:02:16,749 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 177 transitions. [2022-04-28 02:02:16,751 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:16,752 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:16,752 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:16,752 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:16,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:16,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 122 transitions. [2022-04-28 02:02:16,757 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 122 transitions. Word has length 25 [2022-04-28 02:02:16,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:16,758 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 122 transitions. [2022-04-28 02:02:16,758 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:16,758 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 122 transitions. [2022-04-28 02:02:16,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-28 02:02:16,759 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:16,759 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:16,760 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-28 02:02:16,760 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:16,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:16,761 INFO L85 PathProgramCache]: Analyzing trace with hash 1621019816, now seen corresponding path program 1 times [2022-04-28 02:02:16,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:16,761 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231231652] [2022-04-28 02:02:16,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:16,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:16,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:16,886 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:16,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:16,898 INFO L290 TraceCheckUtils]: 0: Hoare triple {469#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {463#true} is VALID [2022-04-28 02:02:16,899 INFO L290 TraceCheckUtils]: 1: Hoare triple {463#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {463#true} is VALID [2022-04-28 02:02:16,899 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {463#true} {463#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {463#true} is VALID [2022-04-28 02:02:16,900 INFO L272 TraceCheckUtils]: 0: Hoare triple {463#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {469#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:16,900 INFO L290 TraceCheckUtils]: 1: Hoare triple {469#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {463#true} is VALID [2022-04-28 02:02:16,900 INFO L290 TraceCheckUtils]: 2: Hoare triple {463#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {463#true} is VALID [2022-04-28 02:02:16,900 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {463#true} {463#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {463#true} is VALID [2022-04-28 02:02:16,901 INFO L272 TraceCheckUtils]: 4: Hoare triple {463#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {463#true} is VALID [2022-04-28 02:02:16,901 INFO L290 TraceCheckUtils]: 5: Hoare triple {463#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {463#true} is VALID [2022-04-28 02:02:16,901 INFO L290 TraceCheckUtils]: 6: Hoare triple {463#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {463#true} is VALID [2022-04-28 02:02:16,902 INFO L290 TraceCheckUtils]: 7: Hoare triple {463#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {463#true} is VALID [2022-04-28 02:02:16,902 INFO L290 TraceCheckUtils]: 8: Hoare triple {463#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,903 INFO L290 TraceCheckUtils]: 9: Hoare triple {468#(= main_~p1~0 0)} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,903 INFO L290 TraceCheckUtils]: 10: Hoare triple {468#(= main_~p1~0 0)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,904 INFO L290 TraceCheckUtils]: 11: Hoare triple {468#(= main_~p1~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,904 INFO L290 TraceCheckUtils]: 12: Hoare triple {468#(= main_~p1~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,905 INFO L290 TraceCheckUtils]: 13: Hoare triple {468#(= main_~p1~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,905 INFO L290 TraceCheckUtils]: 14: Hoare triple {468#(= main_~p1~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,906 INFO L290 TraceCheckUtils]: 15: Hoare triple {468#(= main_~p1~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,906 INFO L290 TraceCheckUtils]: 16: Hoare triple {468#(= main_~p1~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,906 INFO L290 TraceCheckUtils]: 17: Hoare triple {468#(= main_~p1~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,907 INFO L290 TraceCheckUtils]: 18: Hoare triple {468#(= main_~p1~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,907 INFO L290 TraceCheckUtils]: 19: Hoare triple {468#(= main_~p1~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,908 INFO L290 TraceCheckUtils]: 20: Hoare triple {468#(= main_~p1~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,908 INFO L290 TraceCheckUtils]: 21: Hoare triple {468#(= main_~p1~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {468#(= main_~p1~0 0)} is VALID [2022-04-28 02:02:16,909 INFO L290 TraceCheckUtils]: 22: Hoare triple {468#(= main_~p1~0 0)} [312] L140-1-->L147: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {464#false} is VALID [2022-04-28 02:02:16,909 INFO L290 TraceCheckUtils]: 23: Hoare triple {464#false} [314] L147-->L212-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {464#false} is VALID [2022-04-28 02:02:16,909 INFO L290 TraceCheckUtils]: 24: Hoare triple {464#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {464#false} is VALID [2022-04-28 02:02:16,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:16,910 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:16,910 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1231231652] [2022-04-28 02:02:16,910 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1231231652] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:16,910 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:16,911 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:16,911 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [336608896] [2022-04-28 02:02:16,911 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:16,912 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-28 02:02:16,912 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:16,913 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:16,931 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:16,932 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:16,932 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:16,933 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:16,933 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:16,933 INFO L87 Difference]: Start difference. First operand 67 states and 122 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:17,224 INFO L93 Difference]: Finished difference Result 158 states and 293 transitions. [2022-04-28 02:02:17,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:17,224 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-28 02:02:17,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:17,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 264 transitions. [2022-04-28 02:02:17,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 264 transitions. [2022-04-28 02:02:17,234 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 264 transitions. [2022-04-28 02:02:17,474 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 264 edges. 264 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:17,477 INFO L225 Difference]: With dead ends: 158 [2022-04-28 02:02:17,477 INFO L226 Difference]: Without dead ends: 97 [2022-04-28 02:02:17,478 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:17,479 INFO L413 NwaCegarLoop]: 120 mSDtfsCounter, 208 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:17,480 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [208 Valid, 127 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:17,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-28 02:02:17,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 95. [2022-04-28 02:02:17,487 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:17,488 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,488 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,489 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:17,492 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-28 02:02:17,493 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2022-04-28 02:02:17,493 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:17,493 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:17,494 INFO L74 IsIncluded]: Start isIncluded. First operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-28 02:02:17,494 INFO L87 Difference]: Start difference. First operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-28 02:02:17,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:17,498 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-28 02:02:17,498 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2022-04-28 02:02:17,499 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:17,499 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:17,499 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:17,499 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:17,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 174 transitions. [2022-04-28 02:02:17,503 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 174 transitions. Word has length 25 [2022-04-28 02:02:17,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:17,504 INFO L495 AbstractCegarLoop]: Abstraction has 95 states and 174 transitions. [2022-04-28 02:02:17,504 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,504 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 174 transitions. [2022-04-28 02:02:17,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-28 02:02:17,505 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:17,505 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:17,505 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-28 02:02:17,506 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:17,506 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:17,506 INFO L85 PathProgramCache]: Analyzing trace with hash -290888810, now seen corresponding path program 1 times [2022-04-28 02:02:17,507 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:17,507 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [217521870] [2022-04-28 02:02:17,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:17,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:17,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:17,567 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:17,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:17,574 INFO L290 TraceCheckUtils]: 0: Hoare triple {945#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {939#true} is VALID [2022-04-28 02:02:17,575 INFO L290 TraceCheckUtils]: 1: Hoare triple {939#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {939#true} is VALID [2022-04-28 02:02:17,575 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {939#true} {939#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {939#true} is VALID [2022-04-28 02:02:17,576 INFO L272 TraceCheckUtils]: 0: Hoare triple {939#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {945#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:17,576 INFO L290 TraceCheckUtils]: 1: Hoare triple {945#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {939#true} is VALID [2022-04-28 02:02:17,576 INFO L290 TraceCheckUtils]: 2: Hoare triple {939#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {939#true} is VALID [2022-04-28 02:02:17,576 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {939#true} {939#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {939#true} is VALID [2022-04-28 02:02:17,577 INFO L272 TraceCheckUtils]: 4: Hoare triple {939#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {939#true} is VALID [2022-04-28 02:02:17,577 INFO L290 TraceCheckUtils]: 5: Hoare triple {939#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {939#true} is VALID [2022-04-28 02:02:17,577 INFO L290 TraceCheckUtils]: 6: Hoare triple {939#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {939#true} is VALID [2022-04-28 02:02:17,577 INFO L290 TraceCheckUtils]: 7: Hoare triple {939#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {939#true} is VALID [2022-04-28 02:02:17,578 INFO L290 TraceCheckUtils]: 8: Hoare triple {939#true} [284] L88-->L88-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,578 INFO L290 TraceCheckUtils]: 9: Hoare triple {944#(not (= main_~p1~0 0))} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,579 INFO L290 TraceCheckUtils]: 10: Hoare triple {944#(not (= main_~p1~0 0))} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,579 INFO L290 TraceCheckUtils]: 11: Hoare triple {944#(not (= main_~p1~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,580 INFO L290 TraceCheckUtils]: 12: Hoare triple {944#(not (= main_~p1~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,580 INFO L290 TraceCheckUtils]: 13: Hoare triple {944#(not (= main_~p1~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,580 INFO L290 TraceCheckUtils]: 14: Hoare triple {944#(not (= main_~p1~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,581 INFO L290 TraceCheckUtils]: 15: Hoare triple {944#(not (= main_~p1~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,581 INFO L290 TraceCheckUtils]: 16: Hoare triple {944#(not (= main_~p1~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,582 INFO L290 TraceCheckUtils]: 17: Hoare triple {944#(not (= main_~p1~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,582 INFO L290 TraceCheckUtils]: 18: Hoare triple {944#(not (= main_~p1~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,583 INFO L290 TraceCheckUtils]: 19: Hoare triple {944#(not (= main_~p1~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,583 INFO L290 TraceCheckUtils]: 20: Hoare triple {944#(not (= main_~p1~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,583 INFO L290 TraceCheckUtils]: 21: Hoare triple {944#(not (= main_~p1~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {944#(not (= main_~p1~0 0))} is VALID [2022-04-28 02:02:17,584 INFO L290 TraceCheckUtils]: 22: Hoare triple {944#(not (= main_~p1~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {940#false} is VALID [2022-04-28 02:02:17,584 INFO L290 TraceCheckUtils]: 23: Hoare triple {940#false} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {940#false} is VALID [2022-04-28 02:02:17,584 INFO L290 TraceCheckUtils]: 24: Hoare triple {940#false} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {940#false} is VALID [2022-04-28 02:02:17,585 INFO L290 TraceCheckUtils]: 25: Hoare triple {940#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {940#false} is VALID [2022-04-28 02:02:17,585 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:17,585 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:17,585 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [217521870] [2022-04-28 02:02:17,585 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [217521870] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:17,586 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:17,586 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:17,586 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [26091432] [2022-04-28 02:02:17,586 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:17,586 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:02:17,587 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:17,587 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,604 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:17,605 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:17,605 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:17,606 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:17,606 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:17,606 INFO L87 Difference]: Start difference. First operand 95 states and 174 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:17,874 INFO L93 Difference]: Finished difference Result 145 states and 262 transitions. [2022-04-28 02:02:17,874 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:17,874 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:02:17,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:17,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 259 transitions. [2022-04-28 02:02:17,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:17,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 259 transitions. [2022-04-28 02:02:17,881 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 259 transitions. [2022-04-28 02:02:18,087 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 259 edges. 259 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:18,089 INFO L225 Difference]: With dead ends: 145 [2022-04-28 02:02:18,089 INFO L226 Difference]: Without dead ends: 100 [2022-04-28 02:02:18,090 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:18,091 INFO L413 NwaCegarLoop]: 146 mSDtfsCounter, 183 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 153 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:18,091 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [183 Valid, 153 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:18,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2022-04-28 02:02:18,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 98. [2022-04-28 02:02:18,107 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:18,107 INFO L82 GeneralOperation]: Start isEquivalent. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,108 INFO L74 IsIncluded]: Start isIncluded. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,108 INFO L87 Difference]: Start difference. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:18,113 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-28 02:02:18,113 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 177 transitions. [2022-04-28 02:02:18,114 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:18,115 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:18,115 INFO L74 IsIncluded]: Start isIncluded. First operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-28 02:02:18,115 INFO L87 Difference]: Start difference. First operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-28 02:02:18,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:18,121 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-28 02:02:18,121 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 177 transitions. [2022-04-28 02:02:18,122 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:18,122 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:18,122 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:18,122 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:18,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 176 transitions. [2022-04-28 02:02:18,126 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 176 transitions. Word has length 26 [2022-04-28 02:02:18,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:18,127 INFO L495 AbstractCegarLoop]: Abstraction has 98 states and 176 transitions. [2022-04-28 02:02:18,127 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,127 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 176 transitions. [2022-04-28 02:02:18,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-28 02:02:18,128 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:18,128 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:18,128 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-28 02:02:18,128 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:18,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:18,130 INFO L85 PathProgramCache]: Analyzing trace with hash -1287961163, now seen corresponding path program 1 times [2022-04-28 02:02:18,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:18,130 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1026857546] [2022-04-28 02:02:18,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:18,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:18,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:18,190 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:18,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:18,196 INFO L290 TraceCheckUtils]: 0: Hoare triple {1419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1413#true} is VALID [2022-04-28 02:02:18,196 INFO L290 TraceCheckUtils]: 1: Hoare triple {1413#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1413#true} is VALID [2022-04-28 02:02:18,197 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1413#true} {1413#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1413#true} is VALID [2022-04-28 02:02:18,197 INFO L272 TraceCheckUtils]: 0: Hoare triple {1413#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:18,197 INFO L290 TraceCheckUtils]: 1: Hoare triple {1419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1413#true} is VALID [2022-04-28 02:02:18,198 INFO L290 TraceCheckUtils]: 2: Hoare triple {1413#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1413#true} is VALID [2022-04-28 02:02:18,198 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1413#true} {1413#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1413#true} is VALID [2022-04-28 02:02:18,198 INFO L272 TraceCheckUtils]: 4: Hoare triple {1413#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1413#true} is VALID [2022-04-28 02:02:18,198 INFO L290 TraceCheckUtils]: 5: Hoare triple {1413#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1413#true} is VALID [2022-04-28 02:02:18,199 INFO L290 TraceCheckUtils]: 6: Hoare triple {1413#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {1413#true} is VALID [2022-04-28 02:02:18,199 INFO L290 TraceCheckUtils]: 7: Hoare triple {1413#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {1413#true} is VALID [2022-04-28 02:02:18,199 INFO L290 TraceCheckUtils]: 8: Hoare triple {1413#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1413#true} is VALID [2022-04-28 02:02:18,199 INFO L290 TraceCheckUtils]: 9: Hoare triple {1413#true} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,200 INFO L290 TraceCheckUtils]: 10: Hoare triple {1418#(= main_~lk2~0 1)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,200 INFO L290 TraceCheckUtils]: 11: Hoare triple {1418#(= main_~lk2~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,201 INFO L290 TraceCheckUtils]: 12: Hoare triple {1418#(= main_~lk2~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,201 INFO L290 TraceCheckUtils]: 13: Hoare triple {1418#(= main_~lk2~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,202 INFO L290 TraceCheckUtils]: 14: Hoare triple {1418#(= main_~lk2~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,202 INFO L290 TraceCheckUtils]: 15: Hoare triple {1418#(= main_~lk2~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,202 INFO L290 TraceCheckUtils]: 16: Hoare triple {1418#(= main_~lk2~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,203 INFO L290 TraceCheckUtils]: 17: Hoare triple {1418#(= main_~lk2~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,203 INFO L290 TraceCheckUtils]: 18: Hoare triple {1418#(= main_~lk2~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,204 INFO L290 TraceCheckUtils]: 19: Hoare triple {1418#(= main_~lk2~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,204 INFO L290 TraceCheckUtils]: 20: Hoare triple {1418#(= main_~lk2~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,204 INFO L290 TraceCheckUtils]: 21: Hoare triple {1418#(= main_~lk2~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,205 INFO L290 TraceCheckUtils]: 22: Hoare triple {1418#(= main_~lk2~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,205 INFO L290 TraceCheckUtils]: 23: Hoare triple {1418#(= main_~lk2~0 1)} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1418#(= main_~lk2~0 1)} is VALID [2022-04-28 02:02:18,206 INFO L290 TraceCheckUtils]: 24: Hoare triple {1418#(= main_~lk2~0 1)} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1414#false} is VALID [2022-04-28 02:02:18,206 INFO L290 TraceCheckUtils]: 25: Hoare triple {1414#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1414#false} is VALID [2022-04-28 02:02:18,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:18,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:18,206 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1026857546] [2022-04-28 02:02:18,207 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1026857546] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:18,207 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:18,207 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:18,207 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1029609663] [2022-04-28 02:02:18,207 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:18,207 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:02:18,208 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:18,208 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,226 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:18,227 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:18,227 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:18,227 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:18,227 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:18,228 INFO L87 Difference]: Start difference. First operand 98 states and 176 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:18,488 INFO L93 Difference]: Finished difference Result 185 states and 337 transitions. [2022-04-28 02:02:18,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:18,488 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:02:18,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:18,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-28 02:02:18,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-28 02:02:18,495 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 175 transitions. [2022-04-28 02:02:18,636 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 175 edges. 175 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:18,639 INFO L225 Difference]: With dead ends: 185 [2022-04-28 02:02:18,639 INFO L226 Difference]: Without dead ends: 183 [2022-04-28 02:02:18,640 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:18,641 INFO L413 NwaCegarLoop]: 94 mSDtfsCounter, 229 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 229 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:18,641 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [229 Valid, 101 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:18,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2022-04-28 02:02:18,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 129. [2022-04-28 02:02:18,648 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:18,649 INFO L82 GeneralOperation]: Start isEquivalent. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,649 INFO L74 IsIncluded]: Start isIncluded. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,650 INFO L87 Difference]: Start difference. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:18,655 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-28 02:02:18,655 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 334 transitions. [2022-04-28 02:02:18,656 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:18,656 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:18,656 INFO L74 IsIncluded]: Start isIncluded. First operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 183 states. [2022-04-28 02:02:18,657 INFO L87 Difference]: Start difference. First operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 183 states. [2022-04-28 02:02:18,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:18,662 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-28 02:02:18,663 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 334 transitions. [2022-04-28 02:02:18,663 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:18,663 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:18,663 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:18,663 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:18,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 233 transitions. [2022-04-28 02:02:18,667 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 233 transitions. Word has length 26 [2022-04-28 02:02:18,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:18,668 INFO L495 AbstractCegarLoop]: Abstraction has 129 states and 233 transitions. [2022-04-28 02:02:18,668 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,668 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 233 transitions. [2022-04-28 02:02:18,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-28 02:02:18,668 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:18,669 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:18,669 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-28 02:02:18,669 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:18,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:18,669 INFO L85 PathProgramCache]: Analyzing trace with hash 65348534, now seen corresponding path program 1 times [2022-04-28 02:02:18,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:18,670 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011767090] [2022-04-28 02:02:18,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:18,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:18,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:18,715 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:18,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:18,721 INFO L290 TraceCheckUtils]: 0: Hoare triple {2131#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2125#true} is VALID [2022-04-28 02:02:18,722 INFO L290 TraceCheckUtils]: 1: Hoare triple {2125#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2125#true} is VALID [2022-04-28 02:02:18,722 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2125#true} {2125#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2125#true} is VALID [2022-04-28 02:02:18,723 INFO L272 TraceCheckUtils]: 0: Hoare triple {2125#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2131#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:18,723 INFO L290 TraceCheckUtils]: 1: Hoare triple {2131#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2125#true} is VALID [2022-04-28 02:02:18,723 INFO L290 TraceCheckUtils]: 2: Hoare triple {2125#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2125#true} is VALID [2022-04-28 02:02:18,723 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2125#true} {2125#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2125#true} is VALID [2022-04-28 02:02:18,723 INFO L272 TraceCheckUtils]: 4: Hoare triple {2125#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2125#true} is VALID [2022-04-28 02:02:18,724 INFO L290 TraceCheckUtils]: 5: Hoare triple {2125#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {2125#true} is VALID [2022-04-28 02:02:18,724 INFO L290 TraceCheckUtils]: 6: Hoare triple {2125#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {2125#true} is VALID [2022-04-28 02:02:18,724 INFO L290 TraceCheckUtils]: 7: Hoare triple {2125#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {2125#true} is VALID [2022-04-28 02:02:18,724 INFO L290 TraceCheckUtils]: 8: Hoare triple {2125#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {2125#true} is VALID [2022-04-28 02:02:18,725 INFO L290 TraceCheckUtils]: 9: Hoare triple {2125#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,725 INFO L290 TraceCheckUtils]: 10: Hoare triple {2130#(= main_~p2~0 0)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,725 INFO L290 TraceCheckUtils]: 11: Hoare triple {2130#(= main_~p2~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,726 INFO L290 TraceCheckUtils]: 12: Hoare triple {2130#(= main_~p2~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,726 INFO L290 TraceCheckUtils]: 13: Hoare triple {2130#(= main_~p2~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,727 INFO L290 TraceCheckUtils]: 14: Hoare triple {2130#(= main_~p2~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,727 INFO L290 TraceCheckUtils]: 15: Hoare triple {2130#(= main_~p2~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,727 INFO L290 TraceCheckUtils]: 16: Hoare triple {2130#(= main_~p2~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,728 INFO L290 TraceCheckUtils]: 17: Hoare triple {2130#(= main_~p2~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,728 INFO L290 TraceCheckUtils]: 18: Hoare triple {2130#(= main_~p2~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,729 INFO L290 TraceCheckUtils]: 19: Hoare triple {2130#(= main_~p2~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,729 INFO L290 TraceCheckUtils]: 20: Hoare triple {2130#(= main_~p2~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,729 INFO L290 TraceCheckUtils]: 21: Hoare triple {2130#(= main_~p2~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,730 INFO L290 TraceCheckUtils]: 22: Hoare triple {2130#(= main_~p2~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {2130#(= main_~p2~0 0)} is VALID [2022-04-28 02:02:18,730 INFO L290 TraceCheckUtils]: 23: Hoare triple {2130#(= main_~p2~0 0)} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {2126#false} is VALID [2022-04-28 02:02:18,730 INFO L290 TraceCheckUtils]: 24: Hoare triple {2126#false} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {2126#false} is VALID [2022-04-28 02:02:18,730 INFO L290 TraceCheckUtils]: 25: Hoare triple {2126#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2126#false} is VALID [2022-04-28 02:02:18,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:18,731 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:18,731 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1011767090] [2022-04-28 02:02:18,731 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1011767090] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:18,731 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:18,731 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:18,731 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1341069998] [2022-04-28 02:02:18,731 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:18,732 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:02:18,732 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:18,732 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:18,749 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:18,749 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:18,749 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:18,750 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:18,750 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:18,750 INFO L87 Difference]: Start difference. First operand 129 states and 233 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:19,020 INFO L93 Difference]: Finished difference Result 305 states and 559 transitions. [2022-04-28 02:02:19,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:19,020 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-28 02:02:19,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:19,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 261 transitions. [2022-04-28 02:02:19,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 261 transitions. [2022-04-28 02:02:19,027 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 261 transitions. [2022-04-28 02:02:19,224 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 261 edges. 261 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:19,227 INFO L225 Difference]: With dead ends: 305 [2022-04-28 02:02:19,227 INFO L226 Difference]: Without dead ends: 185 [2022-04-28 02:02:19,228 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:19,229 INFO L413 NwaCegarLoop]: 122 mSDtfsCounter, 202 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:19,229 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [202 Valid, 129 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:19,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2022-04-28 02:02:19,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 183. [2022-04-28 02:02:19,237 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:19,237 INFO L82 GeneralOperation]: Start isEquivalent. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,238 INFO L74 IsIncluded]: Start isIncluded. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,239 INFO L87 Difference]: Start difference. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:19,244 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-28 02:02:19,244 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 332 transitions. [2022-04-28 02:02:19,244 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:19,244 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:19,245 INFO L74 IsIncluded]: Start isIncluded. First operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-28 02:02:19,246 INFO L87 Difference]: Start difference. First operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-28 02:02:19,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:19,251 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-28 02:02:19,251 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 332 transitions. [2022-04-28 02:02:19,251 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:19,251 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:19,251 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:19,251 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:19,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 331 transitions. [2022-04-28 02:02:19,257 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 331 transitions. Word has length 26 [2022-04-28 02:02:19,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:19,257 INFO L495 AbstractCegarLoop]: Abstraction has 183 states and 331 transitions. [2022-04-28 02:02:19,257 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,257 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 331 transitions. [2022-04-28 02:02:19,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-28 02:02:19,258 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:19,258 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:19,258 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-28 02:02:19,258 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:19,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:19,259 INFO L85 PathProgramCache]: Analyzing trace with hash -1272058172, now seen corresponding path program 1 times [2022-04-28 02:02:19,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:19,259 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937911422] [2022-04-28 02:02:19,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:19,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:19,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:19,314 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:19,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:19,328 INFO L290 TraceCheckUtils]: 0: Hoare triple {3025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3019#true} is VALID [2022-04-28 02:02:19,328 INFO L290 TraceCheckUtils]: 1: Hoare triple {3019#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-28 02:02:19,328 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3019#true} {3019#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-28 02:02:19,329 INFO L272 TraceCheckUtils]: 0: Hoare triple {3019#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:19,329 INFO L290 TraceCheckUtils]: 1: Hoare triple {3025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3019#true} is VALID [2022-04-28 02:02:19,329 INFO L290 TraceCheckUtils]: 2: Hoare triple {3019#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-28 02:02:19,329 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3019#true} {3019#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-28 02:02:19,329 INFO L272 TraceCheckUtils]: 4: Hoare triple {3019#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-28 02:02:19,330 INFO L290 TraceCheckUtils]: 5: Hoare triple {3019#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {3019#true} is VALID [2022-04-28 02:02:19,330 INFO L290 TraceCheckUtils]: 6: Hoare triple {3019#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {3019#true} is VALID [2022-04-28 02:02:19,330 INFO L290 TraceCheckUtils]: 7: Hoare triple {3019#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {3019#true} is VALID [2022-04-28 02:02:19,330 INFO L290 TraceCheckUtils]: 8: Hoare triple {3019#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-28 02:02:19,331 INFO L290 TraceCheckUtils]: 9: Hoare triple {3019#true} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,331 INFO L290 TraceCheckUtils]: 10: Hoare triple {3024#(not (= main_~p2~0 0))} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,331 INFO L290 TraceCheckUtils]: 11: Hoare triple {3024#(not (= main_~p2~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,332 INFO L290 TraceCheckUtils]: 12: Hoare triple {3024#(not (= main_~p2~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,332 INFO L290 TraceCheckUtils]: 13: Hoare triple {3024#(not (= main_~p2~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,333 INFO L290 TraceCheckUtils]: 14: Hoare triple {3024#(not (= main_~p2~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,333 INFO L290 TraceCheckUtils]: 15: Hoare triple {3024#(not (= main_~p2~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,333 INFO L290 TraceCheckUtils]: 16: Hoare triple {3024#(not (= main_~p2~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,334 INFO L290 TraceCheckUtils]: 17: Hoare triple {3024#(not (= main_~p2~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,334 INFO L290 TraceCheckUtils]: 18: Hoare triple {3024#(not (= main_~p2~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,334 INFO L290 TraceCheckUtils]: 19: Hoare triple {3024#(not (= main_~p2~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,335 INFO L290 TraceCheckUtils]: 20: Hoare triple {3024#(not (= main_~p2~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,335 INFO L290 TraceCheckUtils]: 21: Hoare triple {3024#(not (= main_~p2~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,336 INFO L290 TraceCheckUtils]: 22: Hoare triple {3024#(not (= main_~p2~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {3024#(not (= main_~p2~0 0))} is VALID [2022-04-28 02:02:19,336 INFO L290 TraceCheckUtils]: 23: Hoare triple {3024#(not (= main_~p2~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-28 02:02:19,336 INFO L290 TraceCheckUtils]: 24: Hoare triple {3020#false} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-28 02:02:19,336 INFO L290 TraceCheckUtils]: 25: Hoare triple {3020#false} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-28 02:02:19,336 INFO L290 TraceCheckUtils]: 26: Hoare triple {3020#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-28 02:02:19,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:19,337 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:19,337 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1937911422] [2022-04-28 02:02:19,337 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1937911422] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:19,337 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:19,337 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:19,337 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [245123985] [2022-04-28 02:02:19,337 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:19,338 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:02:19,338 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:19,338 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,358 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:19,358 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:19,358 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:19,358 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:19,359 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:19,359 INFO L87 Difference]: Start difference. First operand 183 states and 331 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:19,604 INFO L93 Difference]: Finished difference Result 274 states and 494 transitions. [2022-04-28 02:02:19,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:19,605 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:02:19,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:19,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 256 transitions. [2022-04-28 02:02:19,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 256 transitions. [2022-04-28 02:02:19,619 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 256 transitions. [2022-04-28 02:02:19,825 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 256 edges. 256 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:19,827 INFO L225 Difference]: With dead ends: 274 [2022-04-28 02:02:19,827 INFO L226 Difference]: Without dead ends: 187 [2022-04-28 02:02:19,828 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:19,829 INFO L413 NwaCegarLoop]: 143 mSDtfsCounter, 182 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 182 SdHoareTripleChecker+Valid, 150 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:19,829 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [182 Valid, 150 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:19,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2022-04-28 02:02:19,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 185. [2022-04-28 02:02:19,836 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:19,836 INFO L82 GeneralOperation]: Start isEquivalent. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,837 INFO L74 IsIncluded]: Start isIncluded. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,837 INFO L87 Difference]: Start difference. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:19,842 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-28 02:02:19,842 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 332 transitions. [2022-04-28 02:02:19,842 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:19,843 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:19,843 INFO L74 IsIncluded]: Start isIncluded. First operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-28 02:02:19,844 INFO L87 Difference]: Start difference. First operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-28 02:02:19,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:19,848 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-28 02:02:19,848 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 332 transitions. [2022-04-28 02:02:19,849 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:19,849 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:19,849 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:19,849 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:19,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 331 transitions. [2022-04-28 02:02:19,853 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 331 transitions. Word has length 27 [2022-04-28 02:02:19,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:19,853 INFO L495 AbstractCegarLoop]: Abstraction has 185 states and 331 transitions. [2022-04-28 02:02:19,854 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,854 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 331 transitions. [2022-04-28 02:02:19,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-28 02:02:19,854 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:19,854 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:19,854 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-04-28 02:02:19,855 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:19,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:19,855 INFO L85 PathProgramCache]: Analyzing trace with hash 2025836771, now seen corresponding path program 1 times [2022-04-28 02:02:19,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:19,855 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1473485982] [2022-04-28 02:02:19,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:19,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:19,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:19,893 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:19,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:19,898 INFO L290 TraceCheckUtils]: 0: Hoare triple {3894#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3888#true} is VALID [2022-04-28 02:02:19,898 INFO L290 TraceCheckUtils]: 1: Hoare triple {3888#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3888#true} is VALID [2022-04-28 02:02:19,898 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3888#true} {3888#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3888#true} is VALID [2022-04-28 02:02:19,899 INFO L272 TraceCheckUtils]: 0: Hoare triple {3888#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3894#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:19,899 INFO L290 TraceCheckUtils]: 1: Hoare triple {3894#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3888#true} is VALID [2022-04-28 02:02:19,899 INFO L290 TraceCheckUtils]: 2: Hoare triple {3888#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3888#true} is VALID [2022-04-28 02:02:19,899 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3888#true} {3888#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3888#true} is VALID [2022-04-28 02:02:19,900 INFO L272 TraceCheckUtils]: 4: Hoare triple {3888#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3888#true} is VALID [2022-04-28 02:02:19,900 INFO L290 TraceCheckUtils]: 5: Hoare triple {3888#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {3888#true} is VALID [2022-04-28 02:02:19,900 INFO L290 TraceCheckUtils]: 6: Hoare triple {3888#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {3888#true} is VALID [2022-04-28 02:02:19,900 INFO L290 TraceCheckUtils]: 7: Hoare triple {3888#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {3888#true} is VALID [2022-04-28 02:02:19,900 INFO L290 TraceCheckUtils]: 8: Hoare triple {3888#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {3888#true} is VALID [2022-04-28 02:02:19,901 INFO L290 TraceCheckUtils]: 9: Hoare triple {3888#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {3888#true} is VALID [2022-04-28 02:02:19,901 INFO L290 TraceCheckUtils]: 10: Hoare triple {3888#true} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,901 INFO L290 TraceCheckUtils]: 11: Hoare triple {3893#(= main_~lk3~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,902 INFO L290 TraceCheckUtils]: 12: Hoare triple {3893#(= main_~lk3~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,902 INFO L290 TraceCheckUtils]: 13: Hoare triple {3893#(= main_~lk3~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,902 INFO L290 TraceCheckUtils]: 14: Hoare triple {3893#(= main_~lk3~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,903 INFO L290 TraceCheckUtils]: 15: Hoare triple {3893#(= main_~lk3~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,903 INFO L290 TraceCheckUtils]: 16: Hoare triple {3893#(= main_~lk3~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,903 INFO L290 TraceCheckUtils]: 17: Hoare triple {3893#(= main_~lk3~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,904 INFO L290 TraceCheckUtils]: 18: Hoare triple {3893#(= main_~lk3~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,904 INFO L290 TraceCheckUtils]: 19: Hoare triple {3893#(= main_~lk3~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,904 INFO L290 TraceCheckUtils]: 20: Hoare triple {3893#(= main_~lk3~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,905 INFO L290 TraceCheckUtils]: 21: Hoare triple {3893#(= main_~lk3~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,905 INFO L290 TraceCheckUtils]: 22: Hoare triple {3893#(= main_~lk3~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,905 INFO L290 TraceCheckUtils]: 23: Hoare triple {3893#(= main_~lk3~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,906 INFO L290 TraceCheckUtils]: 24: Hoare triple {3893#(= main_~lk3~0 1)} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {3893#(= main_~lk3~0 1)} is VALID [2022-04-28 02:02:19,906 INFO L290 TraceCheckUtils]: 25: Hoare triple {3893#(= main_~lk3~0 1)} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {3889#false} is VALID [2022-04-28 02:02:19,906 INFO L290 TraceCheckUtils]: 26: Hoare triple {3889#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3889#false} is VALID [2022-04-28 02:02:19,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:19,907 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:19,907 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1473485982] [2022-04-28 02:02:19,907 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1473485982] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:19,907 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:19,907 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:19,907 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [132094410] [2022-04-28 02:02:19,907 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:19,908 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:02:19,908 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:19,908 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:19,932 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:19,933 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:19,933 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:19,933 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:19,933 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:19,934 INFO L87 Difference]: Start difference. First operand 185 states and 331 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:20,170 INFO L93 Difference]: Finished difference Result 349 states and 633 transitions. [2022-04-28 02:02:20,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:20,171 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:02:20,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:20,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 171 transitions. [2022-04-28 02:02:20,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 171 transitions. [2022-04-28 02:02:20,175 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 171 transitions. [2022-04-28 02:02:20,318 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 171 edges. 171 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:20,325 INFO L225 Difference]: With dead ends: 349 [2022-04-28 02:02:20,325 INFO L226 Difference]: Without dead ends: 347 [2022-04-28 02:02:20,326 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:20,326 INFO L413 NwaCegarLoop]: 93 mSDtfsCounter, 222 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 222 SdHoareTripleChecker+Valid, 100 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:20,327 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [222 Valid, 100 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:20,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2022-04-28 02:02:20,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 249. [2022-04-28 02:02:20,335 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:20,336 INFO L82 GeneralOperation]: Start isEquivalent. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,337 INFO L74 IsIncluded]: Start isIncluded. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,338 INFO L87 Difference]: Start difference. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:20,346 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-28 02:02:20,346 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 628 transitions. [2022-04-28 02:02:20,346 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:20,346 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:20,347 INFO L74 IsIncluded]: Start isIncluded. First operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 347 states. [2022-04-28 02:02:20,348 INFO L87 Difference]: Start difference. First operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 347 states. [2022-04-28 02:02:20,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:20,356 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-28 02:02:20,356 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 628 transitions. [2022-04-28 02:02:20,357 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:20,357 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:20,357 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:20,357 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:20,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 443 transitions. [2022-04-28 02:02:20,363 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 443 transitions. Word has length 27 [2022-04-28 02:02:20,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:20,363 INFO L495 AbstractCegarLoop]: Abstraction has 249 states and 443 transitions. [2022-04-28 02:02:20,363 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,364 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 443 transitions. [2022-04-28 02:02:20,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-28 02:02:20,364 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:20,364 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:20,364 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-04-28 02:02:20,364 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:20,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:20,365 INFO L85 PathProgramCache]: Analyzing trace with hash -915820828, now seen corresponding path program 1 times [2022-04-28 02:02:20,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:20,365 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [322806195] [2022-04-28 02:02:20,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:20,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:20,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:20,402 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:20,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:20,407 INFO L290 TraceCheckUtils]: 0: Hoare triple {5224#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5218#true} is VALID [2022-04-28 02:02:20,408 INFO L290 TraceCheckUtils]: 1: Hoare triple {5218#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-28 02:02:20,408 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5218#true} {5218#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-28 02:02:20,408 INFO L272 TraceCheckUtils]: 0: Hoare triple {5218#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5224#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:20,408 INFO L290 TraceCheckUtils]: 1: Hoare triple {5224#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5218#true} is VALID [2022-04-28 02:02:20,409 INFO L290 TraceCheckUtils]: 2: Hoare triple {5218#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-28 02:02:20,409 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5218#true} {5218#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-28 02:02:20,409 INFO L272 TraceCheckUtils]: 4: Hoare triple {5218#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-28 02:02:20,409 INFO L290 TraceCheckUtils]: 5: Hoare triple {5218#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {5218#true} is VALID [2022-04-28 02:02:20,409 INFO L290 TraceCheckUtils]: 6: Hoare triple {5218#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {5218#true} is VALID [2022-04-28 02:02:20,410 INFO L290 TraceCheckUtils]: 7: Hoare triple {5218#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {5218#true} is VALID [2022-04-28 02:02:20,410 INFO L290 TraceCheckUtils]: 8: Hoare triple {5218#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-28 02:02:20,410 INFO L290 TraceCheckUtils]: 9: Hoare triple {5218#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-28 02:02:20,410 INFO L290 TraceCheckUtils]: 10: Hoare triple {5218#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,410 INFO L290 TraceCheckUtils]: 11: Hoare triple {5223#(= main_~p3~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,411 INFO L290 TraceCheckUtils]: 12: Hoare triple {5223#(= main_~p3~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,411 INFO L290 TraceCheckUtils]: 13: Hoare triple {5223#(= main_~p3~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,411 INFO L290 TraceCheckUtils]: 14: Hoare triple {5223#(= main_~p3~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,412 INFO L290 TraceCheckUtils]: 15: Hoare triple {5223#(= main_~p3~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,412 INFO L290 TraceCheckUtils]: 16: Hoare triple {5223#(= main_~p3~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,412 INFO L290 TraceCheckUtils]: 17: Hoare triple {5223#(= main_~p3~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,413 INFO L290 TraceCheckUtils]: 18: Hoare triple {5223#(= main_~p3~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,413 INFO L290 TraceCheckUtils]: 19: Hoare triple {5223#(= main_~p3~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,413 INFO L290 TraceCheckUtils]: 20: Hoare triple {5223#(= main_~p3~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,414 INFO L290 TraceCheckUtils]: 21: Hoare triple {5223#(= main_~p3~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,414 INFO L290 TraceCheckUtils]: 22: Hoare triple {5223#(= main_~p3~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,414 INFO L290 TraceCheckUtils]: 23: Hoare triple {5223#(= main_~p3~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {5223#(= main_~p3~0 0)} is VALID [2022-04-28 02:02:20,415 INFO L290 TraceCheckUtils]: 24: Hoare triple {5223#(= main_~p3~0 0)} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-28 02:02:20,415 INFO L290 TraceCheckUtils]: 25: Hoare triple {5219#false} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-28 02:02:20,415 INFO L290 TraceCheckUtils]: 26: Hoare triple {5219#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-28 02:02:20,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:20,415 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:20,415 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [322806195] [2022-04-28 02:02:20,416 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [322806195] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:20,416 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:20,416 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:20,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1883431617] [2022-04-28 02:02:20,416 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:20,416 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:02:20,417 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:20,417 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,438 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:20,438 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:20,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:20,439 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:20,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:20,439 INFO L87 Difference]: Start difference. First operand 249 states and 443 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:20,689 INFO L93 Difference]: Finished difference Result 593 states and 1065 transitions. [2022-04-28 02:02:20,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:20,689 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-28 02:02:20,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:20,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 258 transitions. [2022-04-28 02:02:20,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 258 transitions. [2022-04-28 02:02:20,694 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 258 transitions. [2022-04-28 02:02:20,872 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 258 edges. 258 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:20,879 INFO L225 Difference]: With dead ends: 593 [2022-04-28 02:02:20,879 INFO L226 Difference]: Without dead ends: 355 [2022-04-28 02:02:20,881 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:20,881 INFO L413 NwaCegarLoop]: 124 mSDtfsCounter, 196 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 196 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:20,882 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [196 Valid, 131 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:20,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2022-04-28 02:02:20,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 353. [2022-04-28 02:02:20,890 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:20,892 INFO L82 GeneralOperation]: Start isEquivalent. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,892 INFO L74 IsIncluded]: Start isIncluded. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,893 INFO L87 Difference]: Start difference. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:20,902 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-28 02:02:20,902 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 628 transitions. [2022-04-28 02:02:20,902 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:20,902 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:20,903 INFO L74 IsIncluded]: Start isIncluded. First operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 355 states. [2022-04-28 02:02:20,904 INFO L87 Difference]: Start difference. First operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 355 states. [2022-04-28 02:02:20,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:20,912 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-28 02:02:20,913 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 628 transitions. [2022-04-28 02:02:20,913 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:20,913 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:20,913 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:20,913 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:20,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 353 states to 353 states and 627 transitions. [2022-04-28 02:02:20,923 INFO L78 Accepts]: Start accepts. Automaton has 353 states and 627 transitions. Word has length 27 [2022-04-28 02:02:20,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:20,923 INFO L495 AbstractCegarLoop]: Abstraction has 353 states and 627 transitions. [2022-04-28 02:02:20,923 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:20,923 INFO L276 IsEmpty]: Start isEmpty. Operand 353 states and 627 transitions. [2022-04-28 02:02:20,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-28 02:02:20,924 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:20,924 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:20,924 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-04-28 02:02:20,924 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:20,925 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:20,925 INFO L85 PathProgramCache]: Analyzing trace with hash -1623537198, now seen corresponding path program 1 times [2022-04-28 02:02:20,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:20,925 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742204508] [2022-04-28 02:02:20,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:20,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:20,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:20,991 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:20,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:21,000 INFO L290 TraceCheckUtils]: 0: Hoare triple {6926#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6920#true} is VALID [2022-04-28 02:02:21,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {6920#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6920#true} is VALID [2022-04-28 02:02:21,001 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6920#true} {6920#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6920#true} is VALID [2022-04-28 02:02:21,001 INFO L272 TraceCheckUtils]: 0: Hoare triple {6920#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6926#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:21,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {6926#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6920#true} is VALID [2022-04-28 02:02:21,002 INFO L290 TraceCheckUtils]: 2: Hoare triple {6920#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6920#true} is VALID [2022-04-28 02:02:21,002 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6920#true} {6920#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6920#true} is VALID [2022-04-28 02:02:21,002 INFO L272 TraceCheckUtils]: 4: Hoare triple {6920#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6920#true} is VALID [2022-04-28 02:02:21,002 INFO L290 TraceCheckUtils]: 5: Hoare triple {6920#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {6920#true} is VALID [2022-04-28 02:02:21,002 INFO L290 TraceCheckUtils]: 6: Hoare triple {6920#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {6920#true} is VALID [2022-04-28 02:02:21,002 INFO L290 TraceCheckUtils]: 7: Hoare triple {6920#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {6920#true} is VALID [2022-04-28 02:02:21,003 INFO L290 TraceCheckUtils]: 8: Hoare triple {6920#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {6920#true} is VALID [2022-04-28 02:02:21,003 INFO L290 TraceCheckUtils]: 9: Hoare triple {6920#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {6920#true} is VALID [2022-04-28 02:02:21,003 INFO L290 TraceCheckUtils]: 10: Hoare triple {6920#true} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,004 INFO L290 TraceCheckUtils]: 11: Hoare triple {6925#(not (= main_~p3~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,005 INFO L290 TraceCheckUtils]: 12: Hoare triple {6925#(not (= main_~p3~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,005 INFO L290 TraceCheckUtils]: 13: Hoare triple {6925#(not (= main_~p3~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,006 INFO L290 TraceCheckUtils]: 14: Hoare triple {6925#(not (= main_~p3~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,008 INFO L290 TraceCheckUtils]: 15: Hoare triple {6925#(not (= main_~p3~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,009 INFO L290 TraceCheckUtils]: 16: Hoare triple {6925#(not (= main_~p3~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,009 INFO L290 TraceCheckUtils]: 17: Hoare triple {6925#(not (= main_~p3~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,015 INFO L290 TraceCheckUtils]: 18: Hoare triple {6925#(not (= main_~p3~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,020 INFO L290 TraceCheckUtils]: 19: Hoare triple {6925#(not (= main_~p3~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,020 INFO L290 TraceCheckUtils]: 20: Hoare triple {6925#(not (= main_~p3~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,021 INFO L290 TraceCheckUtils]: 21: Hoare triple {6925#(not (= main_~p3~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,021 INFO L290 TraceCheckUtils]: 22: Hoare triple {6925#(not (= main_~p3~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,021 INFO L290 TraceCheckUtils]: 23: Hoare triple {6925#(not (= main_~p3~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {6925#(not (= main_~p3~0 0))} is VALID [2022-04-28 02:02:21,022 INFO L290 TraceCheckUtils]: 24: Hoare triple {6925#(not (= main_~p3~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {6921#false} is VALID [2022-04-28 02:02:21,022 INFO L290 TraceCheckUtils]: 25: Hoare triple {6921#false} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {6921#false} is VALID [2022-04-28 02:02:21,022 INFO L290 TraceCheckUtils]: 26: Hoare triple {6921#false} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {6921#false} is VALID [2022-04-28 02:02:21,022 INFO L290 TraceCheckUtils]: 27: Hoare triple {6921#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6921#false} is VALID [2022-04-28 02:02:21,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:21,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:21,023 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742204508] [2022-04-28 02:02:21,023 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [742204508] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:21,023 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:21,023 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:21,023 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1601947208] [2022-04-28 02:02:21,023 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:21,024 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:02:21,024 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:21,024 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,044 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:21,044 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:21,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:21,045 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:21,045 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:21,045 INFO L87 Difference]: Start difference. First operand 353 states and 627 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:21,293 INFO L93 Difference]: Finished difference Result 529 states and 937 transitions. [2022-04-28 02:02:21,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:21,293 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:02:21,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:21,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 253 transitions. [2022-04-28 02:02:21,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 253 transitions. [2022-04-28 02:02:21,298 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 253 transitions. [2022-04-28 02:02:21,494 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 253 edges. 253 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:21,501 INFO L225 Difference]: With dead ends: 529 [2022-04-28 02:02:21,501 INFO L226 Difference]: Without dead ends: 359 [2022-04-28 02:02:21,502 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:21,503 INFO L413 NwaCegarLoop]: 140 mSDtfsCounter, 181 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 181 SdHoareTripleChecker+Valid, 147 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:21,503 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [181 Valid, 147 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:21,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states. [2022-04-28 02:02:21,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 357. [2022-04-28 02:02:21,512 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:21,513 INFO L82 GeneralOperation]: Start isEquivalent. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,514 INFO L74 IsIncluded]: Start isIncluded. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,514 INFO L87 Difference]: Start difference. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:21,523 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-28 02:02:21,523 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 628 transitions. [2022-04-28 02:02:21,524 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:21,524 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:21,525 INFO L74 IsIncluded]: Start isIncluded. First operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 359 states. [2022-04-28 02:02:21,526 INFO L87 Difference]: Start difference. First operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 359 states. [2022-04-28 02:02:21,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:21,535 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-28 02:02:21,535 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 628 transitions. [2022-04-28 02:02:21,535 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:21,535 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:21,536 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:21,536 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:21,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 627 transitions. [2022-04-28 02:02:21,545 INFO L78 Accepts]: Start accepts. Automaton has 357 states and 627 transitions. Word has length 28 [2022-04-28 02:02:21,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:21,546 INFO L495 AbstractCegarLoop]: Abstraction has 357 states and 627 transitions. [2022-04-28 02:02:21,546 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,546 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 627 transitions. [2022-04-28 02:02:21,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-28 02:02:21,546 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:21,547 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:21,547 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-04-28 02:02:21,547 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:21,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:21,547 INFO L85 PathProgramCache]: Analyzing trace with hash 1674357745, now seen corresponding path program 1 times [2022-04-28 02:02:21,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:21,548 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766584264] [2022-04-28 02:02:21,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:21,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:21,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:21,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:21,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:21,621 INFO L290 TraceCheckUtils]: 0: Hoare triple {8576#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8570#true} is VALID [2022-04-28 02:02:21,621 INFO L290 TraceCheckUtils]: 1: Hoare triple {8570#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8570#true} is VALID [2022-04-28 02:02:21,621 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8570#true} {8570#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8570#true} is VALID [2022-04-28 02:02:21,622 INFO L272 TraceCheckUtils]: 0: Hoare triple {8570#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8576#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:21,622 INFO L290 TraceCheckUtils]: 1: Hoare triple {8576#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8570#true} is VALID [2022-04-28 02:02:21,622 INFO L290 TraceCheckUtils]: 2: Hoare triple {8570#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8570#true} is VALID [2022-04-28 02:02:21,622 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8570#true} {8570#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8570#true} is VALID [2022-04-28 02:02:21,622 INFO L272 TraceCheckUtils]: 4: Hoare triple {8570#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8570#true} is VALID [2022-04-28 02:02:21,623 INFO L290 TraceCheckUtils]: 5: Hoare triple {8570#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {8570#true} is VALID [2022-04-28 02:02:21,623 INFO L290 TraceCheckUtils]: 6: Hoare triple {8570#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {8570#true} is VALID [2022-04-28 02:02:21,623 INFO L290 TraceCheckUtils]: 7: Hoare triple {8570#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {8570#true} is VALID [2022-04-28 02:02:21,623 INFO L290 TraceCheckUtils]: 8: Hoare triple {8570#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {8570#true} is VALID [2022-04-28 02:02:21,623 INFO L290 TraceCheckUtils]: 9: Hoare triple {8570#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {8570#true} is VALID [2022-04-28 02:02:21,623 INFO L290 TraceCheckUtils]: 10: Hoare triple {8570#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {8570#true} is VALID [2022-04-28 02:02:21,624 INFO L290 TraceCheckUtils]: 11: Hoare triple {8570#true} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,624 INFO L290 TraceCheckUtils]: 12: Hoare triple {8575#(= main_~lk4~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,624 INFO L290 TraceCheckUtils]: 13: Hoare triple {8575#(= main_~lk4~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,625 INFO L290 TraceCheckUtils]: 14: Hoare triple {8575#(= main_~lk4~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,625 INFO L290 TraceCheckUtils]: 15: Hoare triple {8575#(= main_~lk4~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,626 INFO L290 TraceCheckUtils]: 16: Hoare triple {8575#(= main_~lk4~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,626 INFO L290 TraceCheckUtils]: 17: Hoare triple {8575#(= main_~lk4~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,626 INFO L290 TraceCheckUtils]: 18: Hoare triple {8575#(= main_~lk4~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,627 INFO L290 TraceCheckUtils]: 19: Hoare triple {8575#(= main_~lk4~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,627 INFO L290 TraceCheckUtils]: 20: Hoare triple {8575#(= main_~lk4~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,627 INFO L290 TraceCheckUtils]: 21: Hoare triple {8575#(= main_~lk4~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,628 INFO L290 TraceCheckUtils]: 22: Hoare triple {8575#(= main_~lk4~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,628 INFO L290 TraceCheckUtils]: 23: Hoare triple {8575#(= main_~lk4~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,628 INFO L290 TraceCheckUtils]: 24: Hoare triple {8575#(= main_~lk4~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,629 INFO L290 TraceCheckUtils]: 25: Hoare triple {8575#(= main_~lk4~0 1)} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {8575#(= main_~lk4~0 1)} is VALID [2022-04-28 02:02:21,629 INFO L290 TraceCheckUtils]: 26: Hoare triple {8575#(= main_~lk4~0 1)} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {8571#false} is VALID [2022-04-28 02:02:21,629 INFO L290 TraceCheckUtils]: 27: Hoare triple {8571#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8571#false} is VALID [2022-04-28 02:02:21,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:21,630 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:21,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766584264] [2022-04-28 02:02:21,630 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1766584264] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:21,630 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:21,630 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:21,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [570873828] [2022-04-28 02:02:21,631 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:21,631 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:02:21,631 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:21,631 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,649 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:21,650 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:21,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:21,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:21,650 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:21,650 INFO L87 Difference]: Start difference. First operand 357 states and 627 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:21,894 INFO L93 Difference]: Finished difference Result 669 states and 1193 transitions. [2022-04-28 02:02:21,894 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:21,894 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:02:21,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:21,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 167 transitions. [2022-04-28 02:02:21,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:21,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 167 transitions. [2022-04-28 02:02:21,898 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 167 transitions. [2022-04-28 02:02:22,030 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 167 edges. 167 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:22,051 INFO L225 Difference]: With dead ends: 669 [2022-04-28 02:02:22,052 INFO L226 Difference]: Without dead ends: 667 [2022-04-28 02:02:22,052 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:22,054 INFO L413 NwaCegarLoop]: 92 mSDtfsCounter, 215 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 215 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:22,055 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [215 Valid, 99 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:22,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 667 states. [2022-04-28 02:02:22,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 667 to 489. [2022-04-28 02:02:22,068 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:22,069 INFO L82 GeneralOperation]: Start isEquivalent. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,070 INFO L74 IsIncluded]: Start isIncluded. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,072 INFO L87 Difference]: Start difference. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:22,093 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-28 02:02:22,093 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 1184 transitions. [2022-04-28 02:02:22,094 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:22,094 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:22,095 INFO L74 IsIncluded]: Start isIncluded. First operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 667 states. [2022-04-28 02:02:22,096 INFO L87 Difference]: Start difference. First operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 667 states. [2022-04-28 02:02:22,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:22,118 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-28 02:02:22,118 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 1184 transitions. [2022-04-28 02:02:22,119 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:22,119 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:22,119 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:22,119 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:22,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 489 states to 489 states and 847 transitions. [2022-04-28 02:02:22,135 INFO L78 Accepts]: Start accepts. Automaton has 489 states and 847 transitions. Word has length 28 [2022-04-28 02:02:22,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:22,135 INFO L495 AbstractCegarLoop]: Abstraction has 489 states and 847 transitions. [2022-04-28 02:02:22,135 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,135 INFO L276 IsEmpty]: Start isEmpty. Operand 489 states and 847 transitions. [2022-04-28 02:02:22,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-28 02:02:22,136 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:22,136 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:22,136 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-28 02:02:22,137 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:22,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:22,137 INFO L85 PathProgramCache]: Analyzing trace with hash -1267299854, now seen corresponding path program 1 times [2022-04-28 02:02:22,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:22,138 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [586802309] [2022-04-28 02:02:22,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:22,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:22,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:22,183 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:22,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:22,191 INFO L290 TraceCheckUtils]: 0: Hoare triple {11118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11112#true} is VALID [2022-04-28 02:02:22,192 INFO L290 TraceCheckUtils]: 1: Hoare triple {11112#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11112#true} is VALID [2022-04-28 02:02:22,192 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11112#true} {11112#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11112#true} is VALID [2022-04-28 02:02:22,192 INFO L272 TraceCheckUtils]: 0: Hoare triple {11112#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:22,192 INFO L290 TraceCheckUtils]: 1: Hoare triple {11118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11112#true} is VALID [2022-04-28 02:02:22,193 INFO L290 TraceCheckUtils]: 2: Hoare triple {11112#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11112#true} is VALID [2022-04-28 02:02:22,193 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11112#true} {11112#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11112#true} is VALID [2022-04-28 02:02:22,193 INFO L272 TraceCheckUtils]: 4: Hoare triple {11112#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11112#true} is VALID [2022-04-28 02:02:22,193 INFO L290 TraceCheckUtils]: 5: Hoare triple {11112#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {11112#true} is VALID [2022-04-28 02:02:22,193 INFO L290 TraceCheckUtils]: 6: Hoare triple {11112#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {11112#true} is VALID [2022-04-28 02:02:22,193 INFO L290 TraceCheckUtils]: 7: Hoare triple {11112#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {11112#true} is VALID [2022-04-28 02:02:22,193 INFO L290 TraceCheckUtils]: 8: Hoare triple {11112#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {11112#true} is VALID [2022-04-28 02:02:22,193 INFO L290 TraceCheckUtils]: 9: Hoare triple {11112#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {11112#true} is VALID [2022-04-28 02:02:22,194 INFO L290 TraceCheckUtils]: 10: Hoare triple {11112#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {11112#true} is VALID [2022-04-28 02:02:22,194 INFO L290 TraceCheckUtils]: 11: Hoare triple {11112#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,194 INFO L290 TraceCheckUtils]: 12: Hoare triple {11117#(= main_~p4~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,195 INFO L290 TraceCheckUtils]: 13: Hoare triple {11117#(= main_~p4~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,195 INFO L290 TraceCheckUtils]: 14: Hoare triple {11117#(= main_~p4~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,196 INFO L290 TraceCheckUtils]: 15: Hoare triple {11117#(= main_~p4~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,196 INFO L290 TraceCheckUtils]: 16: Hoare triple {11117#(= main_~p4~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,196 INFO L290 TraceCheckUtils]: 17: Hoare triple {11117#(= main_~p4~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,197 INFO L290 TraceCheckUtils]: 18: Hoare triple {11117#(= main_~p4~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,197 INFO L290 TraceCheckUtils]: 19: Hoare triple {11117#(= main_~p4~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,197 INFO L290 TraceCheckUtils]: 20: Hoare triple {11117#(= main_~p4~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,198 INFO L290 TraceCheckUtils]: 21: Hoare triple {11117#(= main_~p4~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,198 INFO L290 TraceCheckUtils]: 22: Hoare triple {11117#(= main_~p4~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,198 INFO L290 TraceCheckUtils]: 23: Hoare triple {11117#(= main_~p4~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,199 INFO L290 TraceCheckUtils]: 24: Hoare triple {11117#(= main_~p4~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {11117#(= main_~p4~0 0)} is VALID [2022-04-28 02:02:22,199 INFO L290 TraceCheckUtils]: 25: Hoare triple {11117#(= main_~p4~0 0)} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {11113#false} is VALID [2022-04-28 02:02:22,199 INFO L290 TraceCheckUtils]: 26: Hoare triple {11113#false} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {11113#false} is VALID [2022-04-28 02:02:22,199 INFO L290 TraceCheckUtils]: 27: Hoare triple {11113#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11113#false} is VALID [2022-04-28 02:02:22,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:22,200 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:22,201 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [586802309] [2022-04-28 02:02:22,201 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [586802309] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:22,201 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:22,201 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:22,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1993162099] [2022-04-28 02:02:22,202 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:22,202 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:02:22,203 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:22,203 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,221 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:22,221 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:22,221 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:22,221 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:22,221 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:22,222 INFO L87 Difference]: Start difference. First operand 489 states and 847 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:22,510 INFO L93 Difference]: Finished difference Result 1165 states and 2033 transitions. [2022-04-28 02:02:22,510 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:22,511 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-28 02:02:22,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:22,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 255 transitions. [2022-04-28 02:02:22,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 255 transitions. [2022-04-28 02:02:22,516 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 255 transitions. [2022-04-28 02:02:22,709 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 255 edges. 255 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:22,732 INFO L225 Difference]: With dead ends: 1165 [2022-04-28 02:02:22,732 INFO L226 Difference]: Without dead ends: 691 [2022-04-28 02:02:22,733 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:22,733 INFO L413 NwaCegarLoop]: 126 mSDtfsCounter, 190 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 190 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:22,734 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [190 Valid, 133 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:22,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 691 states. [2022-04-28 02:02:22,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 691 to 689. [2022-04-28 02:02:22,749 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:22,750 INFO L82 GeneralOperation]: Start isEquivalent. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,751 INFO L74 IsIncluded]: Start isIncluded. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,752 INFO L87 Difference]: Start difference. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:22,776 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-28 02:02:22,776 INFO L276 IsEmpty]: Start isEmpty. Operand 691 states and 1192 transitions. [2022-04-28 02:02:22,777 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:22,777 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:22,778 INFO L74 IsIncluded]: Start isIncluded. First operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 691 states. [2022-04-28 02:02:22,779 INFO L87 Difference]: Start difference. First operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 691 states. [2022-04-28 02:02:22,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:22,803 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-28 02:02:22,803 INFO L276 IsEmpty]: Start isEmpty. Operand 691 states and 1192 transitions. [2022-04-28 02:02:22,804 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:22,804 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:22,804 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:22,804 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:22,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 689 states to 689 states and 1191 transitions. [2022-04-28 02:02:22,829 INFO L78 Accepts]: Start accepts. Automaton has 689 states and 1191 transitions. Word has length 28 [2022-04-28 02:02:22,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:22,829 INFO L495 AbstractCegarLoop]: Abstraction has 689 states and 1191 transitions. [2022-04-28 02:02:22,829 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,829 INFO L276 IsEmpty]: Start isEmpty. Operand 689 states and 1191 transitions. [2022-04-28 02:02:22,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-28 02:02:22,830 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:22,830 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:22,830 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-04-28 02:02:22,830 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:22,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:22,831 INFO L85 PathProgramCache]: Analyzing trace with hash 365515008, now seen corresponding path program 1 times [2022-04-28 02:02:22,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:22,831 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1093567147] [2022-04-28 02:02:22,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:22,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:22,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:22,861 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:22,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:22,866 INFO L290 TraceCheckUtils]: 0: Hoare triple {14420#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14414#true} is VALID [2022-04-28 02:02:22,866 INFO L290 TraceCheckUtils]: 1: Hoare triple {14414#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14414#true} is VALID [2022-04-28 02:02:22,866 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14414#true} {14414#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14414#true} is VALID [2022-04-28 02:02:22,866 INFO L272 TraceCheckUtils]: 0: Hoare triple {14414#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14420#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:22,867 INFO L290 TraceCheckUtils]: 1: Hoare triple {14420#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14414#true} is VALID [2022-04-28 02:02:22,867 INFO L290 TraceCheckUtils]: 2: Hoare triple {14414#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14414#true} is VALID [2022-04-28 02:02:22,867 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14414#true} {14414#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14414#true} is VALID [2022-04-28 02:02:22,867 INFO L272 TraceCheckUtils]: 4: Hoare triple {14414#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14414#true} is VALID [2022-04-28 02:02:22,867 INFO L290 TraceCheckUtils]: 5: Hoare triple {14414#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {14414#true} is VALID [2022-04-28 02:02:22,867 INFO L290 TraceCheckUtils]: 6: Hoare triple {14414#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {14414#true} is VALID [2022-04-28 02:02:22,868 INFO L290 TraceCheckUtils]: 7: Hoare triple {14414#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {14414#true} is VALID [2022-04-28 02:02:22,868 INFO L290 TraceCheckUtils]: 8: Hoare triple {14414#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {14414#true} is VALID [2022-04-28 02:02:22,868 INFO L290 TraceCheckUtils]: 9: Hoare triple {14414#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {14414#true} is VALID [2022-04-28 02:02:22,868 INFO L290 TraceCheckUtils]: 10: Hoare triple {14414#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {14414#true} is VALID [2022-04-28 02:02:22,868 INFO L290 TraceCheckUtils]: 11: Hoare triple {14414#true} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,869 INFO L290 TraceCheckUtils]: 12: Hoare triple {14419#(not (= main_~p4~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,869 INFO L290 TraceCheckUtils]: 13: Hoare triple {14419#(not (= main_~p4~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,869 INFO L290 TraceCheckUtils]: 14: Hoare triple {14419#(not (= main_~p4~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,870 INFO L290 TraceCheckUtils]: 15: Hoare triple {14419#(not (= main_~p4~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,870 INFO L290 TraceCheckUtils]: 16: Hoare triple {14419#(not (= main_~p4~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,870 INFO L290 TraceCheckUtils]: 17: Hoare triple {14419#(not (= main_~p4~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,871 INFO L290 TraceCheckUtils]: 18: Hoare triple {14419#(not (= main_~p4~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,892 INFO L290 TraceCheckUtils]: 19: Hoare triple {14419#(not (= main_~p4~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,892 INFO L290 TraceCheckUtils]: 20: Hoare triple {14419#(not (= main_~p4~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,893 INFO L290 TraceCheckUtils]: 21: Hoare triple {14419#(not (= main_~p4~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,893 INFO L290 TraceCheckUtils]: 22: Hoare triple {14419#(not (= main_~p4~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,893 INFO L290 TraceCheckUtils]: 23: Hoare triple {14419#(not (= main_~p4~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,894 INFO L290 TraceCheckUtils]: 24: Hoare triple {14419#(not (= main_~p4~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {14419#(not (= main_~p4~0 0))} is VALID [2022-04-28 02:02:22,894 INFO L290 TraceCheckUtils]: 25: Hoare triple {14419#(not (= main_~p4~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {14415#false} is VALID [2022-04-28 02:02:22,894 INFO L290 TraceCheckUtils]: 26: Hoare triple {14415#false} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {14415#false} is VALID [2022-04-28 02:02:22,894 INFO L290 TraceCheckUtils]: 27: Hoare triple {14415#false} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {14415#false} is VALID [2022-04-28 02:02:22,894 INFO L290 TraceCheckUtils]: 28: Hoare triple {14415#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14415#false} is VALID [2022-04-28 02:02:22,895 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:22,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:22,895 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1093567147] [2022-04-28 02:02:22,895 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1093567147] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:22,895 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:22,895 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:22,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831182799] [2022-04-28 02:02:22,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:22,896 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:02:22,896 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:22,896 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:22,917 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:22,917 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:22,918 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:22,918 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:22,918 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:22,918 INFO L87 Difference]: Start difference. First operand 689 states and 1191 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:23,195 INFO L93 Difference]: Finished difference Result 1033 states and 1781 transitions. [2022-04-28 02:02:23,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:23,195 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:02:23,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:23,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 250 transitions. [2022-04-28 02:02:23,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 250 transitions. [2022-04-28 02:02:23,199 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 250 transitions. [2022-04-28 02:02:23,391 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 250 edges. 250 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:23,414 INFO L225 Difference]: With dead ends: 1033 [2022-04-28 02:02:23,414 INFO L226 Difference]: Without dead ends: 699 [2022-04-28 02:02:23,415 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:23,416 INFO L413 NwaCegarLoop]: 137 mSDtfsCounter, 180 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 180 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:23,416 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [180 Valid, 144 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:23,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2022-04-28 02:02:23,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 697. [2022-04-28 02:02:23,429 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:23,430 INFO L82 GeneralOperation]: Start isEquivalent. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,431 INFO L74 IsIncluded]: Start isIncluded. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,432 INFO L87 Difference]: Start difference. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:23,455 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-28 02:02:23,455 INFO L276 IsEmpty]: Start isEmpty. Operand 699 states and 1192 transitions. [2022-04-28 02:02:23,456 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:23,456 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:23,458 INFO L74 IsIncluded]: Start isIncluded. First operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 699 states. [2022-04-28 02:02:23,459 INFO L87 Difference]: Start difference. First operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 699 states. [2022-04-28 02:02:23,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:23,482 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-28 02:02:23,482 INFO L276 IsEmpty]: Start isEmpty. Operand 699 states and 1192 transitions. [2022-04-28 02:02:23,483 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:23,483 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:23,483 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:23,483 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:23,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 697 states to 697 states and 1191 transitions. [2022-04-28 02:02:23,510 INFO L78 Accepts]: Start accepts. Automaton has 697 states and 1191 transitions. Word has length 29 [2022-04-28 02:02:23,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:23,510 INFO L495 AbstractCegarLoop]: Abstraction has 697 states and 1191 transitions. [2022-04-28 02:02:23,510 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,511 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 1191 transitions. [2022-04-28 02:02:23,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-28 02:02:23,511 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:23,512 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:23,512 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-04-28 02:02:23,512 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:23,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:23,512 INFO L85 PathProgramCache]: Analyzing trace with hash -631557345, now seen corresponding path program 1 times [2022-04-28 02:02:23,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:23,512 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1403125966] [2022-04-28 02:02:23,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:23,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:23,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:23,543 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:23,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:23,547 INFO L290 TraceCheckUtils]: 0: Hoare triple {17614#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17608#true} is VALID [2022-04-28 02:02:23,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {17608#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17608#true} is VALID [2022-04-28 02:02:23,547 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17608#true} {17608#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17608#true} is VALID [2022-04-28 02:02:23,548 INFO L272 TraceCheckUtils]: 0: Hoare triple {17608#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17614#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:23,548 INFO L290 TraceCheckUtils]: 1: Hoare triple {17614#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17608#true} is VALID [2022-04-28 02:02:23,548 INFO L290 TraceCheckUtils]: 2: Hoare triple {17608#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17608#true} is VALID [2022-04-28 02:02:23,548 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17608#true} {17608#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17608#true} is VALID [2022-04-28 02:02:23,549 INFO L272 TraceCheckUtils]: 4: Hoare triple {17608#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17608#true} is VALID [2022-04-28 02:02:23,549 INFO L290 TraceCheckUtils]: 5: Hoare triple {17608#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {17608#true} is VALID [2022-04-28 02:02:23,549 INFO L290 TraceCheckUtils]: 6: Hoare triple {17608#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {17608#true} is VALID [2022-04-28 02:02:23,549 INFO L290 TraceCheckUtils]: 7: Hoare triple {17608#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {17608#true} is VALID [2022-04-28 02:02:23,549 INFO L290 TraceCheckUtils]: 8: Hoare triple {17608#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {17608#true} is VALID [2022-04-28 02:02:23,549 INFO L290 TraceCheckUtils]: 9: Hoare triple {17608#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {17608#true} is VALID [2022-04-28 02:02:23,549 INFO L290 TraceCheckUtils]: 10: Hoare triple {17608#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {17608#true} is VALID [2022-04-28 02:02:23,549 INFO L290 TraceCheckUtils]: 11: Hoare triple {17608#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {17608#true} is VALID [2022-04-28 02:02:23,550 INFO L290 TraceCheckUtils]: 12: Hoare triple {17608#true} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,550 INFO L290 TraceCheckUtils]: 13: Hoare triple {17613#(= main_~lk5~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,550 INFO L290 TraceCheckUtils]: 14: Hoare triple {17613#(= main_~lk5~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,551 INFO L290 TraceCheckUtils]: 15: Hoare triple {17613#(= main_~lk5~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,551 INFO L290 TraceCheckUtils]: 16: Hoare triple {17613#(= main_~lk5~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,552 INFO L290 TraceCheckUtils]: 17: Hoare triple {17613#(= main_~lk5~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,552 INFO L290 TraceCheckUtils]: 18: Hoare triple {17613#(= main_~lk5~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,552 INFO L290 TraceCheckUtils]: 19: Hoare triple {17613#(= main_~lk5~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,553 INFO L290 TraceCheckUtils]: 20: Hoare triple {17613#(= main_~lk5~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,553 INFO L290 TraceCheckUtils]: 21: Hoare triple {17613#(= main_~lk5~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,553 INFO L290 TraceCheckUtils]: 22: Hoare triple {17613#(= main_~lk5~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,554 INFO L290 TraceCheckUtils]: 23: Hoare triple {17613#(= main_~lk5~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,554 INFO L290 TraceCheckUtils]: 24: Hoare triple {17613#(= main_~lk5~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,554 INFO L290 TraceCheckUtils]: 25: Hoare triple {17613#(= main_~lk5~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,555 INFO L290 TraceCheckUtils]: 26: Hoare triple {17613#(= main_~lk5~0 1)} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {17613#(= main_~lk5~0 1)} is VALID [2022-04-28 02:02:23,555 INFO L290 TraceCheckUtils]: 27: Hoare triple {17613#(= main_~lk5~0 1)} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {17609#false} is VALID [2022-04-28 02:02:23,555 INFO L290 TraceCheckUtils]: 28: Hoare triple {17609#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17609#false} is VALID [2022-04-28 02:02:23,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:23,556 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:23,556 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1403125966] [2022-04-28 02:02:23,556 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1403125966] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:23,556 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:23,556 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:23,556 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1365007559] [2022-04-28 02:02:23,556 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:23,556 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:02:23,557 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:23,557 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,575 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:23,576 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:23,576 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:23,576 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:23,576 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:23,576 INFO L87 Difference]: Start difference. First operand 697 states and 1191 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:23,887 INFO L93 Difference]: Finished difference Result 1293 states and 2249 transitions. [2022-04-28 02:02:23,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:23,887 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:02:23,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:23,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 163 transitions. [2022-04-28 02:02:23,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:23,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 163 transitions. [2022-04-28 02:02:23,890 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 163 transitions. [2022-04-28 02:02:24,026 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 163 edges. 163 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:24,098 INFO L225 Difference]: With dead ends: 1293 [2022-04-28 02:02:24,098 INFO L226 Difference]: Without dead ends: 1291 [2022-04-28 02:02:24,099 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:24,100 INFO L413 NwaCegarLoop]: 91 mSDtfsCounter, 208 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:24,100 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [208 Valid, 98 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:24,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1291 states. [2022-04-28 02:02:24,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1291 to 969. [2022-04-28 02:02:24,119 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:24,121 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:24,122 INFO L74 IsIncluded]: Start isIncluded. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:24,123 INFO L87 Difference]: Start difference. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:24,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:24,192 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-28 02:02:24,192 INFO L276 IsEmpty]: Start isEmpty. Operand 1291 states and 2232 transitions. [2022-04-28 02:02:24,194 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:24,194 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:24,196 INFO L74 IsIncluded]: Start isIncluded. First operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1291 states. [2022-04-28 02:02:24,197 INFO L87 Difference]: Start difference. First operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1291 states. [2022-04-28 02:02:24,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:24,265 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-28 02:02:24,265 INFO L276 IsEmpty]: Start isEmpty. Operand 1291 states and 2232 transitions. [2022-04-28 02:02:24,269 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:24,269 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:24,269 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:24,269 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:24,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:24,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1623 transitions. [2022-04-28 02:02:24,313 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1623 transitions. Word has length 29 [2022-04-28 02:02:24,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:24,314 INFO L495 AbstractCegarLoop]: Abstraction has 969 states and 1623 transitions. [2022-04-28 02:02:24,314 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:24,314 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1623 transitions. [2022-04-28 02:02:24,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-28 02:02:24,315 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:24,315 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:24,315 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-04-28 02:02:24,316 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:24,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:24,316 INFO L85 PathProgramCache]: Analyzing trace with hash 721752352, now seen corresponding path program 1 times [2022-04-28 02:02:24,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:24,316 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1108878896] [2022-04-28 02:02:24,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:24,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:24,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:24,367 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:24,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:24,372 INFO L290 TraceCheckUtils]: 0: Hoare triple {22532#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {22526#true} is VALID [2022-04-28 02:02:24,372 INFO L290 TraceCheckUtils]: 1: Hoare triple {22526#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22526#true} is VALID [2022-04-28 02:02:24,372 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {22526#true} {22526#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22526#true} is VALID [2022-04-28 02:02:24,373 INFO L272 TraceCheckUtils]: 0: Hoare triple {22526#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22532#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:24,373 INFO L290 TraceCheckUtils]: 1: Hoare triple {22532#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {22526#true} is VALID [2022-04-28 02:02:24,373 INFO L290 TraceCheckUtils]: 2: Hoare triple {22526#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22526#true} is VALID [2022-04-28 02:02:24,373 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {22526#true} {22526#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22526#true} is VALID [2022-04-28 02:02:24,373 INFO L272 TraceCheckUtils]: 4: Hoare triple {22526#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22526#true} is VALID [2022-04-28 02:02:24,373 INFO L290 TraceCheckUtils]: 5: Hoare triple {22526#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {22526#true} is VALID [2022-04-28 02:02:24,373 INFO L290 TraceCheckUtils]: 6: Hoare triple {22526#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {22526#true} is VALID [2022-04-28 02:02:24,373 INFO L290 TraceCheckUtils]: 7: Hoare triple {22526#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {22526#true} is VALID [2022-04-28 02:02:24,373 INFO L290 TraceCheckUtils]: 8: Hoare triple {22526#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {22526#true} is VALID [2022-04-28 02:02:24,374 INFO L290 TraceCheckUtils]: 9: Hoare triple {22526#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {22526#true} is VALID [2022-04-28 02:02:24,374 INFO L290 TraceCheckUtils]: 10: Hoare triple {22526#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {22526#true} is VALID [2022-04-28 02:02:24,374 INFO L290 TraceCheckUtils]: 11: Hoare triple {22526#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {22526#true} is VALID [2022-04-28 02:02:24,374 INFO L290 TraceCheckUtils]: 12: Hoare triple {22526#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,374 INFO L290 TraceCheckUtils]: 13: Hoare triple {22531#(= main_~p5~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,375 INFO L290 TraceCheckUtils]: 14: Hoare triple {22531#(= main_~p5~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,375 INFO L290 TraceCheckUtils]: 15: Hoare triple {22531#(= main_~p5~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,375 INFO L290 TraceCheckUtils]: 16: Hoare triple {22531#(= main_~p5~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,376 INFO L290 TraceCheckUtils]: 17: Hoare triple {22531#(= main_~p5~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,376 INFO L290 TraceCheckUtils]: 18: Hoare triple {22531#(= main_~p5~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,376 INFO L290 TraceCheckUtils]: 19: Hoare triple {22531#(= main_~p5~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,376 INFO L290 TraceCheckUtils]: 20: Hoare triple {22531#(= main_~p5~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,377 INFO L290 TraceCheckUtils]: 21: Hoare triple {22531#(= main_~p5~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,377 INFO L290 TraceCheckUtils]: 22: Hoare triple {22531#(= main_~p5~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,377 INFO L290 TraceCheckUtils]: 23: Hoare triple {22531#(= main_~p5~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,378 INFO L290 TraceCheckUtils]: 24: Hoare triple {22531#(= main_~p5~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,378 INFO L290 TraceCheckUtils]: 25: Hoare triple {22531#(= main_~p5~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {22531#(= main_~p5~0 0)} is VALID [2022-04-28 02:02:24,378 INFO L290 TraceCheckUtils]: 26: Hoare triple {22531#(= main_~p5~0 0)} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {22527#false} is VALID [2022-04-28 02:02:24,378 INFO L290 TraceCheckUtils]: 27: Hoare triple {22527#false} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {22527#false} is VALID [2022-04-28 02:02:24,379 INFO L290 TraceCheckUtils]: 28: Hoare triple {22527#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22527#false} is VALID [2022-04-28 02:02:24,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:24,379 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:24,379 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1108878896] [2022-04-28 02:02:24,379 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1108878896] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:24,379 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:24,379 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:24,379 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1561477754] [2022-04-28 02:02:24,379 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:24,383 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:02:24,383 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:24,383 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:24,417 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:24,418 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:24,418 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:24,418 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:24,418 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:24,418 INFO L87 Difference]: Start difference. First operand 969 states and 1623 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:24,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:24,868 INFO L93 Difference]: Finished difference Result 2301 states and 3881 transitions. [2022-04-28 02:02:24,868 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:24,868 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-28 02:02:24,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:24,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:24,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 252 transitions. [2022-04-28 02:02:24,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:24,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 252 transitions. [2022-04-28 02:02:24,872 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 252 transitions. [2022-04-28 02:02:25,056 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 252 edges. 252 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:25,138 INFO L225 Difference]: With dead ends: 2301 [2022-04-28 02:02:25,138 INFO L226 Difference]: Without dead ends: 1355 [2022-04-28 02:02:25,140 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:25,141 INFO L413 NwaCegarLoop]: 128 mSDtfsCounter, 184 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 184 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:25,141 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [184 Valid, 135 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:25,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1355 states. [2022-04-28 02:02:25,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1355 to 1353. [2022-04-28 02:02:25,166 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:25,168 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:25,170 INFO L74 IsIncluded]: Start isIncluded. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:25,172 INFO L87 Difference]: Start difference. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:25,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:25,247 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-28 02:02:25,247 INFO L276 IsEmpty]: Start isEmpty. Operand 1355 states and 2264 transitions. [2022-04-28 02:02:25,249 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:25,249 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:25,252 INFO L74 IsIncluded]: Start isIncluded. First operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1355 states. [2022-04-28 02:02:25,253 INFO L87 Difference]: Start difference. First operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1355 states. [2022-04-28 02:02:25,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:25,326 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-28 02:02:25,326 INFO L276 IsEmpty]: Start isEmpty. Operand 1355 states and 2264 transitions. [2022-04-28 02:02:25,328 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:25,328 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:25,328 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:25,328 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:25,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:25,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1353 states to 1353 states and 2263 transitions. [2022-04-28 02:02:25,412 INFO L78 Accepts]: Start accepts. Automaton has 1353 states and 2263 transitions. Word has length 29 [2022-04-28 02:02:25,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:25,412 INFO L495 AbstractCegarLoop]: Abstraction has 1353 states and 2263 transitions. [2022-04-28 02:02:25,412 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:25,413 INFO L276 IsEmpty]: Start isEmpty. Operand 1353 states and 2263 transitions. [2022-04-28 02:02:25,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-28 02:02:25,414 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:25,414 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:25,414 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-04-28 02:02:25,414 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:25,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:25,415 INFO L85 PathProgramCache]: Analyzing trace with hash 1896591374, now seen corresponding path program 1 times [2022-04-28 02:02:25,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:25,415 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323967294] [2022-04-28 02:02:25,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:25,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:25,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:25,446 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:25,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:25,451 INFO L290 TraceCheckUtils]: 0: Hoare triple {29002#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28996#true} is VALID [2022-04-28 02:02:25,451 INFO L290 TraceCheckUtils]: 1: Hoare triple {28996#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28996#true} is VALID [2022-04-28 02:02:25,452 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28996#true} {28996#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28996#true} is VALID [2022-04-28 02:02:25,452 INFO L272 TraceCheckUtils]: 0: Hoare triple {28996#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29002#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:25,452 INFO L290 TraceCheckUtils]: 1: Hoare triple {29002#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28996#true} is VALID [2022-04-28 02:02:25,452 INFO L290 TraceCheckUtils]: 2: Hoare triple {28996#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28996#true} is VALID [2022-04-28 02:02:25,452 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28996#true} {28996#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28996#true} is VALID [2022-04-28 02:02:25,453 INFO L272 TraceCheckUtils]: 4: Hoare triple {28996#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28996#true} is VALID [2022-04-28 02:02:25,453 INFO L290 TraceCheckUtils]: 5: Hoare triple {28996#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {28996#true} is VALID [2022-04-28 02:02:25,453 INFO L290 TraceCheckUtils]: 6: Hoare triple {28996#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {28996#true} is VALID [2022-04-28 02:02:25,453 INFO L290 TraceCheckUtils]: 7: Hoare triple {28996#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {28996#true} is VALID [2022-04-28 02:02:25,453 INFO L290 TraceCheckUtils]: 8: Hoare triple {28996#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {28996#true} is VALID [2022-04-28 02:02:25,453 INFO L290 TraceCheckUtils]: 9: Hoare triple {28996#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {28996#true} is VALID [2022-04-28 02:02:25,453 INFO L290 TraceCheckUtils]: 10: Hoare triple {28996#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {28996#true} is VALID [2022-04-28 02:02:25,453 INFO L290 TraceCheckUtils]: 11: Hoare triple {28996#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {28996#true} is VALID [2022-04-28 02:02:25,454 INFO L290 TraceCheckUtils]: 12: Hoare triple {28996#true} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,454 INFO L290 TraceCheckUtils]: 13: Hoare triple {29001#(not (= main_~p5~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,454 INFO L290 TraceCheckUtils]: 14: Hoare triple {29001#(not (= main_~p5~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,455 INFO L290 TraceCheckUtils]: 15: Hoare triple {29001#(not (= main_~p5~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,455 INFO L290 TraceCheckUtils]: 16: Hoare triple {29001#(not (= main_~p5~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,455 INFO L290 TraceCheckUtils]: 17: Hoare triple {29001#(not (= main_~p5~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,455 INFO L290 TraceCheckUtils]: 18: Hoare triple {29001#(not (= main_~p5~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,456 INFO L290 TraceCheckUtils]: 19: Hoare triple {29001#(not (= main_~p5~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,456 INFO L290 TraceCheckUtils]: 20: Hoare triple {29001#(not (= main_~p5~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,456 INFO L290 TraceCheckUtils]: 21: Hoare triple {29001#(not (= main_~p5~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,457 INFO L290 TraceCheckUtils]: 22: Hoare triple {29001#(not (= main_~p5~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,457 INFO L290 TraceCheckUtils]: 23: Hoare triple {29001#(not (= main_~p5~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,457 INFO L290 TraceCheckUtils]: 24: Hoare triple {29001#(not (= main_~p5~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,458 INFO L290 TraceCheckUtils]: 25: Hoare triple {29001#(not (= main_~p5~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {29001#(not (= main_~p5~0 0))} is VALID [2022-04-28 02:02:25,458 INFO L290 TraceCheckUtils]: 26: Hoare triple {29001#(not (= main_~p5~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {28997#false} is VALID [2022-04-28 02:02:25,458 INFO L290 TraceCheckUtils]: 27: Hoare triple {28997#false} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {28997#false} is VALID [2022-04-28 02:02:25,458 INFO L290 TraceCheckUtils]: 28: Hoare triple {28997#false} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {28997#false} is VALID [2022-04-28 02:02:25,458 INFO L290 TraceCheckUtils]: 29: Hoare triple {28997#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28997#false} is VALID [2022-04-28 02:02:25,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:25,459 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:25,459 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1323967294] [2022-04-28 02:02:25,459 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1323967294] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:25,459 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:25,459 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:25,459 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897680133] [2022-04-28 02:02:25,459 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:25,460 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:02:25,461 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:25,461 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:25,480 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:25,480 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:25,480 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:25,480 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:25,481 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:25,481 INFO L87 Difference]: Start difference. First operand 1353 states and 2263 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:25,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:25,867 INFO L93 Difference]: Finished difference Result 2029 states and 3385 transitions. [2022-04-28 02:02:25,867 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:25,867 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:02:25,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:25,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:25,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 247 transitions. [2022-04-28 02:02:25,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:25,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 247 transitions. [2022-04-28 02:02:25,871 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 247 transitions. [2022-04-28 02:02:26,050 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 247 edges. 247 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:26,116 INFO L225 Difference]: With dead ends: 2029 [2022-04-28 02:02:26,116 INFO L226 Difference]: Without dead ends: 1371 [2022-04-28 02:02:26,117 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:26,117 INFO L413 NwaCegarLoop]: 134 mSDtfsCounter, 179 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:26,118 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [179 Valid, 141 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:26,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1371 states. [2022-04-28 02:02:26,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1371 to 1369. [2022-04-28 02:02:26,141 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:26,143 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:26,145 INFO L74 IsIncluded]: Start isIncluded. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:26,146 INFO L87 Difference]: Start difference. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:26,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:26,218 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-28 02:02:26,218 INFO L276 IsEmpty]: Start isEmpty. Operand 1371 states and 2264 transitions. [2022-04-28 02:02:26,220 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:26,221 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:26,223 INFO L74 IsIncluded]: Start isIncluded. First operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1371 states. [2022-04-28 02:02:26,225 INFO L87 Difference]: Start difference. First operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1371 states. [2022-04-28 02:02:26,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:26,298 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-28 02:02:26,299 INFO L276 IsEmpty]: Start isEmpty. Operand 1371 states and 2264 transitions. [2022-04-28 02:02:26,301 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:26,301 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:26,301 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:26,301 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:26,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:26,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1369 states to 1369 states and 2263 transitions. [2022-04-28 02:02:26,382 INFO L78 Accepts]: Start accepts. Automaton has 1369 states and 2263 transitions. Word has length 30 [2022-04-28 02:02:26,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:26,382 INFO L495 AbstractCegarLoop]: Abstraction has 1369 states and 2263 transitions. [2022-04-28 02:02:26,382 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:26,383 INFO L276 IsEmpty]: Start isEmpty. Operand 1369 states and 2263 transitions. [2022-04-28 02:02:26,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-28 02:02:26,384 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:26,384 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:26,384 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-04-28 02:02:26,385 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:26,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:26,385 INFO L85 PathProgramCache]: Analyzing trace with hash 899519021, now seen corresponding path program 1 times [2022-04-28 02:02:26,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:26,385 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176053262] [2022-04-28 02:02:26,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:26,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:26,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:26,433 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:26,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:26,441 INFO L290 TraceCheckUtils]: 0: Hoare triple {35248#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {35242#true} is VALID [2022-04-28 02:02:26,441 INFO L290 TraceCheckUtils]: 1: Hoare triple {35242#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35242#true} is VALID [2022-04-28 02:02:26,441 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {35242#true} {35242#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35242#true} is VALID [2022-04-28 02:02:26,442 INFO L272 TraceCheckUtils]: 0: Hoare triple {35242#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35248#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:26,442 INFO L290 TraceCheckUtils]: 1: Hoare triple {35248#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {35242#true} is VALID [2022-04-28 02:02:26,442 INFO L290 TraceCheckUtils]: 2: Hoare triple {35242#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35242#true} is VALID [2022-04-28 02:02:26,442 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35242#true} {35242#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35242#true} is VALID [2022-04-28 02:02:26,442 INFO L272 TraceCheckUtils]: 4: Hoare triple {35242#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35242#true} is VALID [2022-04-28 02:02:26,443 INFO L290 TraceCheckUtils]: 5: Hoare triple {35242#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {35242#true} is VALID [2022-04-28 02:02:26,443 INFO L290 TraceCheckUtils]: 6: Hoare triple {35242#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {35242#true} is VALID [2022-04-28 02:02:26,443 INFO L290 TraceCheckUtils]: 7: Hoare triple {35242#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {35242#true} is VALID [2022-04-28 02:02:26,443 INFO L290 TraceCheckUtils]: 8: Hoare triple {35242#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {35242#true} is VALID [2022-04-28 02:02:26,443 INFO L290 TraceCheckUtils]: 9: Hoare triple {35242#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {35242#true} is VALID [2022-04-28 02:02:26,443 INFO L290 TraceCheckUtils]: 10: Hoare triple {35242#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {35242#true} is VALID [2022-04-28 02:02:26,443 INFO L290 TraceCheckUtils]: 11: Hoare triple {35242#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {35242#true} is VALID [2022-04-28 02:02:26,443 INFO L290 TraceCheckUtils]: 12: Hoare triple {35242#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {35242#true} is VALID [2022-04-28 02:02:26,444 INFO L290 TraceCheckUtils]: 13: Hoare triple {35242#true} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,444 INFO L290 TraceCheckUtils]: 14: Hoare triple {35247#(= main_~lk6~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,444 INFO L290 TraceCheckUtils]: 15: Hoare triple {35247#(= main_~lk6~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,445 INFO L290 TraceCheckUtils]: 16: Hoare triple {35247#(= main_~lk6~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,445 INFO L290 TraceCheckUtils]: 17: Hoare triple {35247#(= main_~lk6~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,445 INFO L290 TraceCheckUtils]: 18: Hoare triple {35247#(= main_~lk6~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,446 INFO L290 TraceCheckUtils]: 19: Hoare triple {35247#(= main_~lk6~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,446 INFO L290 TraceCheckUtils]: 20: Hoare triple {35247#(= main_~lk6~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,446 INFO L290 TraceCheckUtils]: 21: Hoare triple {35247#(= main_~lk6~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,446 INFO L290 TraceCheckUtils]: 22: Hoare triple {35247#(= main_~lk6~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,447 INFO L290 TraceCheckUtils]: 23: Hoare triple {35247#(= main_~lk6~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,447 INFO L290 TraceCheckUtils]: 24: Hoare triple {35247#(= main_~lk6~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,447 INFO L290 TraceCheckUtils]: 25: Hoare triple {35247#(= main_~lk6~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,448 INFO L290 TraceCheckUtils]: 26: Hoare triple {35247#(= main_~lk6~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,448 INFO L290 TraceCheckUtils]: 27: Hoare triple {35247#(= main_~lk6~0 1)} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {35247#(= main_~lk6~0 1)} is VALID [2022-04-28 02:02:26,448 INFO L290 TraceCheckUtils]: 28: Hoare triple {35247#(= main_~lk6~0 1)} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {35243#false} is VALID [2022-04-28 02:02:26,448 INFO L290 TraceCheckUtils]: 29: Hoare triple {35243#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35243#false} is VALID [2022-04-28 02:02:26,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:26,449 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:26,449 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176053262] [2022-04-28 02:02:26,451 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1176053262] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:26,451 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:26,451 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:26,451 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1993794129] [2022-04-28 02:02:26,451 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:26,451 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:02:26,451 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:26,452 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:26,472 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:26,472 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:26,472 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:26,473 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:26,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:26,473 INFO L87 Difference]: Start difference. First operand 1369 states and 2263 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:26,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:26,897 INFO L93 Difference]: Finished difference Result 2509 states and 4233 transitions. [2022-04-28 02:02:26,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:26,897 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:02:26,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:26,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:26,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 159 transitions. [2022-04-28 02:02:26,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:26,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 159 transitions. [2022-04-28 02:02:26,900 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 159 transitions. [2022-04-28 02:02:27,003 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 159 edges. 159 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:27,168 INFO L225 Difference]: With dead ends: 2509 [2022-04-28 02:02:27,168 INFO L226 Difference]: Without dead ends: 2507 [2022-04-28 02:02:27,169 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:27,172 INFO L413 NwaCegarLoop]: 90 mSDtfsCounter, 201 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 201 SdHoareTripleChecker+Valid, 97 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:27,172 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [201 Valid, 97 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:27,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2507 states. [2022-04-28 02:02:27,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2507 to 1929. [2022-04-28 02:02:27,211 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:27,214 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:27,216 INFO L74 IsIncluded]: Start isIncluded. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:27,218 INFO L87 Difference]: Start difference. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:27,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:27,376 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-28 02:02:27,376 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4200 transitions. [2022-04-28 02:02:27,381 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:27,381 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:27,384 INFO L74 IsIncluded]: Start isIncluded. First operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2507 states. [2022-04-28 02:02:27,386 INFO L87 Difference]: Start difference. First operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2507 states. [2022-04-28 02:02:27,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:27,612 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-28 02:02:27,612 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4200 transitions. [2022-04-28 02:02:27,615 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:27,615 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:27,615 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:27,615 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:27,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:27,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1929 states to 1929 states and 3111 transitions. [2022-04-28 02:02:27,793 INFO L78 Accepts]: Start accepts. Automaton has 1929 states and 3111 transitions. Word has length 30 [2022-04-28 02:02:27,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:27,793 INFO L495 AbstractCegarLoop]: Abstraction has 1929 states and 3111 transitions. [2022-04-28 02:02:27,793 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:27,794 INFO L276 IsEmpty]: Start isEmpty. Operand 1929 states and 3111 transitions. [2022-04-28 02:02:27,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-28 02:02:27,795 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:27,795 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:27,796 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-04-28 02:02:27,796 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:27,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:27,797 INFO L85 PathProgramCache]: Analyzing trace with hash -2042138578, now seen corresponding path program 1 times [2022-04-28 02:02:27,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:27,797 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [764069104] [2022-04-28 02:02:27,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:27,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:27,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:27,844 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:27,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:27,850 INFO L290 TraceCheckUtils]: 0: Hoare triple {44822#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {44816#true} is VALID [2022-04-28 02:02:27,850 INFO L290 TraceCheckUtils]: 1: Hoare triple {44816#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44816#true} is VALID [2022-04-28 02:02:27,850 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {44816#true} {44816#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44816#true} is VALID [2022-04-28 02:02:27,850 INFO L272 TraceCheckUtils]: 0: Hoare triple {44816#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44822#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:27,851 INFO L290 TraceCheckUtils]: 1: Hoare triple {44822#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {44816#true} is VALID [2022-04-28 02:02:27,851 INFO L290 TraceCheckUtils]: 2: Hoare triple {44816#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44816#true} is VALID [2022-04-28 02:02:27,851 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {44816#true} {44816#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44816#true} is VALID [2022-04-28 02:02:27,851 INFO L272 TraceCheckUtils]: 4: Hoare triple {44816#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44816#true} is VALID [2022-04-28 02:02:27,851 INFO L290 TraceCheckUtils]: 5: Hoare triple {44816#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {44816#true} is VALID [2022-04-28 02:02:27,851 INFO L290 TraceCheckUtils]: 6: Hoare triple {44816#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {44816#true} is VALID [2022-04-28 02:02:27,851 INFO L290 TraceCheckUtils]: 7: Hoare triple {44816#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {44816#true} is VALID [2022-04-28 02:02:27,852 INFO L290 TraceCheckUtils]: 8: Hoare triple {44816#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {44816#true} is VALID [2022-04-28 02:02:27,852 INFO L290 TraceCheckUtils]: 9: Hoare triple {44816#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {44816#true} is VALID [2022-04-28 02:02:27,852 INFO L290 TraceCheckUtils]: 10: Hoare triple {44816#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {44816#true} is VALID [2022-04-28 02:02:27,852 INFO L290 TraceCheckUtils]: 11: Hoare triple {44816#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {44816#true} is VALID [2022-04-28 02:02:27,852 INFO L290 TraceCheckUtils]: 12: Hoare triple {44816#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {44816#true} is VALID [2022-04-28 02:02:27,852 INFO L290 TraceCheckUtils]: 13: Hoare triple {44816#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,853 INFO L290 TraceCheckUtils]: 14: Hoare triple {44821#(= main_~p6~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,853 INFO L290 TraceCheckUtils]: 15: Hoare triple {44821#(= main_~p6~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,853 INFO L290 TraceCheckUtils]: 16: Hoare triple {44821#(= main_~p6~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,854 INFO L290 TraceCheckUtils]: 17: Hoare triple {44821#(= main_~p6~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,855 INFO L290 TraceCheckUtils]: 18: Hoare triple {44821#(= main_~p6~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,855 INFO L290 TraceCheckUtils]: 19: Hoare triple {44821#(= main_~p6~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,858 INFO L290 TraceCheckUtils]: 20: Hoare triple {44821#(= main_~p6~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,858 INFO L290 TraceCheckUtils]: 21: Hoare triple {44821#(= main_~p6~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,858 INFO L290 TraceCheckUtils]: 22: Hoare triple {44821#(= main_~p6~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,859 INFO L290 TraceCheckUtils]: 23: Hoare triple {44821#(= main_~p6~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,859 INFO L290 TraceCheckUtils]: 24: Hoare triple {44821#(= main_~p6~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,860 INFO L290 TraceCheckUtils]: 25: Hoare triple {44821#(= main_~p6~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,860 INFO L290 TraceCheckUtils]: 26: Hoare triple {44821#(= main_~p6~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {44821#(= main_~p6~0 0)} is VALID [2022-04-28 02:02:27,860 INFO L290 TraceCheckUtils]: 27: Hoare triple {44821#(= main_~p6~0 0)} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {44817#false} is VALID [2022-04-28 02:02:27,861 INFO L290 TraceCheckUtils]: 28: Hoare triple {44817#false} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {44817#false} is VALID [2022-04-28 02:02:27,861 INFO L290 TraceCheckUtils]: 29: Hoare triple {44817#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {44817#false} is VALID [2022-04-28 02:02:27,861 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:27,861 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:27,861 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [764069104] [2022-04-28 02:02:27,861 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [764069104] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:27,861 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:27,861 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:27,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1904238856] [2022-04-28 02:02:27,862 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:27,862 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:02:27,862 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:27,862 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:27,882 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:27,882 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:27,883 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:27,883 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:27,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:27,883 INFO L87 Difference]: Start difference. First operand 1929 states and 3111 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:28,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:28,878 INFO L93 Difference]: Finished difference Result 4557 states and 7401 transitions. [2022-04-28 02:02:28,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:28,878 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-28 02:02:28,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:28,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:28,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 249 transitions. [2022-04-28 02:02:28,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:28,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 249 transitions. [2022-04-28 02:02:28,880 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 249 transitions. [2022-04-28 02:02:29,032 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 249 edges. 249 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:29,220 INFO L225 Difference]: With dead ends: 4557 [2022-04-28 02:02:29,220 INFO L226 Difference]: Without dead ends: 2667 [2022-04-28 02:02:29,224 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:29,224 INFO L413 NwaCegarLoop]: 130 mSDtfsCounter, 178 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 178 SdHoareTripleChecker+Valid, 137 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:29,225 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [178 Valid, 137 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:29,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2667 states. [2022-04-28 02:02:29,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2667 to 2665. [2022-04-28 02:02:29,276 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:29,281 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:29,285 INFO L74 IsIncluded]: Start isIncluded. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:29,288 INFO L87 Difference]: Start difference. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:29,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:29,542 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-28 02:02:29,543 INFO L276 IsEmpty]: Start isEmpty. Operand 2667 states and 4296 transitions. [2022-04-28 02:02:29,546 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:29,546 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:29,550 INFO L74 IsIncluded]: Start isIncluded. First operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2667 states. [2022-04-28 02:02:29,554 INFO L87 Difference]: Start difference. First operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2667 states. [2022-04-28 02:02:29,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:29,733 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-28 02:02:29,733 INFO L276 IsEmpty]: Start isEmpty. Operand 2667 states and 4296 transitions. [2022-04-28 02:02:29,737 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:29,737 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:29,737 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:29,737 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:29,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:30,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2665 states to 2665 states and 4295 transitions. [2022-04-28 02:02:30,025 INFO L78 Accepts]: Start accepts. Automaton has 2665 states and 4295 transitions. Word has length 30 [2022-04-28 02:02:30,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:30,026 INFO L495 AbstractCegarLoop]: Abstraction has 2665 states and 4295 transitions. [2022-04-28 02:02:30,026 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:30,026 INFO L276 IsEmpty]: Start isEmpty. Operand 2665 states and 4295 transitions. [2022-04-28 02:02:30,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-28 02:02:30,028 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:30,028 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:30,028 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-04-28 02:02:30,028 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:30,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:30,029 INFO L85 PathProgramCache]: Analyzing trace with hash 2115318588, now seen corresponding path program 1 times [2022-04-28 02:02:30,029 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:30,030 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [479137869] [2022-04-28 02:02:30,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:30,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:30,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:30,065 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:30,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:30,069 INFO L290 TraceCheckUtils]: 0: Hoare triple {57564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {57558#true} is VALID [2022-04-28 02:02:30,069 INFO L290 TraceCheckUtils]: 1: Hoare triple {57558#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57558#true} is VALID [2022-04-28 02:02:30,069 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {57558#true} {57558#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57558#true} is VALID [2022-04-28 02:02:30,069 INFO L272 TraceCheckUtils]: 0: Hoare triple {57558#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:30,070 INFO L290 TraceCheckUtils]: 1: Hoare triple {57564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {57558#true} is VALID [2022-04-28 02:02:30,070 INFO L290 TraceCheckUtils]: 2: Hoare triple {57558#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57558#true} is VALID [2022-04-28 02:02:30,070 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {57558#true} {57558#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57558#true} is VALID [2022-04-28 02:02:30,070 INFO L272 TraceCheckUtils]: 4: Hoare triple {57558#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57558#true} is VALID [2022-04-28 02:02:30,071 INFO L290 TraceCheckUtils]: 5: Hoare triple {57558#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {57558#true} is VALID [2022-04-28 02:02:30,071 INFO L290 TraceCheckUtils]: 6: Hoare triple {57558#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {57558#true} is VALID [2022-04-28 02:02:30,071 INFO L290 TraceCheckUtils]: 7: Hoare triple {57558#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {57558#true} is VALID [2022-04-28 02:02:30,071 INFO L290 TraceCheckUtils]: 8: Hoare triple {57558#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {57558#true} is VALID [2022-04-28 02:02:30,071 INFO L290 TraceCheckUtils]: 9: Hoare triple {57558#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {57558#true} is VALID [2022-04-28 02:02:30,071 INFO L290 TraceCheckUtils]: 10: Hoare triple {57558#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {57558#true} is VALID [2022-04-28 02:02:30,071 INFO L290 TraceCheckUtils]: 11: Hoare triple {57558#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {57558#true} is VALID [2022-04-28 02:02:30,071 INFO L290 TraceCheckUtils]: 12: Hoare triple {57558#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {57558#true} is VALID [2022-04-28 02:02:30,072 INFO L290 TraceCheckUtils]: 13: Hoare triple {57558#true} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,072 INFO L290 TraceCheckUtils]: 14: Hoare triple {57563#(not (= main_~p6~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,072 INFO L290 TraceCheckUtils]: 15: Hoare triple {57563#(not (= main_~p6~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,073 INFO L290 TraceCheckUtils]: 16: Hoare triple {57563#(not (= main_~p6~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,073 INFO L290 TraceCheckUtils]: 17: Hoare triple {57563#(not (= main_~p6~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,073 INFO L290 TraceCheckUtils]: 18: Hoare triple {57563#(not (= main_~p6~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,074 INFO L290 TraceCheckUtils]: 19: Hoare triple {57563#(not (= main_~p6~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,074 INFO L290 TraceCheckUtils]: 20: Hoare triple {57563#(not (= main_~p6~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,074 INFO L290 TraceCheckUtils]: 21: Hoare triple {57563#(not (= main_~p6~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,074 INFO L290 TraceCheckUtils]: 22: Hoare triple {57563#(not (= main_~p6~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,075 INFO L290 TraceCheckUtils]: 23: Hoare triple {57563#(not (= main_~p6~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,075 INFO L290 TraceCheckUtils]: 24: Hoare triple {57563#(not (= main_~p6~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,075 INFO L290 TraceCheckUtils]: 25: Hoare triple {57563#(not (= main_~p6~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,076 INFO L290 TraceCheckUtils]: 26: Hoare triple {57563#(not (= main_~p6~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {57563#(not (= main_~p6~0 0))} is VALID [2022-04-28 02:02:30,076 INFO L290 TraceCheckUtils]: 27: Hoare triple {57563#(not (= main_~p6~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {57559#false} is VALID [2022-04-28 02:02:30,076 INFO L290 TraceCheckUtils]: 28: Hoare triple {57559#false} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {57559#false} is VALID [2022-04-28 02:02:30,076 INFO L290 TraceCheckUtils]: 29: Hoare triple {57559#false} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {57559#false} is VALID [2022-04-28 02:02:30,076 INFO L290 TraceCheckUtils]: 30: Hoare triple {57559#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57559#false} is VALID [2022-04-28 02:02:30,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:30,077 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:30,077 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [479137869] [2022-04-28 02:02:30,077 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [479137869] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:30,077 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:30,077 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:30,077 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [773372663] [2022-04-28 02:02:30,077 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:30,077 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:30,078 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:30,078 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:30,098 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:30,098 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:30,098 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:30,099 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:30,099 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:30,099 INFO L87 Difference]: Start difference. First operand 2665 states and 4295 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:30,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:30,855 INFO L93 Difference]: Finished difference Result 3997 states and 6425 transitions. [2022-04-28 02:02:30,856 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:30,856 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:30,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:30,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:30,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 244 transitions. [2022-04-28 02:02:30,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:30,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 244 transitions. [2022-04-28 02:02:30,858 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 244 transitions. [2022-04-28 02:02:31,020 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 244 edges. 244 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:31,225 INFO L225 Difference]: With dead ends: 3997 [2022-04-28 02:02:31,225 INFO L226 Difference]: Without dead ends: 2699 [2022-04-28 02:02:31,227 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:31,227 INFO L413 NwaCegarLoop]: 131 mSDtfsCounter, 178 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 178 SdHoareTripleChecker+Valid, 138 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:31,228 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [178 Valid, 138 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:31,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2699 states. [2022-04-28 02:02:31,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2699 to 2697. [2022-04-28 02:02:31,271 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:31,274 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:31,278 INFO L74 IsIncluded]: Start isIncluded. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:31,281 INFO L87 Difference]: Start difference. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:31,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:31,460 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-28 02:02:31,460 INFO L276 IsEmpty]: Start isEmpty. Operand 2699 states and 4296 transitions. [2022-04-28 02:02:31,463 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:31,463 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:31,467 INFO L74 IsIncluded]: Start isIncluded. First operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2699 states. [2022-04-28 02:02:31,469 INFO L87 Difference]: Start difference. First operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2699 states. [2022-04-28 02:02:31,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:31,677 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-28 02:02:31,677 INFO L276 IsEmpty]: Start isEmpty. Operand 2699 states and 4296 transitions. [2022-04-28 02:02:31,681 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:31,681 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:31,681 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:31,681 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:31,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:31,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2697 states to 2697 states and 4295 transitions. [2022-04-28 02:02:31,901 INFO L78 Accepts]: Start accepts. Automaton has 2697 states and 4295 transitions. Word has length 31 [2022-04-28 02:02:31,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:31,902 INFO L495 AbstractCegarLoop]: Abstraction has 2697 states and 4295 transitions. [2022-04-28 02:02:31,902 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:31,902 INFO L276 IsEmpty]: Start isEmpty. Operand 2697 states and 4295 transitions. [2022-04-28 02:02:31,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-28 02:02:31,904 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:31,904 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:31,904 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-04-28 02:02:31,904 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:31,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:31,905 INFO L85 PathProgramCache]: Analyzing trace with hash 1118246235, now seen corresponding path program 1 times [2022-04-28 02:02:31,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:31,905 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335483477] [2022-04-28 02:02:31,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:31,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:31,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:31,933 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:31,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:31,945 INFO L290 TraceCheckUtils]: 0: Hoare triple {69842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {69836#true} is VALID [2022-04-28 02:02:31,945 INFO L290 TraceCheckUtils]: 1: Hoare triple {69836#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,946 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {69836#true} {69836#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,946 INFO L272 TraceCheckUtils]: 0: Hoare triple {69836#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {69842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:31,946 INFO L290 TraceCheckUtils]: 1: Hoare triple {69842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {69836#true} is VALID [2022-04-28 02:02:31,946 INFO L290 TraceCheckUtils]: 2: Hoare triple {69836#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,946 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {69836#true} {69836#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,947 INFO L272 TraceCheckUtils]: 4: Hoare triple {69836#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,947 INFO L290 TraceCheckUtils]: 5: Hoare triple {69836#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {69836#true} is VALID [2022-04-28 02:02:31,947 INFO L290 TraceCheckUtils]: 6: Hoare triple {69836#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {69836#true} is VALID [2022-04-28 02:02:31,947 INFO L290 TraceCheckUtils]: 7: Hoare triple {69836#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {69836#true} is VALID [2022-04-28 02:02:31,947 INFO L290 TraceCheckUtils]: 8: Hoare triple {69836#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,947 INFO L290 TraceCheckUtils]: 9: Hoare triple {69836#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,947 INFO L290 TraceCheckUtils]: 10: Hoare triple {69836#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,947 INFO L290 TraceCheckUtils]: 11: Hoare triple {69836#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,947 INFO L290 TraceCheckUtils]: 12: Hoare triple {69836#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,947 INFO L290 TraceCheckUtils]: 13: Hoare triple {69836#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {69836#true} is VALID [2022-04-28 02:02:31,948 INFO L290 TraceCheckUtils]: 14: Hoare triple {69836#true} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,948 INFO L290 TraceCheckUtils]: 15: Hoare triple {69841#(= main_~lk7~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,948 INFO L290 TraceCheckUtils]: 16: Hoare triple {69841#(= main_~lk7~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,949 INFO L290 TraceCheckUtils]: 17: Hoare triple {69841#(= main_~lk7~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,949 INFO L290 TraceCheckUtils]: 18: Hoare triple {69841#(= main_~lk7~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,949 INFO L290 TraceCheckUtils]: 19: Hoare triple {69841#(= main_~lk7~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,950 INFO L290 TraceCheckUtils]: 20: Hoare triple {69841#(= main_~lk7~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,950 INFO L290 TraceCheckUtils]: 21: Hoare triple {69841#(= main_~lk7~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,950 INFO L290 TraceCheckUtils]: 22: Hoare triple {69841#(= main_~lk7~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,951 INFO L290 TraceCheckUtils]: 23: Hoare triple {69841#(= main_~lk7~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,951 INFO L290 TraceCheckUtils]: 24: Hoare triple {69841#(= main_~lk7~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,951 INFO L290 TraceCheckUtils]: 25: Hoare triple {69841#(= main_~lk7~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,951 INFO L290 TraceCheckUtils]: 26: Hoare triple {69841#(= main_~lk7~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,952 INFO L290 TraceCheckUtils]: 27: Hoare triple {69841#(= main_~lk7~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,952 INFO L290 TraceCheckUtils]: 28: Hoare triple {69841#(= main_~lk7~0 1)} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {69841#(= main_~lk7~0 1)} is VALID [2022-04-28 02:02:31,952 INFO L290 TraceCheckUtils]: 29: Hoare triple {69841#(= main_~lk7~0 1)} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {69837#false} is VALID [2022-04-28 02:02:31,953 INFO L290 TraceCheckUtils]: 30: Hoare triple {69837#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {69837#false} is VALID [2022-04-28 02:02:31,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:31,953 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:31,953 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1335483477] [2022-04-28 02:02:31,953 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1335483477] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:31,953 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:31,953 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:31,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1115871638] [2022-04-28 02:02:31,953 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:31,954 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:31,954 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:31,954 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:31,974 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:31,974 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:31,974 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:31,975 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:31,975 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:31,975 INFO L87 Difference]: Start difference. First operand 2697 states and 4295 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:32,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:32,967 INFO L93 Difference]: Finished difference Result 4877 states and 7945 transitions. [2022-04-28 02:02:32,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:32,967 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:32,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:32,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:32,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 155 transitions. [2022-04-28 02:02:32,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:32,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 155 transitions. [2022-04-28 02:02:32,969 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 155 transitions. [2022-04-28 02:02:33,078 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 155 edges. 155 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:33,712 INFO L225 Difference]: With dead ends: 4877 [2022-04-28 02:02:33,712 INFO L226 Difference]: Without dead ends: 4875 [2022-04-28 02:02:33,713 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:33,714 INFO L413 NwaCegarLoop]: 89 mSDtfsCounter, 194 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 194 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:33,714 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [194 Valid, 96 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:33,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4875 states. [2022-04-28 02:02:33,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4875 to 3849. [2022-04-28 02:02:33,779 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:33,783 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:33,787 INFO L74 IsIncluded]: Start isIncluded. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:33,792 INFO L87 Difference]: Start difference. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:34,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:34,385 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-28 02:02:34,385 INFO L276 IsEmpty]: Start isEmpty. Operand 4875 states and 7880 transitions. [2022-04-28 02:02:34,390 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:34,390 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:34,393 INFO L74 IsIncluded]: Start isIncluded. First operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4875 states. [2022-04-28 02:02:34,396 INFO L87 Difference]: Start difference. First operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4875 states. [2022-04-28 02:02:35,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:35,015 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-28 02:02:35,015 INFO L276 IsEmpty]: Start isEmpty. Operand 4875 states and 7880 transitions. [2022-04-28 02:02:35,020 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:35,020 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:35,020 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:35,020 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:35,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:35,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3849 states to 3849 states and 5959 transitions. [2022-04-28 02:02:35,485 INFO L78 Accepts]: Start accepts. Automaton has 3849 states and 5959 transitions. Word has length 31 [2022-04-28 02:02:35,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:35,485 INFO L495 AbstractCegarLoop]: Abstraction has 3849 states and 5959 transitions. [2022-04-28 02:02:35,485 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:35,485 INFO L276 IsEmpty]: Start isEmpty. Operand 3849 states and 5959 transitions. [2022-04-28 02:02:35,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-28 02:02:35,488 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:35,488 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:35,488 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-04-28 02:02:35,488 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:35,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:35,488 INFO L85 PathProgramCache]: Analyzing trace with hash -1823411364, now seen corresponding path program 1 times [2022-04-28 02:02:35,488 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:35,488 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328610550] [2022-04-28 02:02:35,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:35,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:35,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:35,536 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:35,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:35,539 INFO L290 TraceCheckUtils]: 0: Hoare triple {88536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {88530#true} is VALID [2022-04-28 02:02:35,540 INFO L290 TraceCheckUtils]: 1: Hoare triple {88530#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,540 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {88530#true} {88530#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,540 INFO L272 TraceCheckUtils]: 0: Hoare triple {88530#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:35,540 INFO L290 TraceCheckUtils]: 1: Hoare triple {88536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {88530#true} is VALID [2022-04-28 02:02:35,540 INFO L290 TraceCheckUtils]: 2: Hoare triple {88530#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,540 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {88530#true} {88530#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,541 INFO L272 TraceCheckUtils]: 4: Hoare triple {88530#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,541 INFO L290 TraceCheckUtils]: 5: Hoare triple {88530#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {88530#true} is VALID [2022-04-28 02:02:35,541 INFO L290 TraceCheckUtils]: 6: Hoare triple {88530#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {88530#true} is VALID [2022-04-28 02:02:35,541 INFO L290 TraceCheckUtils]: 7: Hoare triple {88530#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {88530#true} is VALID [2022-04-28 02:02:35,541 INFO L290 TraceCheckUtils]: 8: Hoare triple {88530#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,541 INFO L290 TraceCheckUtils]: 9: Hoare triple {88530#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,541 INFO L290 TraceCheckUtils]: 10: Hoare triple {88530#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,541 INFO L290 TraceCheckUtils]: 11: Hoare triple {88530#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,541 INFO L290 TraceCheckUtils]: 12: Hoare triple {88530#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,541 INFO L290 TraceCheckUtils]: 13: Hoare triple {88530#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {88530#true} is VALID [2022-04-28 02:02:35,542 INFO L290 TraceCheckUtils]: 14: Hoare triple {88530#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,542 INFO L290 TraceCheckUtils]: 15: Hoare triple {88535#(= main_~p7~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,542 INFO L290 TraceCheckUtils]: 16: Hoare triple {88535#(= main_~p7~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,543 INFO L290 TraceCheckUtils]: 17: Hoare triple {88535#(= main_~p7~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,543 INFO L290 TraceCheckUtils]: 18: Hoare triple {88535#(= main_~p7~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,543 INFO L290 TraceCheckUtils]: 19: Hoare triple {88535#(= main_~p7~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,544 INFO L290 TraceCheckUtils]: 20: Hoare triple {88535#(= main_~p7~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,544 INFO L290 TraceCheckUtils]: 21: Hoare triple {88535#(= main_~p7~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,544 INFO L290 TraceCheckUtils]: 22: Hoare triple {88535#(= main_~p7~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,544 INFO L290 TraceCheckUtils]: 23: Hoare triple {88535#(= main_~p7~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,545 INFO L290 TraceCheckUtils]: 24: Hoare triple {88535#(= main_~p7~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,545 INFO L290 TraceCheckUtils]: 25: Hoare triple {88535#(= main_~p7~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,545 INFO L290 TraceCheckUtils]: 26: Hoare triple {88535#(= main_~p7~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,546 INFO L290 TraceCheckUtils]: 27: Hoare triple {88535#(= main_~p7~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {88535#(= main_~p7~0 0)} is VALID [2022-04-28 02:02:35,546 INFO L290 TraceCheckUtils]: 28: Hoare triple {88535#(= main_~p7~0 0)} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {88531#false} is VALID [2022-04-28 02:02:35,546 INFO L290 TraceCheckUtils]: 29: Hoare triple {88531#false} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {88531#false} is VALID [2022-04-28 02:02:35,546 INFO L290 TraceCheckUtils]: 30: Hoare triple {88531#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88531#false} is VALID [2022-04-28 02:02:35,546 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:35,546 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:35,547 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [328610550] [2022-04-28 02:02:35,547 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [328610550] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:35,547 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:35,547 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:35,547 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1447614720] [2022-04-28 02:02:35,547 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:35,547 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:35,547 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:35,548 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:35,567 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:35,567 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:35,567 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:35,567 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:35,567 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:35,568 INFO L87 Difference]: Start difference. First operand 3849 states and 5959 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:38,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:38,238 INFO L93 Difference]: Finished difference Result 9037 states and 14089 transitions. [2022-04-28 02:02:38,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:38,239 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-28 02:02:38,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:38,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:38,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 246 transitions. [2022-04-28 02:02:38,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:38,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 246 transitions. [2022-04-28 02:02:38,242 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 246 transitions. [2022-04-28 02:02:38,391 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 246 edges. 246 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:39,242 INFO L225 Difference]: With dead ends: 9037 [2022-04-28 02:02:39,242 INFO L226 Difference]: Without dead ends: 5259 [2022-04-28 02:02:39,248 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:39,249 INFO L413 NwaCegarLoop]: 132 mSDtfsCounter, 172 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 172 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:39,249 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [172 Valid, 139 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:39,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5259 states. [2022-04-28 02:02:39,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5259 to 5257. [2022-04-28 02:02:39,363 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:39,371 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:39,378 INFO L74 IsIncluded]: Start isIncluded. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:39,385 INFO L87 Difference]: Start difference. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:40,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:40,098 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-28 02:02:40,098 INFO L276 IsEmpty]: Start isEmpty. Operand 5259 states and 8136 transitions. [2022-04-28 02:02:40,103 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:40,103 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:40,109 INFO L74 IsIncluded]: Start isIncluded. First operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5259 states. [2022-04-28 02:02:40,114 INFO L87 Difference]: Start difference. First operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5259 states. [2022-04-28 02:02:40,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:40,832 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-28 02:02:40,832 INFO L276 IsEmpty]: Start isEmpty. Operand 5259 states and 8136 transitions. [2022-04-28 02:02:40,837 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:40,838 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:40,838 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:40,838 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:40,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:41,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5257 states to 5257 states and 8135 transitions. [2022-04-28 02:02:41,680 INFO L78 Accepts]: Start accepts. Automaton has 5257 states and 8135 transitions. Word has length 31 [2022-04-28 02:02:41,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:41,680 INFO L495 AbstractCegarLoop]: Abstraction has 5257 states and 8135 transitions. [2022-04-28 02:02:41,680 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:41,680 INFO L276 IsEmpty]: Start isEmpty. Operand 5257 states and 8135 transitions. [2022-04-28 02:02:41,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-28 02:02:41,684 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:41,684 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:41,684 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-04-28 02:02:41,684 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:41,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:41,684 INFO L85 PathProgramCache]: Analyzing trace with hash 305927754, now seen corresponding path program 1 times [2022-04-28 02:02:41,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:41,685 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1926724106] [2022-04-28 02:02:41,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:41,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:41,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:41,721 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:41,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:41,724 INFO L290 TraceCheckUtils]: 0: Hoare triple {113694#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {113688#true} is VALID [2022-04-28 02:02:41,725 INFO L290 TraceCheckUtils]: 1: Hoare triple {113688#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,725 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {113688#true} {113688#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,725 INFO L272 TraceCheckUtils]: 0: Hoare triple {113688#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113694#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:41,725 INFO L290 TraceCheckUtils]: 1: Hoare triple {113694#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {113688#true} is VALID [2022-04-28 02:02:41,726 INFO L290 TraceCheckUtils]: 2: Hoare triple {113688#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,726 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {113688#true} {113688#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,726 INFO L272 TraceCheckUtils]: 4: Hoare triple {113688#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,726 INFO L290 TraceCheckUtils]: 5: Hoare triple {113688#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {113688#true} is VALID [2022-04-28 02:02:41,726 INFO L290 TraceCheckUtils]: 6: Hoare triple {113688#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {113688#true} is VALID [2022-04-28 02:02:41,726 INFO L290 TraceCheckUtils]: 7: Hoare triple {113688#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {113688#true} is VALID [2022-04-28 02:02:41,726 INFO L290 TraceCheckUtils]: 8: Hoare triple {113688#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,726 INFO L290 TraceCheckUtils]: 9: Hoare triple {113688#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,726 INFO L290 TraceCheckUtils]: 10: Hoare triple {113688#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,727 INFO L290 TraceCheckUtils]: 11: Hoare triple {113688#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,727 INFO L290 TraceCheckUtils]: 12: Hoare triple {113688#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,727 INFO L290 TraceCheckUtils]: 13: Hoare triple {113688#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {113688#true} is VALID [2022-04-28 02:02:41,727 INFO L290 TraceCheckUtils]: 14: Hoare triple {113688#true} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,727 INFO L290 TraceCheckUtils]: 15: Hoare triple {113693#(not (= main_~p7~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,728 INFO L290 TraceCheckUtils]: 16: Hoare triple {113693#(not (= main_~p7~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,728 INFO L290 TraceCheckUtils]: 17: Hoare triple {113693#(not (= main_~p7~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,728 INFO L290 TraceCheckUtils]: 18: Hoare triple {113693#(not (= main_~p7~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,729 INFO L290 TraceCheckUtils]: 19: Hoare triple {113693#(not (= main_~p7~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,729 INFO L290 TraceCheckUtils]: 20: Hoare triple {113693#(not (= main_~p7~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,729 INFO L290 TraceCheckUtils]: 21: Hoare triple {113693#(not (= main_~p7~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,730 INFO L290 TraceCheckUtils]: 22: Hoare triple {113693#(not (= main_~p7~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,730 INFO L290 TraceCheckUtils]: 23: Hoare triple {113693#(not (= main_~p7~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,730 INFO L290 TraceCheckUtils]: 24: Hoare triple {113693#(not (= main_~p7~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,730 INFO L290 TraceCheckUtils]: 25: Hoare triple {113693#(not (= main_~p7~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,731 INFO L290 TraceCheckUtils]: 26: Hoare triple {113693#(not (= main_~p7~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,731 INFO L290 TraceCheckUtils]: 27: Hoare triple {113693#(not (= main_~p7~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {113693#(not (= main_~p7~0 0))} is VALID [2022-04-28 02:02:41,731 INFO L290 TraceCheckUtils]: 28: Hoare triple {113693#(not (= main_~p7~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {113689#false} is VALID [2022-04-28 02:02:41,731 INFO L290 TraceCheckUtils]: 29: Hoare triple {113689#false} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {113689#false} is VALID [2022-04-28 02:02:41,732 INFO L290 TraceCheckUtils]: 30: Hoare triple {113689#false} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {113689#false} is VALID [2022-04-28 02:02:41,732 INFO L290 TraceCheckUtils]: 31: Hoare triple {113689#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {113689#false} is VALID [2022-04-28 02:02:41,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:41,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:41,732 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1926724106] [2022-04-28 02:02:41,732 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1926724106] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:41,732 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:41,732 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:41,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [489845512] [2022-04-28 02:02:41,732 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:41,733 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:02:41,733 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:41,733 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:41,755 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:41,756 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:41,756 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:41,756 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:41,756 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:41,756 INFO L87 Difference]: Start difference. First operand 5257 states and 8135 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:43,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:43,670 INFO L93 Difference]: Finished difference Result 7885 states and 12169 transitions. [2022-04-28 02:02:43,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:43,670 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:02:43,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:43,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:43,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 241 transitions. [2022-04-28 02:02:43,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:43,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 241 transitions. [2022-04-28 02:02:43,673 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 241 transitions. [2022-04-28 02:02:43,825 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 241 edges. 241 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:44,599 INFO L225 Difference]: With dead ends: 7885 [2022-04-28 02:02:44,599 INFO L226 Difference]: Without dead ends: 5323 [2022-04-28 02:02:44,602 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:44,603 INFO L413 NwaCegarLoop]: 128 mSDtfsCounter, 177 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 177 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:44,603 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [177 Valid, 135 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:44,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5323 states. [2022-04-28 02:02:44,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5323 to 5321. [2022-04-28 02:02:44,681 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:44,689 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:44,696 INFO L74 IsIncluded]: Start isIncluded. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:44,703 INFO L87 Difference]: Start difference. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:45,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:45,403 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-28 02:02:45,403 INFO L276 IsEmpty]: Start isEmpty. Operand 5323 states and 8136 transitions. [2022-04-28 02:02:45,407 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:45,407 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:45,412 INFO L74 IsIncluded]: Start isIncluded. First operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5323 states. [2022-04-28 02:02:45,416 INFO L87 Difference]: Start difference. First operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5323 states. [2022-04-28 02:02:46,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:46,141 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-28 02:02:46,141 INFO L276 IsEmpty]: Start isEmpty. Operand 5323 states and 8136 transitions. [2022-04-28 02:02:46,145 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:46,145 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:46,145 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:46,145 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:46,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:46,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5321 states to 5321 states and 8135 transitions. [2022-04-28 02:02:46,905 INFO L78 Accepts]: Start accepts. Automaton has 5321 states and 8135 transitions. Word has length 32 [2022-04-28 02:02:46,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:46,905 INFO L495 AbstractCegarLoop]: Abstraction has 5321 states and 8135 transitions. [2022-04-28 02:02:46,905 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:46,905 INFO L276 IsEmpty]: Start isEmpty. Operand 5321 states and 8135 transitions. [2022-04-28 02:02:46,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-28 02:02:46,907 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:46,907 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:46,907 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-04-28 02:02:46,908 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:46,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:46,908 INFO L85 PathProgramCache]: Analyzing trace with hash -691144599, now seen corresponding path program 1 times [2022-04-28 02:02:46,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:46,908 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1984767230] [2022-04-28 02:02:46,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:46,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:46,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:46,941 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:46,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:46,945 INFO L290 TraceCheckUtils]: 0: Hoare triple {137892#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {137886#true} is VALID [2022-04-28 02:02:46,945 INFO L290 TraceCheckUtils]: 1: Hoare triple {137886#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,945 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {137886#true} {137886#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,945 INFO L272 TraceCheckUtils]: 0: Hoare triple {137886#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {137892#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:46,946 INFO L290 TraceCheckUtils]: 1: Hoare triple {137892#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {137886#true} is VALID [2022-04-28 02:02:46,946 INFO L290 TraceCheckUtils]: 2: Hoare triple {137886#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,946 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {137886#true} {137886#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,946 INFO L272 TraceCheckUtils]: 4: Hoare triple {137886#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,946 INFO L290 TraceCheckUtils]: 5: Hoare triple {137886#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {137886#true} is VALID [2022-04-28 02:02:46,946 INFO L290 TraceCheckUtils]: 6: Hoare triple {137886#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {137886#true} is VALID [2022-04-28 02:02:46,946 INFO L290 TraceCheckUtils]: 7: Hoare triple {137886#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {137886#true} is VALID [2022-04-28 02:02:46,946 INFO L290 TraceCheckUtils]: 8: Hoare triple {137886#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,946 INFO L290 TraceCheckUtils]: 9: Hoare triple {137886#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,947 INFO L290 TraceCheckUtils]: 10: Hoare triple {137886#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,947 INFO L290 TraceCheckUtils]: 11: Hoare triple {137886#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,947 INFO L290 TraceCheckUtils]: 12: Hoare triple {137886#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,947 INFO L290 TraceCheckUtils]: 13: Hoare triple {137886#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,947 INFO L290 TraceCheckUtils]: 14: Hoare triple {137886#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {137886#true} is VALID [2022-04-28 02:02:46,947 INFO L290 TraceCheckUtils]: 15: Hoare triple {137886#true} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,947 INFO L290 TraceCheckUtils]: 16: Hoare triple {137891#(= main_~lk8~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,948 INFO L290 TraceCheckUtils]: 17: Hoare triple {137891#(= main_~lk8~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,948 INFO L290 TraceCheckUtils]: 18: Hoare triple {137891#(= main_~lk8~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,948 INFO L290 TraceCheckUtils]: 19: Hoare triple {137891#(= main_~lk8~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,949 INFO L290 TraceCheckUtils]: 20: Hoare triple {137891#(= main_~lk8~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,949 INFO L290 TraceCheckUtils]: 21: Hoare triple {137891#(= main_~lk8~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,949 INFO L290 TraceCheckUtils]: 22: Hoare triple {137891#(= main_~lk8~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,949 INFO L290 TraceCheckUtils]: 23: Hoare triple {137891#(= main_~lk8~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,950 INFO L290 TraceCheckUtils]: 24: Hoare triple {137891#(= main_~lk8~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,950 INFO L290 TraceCheckUtils]: 25: Hoare triple {137891#(= main_~lk8~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,950 INFO L290 TraceCheckUtils]: 26: Hoare triple {137891#(= main_~lk8~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,951 INFO L290 TraceCheckUtils]: 27: Hoare triple {137891#(= main_~lk8~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,951 INFO L290 TraceCheckUtils]: 28: Hoare triple {137891#(= main_~lk8~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,951 INFO L290 TraceCheckUtils]: 29: Hoare triple {137891#(= main_~lk8~0 1)} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {137891#(= main_~lk8~0 1)} is VALID [2022-04-28 02:02:46,951 INFO L290 TraceCheckUtils]: 30: Hoare triple {137891#(= main_~lk8~0 1)} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {137887#false} is VALID [2022-04-28 02:02:46,952 INFO L290 TraceCheckUtils]: 31: Hoare triple {137887#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {137887#false} is VALID [2022-04-28 02:02:46,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:46,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:46,952 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1984767230] [2022-04-28 02:02:46,952 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1984767230] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:46,952 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:46,952 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:46,952 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134419556] [2022-04-28 02:02:46,952 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:46,953 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:02:46,953 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:46,953 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:46,972 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:46,972 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:46,972 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:46,972 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:46,972 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:46,972 INFO L87 Difference]: Start difference. First operand 5321 states and 8135 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:49,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:49,513 INFO L93 Difference]: Finished difference Result 9485 states and 14857 transitions. [2022-04-28 02:02:49,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:02:49,513 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:02:49,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:02:49,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:49,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 151 transitions. [2022-04-28 02:02:49,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:49,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 151 transitions. [2022-04-28 02:02:49,515 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 151 transitions. [2022-04-28 02:02:49,636 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 151 edges. 151 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:52,160 INFO L225 Difference]: With dead ends: 9485 [2022-04-28 02:02:52,160 INFO L226 Difference]: Without dead ends: 9483 [2022-04-28 02:02:52,161 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:02:52,161 INFO L413 NwaCegarLoop]: 88 mSDtfsCounter, 187 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 187 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:02:52,162 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [187 Valid, 95 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:02:52,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9483 states. [2022-04-28 02:02:52,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9483 to 7689. [2022-04-28 02:02:52,271 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:02:52,281 INFO L82 GeneralOperation]: Start isEquivalent. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:52,292 INFO L74 IsIncluded]: Start isIncluded. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:52,302 INFO L87 Difference]: Start difference. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:54,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:54,481 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-28 02:02:54,481 INFO L276 IsEmpty]: Start isEmpty. Operand 9483 states and 14728 transitions. [2022-04-28 02:02:54,490 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:54,490 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:54,496 INFO L74 IsIncluded]: Start isIncluded. First operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9483 states. [2022-04-28 02:02:54,501 INFO L87 Difference]: Start difference. First operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9483 states. [2022-04-28 02:02:56,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:02:56,909 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-28 02:02:56,909 INFO L276 IsEmpty]: Start isEmpty. Operand 9483 states and 14728 transitions. [2022-04-28 02:02:56,916 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:02:56,916 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:02:56,917 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:02:56,917 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:02:56,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:58,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7689 states to 7689 states and 11399 transitions. [2022-04-28 02:02:58,605 INFO L78 Accepts]: Start accepts. Automaton has 7689 states and 11399 transitions. Word has length 32 [2022-04-28 02:02:58,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:02:58,605 INFO L495 AbstractCegarLoop]: Abstraction has 7689 states and 11399 transitions. [2022-04-28 02:02:58,605 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:58,605 INFO L276 IsEmpty]: Start isEmpty. Operand 7689 states and 11399 transitions. [2022-04-28 02:02:58,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-28 02:02:58,609 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:02:58,609 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:02:58,609 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-04-28 02:02:58,609 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:02:58,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:02:58,610 INFO L85 PathProgramCache]: Analyzing trace with hash 662165098, now seen corresponding path program 1 times [2022-04-28 02:02:58,610 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:02:58,610 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993328313] [2022-04-28 02:02:58,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:02:58,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:02:58,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:58,646 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:02:58,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:02:58,653 INFO L290 TraceCheckUtils]: 0: Hoare triple {174442#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {174436#true} is VALID [2022-04-28 02:02:58,653 INFO L290 TraceCheckUtils]: 1: Hoare triple {174436#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,654 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {174436#true} {174436#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,654 INFO L272 TraceCheckUtils]: 0: Hoare triple {174436#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {174442#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:02:58,657 INFO L290 TraceCheckUtils]: 1: Hoare triple {174442#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {174436#true} is VALID [2022-04-28 02:02:58,657 INFO L290 TraceCheckUtils]: 2: Hoare triple {174436#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,657 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {174436#true} {174436#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,657 INFO L272 TraceCheckUtils]: 4: Hoare triple {174436#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,657 INFO L290 TraceCheckUtils]: 5: Hoare triple {174436#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {174436#true} is VALID [2022-04-28 02:02:58,657 INFO L290 TraceCheckUtils]: 6: Hoare triple {174436#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {174436#true} is VALID [2022-04-28 02:02:58,657 INFO L290 TraceCheckUtils]: 7: Hoare triple {174436#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {174436#true} is VALID [2022-04-28 02:02:58,658 INFO L290 TraceCheckUtils]: 8: Hoare triple {174436#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,658 INFO L290 TraceCheckUtils]: 9: Hoare triple {174436#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,658 INFO L290 TraceCheckUtils]: 10: Hoare triple {174436#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,658 INFO L290 TraceCheckUtils]: 11: Hoare triple {174436#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,658 INFO L290 TraceCheckUtils]: 12: Hoare triple {174436#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,658 INFO L290 TraceCheckUtils]: 13: Hoare triple {174436#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,658 INFO L290 TraceCheckUtils]: 14: Hoare triple {174436#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {174436#true} is VALID [2022-04-28 02:02:58,658 INFO L290 TraceCheckUtils]: 15: Hoare triple {174436#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,659 INFO L290 TraceCheckUtils]: 16: Hoare triple {174441#(= main_~p8~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,659 INFO L290 TraceCheckUtils]: 17: Hoare triple {174441#(= main_~p8~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,659 INFO L290 TraceCheckUtils]: 18: Hoare triple {174441#(= main_~p8~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,660 INFO L290 TraceCheckUtils]: 19: Hoare triple {174441#(= main_~p8~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,660 INFO L290 TraceCheckUtils]: 20: Hoare triple {174441#(= main_~p8~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,660 INFO L290 TraceCheckUtils]: 21: Hoare triple {174441#(= main_~p8~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,661 INFO L290 TraceCheckUtils]: 22: Hoare triple {174441#(= main_~p8~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,661 INFO L290 TraceCheckUtils]: 23: Hoare triple {174441#(= main_~p8~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,661 INFO L290 TraceCheckUtils]: 24: Hoare triple {174441#(= main_~p8~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,661 INFO L290 TraceCheckUtils]: 25: Hoare triple {174441#(= main_~p8~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,675 INFO L290 TraceCheckUtils]: 26: Hoare triple {174441#(= main_~p8~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,675 INFO L290 TraceCheckUtils]: 27: Hoare triple {174441#(= main_~p8~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,676 INFO L290 TraceCheckUtils]: 28: Hoare triple {174441#(= main_~p8~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {174441#(= main_~p8~0 0)} is VALID [2022-04-28 02:02:58,689 INFO L290 TraceCheckUtils]: 29: Hoare triple {174441#(= main_~p8~0 0)} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {174437#false} is VALID [2022-04-28 02:02:58,689 INFO L290 TraceCheckUtils]: 30: Hoare triple {174437#false} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {174437#false} is VALID [2022-04-28 02:02:58,689 INFO L290 TraceCheckUtils]: 31: Hoare triple {174437#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {174437#false} is VALID [2022-04-28 02:02:58,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:02:58,689 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:02:58,689 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1993328313] [2022-04-28 02:02:58,689 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1993328313] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:02:58,690 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:02:58,690 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:02:58,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [287244925] [2022-04-28 02:02:58,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:02:58,690 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:02:58,690 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:02:58,690 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:02:58,711 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:02:58,711 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:02:58,712 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:02:58,712 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:02:58,712 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:02:58,712 INFO L87 Difference]: Start difference. First operand 7689 states and 11399 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:06,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:03:06,986 INFO L93 Difference]: Finished difference Result 17933 states and 26761 transitions. [2022-04-28 02:03:06,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:03:06,986 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-28 02:03:06,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:03:06,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:06,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 243 transitions. [2022-04-28 02:03:06,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:06,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 243 transitions. [2022-04-28 02:03:06,989 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 243 transitions. [2022-04-28 02:03:07,133 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 243 edges. 243 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:03:10,119 INFO L225 Difference]: With dead ends: 17933 [2022-04-28 02:03:10,119 INFO L226 Difference]: Without dead ends: 10379 [2022-04-28 02:03:10,124 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:03:10,125 INFO L413 NwaCegarLoop]: 134 mSDtfsCounter, 166 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 166 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:03:10,125 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [166 Valid, 141 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:03:10,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10379 states. [2022-04-28 02:03:10,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10379 to 10377. [2022-04-28 02:03:10,310 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:03:10,321 INFO L82 GeneralOperation]: Start isEquivalent. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:10,333 INFO L74 IsIncluded]: Start isIncluded. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:10,345 INFO L87 Difference]: Start difference. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:13,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:03:13,084 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-28 02:03:13,084 INFO L276 IsEmpty]: Start isEmpty. Operand 10379 states and 15368 transitions. [2022-04-28 02:03:13,094 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:03:13,094 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:03:13,105 INFO L74 IsIncluded]: Start isIncluded. First operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10379 states. [2022-04-28 02:03:13,113 INFO L87 Difference]: Start difference. First operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10379 states. [2022-04-28 02:03:15,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:03:15,920 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-28 02:03:15,920 INFO L276 IsEmpty]: Start isEmpty. Operand 10379 states and 15368 transitions. [2022-04-28 02:03:15,934 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:03:15,935 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:03:15,935 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:03:15,935 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:03:15,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:18,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10377 states to 10377 states and 15367 transitions. [2022-04-28 02:03:18,785 INFO L78 Accepts]: Start accepts. Automaton has 10377 states and 15367 transitions. Word has length 32 [2022-04-28 02:03:18,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:03:18,785 INFO L495 AbstractCegarLoop]: Abstraction has 10377 states and 15367 transitions. [2022-04-28 02:03:18,785 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:18,785 INFO L276 IsEmpty]: Start isEmpty. Operand 10377 states and 15367 transitions. [2022-04-28 02:03:18,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-28 02:03:18,790 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:03:18,790 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:03:18,790 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-04-28 02:03:18,791 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:03:18,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:03:18,791 INFO L85 PathProgramCache]: Analyzing trace with hash 49386872, now seen corresponding path program 1 times [2022-04-28 02:03:18,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:03:18,791 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1378625775] [2022-04-28 02:03:18,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:03:18,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:03:18,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:03:18,831 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:03:18,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:03:18,838 INFO L290 TraceCheckUtils]: 0: Hoare triple {224176#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {224170#true} is VALID [2022-04-28 02:03:18,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {224170#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,838 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {224170#true} {224170#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,839 INFO L272 TraceCheckUtils]: 0: Hoare triple {224170#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224176#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:03:18,839 INFO L290 TraceCheckUtils]: 1: Hoare triple {224176#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {224170#true} is VALID [2022-04-28 02:03:18,839 INFO L290 TraceCheckUtils]: 2: Hoare triple {224170#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,839 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {224170#true} {224170#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,839 INFO L272 TraceCheckUtils]: 4: Hoare triple {224170#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,839 INFO L290 TraceCheckUtils]: 5: Hoare triple {224170#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {224170#true} is VALID [2022-04-28 02:03:18,840 INFO L290 TraceCheckUtils]: 6: Hoare triple {224170#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {224170#true} is VALID [2022-04-28 02:03:18,840 INFO L290 TraceCheckUtils]: 7: Hoare triple {224170#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {224170#true} is VALID [2022-04-28 02:03:18,840 INFO L290 TraceCheckUtils]: 8: Hoare triple {224170#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,840 INFO L290 TraceCheckUtils]: 9: Hoare triple {224170#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,840 INFO L290 TraceCheckUtils]: 10: Hoare triple {224170#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,840 INFO L290 TraceCheckUtils]: 11: Hoare triple {224170#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,840 INFO L290 TraceCheckUtils]: 12: Hoare triple {224170#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,840 INFO L290 TraceCheckUtils]: 13: Hoare triple {224170#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,840 INFO L290 TraceCheckUtils]: 14: Hoare triple {224170#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {224170#true} is VALID [2022-04-28 02:03:18,841 INFO L290 TraceCheckUtils]: 15: Hoare triple {224170#true} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,841 INFO L290 TraceCheckUtils]: 16: Hoare triple {224175#(not (= main_~p8~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,841 INFO L290 TraceCheckUtils]: 17: Hoare triple {224175#(not (= main_~p8~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,842 INFO L290 TraceCheckUtils]: 18: Hoare triple {224175#(not (= main_~p8~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,842 INFO L290 TraceCheckUtils]: 19: Hoare triple {224175#(not (= main_~p8~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,842 INFO L290 TraceCheckUtils]: 20: Hoare triple {224175#(not (= main_~p8~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,842 INFO L290 TraceCheckUtils]: 21: Hoare triple {224175#(not (= main_~p8~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,843 INFO L290 TraceCheckUtils]: 22: Hoare triple {224175#(not (= main_~p8~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,843 INFO L290 TraceCheckUtils]: 23: Hoare triple {224175#(not (= main_~p8~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,843 INFO L290 TraceCheckUtils]: 24: Hoare triple {224175#(not (= main_~p8~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,844 INFO L290 TraceCheckUtils]: 25: Hoare triple {224175#(not (= main_~p8~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,844 INFO L290 TraceCheckUtils]: 26: Hoare triple {224175#(not (= main_~p8~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,844 INFO L290 TraceCheckUtils]: 27: Hoare triple {224175#(not (= main_~p8~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,844 INFO L290 TraceCheckUtils]: 28: Hoare triple {224175#(not (= main_~p8~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {224175#(not (= main_~p8~0 0))} is VALID [2022-04-28 02:03:18,845 INFO L290 TraceCheckUtils]: 29: Hoare triple {224175#(not (= main_~p8~0 0))} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {224171#false} is VALID [2022-04-28 02:03:18,845 INFO L290 TraceCheckUtils]: 30: Hoare triple {224171#false} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {224171#false} is VALID [2022-04-28 02:03:18,845 INFO L290 TraceCheckUtils]: 31: Hoare triple {224171#false} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {224171#false} is VALID [2022-04-28 02:03:18,845 INFO L290 TraceCheckUtils]: 32: Hoare triple {224171#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {224171#false} is VALID [2022-04-28 02:03:18,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:03:18,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:03:18,845 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1378625775] [2022-04-28 02:03:18,846 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1378625775] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:03:18,846 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:03:18,846 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:03:18,846 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641937016] [2022-04-28 02:03:18,846 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:03:18,847 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-28 02:03:18,848 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:03:18,848 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:18,869 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:03:18,869 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:03:18,869 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:03:18,869 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:03:18,870 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:03:18,870 INFO L87 Difference]: Start difference. First operand 10377 states and 15367 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:25,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:03:25,677 INFO L93 Difference]: Finished difference Result 15565 states and 22985 transitions. [2022-04-28 02:03:25,677 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:03:25,677 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-28 02:03:25,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:03:25,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:25,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 238 transitions. [2022-04-28 02:03:25,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:25,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 238 transitions. [2022-04-28 02:03:25,679 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 238 transitions. [2022-04-28 02:03:25,820 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 238 edges. 238 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:03:28,907 INFO L225 Difference]: With dead ends: 15565 [2022-04-28 02:03:28,908 INFO L226 Difference]: Without dead ends: 10507 [2022-04-28 02:03:28,934 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:03:28,935 INFO L413 NwaCegarLoop]: 125 mSDtfsCounter, 176 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 176 SdHoareTripleChecker+Valid, 132 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:03:28,935 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [176 Valid, 132 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:03:28,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10507 states. [2022-04-28 02:03:29,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10507 to 10505. [2022-04-28 02:03:29,066 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:03:29,079 INFO L82 GeneralOperation]: Start isEquivalent. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:29,092 INFO L74 IsIncluded]: Start isIncluded. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:29,101 INFO L87 Difference]: Start difference. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:31,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:03:31,923 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-28 02:03:31,923 INFO L276 IsEmpty]: Start isEmpty. Operand 10507 states and 15368 transitions. [2022-04-28 02:03:31,930 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:03:31,930 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:03:31,942 INFO L74 IsIncluded]: Start isIncluded. First operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10507 states. [2022-04-28 02:03:31,955 INFO L87 Difference]: Start difference. First operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10507 states. [2022-04-28 02:03:34,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:03:34,643 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-28 02:03:34,643 INFO L276 IsEmpty]: Start isEmpty. Operand 10507 states and 15368 transitions. [2022-04-28 02:03:34,650 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:03:34,650 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:03:34,650 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:03:34,650 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:03:34,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:37,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10505 states to 10505 states and 15367 transitions. [2022-04-28 02:03:37,381 INFO L78 Accepts]: Start accepts. Automaton has 10505 states and 15367 transitions. Word has length 33 [2022-04-28 02:03:37,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:03:37,381 INFO L495 AbstractCegarLoop]: Abstraction has 10505 states and 15367 transitions. [2022-04-28 02:03:37,381 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:37,381 INFO L276 IsEmpty]: Start isEmpty. Operand 10505 states and 15367 transitions. [2022-04-28 02:03:37,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-28 02:03:37,386 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:03:37,386 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:03:37,386 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-04-28 02:03:37,387 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:03:37,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:03:37,387 INFO L85 PathProgramCache]: Analyzing trace with hash -947685481, now seen corresponding path program 1 times [2022-04-28 02:03:37,387 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:03:37,388 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825646457] [2022-04-28 02:03:37,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:03:37,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:03:37,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:03:37,417 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:03:37,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:03:37,421 INFO L290 TraceCheckUtils]: 0: Hoare triple {271926#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {271920#true} is VALID [2022-04-28 02:03:37,421 INFO L290 TraceCheckUtils]: 1: Hoare triple {271920#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,421 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {271920#true} {271920#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,421 INFO L272 TraceCheckUtils]: 0: Hoare triple {271920#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {271926#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:03:37,422 INFO L290 TraceCheckUtils]: 1: Hoare triple {271926#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {271920#true} is VALID [2022-04-28 02:03:37,422 INFO L290 TraceCheckUtils]: 2: Hoare triple {271920#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,422 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {271920#true} {271920#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,422 INFO L272 TraceCheckUtils]: 4: Hoare triple {271920#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,422 INFO L290 TraceCheckUtils]: 5: Hoare triple {271920#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {271920#true} is VALID [2022-04-28 02:03:37,422 INFO L290 TraceCheckUtils]: 6: Hoare triple {271920#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {271920#true} is VALID [2022-04-28 02:03:37,422 INFO L290 TraceCheckUtils]: 7: Hoare triple {271920#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {271920#true} is VALID [2022-04-28 02:03:37,422 INFO L290 TraceCheckUtils]: 8: Hoare triple {271920#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,422 INFO L290 TraceCheckUtils]: 9: Hoare triple {271920#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,423 INFO L290 TraceCheckUtils]: 10: Hoare triple {271920#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,423 INFO L290 TraceCheckUtils]: 11: Hoare triple {271920#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,423 INFO L290 TraceCheckUtils]: 12: Hoare triple {271920#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,423 INFO L290 TraceCheckUtils]: 13: Hoare triple {271920#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,423 INFO L290 TraceCheckUtils]: 14: Hoare triple {271920#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,423 INFO L290 TraceCheckUtils]: 15: Hoare triple {271920#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {271920#true} is VALID [2022-04-28 02:03:37,423 INFO L290 TraceCheckUtils]: 16: Hoare triple {271920#true} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,424 INFO L290 TraceCheckUtils]: 17: Hoare triple {271925#(= main_~lk9~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,424 INFO L290 TraceCheckUtils]: 18: Hoare triple {271925#(= main_~lk9~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,424 INFO L290 TraceCheckUtils]: 19: Hoare triple {271925#(= main_~lk9~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,424 INFO L290 TraceCheckUtils]: 20: Hoare triple {271925#(= main_~lk9~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,425 INFO L290 TraceCheckUtils]: 21: Hoare triple {271925#(= main_~lk9~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,425 INFO L290 TraceCheckUtils]: 22: Hoare triple {271925#(= main_~lk9~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,425 INFO L290 TraceCheckUtils]: 23: Hoare triple {271925#(= main_~lk9~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,426 INFO L290 TraceCheckUtils]: 24: Hoare triple {271925#(= main_~lk9~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,426 INFO L290 TraceCheckUtils]: 25: Hoare triple {271925#(= main_~lk9~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,426 INFO L290 TraceCheckUtils]: 26: Hoare triple {271925#(= main_~lk9~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,426 INFO L290 TraceCheckUtils]: 27: Hoare triple {271925#(= main_~lk9~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,427 INFO L290 TraceCheckUtils]: 28: Hoare triple {271925#(= main_~lk9~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,427 INFO L290 TraceCheckUtils]: 29: Hoare triple {271925#(= main_~lk9~0 1)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,427 INFO L290 TraceCheckUtils]: 30: Hoare triple {271925#(= main_~lk9~0 1)} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {271925#(= main_~lk9~0 1)} is VALID [2022-04-28 02:03:37,428 INFO L290 TraceCheckUtils]: 31: Hoare triple {271925#(= main_~lk9~0 1)} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {271921#false} is VALID [2022-04-28 02:03:37,428 INFO L290 TraceCheckUtils]: 32: Hoare triple {271921#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {271921#false} is VALID [2022-04-28 02:03:37,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:03:37,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:03:37,428 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1825646457] [2022-04-28 02:03:37,428 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1825646457] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:03:37,428 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:03:37,428 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:03:37,428 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258428373] [2022-04-28 02:03:37,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:03:37,429 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-28 02:03:37,429 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:03:37,429 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:37,449 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:03:37,450 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:03:37,450 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:03:37,450 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:03:37,450 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:03:37,450 INFO L87 Difference]: Start difference. First operand 10505 states and 15367 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:46,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:03:46,361 INFO L93 Difference]: Finished difference Result 18445 states and 27657 transitions. [2022-04-28 02:03:46,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:03:46,361 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-28 02:03:46,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:03:46,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:46,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 147 transitions. [2022-04-28 02:03:46,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:46,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 147 transitions. [2022-04-28 02:03:46,363 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 147 transitions. [2022-04-28 02:03:46,455 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 147 edges. 147 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:03:55,520 INFO L225 Difference]: With dead ends: 18445 [2022-04-28 02:03:55,520 INFO L226 Difference]: Without dead ends: 18443 [2022-04-28 02:03:55,522 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:03:55,523 INFO L413 NwaCegarLoop]: 87 mSDtfsCounter, 180 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 180 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:03:55,523 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [180 Valid, 94 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:03:55,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18443 states. [2022-04-28 02:03:55,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18443 to 15369. [2022-04-28 02:03:55,675 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:03:55,691 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:55,706 INFO L74 IsIncluded]: Start isIncluded. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:03:55,722 INFO L87 Difference]: Start difference. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:04,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:04:04,898 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-28 02:04:04,898 INFO L276 IsEmpty]: Start isEmpty. Operand 18443 states and 27400 transitions. [2022-04-28 02:04:04,912 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:04:04,912 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:04:04,929 INFO L74 IsIncluded]: Start isIncluded. First operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18443 states. [2022-04-28 02:04:04,946 INFO L87 Difference]: Start difference. First operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18443 states. [2022-04-28 02:04:14,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:04:14,153 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-28 02:04:14,153 INFO L276 IsEmpty]: Start isEmpty. Operand 18443 states and 27400 transitions. [2022-04-28 02:04:14,167 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:04:14,167 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:04:14,167 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:04:14,167 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:04:14,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:20,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15369 states to 15369 states and 21767 transitions. [2022-04-28 02:04:20,820 INFO L78 Accepts]: Start accepts. Automaton has 15369 states and 21767 transitions. Word has length 33 [2022-04-28 02:04:20,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:04:20,820 INFO L495 AbstractCegarLoop]: Abstraction has 15369 states and 21767 transitions. [2022-04-28 02:04:20,820 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:20,820 INFO L276 IsEmpty]: Start isEmpty. Operand 15369 states and 21767 transitions. [2022-04-28 02:04:20,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-28 02:04:20,829 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:04:20,829 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:04:20,829 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-04-28 02:04:20,829 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:04:20,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:04:20,829 INFO L85 PathProgramCache]: Analyzing trace with hash 405624216, now seen corresponding path program 1 times [2022-04-28 02:04:20,829 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:04:20,829 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2116921347] [2022-04-28 02:04:20,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:04:20,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:04:20,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:04:20,869 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:04:20,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:04:20,873 INFO L290 TraceCheckUtils]: 0: Hoare triple {343420#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {343414#true} is VALID [2022-04-28 02:04:20,873 INFO L290 TraceCheckUtils]: 1: Hoare triple {343414#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,873 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {343414#true} {343414#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,874 INFO L272 TraceCheckUtils]: 0: Hoare triple {343414#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {343420#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:04:20,874 INFO L290 TraceCheckUtils]: 1: Hoare triple {343420#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {343414#true} is VALID [2022-04-28 02:04:20,874 INFO L290 TraceCheckUtils]: 2: Hoare triple {343414#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,874 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {343414#true} {343414#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,874 INFO L272 TraceCheckUtils]: 4: Hoare triple {343414#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,874 INFO L290 TraceCheckUtils]: 5: Hoare triple {343414#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {343414#true} is VALID [2022-04-28 02:04:20,874 INFO L290 TraceCheckUtils]: 6: Hoare triple {343414#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {343414#true} is VALID [2022-04-28 02:04:20,875 INFO L290 TraceCheckUtils]: 7: Hoare triple {343414#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {343414#true} is VALID [2022-04-28 02:04:20,875 INFO L290 TraceCheckUtils]: 8: Hoare triple {343414#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,875 INFO L290 TraceCheckUtils]: 9: Hoare triple {343414#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,875 INFO L290 TraceCheckUtils]: 10: Hoare triple {343414#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,875 INFO L290 TraceCheckUtils]: 11: Hoare triple {343414#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,875 INFO L290 TraceCheckUtils]: 12: Hoare triple {343414#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,875 INFO L290 TraceCheckUtils]: 13: Hoare triple {343414#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,875 INFO L290 TraceCheckUtils]: 14: Hoare triple {343414#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,875 INFO L290 TraceCheckUtils]: 15: Hoare triple {343414#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {343414#true} is VALID [2022-04-28 02:04:20,876 INFO L290 TraceCheckUtils]: 16: Hoare triple {343414#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,876 INFO L290 TraceCheckUtils]: 17: Hoare triple {343419#(= main_~p9~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,876 INFO L290 TraceCheckUtils]: 18: Hoare triple {343419#(= main_~p9~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,876 INFO L290 TraceCheckUtils]: 19: Hoare triple {343419#(= main_~p9~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,877 INFO L290 TraceCheckUtils]: 20: Hoare triple {343419#(= main_~p9~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,877 INFO L290 TraceCheckUtils]: 21: Hoare triple {343419#(= main_~p9~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,877 INFO L290 TraceCheckUtils]: 22: Hoare triple {343419#(= main_~p9~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,877 INFO L290 TraceCheckUtils]: 23: Hoare triple {343419#(= main_~p9~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,878 INFO L290 TraceCheckUtils]: 24: Hoare triple {343419#(= main_~p9~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,878 INFO L290 TraceCheckUtils]: 25: Hoare triple {343419#(= main_~p9~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,878 INFO L290 TraceCheckUtils]: 26: Hoare triple {343419#(= main_~p9~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,879 INFO L290 TraceCheckUtils]: 27: Hoare triple {343419#(= main_~p9~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,879 INFO L290 TraceCheckUtils]: 28: Hoare triple {343419#(= main_~p9~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,879 INFO L290 TraceCheckUtils]: 29: Hoare triple {343419#(= main_~p9~0 0)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {343419#(= main_~p9~0 0)} is VALID [2022-04-28 02:04:20,879 INFO L290 TraceCheckUtils]: 30: Hoare triple {343419#(= main_~p9~0 0)} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {343415#false} is VALID [2022-04-28 02:04:20,880 INFO L290 TraceCheckUtils]: 31: Hoare triple {343415#false} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {343415#false} is VALID [2022-04-28 02:04:20,880 INFO L290 TraceCheckUtils]: 32: Hoare triple {343415#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {343415#false} is VALID [2022-04-28 02:04:20,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:04:20,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:04:20,880 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2116921347] [2022-04-28 02:04:20,880 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2116921347] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:04:20,880 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:04:20,880 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:04:20,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [516448189] [2022-04-28 02:04:20,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:04:20,881 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-28 02:04:20,881 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:04:20,881 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:04:20,901 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:04:20,901 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:04:20,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:04:20,901 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:04:20,901 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:04:20,902 INFO L87 Difference]: Start difference. First operand 15369 states and 21767 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:05:53,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:05:53,516 INFO L93 Difference]: Finished difference Result 35597 states and 50697 transitions. [2022-04-28 02:05:53,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:05:53,516 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-28 02:05:53,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:05:53,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:05:53,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 240 transitions. [2022-04-28 02:05:53,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:05:53,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 240 transitions. [2022-04-28 02:05:53,518 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 240 transitions. [2022-04-28 02:05:53,662 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 240 edges. 240 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:06:04,934 INFO L225 Difference]: With dead ends: 35597 [2022-04-28 02:06:04,934 INFO L226 Difference]: Without dead ends: 20491 [2022-04-28 02:06:04,945 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:06:04,946 INFO L413 NwaCegarLoop]: 136 mSDtfsCounter, 160 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-28 02:06:04,946 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [160 Valid, 143 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-28 02:06:04,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20491 states. [2022-04-28 02:06:05,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20491 to 20489. [2022-04-28 02:06:05,201 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:06:05,226 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:06:05,250 INFO L74 IsIncluded]: Start isIncluded. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:06:05,273 INFO L87 Difference]: Start difference. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:06:16,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:06:16,811 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-28 02:06:16,811 INFO L276 IsEmpty]: Start isEmpty. Operand 20491 states and 28936 transitions. [2022-04-28 02:06:16,827 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:06:16,828 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:06:16,889 INFO L74 IsIncluded]: Start isIncluded. First operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20491 states. [2022-04-28 02:06:16,908 INFO L87 Difference]: Start difference. First operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20491 states. [2022-04-28 02:06:28,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:06:28,624 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-28 02:06:28,625 INFO L276 IsEmpty]: Start isEmpty. Operand 20491 states and 28936 transitions. [2022-04-28 02:06:28,641 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:06:28,641 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:06:28,641 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:06:28,641 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:06:28,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:06:39,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20489 states to 20489 states and 28935 transitions. [2022-04-28 02:06:39,485 INFO L78 Accepts]: Start accepts. Automaton has 20489 states and 28935 transitions. Word has length 33 [2022-04-28 02:06:39,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:06:39,485 INFO L495 AbstractCegarLoop]: Abstraction has 20489 states and 28935 transitions. [2022-04-28 02:06:39,485 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:06:39,485 INFO L276 IsEmpty]: Start isEmpty. Operand 20489 states and 28935 transitions. [2022-04-28 02:06:39,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-28 02:06:39,494 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:06:39,494 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:06:39,494 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-04-28 02:06:39,495 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:06:39,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:06:39,495 INFO L85 PathProgramCache]: Analyzing trace with hash 686554246, now seen corresponding path program 1 times [2022-04-28 02:06:39,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:06:39,495 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1022942227] [2022-04-28 02:06:39,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:06:39,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:06:39,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:06:39,532 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:06:39,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:06:39,537 INFO L290 TraceCheckUtils]: 0: Hoare triple {441794#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {441788#true} is VALID [2022-04-28 02:06:39,537 INFO L290 TraceCheckUtils]: 1: Hoare triple {441788#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,537 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {441788#true} {441788#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,538 INFO L272 TraceCheckUtils]: 0: Hoare triple {441788#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441794#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:06:39,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {441794#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {441788#true} is VALID [2022-04-28 02:06:39,538 INFO L290 TraceCheckUtils]: 2: Hoare triple {441788#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,538 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {441788#true} {441788#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,538 INFO L272 TraceCheckUtils]: 4: Hoare triple {441788#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,538 INFO L290 TraceCheckUtils]: 5: Hoare triple {441788#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {441788#true} is VALID [2022-04-28 02:06:39,539 INFO L290 TraceCheckUtils]: 6: Hoare triple {441788#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {441788#true} is VALID [2022-04-28 02:06:39,539 INFO L290 TraceCheckUtils]: 7: Hoare triple {441788#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {441788#true} is VALID [2022-04-28 02:06:39,539 INFO L290 TraceCheckUtils]: 8: Hoare triple {441788#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,539 INFO L290 TraceCheckUtils]: 9: Hoare triple {441788#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,539 INFO L290 TraceCheckUtils]: 10: Hoare triple {441788#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,539 INFO L290 TraceCheckUtils]: 11: Hoare triple {441788#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,539 INFO L290 TraceCheckUtils]: 12: Hoare triple {441788#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,539 INFO L290 TraceCheckUtils]: 13: Hoare triple {441788#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,539 INFO L290 TraceCheckUtils]: 14: Hoare triple {441788#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,539 INFO L290 TraceCheckUtils]: 15: Hoare triple {441788#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {441788#true} is VALID [2022-04-28 02:06:39,540 INFO L290 TraceCheckUtils]: 16: Hoare triple {441788#true} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,540 INFO L290 TraceCheckUtils]: 17: Hoare triple {441793#(not (= main_~p9~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,540 INFO L290 TraceCheckUtils]: 18: Hoare triple {441793#(not (= main_~p9~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,541 INFO L290 TraceCheckUtils]: 19: Hoare triple {441793#(not (= main_~p9~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,541 INFO L290 TraceCheckUtils]: 20: Hoare triple {441793#(not (= main_~p9~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,541 INFO L290 TraceCheckUtils]: 21: Hoare triple {441793#(not (= main_~p9~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,541 INFO L290 TraceCheckUtils]: 22: Hoare triple {441793#(not (= main_~p9~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,542 INFO L290 TraceCheckUtils]: 23: Hoare triple {441793#(not (= main_~p9~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,542 INFO L290 TraceCheckUtils]: 24: Hoare triple {441793#(not (= main_~p9~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,542 INFO L290 TraceCheckUtils]: 25: Hoare triple {441793#(not (= main_~p9~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,543 INFO L290 TraceCheckUtils]: 26: Hoare triple {441793#(not (= main_~p9~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,543 INFO L290 TraceCheckUtils]: 27: Hoare triple {441793#(not (= main_~p9~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,543 INFO L290 TraceCheckUtils]: 28: Hoare triple {441793#(not (= main_~p9~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,543 INFO L290 TraceCheckUtils]: 29: Hoare triple {441793#(not (= main_~p9~0 0))} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {441793#(not (= main_~p9~0 0))} is VALID [2022-04-28 02:06:39,545 INFO L290 TraceCheckUtils]: 30: Hoare triple {441793#(not (= main_~p9~0 0))} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {441789#false} is VALID [2022-04-28 02:06:39,545 INFO L290 TraceCheckUtils]: 31: Hoare triple {441789#false} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {441789#false} is VALID [2022-04-28 02:06:39,545 INFO L290 TraceCheckUtils]: 32: Hoare triple {441789#false} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {441789#false} is VALID [2022-04-28 02:06:39,545 INFO L290 TraceCheckUtils]: 33: Hoare triple {441789#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {441789#false} is VALID [2022-04-28 02:06:39,545 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:06:39,545 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:06:39,545 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1022942227] [2022-04-28 02:06:39,545 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1022942227] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:06:39,545 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:06:39,545 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:06:39,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [345405535] [2022-04-28 02:06:39,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:06:39,547 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-28 02:06:39,547 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:06:39,547 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:06:39,566 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:06:39,566 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:06:39,567 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:06:39,567 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:06:39,567 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:06:39,567 INFO L87 Difference]: Start difference. First operand 20489 states and 28935 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:07:06,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:07:06,430 INFO L93 Difference]: Finished difference Result 30733 states and 43273 transitions. [2022-04-28 02:07:06,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:07:06,430 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-28 02:07:06,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:07:06,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:07:06,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 235 transitions. [2022-04-28 02:07:06,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:07:06,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 235 transitions. [2022-04-28 02:07:06,432 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 235 transitions. [2022-04-28 02:07:06,573 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 235 edges. 235 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:07:18,648 INFO L225 Difference]: With dead ends: 30733 [2022-04-28 02:07:18,649 INFO L226 Difference]: Without dead ends: 20747 [2022-04-28 02:07:18,658 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:07:18,659 INFO L413 NwaCegarLoop]: 122 mSDtfsCounter, 175 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:07:18,660 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [175 Valid, 129 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:07:18,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20747 states. [2022-04-28 02:07:18,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20747 to 20745. [2022-04-28 02:07:18,991 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:07:19,014 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:07:19,034 INFO L74 IsIncluded]: Start isIncluded. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:07:19,052 INFO L87 Difference]: Start difference. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:07:30,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:07:30,856 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-28 02:07:30,856 INFO L276 IsEmpty]: Start isEmpty. Operand 20747 states and 28936 transitions. [2022-04-28 02:07:30,870 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:07:30,870 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:07:30,888 INFO L74 IsIncluded]: Start isIncluded. First operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20747 states. [2022-04-28 02:07:30,906 INFO L87 Difference]: Start difference. First operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20747 states. [2022-04-28 02:07:41,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:07:41,324 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-28 02:07:41,324 INFO L276 IsEmpty]: Start isEmpty. Operand 20747 states and 28936 transitions. [2022-04-28 02:07:41,336 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:07:41,336 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:07:41,336 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:07:41,336 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:07:41,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:07:56,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20745 states to 20745 states and 28935 transitions. [2022-04-28 02:07:56,413 INFO L78 Accepts]: Start accepts. Automaton has 20745 states and 28935 transitions. Word has length 34 [2022-04-28 02:07:56,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:07:56,413 INFO L495 AbstractCegarLoop]: Abstraction has 20745 states and 28935 transitions. [2022-04-28 02:07:56,413 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:07:56,413 INFO L276 IsEmpty]: Start isEmpty. Operand 20745 states and 28935 transitions. [2022-04-28 02:07:56,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-28 02:07:56,423 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:07:56,423 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:07:56,423 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-04-28 02:07:56,423 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:07:56,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:07:56,424 INFO L85 PathProgramCache]: Analyzing trace with hash -310518107, now seen corresponding path program 1 times [2022-04-28 02:07:56,424 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:07:56,424 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24117334] [2022-04-28 02:07:56,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:07:56,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:07:56,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:07:56,457 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:07:56,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:07:56,461 INFO L290 TraceCheckUtils]: 0: Hoare triple {536072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {536066#true} is VALID [2022-04-28 02:07:56,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {536066#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,462 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {536066#true} {536066#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,462 INFO L272 TraceCheckUtils]: 0: Hoare triple {536066#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {536072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:07:56,463 INFO L290 TraceCheckUtils]: 1: Hoare triple {536072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {536066#true} is VALID [2022-04-28 02:07:56,463 INFO L290 TraceCheckUtils]: 2: Hoare triple {536066#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,463 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {536066#true} {536066#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,463 INFO L272 TraceCheckUtils]: 4: Hoare triple {536066#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,463 INFO L290 TraceCheckUtils]: 5: Hoare triple {536066#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {536066#true} is VALID [2022-04-28 02:07:56,463 INFO L290 TraceCheckUtils]: 6: Hoare triple {536066#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {536066#true} is VALID [2022-04-28 02:07:56,463 INFO L290 TraceCheckUtils]: 7: Hoare triple {536066#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {536066#true} is VALID [2022-04-28 02:07:56,463 INFO L290 TraceCheckUtils]: 8: Hoare triple {536066#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,464 INFO L290 TraceCheckUtils]: 9: Hoare triple {536066#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,464 INFO L290 TraceCheckUtils]: 10: Hoare triple {536066#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,464 INFO L290 TraceCheckUtils]: 11: Hoare triple {536066#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,464 INFO L290 TraceCheckUtils]: 12: Hoare triple {536066#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,464 INFO L290 TraceCheckUtils]: 13: Hoare triple {536066#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,464 INFO L290 TraceCheckUtils]: 14: Hoare triple {536066#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,464 INFO L290 TraceCheckUtils]: 15: Hoare triple {536066#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,464 INFO L290 TraceCheckUtils]: 16: Hoare triple {536066#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {536066#true} is VALID [2022-04-28 02:07:56,464 INFO L290 TraceCheckUtils]: 17: Hoare triple {536066#true} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,465 INFO L290 TraceCheckUtils]: 18: Hoare triple {536071#(= main_~lk10~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,465 INFO L290 TraceCheckUtils]: 19: Hoare triple {536071#(= main_~lk10~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,465 INFO L290 TraceCheckUtils]: 20: Hoare triple {536071#(= main_~lk10~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,466 INFO L290 TraceCheckUtils]: 21: Hoare triple {536071#(= main_~lk10~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,466 INFO L290 TraceCheckUtils]: 22: Hoare triple {536071#(= main_~lk10~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,466 INFO L290 TraceCheckUtils]: 23: Hoare triple {536071#(= main_~lk10~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,467 INFO L290 TraceCheckUtils]: 24: Hoare triple {536071#(= main_~lk10~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,467 INFO L290 TraceCheckUtils]: 25: Hoare triple {536071#(= main_~lk10~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,467 INFO L290 TraceCheckUtils]: 26: Hoare triple {536071#(= main_~lk10~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,467 INFO L290 TraceCheckUtils]: 27: Hoare triple {536071#(= main_~lk10~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,468 INFO L290 TraceCheckUtils]: 28: Hoare triple {536071#(= main_~lk10~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,468 INFO L290 TraceCheckUtils]: 29: Hoare triple {536071#(= main_~lk10~0 1)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,468 INFO L290 TraceCheckUtils]: 30: Hoare triple {536071#(= main_~lk10~0 1)} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,469 INFO L290 TraceCheckUtils]: 31: Hoare triple {536071#(= main_~lk10~0 1)} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {536071#(= main_~lk10~0 1)} is VALID [2022-04-28 02:07:56,469 INFO L290 TraceCheckUtils]: 32: Hoare triple {536071#(= main_~lk10~0 1)} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {536067#false} is VALID [2022-04-28 02:07:56,469 INFO L290 TraceCheckUtils]: 33: Hoare triple {536067#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {536067#false} is VALID [2022-04-28 02:07:56,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:07:56,469 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:07:56,469 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [24117334] [2022-04-28 02:07:56,470 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [24117334] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:07:56,470 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:07:56,470 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:07:56,470 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1770926341] [2022-04-28 02:07:56,470 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:07:56,470 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-28 02:07:56,470 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:07:56,470 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:07:56,492 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:07:56,492 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:07:56,493 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:07:56,493 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:07:56,493 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:07:56,493 INFO L87 Difference]: Start difference. First operand 20745 states and 28935 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:08:55,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:08:55,387 INFO L93 Difference]: Finished difference Result 35853 states and 51209 transitions. [2022-04-28 02:08:55,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-28 02:08:55,387 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-28 02:08:55,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-28 02:08:55,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:08:55,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 143 transitions. [2022-04-28 02:08:55,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:08:55,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 143 transitions. [2022-04-28 02:08:55,389 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 143 transitions. [2022-04-28 02:08:55,482 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 143 edges. 143 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:09:31,274 INFO L225 Difference]: With dead ends: 35853 [2022-04-28 02:09:31,274 INFO L226 Difference]: Without dead ends: 35851 [2022-04-28 02:09:31,278 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-28 02:09:31,279 INFO L413 NwaCegarLoop]: 86 mSDtfsCounter, 173 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 173 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-28 02:09:31,279 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [173 Valid, 93 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-28 02:09:31,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35851 states. [2022-04-28 02:09:31,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35851 to 30729. [2022-04-28 02:09:31,622 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-28 02:09:31,657 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:09:31,690 INFO L74 IsIncluded]: Start isIncluded. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:09:31,724 INFO L87 Difference]: Start difference. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:11:40,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:11:40,038 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-28 02:11:40,038 INFO L276 IsEmpty]: Start isEmpty. Operand 35851 states and 50696 transitions. [2022-04-28 02:11:40,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:11:40,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:11:40,153 INFO L74 IsIncluded]: Start isIncluded. First operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35851 states. [2022-04-28 02:11:40,184 INFO L87 Difference]: Start difference. First operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35851 states. [2022-04-28 02:14:06,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-28 02:14:06,259 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-28 02:14:06,259 INFO L276 IsEmpty]: Start isEmpty. Operand 35851 states and 50696 transitions. [2022-04-28 02:14:06,295 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-28 02:14:06,296 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-28 02:14:06,296 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-28 02:14:06,296 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-28 02:14:06,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:14:31,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30729 states to 30729 states and 41479 transitions. [2022-04-28 02:14:31,699 INFO L78 Accepts]: Start accepts. Automaton has 30729 states and 41479 transitions. Word has length 34 [2022-04-28 02:14:31,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-28 02:14:31,700 INFO L495 AbstractCegarLoop]: Abstraction has 30729 states and 41479 transitions. [2022-04-28 02:14:31,700 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:14:31,700 INFO L276 IsEmpty]: Start isEmpty. Operand 30729 states and 41479 transitions. [2022-04-28 02:14:31,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-28 02:14:31,718 INFO L187 NwaCegarLoop]: Found error trace [2022-04-28 02:14:31,718 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-28 02:14:31,718 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2022-04-28 02:14:31,718 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-28 02:14:31,718 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-28 02:14:31,719 INFO L85 PathProgramCache]: Analyzing trace with hash 1042791590, now seen corresponding path program 1 times [2022-04-28 02:14:31,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-28 02:14:31,719 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829053428] [2022-04-28 02:14:31,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-28 02:14:31,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-28 02:14:31,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:14:31,763 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-28 02:14:31,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-28 02:14:31,771 INFO L290 TraceCheckUtils]: 0: Hoare triple {675918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {675912#true} is VALID [2022-04-28 02:14:31,771 INFO L290 TraceCheckUtils]: 1: Hoare triple {675912#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,771 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {675912#true} {675912#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,772 INFO L272 TraceCheckUtils]: 0: Hoare triple {675912#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {675918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-28 02:14:31,772 INFO L290 TraceCheckUtils]: 1: Hoare triple {675918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {675912#true} is VALID [2022-04-28 02:14:31,772 INFO L290 TraceCheckUtils]: 2: Hoare triple {675912#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,772 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {675912#true} {675912#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,772 INFO L272 TraceCheckUtils]: 4: Hoare triple {675912#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,772 INFO L290 TraceCheckUtils]: 5: Hoare triple {675912#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {675912#true} is VALID [2022-04-28 02:14:31,772 INFO L290 TraceCheckUtils]: 6: Hoare triple {675912#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {675912#true} is VALID [2022-04-28 02:14:31,772 INFO L290 TraceCheckUtils]: 7: Hoare triple {675912#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {675912#true} is VALID [2022-04-28 02:14:31,773 INFO L290 TraceCheckUtils]: 8: Hoare triple {675912#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,773 INFO L290 TraceCheckUtils]: 9: Hoare triple {675912#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,773 INFO L290 TraceCheckUtils]: 10: Hoare triple {675912#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,773 INFO L290 TraceCheckUtils]: 11: Hoare triple {675912#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,773 INFO L290 TraceCheckUtils]: 12: Hoare triple {675912#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,773 INFO L290 TraceCheckUtils]: 13: Hoare triple {675912#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,773 INFO L290 TraceCheckUtils]: 14: Hoare triple {675912#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,773 INFO L290 TraceCheckUtils]: 15: Hoare triple {675912#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,773 INFO L290 TraceCheckUtils]: 16: Hoare triple {675912#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {675912#true} is VALID [2022-04-28 02:14:31,774 INFO L290 TraceCheckUtils]: 17: Hoare triple {675912#true} [303] L120-1-->L124-1: Formula: (= v_main_~p10~0_4 0) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,774 INFO L290 TraceCheckUtils]: 18: Hoare triple {675917#(= main_~p10~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,774 INFO L290 TraceCheckUtils]: 19: Hoare triple {675917#(= main_~p10~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,775 INFO L290 TraceCheckUtils]: 20: Hoare triple {675917#(= main_~p10~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,775 INFO L290 TraceCheckUtils]: 21: Hoare triple {675917#(= main_~p10~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,775 INFO L290 TraceCheckUtils]: 22: Hoare triple {675917#(= main_~p10~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,776 INFO L290 TraceCheckUtils]: 23: Hoare triple {675917#(= main_~p10~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,776 INFO L290 TraceCheckUtils]: 24: Hoare triple {675917#(= main_~p10~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,776 INFO L290 TraceCheckUtils]: 25: Hoare triple {675917#(= main_~p10~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,777 INFO L290 TraceCheckUtils]: 26: Hoare triple {675917#(= main_~p10~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,777 INFO L290 TraceCheckUtils]: 27: Hoare triple {675917#(= main_~p10~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,777 INFO L290 TraceCheckUtils]: 28: Hoare triple {675917#(= main_~p10~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,777 INFO L290 TraceCheckUtils]: 29: Hoare triple {675917#(= main_~p10~0 0)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,778 INFO L290 TraceCheckUtils]: 30: Hoare triple {675917#(= main_~p10~0 0)} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {675917#(= main_~p10~0 0)} is VALID [2022-04-28 02:14:31,778 INFO L290 TraceCheckUtils]: 31: Hoare triple {675917#(= main_~p10~0 0)} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {675913#false} is VALID [2022-04-28 02:14:31,778 INFO L290 TraceCheckUtils]: 32: Hoare triple {675913#false} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {675913#false} is VALID [2022-04-28 02:14:31,778 INFO L290 TraceCheckUtils]: 33: Hoare triple {675913#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {675913#false} is VALID [2022-04-28 02:14:31,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-28 02:14:31,778 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-28 02:14:31,779 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829053428] [2022-04-28 02:14:31,779 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [829053428] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-28 02:14:31,779 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-28 02:14:31,779 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-28 02:14:31,779 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [110823388] [2022-04-28 02:14:31,779 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-28 02:14:31,779 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-28 02:14:31,779 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-28 02:14:31,779 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-28 02:14:31,802 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-28 02:14:31,803 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-28 02:14:31,803 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-28 02:14:31,803 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-28 02:14:31,803 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-28 02:14:31,803 INFO L87 Difference]: Start difference. First operand 30729 states and 41479 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)