/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/discover_list.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 11:05:46,022 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 11:05:46,024 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 11:05:46,071 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 11:05:46,072 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 11:05:46,073 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 11:05:46,077 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 11:05:46,081 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 11:05:46,083 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 11:05:46,087 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 11:05:46,088 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 11:05:46,089 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 11:05:46,089 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 11:05:46,089 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 11:05:46,090 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 11:05:46,091 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 11:05:46,091 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 11:05:46,092 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 11:05:46,093 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 11:05:46,094 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 11:05:46,095 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 11:05:46,098 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 11:05:46,099 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 11:05:46,100 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 11:05:46,101 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 11:05:46,112 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-04-27 11:05:46,113 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-04-27 11:05:46,113 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-04-27 11:05:46,114 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-04-27 11:05:46,114 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-04-27 11:05:46,115 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-04-27 11:05:46,116 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-04-27 11:05:46,117 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-04-27 11:05:46,118 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-04-27 11:05:46,118 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-04-27 11:05:46,119 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-04-27 11:05:46,119 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-04-27 11:05:46,119 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-04-27 11:05:46,120 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-04-27 11:05:46,120 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 11:05:46,120 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 11:05:46,123 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 11:05:46,123 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2022-04-27 11:05:46,152 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 11:05:46,153 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 11:05:46,153 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-04-27 11:05:46,153 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-04-27 11:05:46,154 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 11:05:46,154 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 11:05:46,154 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 11:05:46,155 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 11:05:46,155 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 11:05:46,155 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 11:05:46,156 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 11:05:46,156 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 11:05:46,156 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 11:05:46,156 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 11:05:46,156 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 11:05:46,156 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 11:05:46,156 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 11:05:46,157 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 11:05:46,157 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 11:05:46,157 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 11:05:46,157 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 11:05:46,158 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 11:05:46,158 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 11:05:46,158 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 11:05:46,159 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 11:05:46,159 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 11:05:46,159 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 11:05:46,159 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 11:05:46,159 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 11:05:46,159 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 11:05:46,160 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-04-27 11:05:46,160 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-04-27 11:05:46,160 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 11:05:46,160 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 11:05:46,385 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 11:05:46,404 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 11:05:46,406 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 11:05:46,407 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 11:05:46,409 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 11:05:46,410 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/discover_list.c [2022-04-27 11:05:46,469 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13121bbc1/76bb012ed0254b8aacb2a92cbfe5f6f6/FLAGb0cf9b0eb [2022-04-27 11:05:46,827 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 11:05:46,828 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c [2022-04-27 11:05:46,836 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13121bbc1/76bb012ed0254b8aacb2a92cbfe5f6f6/FLAGb0cf9b0eb [2022-04-27 11:05:47,227 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13121bbc1/76bb012ed0254b8aacb2a92cbfe5f6f6 [2022-04-27 11:05:47,229 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 11:05:47,230 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-27 11:05:47,232 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 11:05:47,232 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 11:05:47,237 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 11:05:47,238 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 11:05:47" (1/1) ... [2022-04-27 11:05:47,239 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5dd2afc1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47, skipping insertion in model container [2022-04-27 11:05:47,240 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 11:05:47" (1/1) ... [2022-04-27 11:05:47,245 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 11:05:47,288 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 11:05:47,447 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c[4997,5010] [2022-04-27 11:05:47,531 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 11:05:47,543 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 11:05:47,565 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/discover_list.c[4997,5010] [2022-04-27 11:05:47,657 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 11:05:47,678 INFO L208 MainTranslator]: Completed translation [2022-04-27 11:05:47,678 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47 WrapperNode [2022-04-27 11:05:47,678 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 11:05:47,679 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 11:05:47,679 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 11:05:47,680 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 11:05:47,689 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47" (1/1) ... [2022-04-27 11:05:47,689 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47" (1/1) ... [2022-04-27 11:05:47,713 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47" (1/1) ... [2022-04-27 11:05:47,713 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47" (1/1) ... [2022-04-27 11:05:47,803 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47" (1/1) ... [2022-04-27 11:05:47,814 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47" (1/1) ... [2022-04-27 11:05:47,818 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47" (1/1) ... [2022-04-27 11:05:47,825 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 11:05:47,826 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 11:05:47,827 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 11:05:47,827 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 11:05:47,828 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47" (1/1) ... [2022-04-27 11:05:47,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 11:05:47,844 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 11:05:47,860 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 11:05:47,862 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 11:05:47,890 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 11:05:47,890 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 11:05:47,890 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 11:05:47,890 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 11:05:47,890 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_func_def_resp_len [2022-04-27 11:05:47,891 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_is_naa5 [2022-04-27 11:05:47,891 INFO L138 BoogieDeclarations]: Found implementation of procedure dStrHex [2022-04-27 11:05:47,891 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_num [2022-04-27 11:05:47,891 INFO L138 BoogieDeclarations]: Found implementation of procedure smp_get_llnum [2022-04-27 11:05:47,891 INFO L138 BoogieDeclarations]: Found implementation of procedure do_discover_list [2022-04-27 11:05:47,891 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 11:05:47,891 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-04-27 11:05:47,891 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 11:05:47,892 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 11:05:47,892 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 11:05:47,892 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 11:05:47,892 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-27 11:05:47,892 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-27 11:05:47,892 INFO L130 BoogieDeclarations]: Found specification of procedure fopen [2022-04-27 11:05:47,892 INFO L130 BoogieDeclarations]: Found specification of procedure sscanf [2022-04-27 11:05:47,892 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2022-04-27 11:05:47,893 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2022-04-27 11:05:47,893 INFO L130 BoogieDeclarations]: Found specification of procedure strcmp [2022-04-27 11:05:47,893 INFO L130 BoogieDeclarations]: Found specification of procedure strchr [2022-04-27 11:05:47,893 INFO L130 BoogieDeclarations]: Found specification of procedure strlen [2022-04-27 11:05:47,893 INFO L130 BoogieDeclarations]: Found specification of procedure getopt_long [2022-04-27 11:05:47,893 INFO L130 BoogieDeclarations]: Found specification of procedure smp_initiator_open [2022-04-27 11:05:47,893 INFO L130 BoogieDeclarations]: Found specification of procedure smp_send_req [2022-04-27 11:05:47,893 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_func_def_resp_len [2022-04-27 11:05:47,894 INFO L130 BoogieDeclarations]: Found specification of procedure smp_is_naa5 [2022-04-27 11:05:47,894 INFO L130 BoogieDeclarations]: Found specification of procedure dStrHex [2022-04-27 11:05:47,894 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_num [2022-04-27 11:05:47,894 INFO L130 BoogieDeclarations]: Found specification of procedure smp_get_llnum [2022-04-27 11:05:47,894 INFO L130 BoogieDeclarations]: Found specification of procedure do_discover_list [2022-04-27 11:05:47,894 INFO L130 BoogieDeclarations]: Found specification of procedure main6 [2022-04-27 11:05:47,894 INFO L130 BoogieDeclarations]: Found specification of procedure sprintf [2022-04-27 11:05:47,895 INFO L130 BoogieDeclarations]: Found specification of procedure toupper [2022-04-27 11:05:47,895 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 11:05:47,895 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 11:05:47,895 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-27 11:05:47,895 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 11:05:47,895 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-04-27 11:05:47,895 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 11:05:47,896 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 11:05:47,896 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 11:05:47,896 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-27 11:05:47,896 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 11:05:47,896 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 11:05:48,026 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 11:05:48,028 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 11:05:48,914 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 11:05:48,922 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 11:05:48,923 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-27 11:05:48,924 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 11:05:48 BoogieIcfgContainer [2022-04-27 11:05:48,924 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 11:05:48,926 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 11:05:48,926 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 11:05:48,929 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 11:05:48,929 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 11:05:47" (1/3) ... [2022-04-27 11:05:48,930 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72e8bbd1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 11:05:48, skipping insertion in model container [2022-04-27 11:05:48,930 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 11:05:47" (2/3) ... [2022-04-27 11:05:48,931 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@72e8bbd1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 11:05:48, skipping insertion in model container [2022-04-27 11:05:48,931 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 11:05:48" (3/3) ... [2022-04-27 11:05:48,933 INFO L111 eAbstractionObserver]: Analyzing ICFG discover_list.c [2022-04-27 11:05:48,945 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 11:05:48,945 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 11:05:48,998 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 11:05:49,003 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@6357b7, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@2863a2e4 [2022-04-27 11:05:49,004 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 11:05:49,011 INFO L276 IsEmpty]: Start isEmpty. Operand has 91 states, 69 states have (on average 1.4927536231884058) internal successors, (103), 71 states have internal predecessors, (103), 13 states have call successors, (13), 7 states have call predecessors, (13), 7 states have return successors, (13), 13 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-27 11:05:49,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-27 11:05:49,019 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 11:05:49,019 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 11:05:49,020 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 11:05:49,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 11:05:49,024 INFO L85 PathProgramCache]: Analyzing trace with hash 467458188, now seen corresponding path program 1 times [2022-04-27 11:05:49,032 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 11:05:49,032 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349633761] [2022-04-27 11:05:49,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 11:05:49,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 11:05:49,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:49,361 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 11:05:49,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:49,393 INFO L290 TraceCheckUtils]: 0: Hoare triple {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {94#true} is VALID [2022-04-27 11:05:49,393 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume true; {94#true} is VALID [2022-04-27 11:05:49,394 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {94#true} {94#true} #682#return; {94#true} is VALID [2022-04-27 11:05:49,404 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 11:05:49,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:49,412 INFO L290 TraceCheckUtils]: 0: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-27 11:05:49,412 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-27 11:05:49,413 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-27 11:05:49,413 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {95#false} #672#return; {95#false} is VALID [2022-04-27 11:05:49,413 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-04-27 11:05:49,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:49,420 INFO L290 TraceCheckUtils]: 0: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-27 11:05:49,421 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-27 11:05:49,421 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-27 11:05:49,421 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {95#false} #656#return; {95#false} is VALID [2022-04-27 11:05:49,422 INFO L272 TraceCheckUtils]: 0: Hoare triple {94#true} call ULTIMATE.init(); {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 11:05:49,422 INFO L290 TraceCheckUtils]: 1: Hoare triple {108#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {94#true} is VALID [2022-04-27 11:05:49,423 INFO L290 TraceCheckUtils]: 2: Hoare triple {94#true} assume true; {94#true} is VALID [2022-04-27 11:05:49,423 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94#true} {94#true} #682#return; {94#true} is VALID [2022-04-27 11:05:49,423 INFO L272 TraceCheckUtils]: 4: Hoare triple {94#true} call #t~ret187 := main(); {94#true} is VALID [2022-04-27 11:05:49,423 INFO L290 TraceCheckUtils]: 5: Hoare triple {94#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {94#true} is VALID [2022-04-27 11:05:49,423 INFO L272 TraceCheckUtils]: 6: Hoare triple {94#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {94#true} is VALID [2022-04-27 11:05:49,424 INFO L290 TraceCheckUtils]: 7: Hoare triple {94#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {94#true} is VALID [2022-04-27 11:05:49,424 INFO L290 TraceCheckUtils]: 8: Hoare triple {94#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {94#true} is VALID [2022-04-27 11:05:49,424 INFO L290 TraceCheckUtils]: 9: Hoare triple {94#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {94#true} is VALID [2022-04-27 11:05:49,425 INFO L290 TraceCheckUtils]: 10: Hoare triple {94#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} is VALID [2022-04-27 11:05:49,425 INFO L290 TraceCheckUtils]: 11: Hoare triple {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} is VALID [2022-04-27 11:05:49,427 INFO L290 TraceCheckUtils]: 12: Hoare triple {99#(= (+ do_discover_list_~mnum_desc~0 (- 8)) 0)} assume 1 == #t~mem153 && ~mnum_desc~0 > 40;havoc #t~mem153;~mnum_desc~0 := 40; {95#false} is VALID [2022-04-27 11:05:49,427 INFO L290 TraceCheckUtils]: 13: Hoare triple {95#false} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {95#false} is VALID [2022-04-27 11:05:49,427 INFO L290 TraceCheckUtils]: 14: Hoare triple {95#false} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {95#false} is VALID [2022-04-27 11:05:49,427 INFO L290 TraceCheckUtils]: 15: Hoare triple {95#false} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {95#false} is VALID [2022-04-27 11:05:49,428 INFO L272 TraceCheckUtils]: 16: Hoare triple {95#false} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {109#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:05:49,428 INFO L290 TraceCheckUtils]: 17: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-27 11:05:49,428 INFO L290 TraceCheckUtils]: 18: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-27 11:05:49,428 INFO L290 TraceCheckUtils]: 19: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-27 11:05:49,428 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {94#true} {95#false} #672#return; {95#false} is VALID [2022-04-27 11:05:49,428 INFO L290 TraceCheckUtils]: 21: Hoare triple {95#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {95#false} is VALID [2022-04-27 11:05:49,429 INFO L290 TraceCheckUtils]: 22: Hoare triple {95#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {95#false} is VALID [2022-04-27 11:05:49,429 INFO L290 TraceCheckUtils]: 23: Hoare triple {95#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {95#false} is VALID [2022-04-27 11:05:49,429 INFO L290 TraceCheckUtils]: 24: Hoare triple {95#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {95#false} is VALID [2022-04-27 11:05:49,429 INFO L290 TraceCheckUtils]: 25: Hoare triple {95#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {95#false} is VALID [2022-04-27 11:05:49,429 INFO L290 TraceCheckUtils]: 26: Hoare triple {95#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {95#false} is VALID [2022-04-27 11:05:49,430 INFO L290 TraceCheckUtils]: 27: Hoare triple {95#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {95#false} is VALID [2022-04-27 11:05:49,430 INFO L290 TraceCheckUtils]: 28: Hoare triple {95#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {95#false} is VALID [2022-04-27 11:05:49,430 INFO L290 TraceCheckUtils]: 29: Hoare triple {95#false} assume #t~short172; {95#false} is VALID [2022-04-27 11:05:49,430 INFO L290 TraceCheckUtils]: 30: Hoare triple {95#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {95#false} is VALID [2022-04-27 11:05:49,430 INFO L290 TraceCheckUtils]: 31: Hoare triple {95#false} assume 0 != #t~mem173;havoc #t~mem173; {95#false} is VALID [2022-04-27 11:05:49,431 INFO L272 TraceCheckUtils]: 32: Hoare triple {95#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {95#false} is VALID [2022-04-27 11:05:49,431 INFO L290 TraceCheckUtils]: 33: Hoare triple {95#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {95#false} is VALID [2022-04-27 11:05:49,431 INFO L290 TraceCheckUtils]: 34: Hoare triple {95#false} assume !(~len <= 0); {95#false} is VALID [2022-04-27 11:05:49,431 INFO L272 TraceCheckUtils]: 35: Hoare triple {95#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {109#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:05:49,431 INFO L290 TraceCheckUtils]: 36: Hoare triple {109#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {94#true} is VALID [2022-04-27 11:05:49,432 INFO L290 TraceCheckUtils]: 37: Hoare triple {94#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {94#true} is VALID [2022-04-27 11:05:49,432 INFO L290 TraceCheckUtils]: 38: Hoare triple {94#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {94#true} is VALID [2022-04-27 11:05:49,432 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {94#true} {95#false} #656#return; {95#false} is VALID [2022-04-27 11:05:49,432 INFO L290 TraceCheckUtils]: 40: Hoare triple {95#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {95#false} is VALID [2022-04-27 11:05:49,432 INFO L290 TraceCheckUtils]: 41: Hoare triple {95#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {95#false} is VALID [2022-04-27 11:05:49,433 INFO L272 TraceCheckUtils]: 42: Hoare triple {95#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {95#false} is VALID [2022-04-27 11:05:49,433 INFO L290 TraceCheckUtils]: 43: Hoare triple {95#false} ~cond := #in~cond; {95#false} is VALID [2022-04-27 11:05:49,433 INFO L290 TraceCheckUtils]: 44: Hoare triple {95#false} assume 0 == ~cond; {95#false} is VALID [2022-04-27 11:05:49,433 INFO L290 TraceCheckUtils]: 45: Hoare triple {95#false} assume !false; {95#false} is VALID [2022-04-27 11:05:49,434 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 11:05:49,434 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 11:05:49,434 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349633761] [2022-04-27 11:05:49,435 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1349633761] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 11:05:49,435 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 11:05:49,435 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 11:05:49,436 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004886618] [2022-04-27 11:05:49,437 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 11:05:49,444 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-27 11:05:49,446 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 11:05:49,450 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-27 11:05:49,504 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:05:49,505 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 11:05:49,505 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 11:05:49,532 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 11:05:49,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 11:05:49,538 INFO L87 Difference]: Start difference. First operand has 91 states, 69 states have (on average 1.4927536231884058) internal successors, (103), 71 states have internal predecessors, (103), 13 states have call successors, (13), 7 states have call predecessors, (13), 7 states have return successors, (13), 13 states have call predecessors, (13), 13 states have call successors, (13) Second operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-27 11:05:50,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:50,626 INFO L93 Difference]: Finished difference Result 227 states and 347 transitions. [2022-04-27 11:05:50,626 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 11:05:50,626 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-27 11:05:50,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 11:05:50,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-27 11:05:50,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 347 transitions. [2022-04-27 11:05:50,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-27 11:05:50,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 347 transitions. [2022-04-27 11:05:50,663 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 347 transitions. [2022-04-27 11:05:51,020 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 347 edges. 347 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:05:51,031 INFO L225 Difference]: With dead ends: 227 [2022-04-27 11:05:51,031 INFO L226 Difference]: Without dead ends: 103 [2022-04-27 11:05:51,034 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-27 11:05:51,037 INFO L413 NwaCegarLoop]: 109 mSDtfsCounter, 205 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 262 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 210 SdHoareTripleChecker+Valid, 138 SdHoareTripleChecker+Invalid, 317 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 262 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 11:05:51,038 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [210 Valid, 138 Invalid, 317 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 262 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-27 11:05:51,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2022-04-27 11:05:51,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 76. [2022-04-27 11:05:51,068 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 11:05:51,069 INFO L82 GeneralOperation]: Start isEquivalent. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:51,070 INFO L74 IsIncluded]: Start isIncluded. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:51,071 INFO L87 Difference]: Start difference. First operand 103 states. Second operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:51,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:51,077 INFO L93 Difference]: Finished difference Result 103 states and 139 transitions. [2022-04-27 11:05:51,077 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 139 transitions. [2022-04-27 11:05:51,079 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:05:51,079 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:05:51,080 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 103 states. [2022-04-27 11:05:51,080 INFO L87 Difference]: Start difference. First operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 103 states. [2022-04-27 11:05:51,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:51,086 INFO L93 Difference]: Finished difference Result 103 states and 139 transitions. [2022-04-27 11:05:51,086 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 139 transitions. [2022-04-27 11:05:51,087 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:05:51,087 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:05:51,087 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 11:05:51,087 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 11:05:51,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 58 states have (on average 1.293103448275862) internal successors, (75), 58 states have internal predecessors, (75), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:51,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 98 transitions. [2022-04-27 11:05:51,092 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 98 transitions. Word has length 46 [2022-04-27 11:05:51,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 11:05:51,092 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 98 transitions. [2022-04-27 11:05:51,092 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 3 states have internal predecessors, (33), 2 states have call successors, (7), 4 states have call predecessors, (7), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-27 11:05:51,093 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 98 transitions. [2022-04-27 11:05:51,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-27 11:05:51,094 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 11:05:51,094 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 11:05:51,094 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 11:05:51,094 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 11:05:51,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 11:05:51,095 INFO L85 PathProgramCache]: Analyzing trace with hash -1776525110, now seen corresponding path program 1 times [2022-04-27 11:05:51,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 11:05:51,096 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724003342] [2022-04-27 11:05:51,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 11:05:51,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 11:05:51,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:51,262 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 11:05:51,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:51,279 INFO L290 TraceCheckUtils]: 0: Hoare triple {708#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {695#true} is VALID [2022-04-27 11:05:51,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {695#true} assume true; {695#true} is VALID [2022-04-27 11:05:51,280 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {695#true} {695#true} #682#return; {695#true} is VALID [2022-04-27 11:05:51,283 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 11:05:51,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:51,347 INFO L290 TraceCheckUtils]: 0: Hoare triple {709#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {710#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:05:51,348 INFO L290 TraceCheckUtils]: 1: Hoare triple {710#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {711#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:05:51,348 INFO L290 TraceCheckUtils]: 2: Hoare triple {711#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {711#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:05:51,349 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {711#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} {695#true} #672#return; {696#false} is VALID [2022-04-27 11:05:51,350 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 35 [2022-04-27 11:05:51,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:51,364 INFO L290 TraceCheckUtils]: 0: Hoare triple {709#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {695#true} is VALID [2022-04-27 11:05:51,364 INFO L290 TraceCheckUtils]: 1: Hoare triple {695#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {695#true} is VALID [2022-04-27 11:05:51,364 INFO L290 TraceCheckUtils]: 2: Hoare triple {695#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {695#true} is VALID [2022-04-27 11:05:51,365 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {695#true} {696#false} #656#return; {696#false} is VALID [2022-04-27 11:05:51,366 INFO L272 TraceCheckUtils]: 0: Hoare triple {695#true} call ULTIMATE.init(); {708#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 11:05:51,366 INFO L290 TraceCheckUtils]: 1: Hoare triple {708#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {695#true} is VALID [2022-04-27 11:05:51,366 INFO L290 TraceCheckUtils]: 2: Hoare triple {695#true} assume true; {695#true} is VALID [2022-04-27 11:05:51,366 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {695#true} {695#true} #682#return; {695#true} is VALID [2022-04-27 11:05:51,366 INFO L272 TraceCheckUtils]: 4: Hoare triple {695#true} call #t~ret187 := main(); {695#true} is VALID [2022-04-27 11:05:51,369 INFO L290 TraceCheckUtils]: 5: Hoare triple {695#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {695#true} is VALID [2022-04-27 11:05:51,369 INFO L272 TraceCheckUtils]: 6: Hoare triple {695#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {695#true} is VALID [2022-04-27 11:05:51,370 INFO L290 TraceCheckUtils]: 7: Hoare triple {695#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {695#true} is VALID [2022-04-27 11:05:51,370 INFO L290 TraceCheckUtils]: 8: Hoare triple {695#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {695#true} is VALID [2022-04-27 11:05:51,370 INFO L290 TraceCheckUtils]: 9: Hoare triple {695#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {695#true} is VALID [2022-04-27 11:05:51,370 INFO L290 TraceCheckUtils]: 10: Hoare triple {695#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {695#true} is VALID [2022-04-27 11:05:51,370 INFO L290 TraceCheckUtils]: 11: Hoare triple {695#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {695#true} is VALID [2022-04-27 11:05:51,371 INFO L290 TraceCheckUtils]: 12: Hoare triple {695#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {695#true} is VALID [2022-04-27 11:05:51,371 INFO L290 TraceCheckUtils]: 13: Hoare triple {695#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {695#true} is VALID [2022-04-27 11:05:51,371 INFO L290 TraceCheckUtils]: 14: Hoare triple {695#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {695#true} is VALID [2022-04-27 11:05:51,371 INFO L290 TraceCheckUtils]: 15: Hoare triple {695#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {695#true} is VALID [2022-04-27 11:05:51,377 INFO L272 TraceCheckUtils]: 16: Hoare triple {695#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {709#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:05:51,377 INFO L290 TraceCheckUtils]: 17: Hoare triple {709#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {710#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:05:51,378 INFO L290 TraceCheckUtils]: 18: Hoare triple {710#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {711#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:05:51,379 INFO L290 TraceCheckUtils]: 19: Hoare triple {711#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {711#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:05:51,380 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {711#(or (<= |#Ultimate.C_memset_#amount| 0) (< 0 (div |#Ultimate.C_memset_#amount| 4294967296)))} {695#true} #672#return; {696#false} is VALID [2022-04-27 11:05:51,380 INFO L290 TraceCheckUtils]: 21: Hoare triple {696#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {696#false} is VALID [2022-04-27 11:05:51,380 INFO L290 TraceCheckUtils]: 22: Hoare triple {696#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {696#false} is VALID [2022-04-27 11:05:51,381 INFO L290 TraceCheckUtils]: 23: Hoare triple {696#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {696#false} is VALID [2022-04-27 11:05:51,381 INFO L290 TraceCheckUtils]: 24: Hoare triple {696#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {696#false} is VALID [2022-04-27 11:05:51,382 INFO L290 TraceCheckUtils]: 25: Hoare triple {696#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {696#false} is VALID [2022-04-27 11:05:51,383 INFO L290 TraceCheckUtils]: 26: Hoare triple {696#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {696#false} is VALID [2022-04-27 11:05:51,383 INFO L290 TraceCheckUtils]: 27: Hoare triple {696#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {696#false} is VALID [2022-04-27 11:05:51,383 INFO L290 TraceCheckUtils]: 28: Hoare triple {696#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {696#false} is VALID [2022-04-27 11:05:51,383 INFO L290 TraceCheckUtils]: 29: Hoare triple {696#false} assume #t~short172; {696#false} is VALID [2022-04-27 11:05:51,383 INFO L290 TraceCheckUtils]: 30: Hoare triple {696#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {696#false} is VALID [2022-04-27 11:05:51,383 INFO L290 TraceCheckUtils]: 31: Hoare triple {696#false} assume 0 != #t~mem173;havoc #t~mem173; {696#false} is VALID [2022-04-27 11:05:51,384 INFO L272 TraceCheckUtils]: 32: Hoare triple {696#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {696#false} is VALID [2022-04-27 11:05:51,384 INFO L290 TraceCheckUtils]: 33: Hoare triple {696#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {696#false} is VALID [2022-04-27 11:05:51,384 INFO L290 TraceCheckUtils]: 34: Hoare triple {696#false} assume !(~len <= 0); {696#false} is VALID [2022-04-27 11:05:51,384 INFO L272 TraceCheckUtils]: 35: Hoare triple {696#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {709#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:05:51,384 INFO L290 TraceCheckUtils]: 36: Hoare triple {709#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {695#true} is VALID [2022-04-27 11:05:51,385 INFO L290 TraceCheckUtils]: 37: Hoare triple {695#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {695#true} is VALID [2022-04-27 11:05:51,385 INFO L290 TraceCheckUtils]: 38: Hoare triple {695#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {695#true} is VALID [2022-04-27 11:05:51,385 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {695#true} {696#false} #656#return; {696#false} is VALID [2022-04-27 11:05:51,385 INFO L290 TraceCheckUtils]: 40: Hoare triple {696#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {696#false} is VALID [2022-04-27 11:05:51,385 INFO L290 TraceCheckUtils]: 41: Hoare triple {696#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {696#false} is VALID [2022-04-27 11:05:51,386 INFO L272 TraceCheckUtils]: 42: Hoare triple {696#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {696#false} is VALID [2022-04-27 11:05:51,387 INFO L290 TraceCheckUtils]: 43: Hoare triple {696#false} ~cond := #in~cond; {696#false} is VALID [2022-04-27 11:05:51,387 INFO L290 TraceCheckUtils]: 44: Hoare triple {696#false} assume 0 == ~cond; {696#false} is VALID [2022-04-27 11:05:51,387 INFO L290 TraceCheckUtils]: 45: Hoare triple {696#false} assume !false; {696#false} is VALID [2022-04-27 11:05:51,389 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 11:05:51,390 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 11:05:51,391 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1724003342] [2022-04-27 11:05:51,391 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1724003342] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 11:05:51,391 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1045028427] [2022-04-27 11:05:51,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 11:05:51,392 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 11:05:51,392 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 11:05:51,394 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 11:05:51,399 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 11:05:51,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:51,596 INFO L263 TraceCheckSpWp]: Trace formula consists of 681 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 11:05:51,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:51,629 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 11:05:52,052 INFO L272 TraceCheckUtils]: 0: Hoare triple {695#true} call ULTIMATE.init(); {695#true} is VALID [2022-04-27 11:05:52,052 INFO L290 TraceCheckUtils]: 1: Hoare triple {695#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {695#true} is VALID [2022-04-27 11:05:52,052 INFO L290 TraceCheckUtils]: 2: Hoare triple {695#true} assume true; {695#true} is VALID [2022-04-27 11:05:52,052 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {695#true} {695#true} #682#return; {695#true} is VALID [2022-04-27 11:05:52,053 INFO L272 TraceCheckUtils]: 4: Hoare triple {695#true} call #t~ret187 := main(); {695#true} is VALID [2022-04-27 11:05:52,053 INFO L290 TraceCheckUtils]: 5: Hoare triple {695#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {695#true} is VALID [2022-04-27 11:05:52,053 INFO L272 TraceCheckUtils]: 6: Hoare triple {695#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {695#true} is VALID [2022-04-27 11:05:52,053 INFO L290 TraceCheckUtils]: 7: Hoare triple {695#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {695#true} is VALID [2022-04-27 11:05:52,053 INFO L290 TraceCheckUtils]: 8: Hoare triple {695#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {695#true} is VALID [2022-04-27 11:05:52,053 INFO L290 TraceCheckUtils]: 9: Hoare triple {695#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {695#true} is VALID [2022-04-27 11:05:52,054 INFO L290 TraceCheckUtils]: 10: Hoare triple {695#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {695#true} is VALID [2022-04-27 11:05:52,054 INFO L290 TraceCheckUtils]: 11: Hoare triple {695#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {695#true} is VALID [2022-04-27 11:05:52,054 INFO L290 TraceCheckUtils]: 12: Hoare triple {695#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {695#true} is VALID [2022-04-27 11:05:52,054 INFO L290 TraceCheckUtils]: 13: Hoare triple {695#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {695#true} is VALID [2022-04-27 11:05:52,054 INFO L290 TraceCheckUtils]: 14: Hoare triple {695#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {695#true} is VALID [2022-04-27 11:05:52,054 INFO L290 TraceCheckUtils]: 15: Hoare triple {695#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {695#true} is VALID [2022-04-27 11:05:52,055 INFO L272 TraceCheckUtils]: 16: Hoare triple {695#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {695#true} is VALID [2022-04-27 11:05:52,055 INFO L290 TraceCheckUtils]: 17: Hoare triple {695#true} #t~loopctr188 := 0; {710#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:05:52,056 INFO L290 TraceCheckUtils]: 18: Hoare triple {710#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {769#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} is VALID [2022-04-27 11:05:52,057 INFO L290 TraceCheckUtils]: 19: Hoare triple {769#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {769#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} is VALID [2022-04-27 11:05:52,058 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {769#(< 0 (+ (div (- (mod |#Ultimate.C_memset_#amount| 4294967296)) 4294967296) 1))} {695#true} #672#return; {696#false} is VALID [2022-04-27 11:05:52,058 INFO L290 TraceCheckUtils]: 21: Hoare triple {696#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {696#false} is VALID [2022-04-27 11:05:52,058 INFO L290 TraceCheckUtils]: 22: Hoare triple {696#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {696#false} is VALID [2022-04-27 11:05:52,058 INFO L290 TraceCheckUtils]: 23: Hoare triple {696#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {696#false} is VALID [2022-04-27 11:05:52,059 INFO L290 TraceCheckUtils]: 24: Hoare triple {696#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {696#false} is VALID [2022-04-27 11:05:52,059 INFO L290 TraceCheckUtils]: 25: Hoare triple {696#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {696#false} is VALID [2022-04-27 11:05:52,059 INFO L290 TraceCheckUtils]: 26: Hoare triple {696#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {696#false} is VALID [2022-04-27 11:05:52,059 INFO L290 TraceCheckUtils]: 27: Hoare triple {696#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {696#false} is VALID [2022-04-27 11:05:52,059 INFO L290 TraceCheckUtils]: 28: Hoare triple {696#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {696#false} is VALID [2022-04-27 11:05:52,059 INFO L290 TraceCheckUtils]: 29: Hoare triple {696#false} assume #t~short172; {696#false} is VALID [2022-04-27 11:05:52,060 INFO L290 TraceCheckUtils]: 30: Hoare triple {696#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {696#false} is VALID [2022-04-27 11:05:52,060 INFO L290 TraceCheckUtils]: 31: Hoare triple {696#false} assume 0 != #t~mem173;havoc #t~mem173; {696#false} is VALID [2022-04-27 11:05:52,060 INFO L272 TraceCheckUtils]: 32: Hoare triple {696#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {696#false} is VALID [2022-04-27 11:05:52,060 INFO L290 TraceCheckUtils]: 33: Hoare triple {696#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {696#false} is VALID [2022-04-27 11:05:52,060 INFO L290 TraceCheckUtils]: 34: Hoare triple {696#false} assume !(~len <= 0); {696#false} is VALID [2022-04-27 11:05:52,060 INFO L272 TraceCheckUtils]: 35: Hoare triple {696#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {696#false} is VALID [2022-04-27 11:05:52,060 INFO L290 TraceCheckUtils]: 36: Hoare triple {696#false} #t~loopctr188 := 0; {696#false} is VALID [2022-04-27 11:05:52,061 INFO L290 TraceCheckUtils]: 37: Hoare triple {696#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {696#false} is VALID [2022-04-27 11:05:52,061 INFO L290 TraceCheckUtils]: 38: Hoare triple {696#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {696#false} is VALID [2022-04-27 11:05:52,061 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {696#false} {696#false} #656#return; {696#false} is VALID [2022-04-27 11:05:52,061 INFO L290 TraceCheckUtils]: 40: Hoare triple {696#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {696#false} is VALID [2022-04-27 11:05:52,061 INFO L290 TraceCheckUtils]: 41: Hoare triple {696#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {696#false} is VALID [2022-04-27 11:05:52,061 INFO L272 TraceCheckUtils]: 42: Hoare triple {696#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {696#false} is VALID [2022-04-27 11:05:52,061 INFO L290 TraceCheckUtils]: 43: Hoare triple {696#false} ~cond := #in~cond; {696#false} is VALID [2022-04-27 11:05:52,062 INFO L290 TraceCheckUtils]: 44: Hoare triple {696#false} assume 0 == ~cond; {696#false} is VALID [2022-04-27 11:05:52,062 INFO L290 TraceCheckUtils]: 45: Hoare triple {696#false} assume !false; {696#false} is VALID [2022-04-27 11:05:52,062 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 11:05:52,062 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 11:05:52,062 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1045028427] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 11:05:52,063 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 11:05:52,063 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2022-04-27 11:05:52,067 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1352452112] [2022-04-27 11:05:52,067 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 11:05:52,068 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-27 11:05:52,069 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 11:05:52,069 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-27 11:05:52,114 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:05:52,115 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 11:05:52,115 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 11:05:52,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 11:05:52,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-04-27 11:05:52,116 INFO L87 Difference]: Start difference. First operand 76 states and 98 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-27 11:05:52,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:52,381 INFO L93 Difference]: Finished difference Result 136 states and 178 transitions. [2022-04-27 11:05:52,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 11:05:52,381 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 46 [2022-04-27 11:05:52,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 11:05:52,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-27 11:05:52,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-27 11:05:52,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-27 11:05:52,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-27 11:05:52,392 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 176 transitions. [2022-04-27 11:05:52,539 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:05:52,541 INFO L225 Difference]: With dead ends: 136 [2022-04-27 11:05:52,541 INFO L226 Difference]: Without dead ends: 77 [2022-04-27 11:05:52,542 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-27 11:05:52,543 INFO L413 NwaCegarLoop]: 94 mSDtfsCounter, 2 mSDsluCounter, 184 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 278 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 11:05:52,543 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 278 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 11:05:52,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-04-27 11:05:52,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2022-04-27 11:05:52,556 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 11:05:52,557 INFO L82 GeneralOperation]: Start isEquivalent. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:52,558 INFO L74 IsIncluded]: Start isIncluded. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:52,558 INFO L87 Difference]: Start difference. First operand 77 states. Second operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:52,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:52,563 INFO L93 Difference]: Finished difference Result 77 states and 99 transitions. [2022-04-27 11:05:52,563 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-27 11:05:52,564 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:05:52,564 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:05:52,565 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 77 states. [2022-04-27 11:05:52,566 INFO L87 Difference]: Start difference. First operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 77 states. [2022-04-27 11:05:52,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:52,569 INFO L93 Difference]: Finished difference Result 77 states and 99 transitions. [2022-04-27 11:05:52,570 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-27 11:05:52,572 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:05:52,576 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:05:52,576 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 11:05:52,576 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 11:05:52,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 59 states have (on average 1.2881355932203389) internal successors, (76), 59 states have internal predecessors, (76), 13 states have call successors, (13), 7 states have call predecessors, (13), 4 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:52,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 99 transitions. [2022-04-27 11:05:52,580 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 99 transitions. Word has length 46 [2022-04-27 11:05:52,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 11:05:52,581 INFO L495 AbstractCegarLoop]: Abstraction has 77 states and 99 transitions. [2022-04-27 11:05:52,581 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-04-27 11:05:52,581 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 99 transitions. [2022-04-27 11:05:52,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-04-27 11:05:52,584 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 11:05:52,584 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 11:05:52,616 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 11:05:52,799 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 11:05:52,799 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 11:05:52,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 11:05:52,800 INFO L85 PathProgramCache]: Analyzing trace with hash 1831279328, now seen corresponding path program 1 times [2022-04-27 11:05:52,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 11:05:52,800 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10985474] [2022-04-27 11:05:52,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 11:05:52,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 11:05:52,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:52,929 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 11:05:52,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:52,946 INFO L290 TraceCheckUtils]: 0: Hoare triple {1298#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1283#true} is VALID [2022-04-27 11:05:52,946 INFO L290 TraceCheckUtils]: 1: Hoare triple {1283#true} assume true; {1283#true} is VALID [2022-04-27 11:05:52,946 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1283#true} {1283#true} #682#return; {1283#true} is VALID [2022-04-27 11:05:52,949 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 11:05:52,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:53,059 INFO L290 TraceCheckUtils]: 0: Hoare triple {1299#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1300#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:05:53,060 INFO L290 TraceCheckUtils]: 1: Hoare triple {1300#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1301#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} is VALID [2022-04-27 11:05:53,061 INFO L290 TraceCheckUtils]: 2: Hoare triple {1301#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1302#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:05:53,064 INFO L290 TraceCheckUtils]: 3: Hoare triple {1302#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1302#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:05:53,065 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1302#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {1283#true} #672#return; {1284#false} is VALID [2022-04-27 11:05:53,065 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-27 11:05:53,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:53,073 INFO L290 TraceCheckUtils]: 0: Hoare triple {1299#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1283#true} is VALID [2022-04-27 11:05:53,073 INFO L290 TraceCheckUtils]: 1: Hoare triple {1283#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1283#true} is VALID [2022-04-27 11:05:53,073 INFO L290 TraceCheckUtils]: 2: Hoare triple {1283#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1283#true} is VALID [2022-04-27 11:05:53,073 INFO L290 TraceCheckUtils]: 3: Hoare triple {1283#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1283#true} is VALID [2022-04-27 11:05:53,073 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {1283#true} {1284#false} #656#return; {1284#false} is VALID [2022-04-27 11:05:53,074 INFO L272 TraceCheckUtils]: 0: Hoare triple {1283#true} call ULTIMATE.init(); {1298#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 11:05:53,074 INFO L290 TraceCheckUtils]: 1: Hoare triple {1298#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,074 INFO L290 TraceCheckUtils]: 2: Hoare triple {1283#true} assume true; {1283#true} is VALID [2022-04-27 11:05:53,075 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1283#true} {1283#true} #682#return; {1283#true} is VALID [2022-04-27 11:05:53,075 INFO L272 TraceCheckUtils]: 4: Hoare triple {1283#true} call #t~ret187 := main(); {1283#true} is VALID [2022-04-27 11:05:53,075 INFO L290 TraceCheckUtils]: 5: Hoare triple {1283#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1283#true} is VALID [2022-04-27 11:05:53,075 INFO L272 TraceCheckUtils]: 6: Hoare triple {1283#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {1283#true} is VALID [2022-04-27 11:05:53,075 INFO L290 TraceCheckUtils]: 7: Hoare triple {1283#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1283#true} is VALID [2022-04-27 11:05:53,075 INFO L290 TraceCheckUtils]: 8: Hoare triple {1283#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1283#true} is VALID [2022-04-27 11:05:53,075 INFO L290 TraceCheckUtils]: 9: Hoare triple {1283#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,075 INFO L290 TraceCheckUtils]: 10: Hoare triple {1283#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1283#true} is VALID [2022-04-27 11:05:53,076 INFO L290 TraceCheckUtils]: 11: Hoare triple {1283#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,076 INFO L290 TraceCheckUtils]: 12: Hoare triple {1283#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1283#true} is VALID [2022-04-27 11:05:53,076 INFO L290 TraceCheckUtils]: 13: Hoare triple {1283#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,076 INFO L290 TraceCheckUtils]: 14: Hoare triple {1283#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1283#true} is VALID [2022-04-27 11:05:53,076 INFO L290 TraceCheckUtils]: 15: Hoare triple {1283#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1283#true} is VALID [2022-04-27 11:05:53,077 INFO L272 TraceCheckUtils]: 16: Hoare triple {1283#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {1299#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:05:53,077 INFO L290 TraceCheckUtils]: 17: Hoare triple {1299#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1300#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:05:53,079 INFO L290 TraceCheckUtils]: 18: Hoare triple {1300#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1301#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} is VALID [2022-04-27 11:05:53,079 INFO L290 TraceCheckUtils]: 19: Hoare triple {1301#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (<= |#Ultimate.C_memset_#t~loopctr188| 1) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1302#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:05:53,080 INFO L290 TraceCheckUtils]: 20: Hoare triple {1302#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1302#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:05:53,081 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1302#(or (<= |#Ultimate.C_memset_#amount| 1) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {1283#true} #672#return; {1284#false} is VALID [2022-04-27 11:05:53,081 INFO L290 TraceCheckUtils]: 22: Hoare triple {1284#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1284#false} is VALID [2022-04-27 11:05:53,081 INFO L290 TraceCheckUtils]: 23: Hoare triple {1284#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {1284#false} is VALID [2022-04-27 11:05:53,081 INFO L290 TraceCheckUtils]: 24: Hoare triple {1284#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1284#false} is VALID [2022-04-27 11:05:53,081 INFO L290 TraceCheckUtils]: 25: Hoare triple {1284#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1284#false} is VALID [2022-04-27 11:05:53,081 INFO L290 TraceCheckUtils]: 26: Hoare triple {1284#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1284#false} is VALID [2022-04-27 11:05:53,082 INFO L290 TraceCheckUtils]: 27: Hoare triple {1284#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1284#false} is VALID [2022-04-27 11:05:53,082 INFO L290 TraceCheckUtils]: 28: Hoare triple {1284#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1284#false} is VALID [2022-04-27 11:05:53,082 INFO L290 TraceCheckUtils]: 29: Hoare triple {1284#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1284#false} is VALID [2022-04-27 11:05:53,082 INFO L290 TraceCheckUtils]: 30: Hoare triple {1284#false} assume #t~short172; {1284#false} is VALID [2022-04-27 11:05:53,082 INFO L290 TraceCheckUtils]: 31: Hoare triple {1284#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1284#false} is VALID [2022-04-27 11:05:53,082 INFO L290 TraceCheckUtils]: 32: Hoare triple {1284#false} assume 0 != #t~mem173;havoc #t~mem173; {1284#false} is VALID [2022-04-27 11:05:53,082 INFO L272 TraceCheckUtils]: 33: Hoare triple {1284#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1284#false} is VALID [2022-04-27 11:05:53,083 INFO L290 TraceCheckUtils]: 34: Hoare triple {1284#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1284#false} is VALID [2022-04-27 11:05:53,083 INFO L290 TraceCheckUtils]: 35: Hoare triple {1284#false} assume !(~len <= 0); {1284#false} is VALID [2022-04-27 11:05:53,083 INFO L272 TraceCheckUtils]: 36: Hoare triple {1284#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1299#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:05:53,083 INFO L290 TraceCheckUtils]: 37: Hoare triple {1299#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {1283#true} is VALID [2022-04-27 11:05:53,083 INFO L290 TraceCheckUtils]: 38: Hoare triple {1283#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1283#true} is VALID [2022-04-27 11:05:53,083 INFO L290 TraceCheckUtils]: 39: Hoare triple {1283#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1283#true} is VALID [2022-04-27 11:05:53,083 INFO L290 TraceCheckUtils]: 40: Hoare triple {1283#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1283#true} is VALID [2022-04-27 11:05:53,083 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1283#true} {1284#false} #656#return; {1284#false} is VALID [2022-04-27 11:05:53,083 INFO L290 TraceCheckUtils]: 42: Hoare triple {1284#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1284#false} is VALID [2022-04-27 11:05:53,084 INFO L290 TraceCheckUtils]: 43: Hoare triple {1284#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1284#false} is VALID [2022-04-27 11:05:53,084 INFO L272 TraceCheckUtils]: 44: Hoare triple {1284#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1284#false} is VALID [2022-04-27 11:05:53,084 INFO L290 TraceCheckUtils]: 45: Hoare triple {1284#false} ~cond := #in~cond; {1284#false} is VALID [2022-04-27 11:05:53,084 INFO L290 TraceCheckUtils]: 46: Hoare triple {1284#false} assume 0 == ~cond; {1284#false} is VALID [2022-04-27 11:05:53,084 INFO L290 TraceCheckUtils]: 47: Hoare triple {1284#false} assume !false; {1284#false} is VALID [2022-04-27 11:05:53,084 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 11:05:53,085 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 11:05:53,085 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10985474] [2022-04-27 11:05:53,085 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [10985474] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 11:05:53,085 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1110733667] [2022-04-27 11:05:53,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 11:05:53,085 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 11:05:53,085 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 11:05:53,086 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 11:05:53,115 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 11:05:53,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:53,293 INFO L263 TraceCheckSpWp]: Trace formula consists of 695 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-27 11:05:53,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:53,310 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 11:05:53,627 INFO L272 TraceCheckUtils]: 0: Hoare triple {1283#true} call ULTIMATE.init(); {1283#true} is VALID [2022-04-27 11:05:53,627 INFO L290 TraceCheckUtils]: 1: Hoare triple {1283#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,627 INFO L290 TraceCheckUtils]: 2: Hoare triple {1283#true} assume true; {1283#true} is VALID [2022-04-27 11:05:53,628 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1283#true} {1283#true} #682#return; {1283#true} is VALID [2022-04-27 11:05:53,628 INFO L272 TraceCheckUtils]: 4: Hoare triple {1283#true} call #t~ret187 := main(); {1283#true} is VALID [2022-04-27 11:05:53,628 INFO L290 TraceCheckUtils]: 5: Hoare triple {1283#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1283#true} is VALID [2022-04-27 11:05:53,628 INFO L272 TraceCheckUtils]: 6: Hoare triple {1283#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {1283#true} is VALID [2022-04-27 11:05:53,628 INFO L290 TraceCheckUtils]: 7: Hoare triple {1283#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1283#true} is VALID [2022-04-27 11:05:53,628 INFO L290 TraceCheckUtils]: 8: Hoare triple {1283#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1283#true} is VALID [2022-04-27 11:05:53,628 INFO L290 TraceCheckUtils]: 9: Hoare triple {1283#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,629 INFO L290 TraceCheckUtils]: 10: Hoare triple {1283#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1283#true} is VALID [2022-04-27 11:05:53,629 INFO L290 TraceCheckUtils]: 11: Hoare triple {1283#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,629 INFO L290 TraceCheckUtils]: 12: Hoare triple {1283#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1283#true} is VALID [2022-04-27 11:05:53,629 INFO L290 TraceCheckUtils]: 13: Hoare triple {1283#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,629 INFO L290 TraceCheckUtils]: 14: Hoare triple {1283#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1283#true} is VALID [2022-04-27 11:05:53,629 INFO L290 TraceCheckUtils]: 15: Hoare triple {1283#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1283#true} is VALID [2022-04-27 11:05:53,629 INFO L272 TraceCheckUtils]: 16: Hoare triple {1283#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {1283#true} is VALID [2022-04-27 11:05:53,630 INFO L290 TraceCheckUtils]: 17: Hoare triple {1283#true} #t~loopctr188 := 0; {1300#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:05:53,630 INFO L290 TraceCheckUtils]: 18: Hoare triple {1300#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1283#true} is VALID [2022-04-27 11:05:53,630 INFO L290 TraceCheckUtils]: 19: Hoare triple {1283#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1283#true} is VALID [2022-04-27 11:05:53,630 INFO L290 TraceCheckUtils]: 20: Hoare triple {1283#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1283#true} is VALID [2022-04-27 11:05:53,630 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1283#true} {1283#true} #672#return; {1283#true} is VALID [2022-04-27 11:05:53,630 INFO L290 TraceCheckUtils]: 22: Hoare triple {1283#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1283#true} is VALID [2022-04-27 11:05:53,631 INFO L290 TraceCheckUtils]: 23: Hoare triple {1283#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,631 INFO L290 TraceCheckUtils]: 24: Hoare triple {1283#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1283#true} is VALID [2022-04-27 11:05:53,631 INFO L290 TraceCheckUtils]: 25: Hoare triple {1283#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1283#true} is VALID [2022-04-27 11:05:53,631 INFO L290 TraceCheckUtils]: 26: Hoare triple {1283#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1283#true} is VALID [2022-04-27 11:05:53,631 INFO L290 TraceCheckUtils]: 27: Hoare triple {1283#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1283#true} is VALID [2022-04-27 11:05:53,631 INFO L290 TraceCheckUtils]: 28: Hoare triple {1283#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1283#true} is VALID [2022-04-27 11:05:53,631 INFO L290 TraceCheckUtils]: 29: Hoare triple {1283#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1283#true} is VALID [2022-04-27 11:05:53,631 INFO L290 TraceCheckUtils]: 30: Hoare triple {1283#true} assume #t~short172; {1283#true} is VALID [2022-04-27 11:05:53,631 INFO L290 TraceCheckUtils]: 31: Hoare triple {1283#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,632 INFO L290 TraceCheckUtils]: 32: Hoare triple {1283#true} assume 0 != #t~mem173;havoc #t~mem173; {1283#true} is VALID [2022-04-27 11:05:53,632 INFO L272 TraceCheckUtils]: 33: Hoare triple {1283#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1283#true} is VALID [2022-04-27 11:05:53,632 INFO L290 TraceCheckUtils]: 34: Hoare triple {1283#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1283#true} is VALID [2022-04-27 11:05:53,632 INFO L290 TraceCheckUtils]: 35: Hoare triple {1283#true} assume !(~len <= 0); {1283#true} is VALID [2022-04-27 11:05:53,632 INFO L272 TraceCheckUtils]: 36: Hoare triple {1283#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1283#true} is VALID [2022-04-27 11:05:53,639 INFO L290 TraceCheckUtils]: 37: Hoare triple {1283#true} #t~loopctr188 := 0; {1300#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:05:53,640 INFO L290 TraceCheckUtils]: 38: Hoare triple {1300#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1420#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:05:53,641 INFO L290 TraceCheckUtils]: 39: Hoare triple {1420#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1424#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} is VALID [2022-04-27 11:05:53,641 INFO L290 TraceCheckUtils]: 40: Hoare triple {1424#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1424#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} is VALID [2022-04-27 11:05:53,642 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1424#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 1) 4294967296) 1))} {1283#true} #656#return; {1284#false} is VALID [2022-04-27 11:05:53,642 INFO L290 TraceCheckUtils]: 42: Hoare triple {1284#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1284#false} is VALID [2022-04-27 11:05:53,643 INFO L290 TraceCheckUtils]: 43: Hoare triple {1284#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1284#false} is VALID [2022-04-27 11:05:53,643 INFO L272 TraceCheckUtils]: 44: Hoare triple {1284#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1284#false} is VALID [2022-04-27 11:05:53,643 INFO L290 TraceCheckUtils]: 45: Hoare triple {1284#false} ~cond := #in~cond; {1284#false} is VALID [2022-04-27 11:05:53,643 INFO L290 TraceCheckUtils]: 46: Hoare triple {1284#false} assume 0 == ~cond; {1284#false} is VALID [2022-04-27 11:05:53,643 INFO L290 TraceCheckUtils]: 47: Hoare triple {1284#false} assume !false; {1284#false} is VALID [2022-04-27 11:05:53,644 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 11:05:53,644 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 11:05:53,867 INFO L290 TraceCheckUtils]: 47: Hoare triple {1284#false} assume !false; {1284#false} is VALID [2022-04-27 11:05:53,867 INFO L290 TraceCheckUtils]: 46: Hoare triple {1284#false} assume 0 == ~cond; {1284#false} is VALID [2022-04-27 11:05:53,867 INFO L290 TraceCheckUtils]: 45: Hoare triple {1284#false} ~cond := #in~cond; {1284#false} is VALID [2022-04-27 11:05:53,867 INFO L272 TraceCheckUtils]: 44: Hoare triple {1284#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {1284#false} is VALID [2022-04-27 11:05:53,867 INFO L290 TraceCheckUtils]: 43: Hoare triple {1284#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {1284#false} is VALID [2022-04-27 11:05:53,868 INFO L290 TraceCheckUtils]: 42: Hoare triple {1284#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {1284#false} is VALID [2022-04-27 11:05:53,869 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {1470#(not (= |#Ultimate.C_memset_#amount| 80))} {1283#true} #656#return; {1284#false} is VALID [2022-04-27 11:05:53,869 INFO L290 TraceCheckUtils]: 40: Hoare triple {1470#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1470#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-27 11:05:53,870 INFO L290 TraceCheckUtils]: 39: Hoare triple {1477#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1470#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-27 11:05:53,872 INFO L290 TraceCheckUtils]: 38: Hoare triple {1481#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1477#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-27 11:05:53,872 INFO L290 TraceCheckUtils]: 37: Hoare triple {1283#true} #t~loopctr188 := 0; {1481#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:05:53,872 INFO L272 TraceCheckUtils]: 36: Hoare triple {1283#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {1283#true} is VALID [2022-04-27 11:05:53,872 INFO L290 TraceCheckUtils]: 35: Hoare triple {1283#true} assume !(~len <= 0); {1283#true} is VALID [2022-04-27 11:05:53,872 INFO L290 TraceCheckUtils]: 34: Hoare triple {1283#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {1283#true} is VALID [2022-04-27 11:05:53,873 INFO L272 TraceCheckUtils]: 33: Hoare triple {1283#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {1283#true} is VALID [2022-04-27 11:05:53,873 INFO L290 TraceCheckUtils]: 32: Hoare triple {1283#true} assume 0 != #t~mem173;havoc #t~mem173; {1283#true} is VALID [2022-04-27 11:05:53,873 INFO L290 TraceCheckUtils]: 31: Hoare triple {1283#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,873 INFO L290 TraceCheckUtils]: 30: Hoare triple {1283#true} assume #t~short172; {1283#true} is VALID [2022-04-27 11:05:53,873 INFO L290 TraceCheckUtils]: 29: Hoare triple {1283#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {1283#true} is VALID [2022-04-27 11:05:53,873 INFO L290 TraceCheckUtils]: 28: Hoare triple {1283#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {1283#true} is VALID [2022-04-27 11:05:53,873 INFO L290 TraceCheckUtils]: 27: Hoare triple {1283#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {1283#true} is VALID [2022-04-27 11:05:53,873 INFO L290 TraceCheckUtils]: 26: Hoare triple {1283#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {1283#true} is VALID [2022-04-27 11:05:53,873 INFO L290 TraceCheckUtils]: 25: Hoare triple {1283#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {1283#true} is VALID [2022-04-27 11:05:53,874 INFO L290 TraceCheckUtils]: 24: Hoare triple {1283#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {1283#true} is VALID [2022-04-27 11:05:53,874 INFO L290 TraceCheckUtils]: 23: Hoare triple {1283#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,874 INFO L290 TraceCheckUtils]: 22: Hoare triple {1283#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {1283#true} is VALID [2022-04-27 11:05:53,874 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {1283#true} {1283#true} #672#return; {1283#true} is VALID [2022-04-27 11:05:53,874 INFO L290 TraceCheckUtils]: 20: Hoare triple {1283#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {1283#true} is VALID [2022-04-27 11:05:53,874 INFO L290 TraceCheckUtils]: 19: Hoare triple {1283#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {1283#true} is VALID [2022-04-27 11:05:53,874 INFO L290 TraceCheckUtils]: 18: Hoare triple {1283#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {1283#true} is VALID [2022-04-27 11:05:53,874 INFO L290 TraceCheckUtils]: 17: Hoare triple {1283#true} #t~loopctr188 := 0; {1283#true} is VALID [2022-04-27 11:05:53,874 INFO L272 TraceCheckUtils]: 16: Hoare triple {1283#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {1283#true} is VALID [2022-04-27 11:05:53,874 INFO L290 TraceCheckUtils]: 15: Hoare triple {1283#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {1283#true} is VALID [2022-04-27 11:05:53,875 INFO L290 TraceCheckUtils]: 14: Hoare triple {1283#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {1283#true} is VALID [2022-04-27 11:05:53,875 INFO L290 TraceCheckUtils]: 13: Hoare triple {1283#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,875 INFO L290 TraceCheckUtils]: 12: Hoare triple {1283#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {1283#true} is VALID [2022-04-27 11:05:53,875 INFO L290 TraceCheckUtils]: 11: Hoare triple {1283#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,875 INFO L290 TraceCheckUtils]: 10: Hoare triple {1283#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {1283#true} is VALID [2022-04-27 11:05:53,875 INFO L290 TraceCheckUtils]: 9: Hoare triple {1283#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,875 INFO L290 TraceCheckUtils]: 8: Hoare triple {1283#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {1283#true} is VALID [2022-04-27 11:05:53,875 INFO L290 TraceCheckUtils]: 7: Hoare triple {1283#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {1283#true} is VALID [2022-04-27 11:05:53,875 INFO L272 TraceCheckUtils]: 6: Hoare triple {1283#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {1283#true} is VALID [2022-04-27 11:05:53,875 INFO L290 TraceCheckUtils]: 5: Hoare triple {1283#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {1283#true} is VALID [2022-04-27 11:05:53,876 INFO L272 TraceCheckUtils]: 4: Hoare triple {1283#true} call #t~ret187 := main(); {1283#true} is VALID [2022-04-27 11:05:53,876 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1283#true} {1283#true} #682#return; {1283#true} is VALID [2022-04-27 11:05:53,876 INFO L290 TraceCheckUtils]: 2: Hoare triple {1283#true} assume true; {1283#true} is VALID [2022-04-27 11:05:53,876 INFO L290 TraceCheckUtils]: 1: Hoare triple {1283#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {1283#true} is VALID [2022-04-27 11:05:53,876 INFO L272 TraceCheckUtils]: 0: Hoare triple {1283#true} call ULTIMATE.init(); {1283#true} is VALID [2022-04-27 11:05:53,878 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 11:05:53,879 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1110733667] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 11:05:53,879 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 11:05:53,879 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 12 [2022-04-27 11:05:53,880 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019480867] [2022-04-27 11:05:53,880 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 11:05:53,880 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 5.166666666666667) internal successors, (62), 10 states have internal predecessors, (62), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 48 [2022-04-27 11:05:53,887 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 11:05:53,888 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 5.166666666666667) internal successors, (62), 10 states have internal predecessors, (62), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:05:53,948 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:05:53,948 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-27 11:05:53,948 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 11:05:53,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-27 11:05:53,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2022-04-27 11:05:53,949 INFO L87 Difference]: Start difference. First operand 77 states and 99 transitions. Second operand has 12 states, 12 states have (on average 5.166666666666667) internal successors, (62), 10 states have internal predecessors, (62), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:05:55,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:55,522 INFO L93 Difference]: Finished difference Result 150 states and 199 transitions. [2022-04-27 11:05:55,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-27 11:05:55,523 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 5.166666666666667) internal successors, (62), 10 states have internal predecessors, (62), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 48 [2022-04-27 11:05:55,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 11:05:55,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 5.166666666666667) internal successors, (62), 10 states have internal predecessors, (62), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:05:55,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 196 transitions. [2022-04-27 11:05:55,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 5.166666666666667) internal successors, (62), 10 states have internal predecessors, (62), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:05:55,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 196 transitions. [2022-04-27 11:05:55,531 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 196 transitions. [2022-04-27 11:05:55,723 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 196 edges. 196 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:05:55,727 INFO L225 Difference]: With dead ends: 150 [2022-04-27 11:05:55,727 INFO L226 Difference]: Without dead ends: 90 [2022-04-27 11:05:55,728 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=128, Invalid=334, Unknown=0, NotChecked=0, Total=462 [2022-04-27 11:05:55,729 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 107 mSDsluCounter, 93 mSDsCounter, 0 mSdLazyCounter, 506 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 111 SdHoareTripleChecker+Valid, 176 SdHoareTripleChecker+Invalid, 550 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 506 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 11:05:55,729 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [111 Valid, 176 Invalid, 550 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 506 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-27 11:05:55,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-04-27 11:05:55,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 86. [2022-04-27 11:05:55,746 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 11:05:55,746 INFO L82 GeneralOperation]: Start isEquivalent. First operand 90 states. Second operand has 86 states, 67 states have (on average 1.2985074626865671) internal successors, (87), 67 states have internal predecessors, (87), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:55,747 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand has 86 states, 67 states have (on average 1.2985074626865671) internal successors, (87), 67 states have internal predecessors, (87), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:55,747 INFO L87 Difference]: Start difference. First operand 90 states. Second operand has 86 states, 67 states have (on average 1.2985074626865671) internal successors, (87), 67 states have internal predecessors, (87), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:55,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:55,750 INFO L93 Difference]: Finished difference Result 90 states and 116 transitions. [2022-04-27 11:05:55,750 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 116 transitions. [2022-04-27 11:05:55,751 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:05:55,751 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:05:55,751 INFO L74 IsIncluded]: Start isIncluded. First operand has 86 states, 67 states have (on average 1.2985074626865671) internal successors, (87), 67 states have internal predecessors, (87), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 90 states. [2022-04-27 11:05:55,752 INFO L87 Difference]: Start difference. First operand has 86 states, 67 states have (on average 1.2985074626865671) internal successors, (87), 67 states have internal predecessors, (87), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 90 states. [2022-04-27 11:05:55,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:55,754 INFO L93 Difference]: Finished difference Result 90 states and 116 transitions. [2022-04-27 11:05:55,754 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 116 transitions. [2022-04-27 11:05:55,755 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:05:55,755 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:05:55,755 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 11:05:55,755 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 11:05:55,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 67 states have (on average 1.2985074626865671) internal successors, (87), 67 states have internal predecessors, (87), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:55,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 110 transitions. [2022-04-27 11:05:55,758 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 110 transitions. Word has length 48 [2022-04-27 11:05:55,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 11:05:55,758 INFO L495 AbstractCegarLoop]: Abstraction has 86 states and 110 transitions. [2022-04-27 11:05:55,758 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 5.166666666666667) internal successors, (62), 10 states have internal predecessors, (62), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:05:55,759 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 110 transitions. [2022-04-27 11:05:55,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-04-27 11:05:55,759 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 11:05:55,759 INFO L195 NwaCegarLoop]: trace histogram [6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 11:05:55,788 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 11:05:55,973 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-04-27 11:05:55,973 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 11:05:55,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 11:05:55,974 INFO L85 PathProgramCache]: Analyzing trace with hash 38283082, now seen corresponding path program 2 times [2022-04-27 11:05:55,974 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 11:05:55,974 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201868540] [2022-04-27 11:05:55,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 11:05:55,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 11:05:56,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:56,131 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 11:05:56,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:56,141 INFO L290 TraceCheckUtils]: 0: Hoare triple {2132#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2113#true} is VALID [2022-04-27 11:05:56,141 INFO L290 TraceCheckUtils]: 1: Hoare triple {2113#true} assume true; {2113#true} is VALID [2022-04-27 11:05:56,141 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2113#true} {2113#true} #682#return; {2113#true} is VALID [2022-04-27 11:05:56,144 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 11:05:56,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:56,246 INFO L290 TraceCheckUtils]: 0: Hoare triple {2133#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2134#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:05:56,247 INFO L290 TraceCheckUtils]: 1: Hoare triple {2134#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2135#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:05:56,248 INFO L290 TraceCheckUtils]: 2: Hoare triple {2135#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2136#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-27 11:05:56,249 INFO L290 TraceCheckUtils]: 3: Hoare triple {2136#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2137#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:05:56,249 INFO L290 TraceCheckUtils]: 4: Hoare triple {2137#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2137#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:05:56,251 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {2137#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {2113#true} #672#return; {2114#false} is VALID [2022-04-27 11:05:56,251 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2022-04-27 11:05:56,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:56,261 INFO L290 TraceCheckUtils]: 0: Hoare triple {2133#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2113#true} is VALID [2022-04-27 11:05:56,262 INFO L290 TraceCheckUtils]: 1: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:56,262 INFO L290 TraceCheckUtils]: 2: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:56,262 INFO L290 TraceCheckUtils]: 3: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:56,262 INFO L290 TraceCheckUtils]: 4: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:56,262 INFO L290 TraceCheckUtils]: 5: Hoare triple {2113#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2113#true} is VALID [2022-04-27 11:05:56,262 INFO L290 TraceCheckUtils]: 6: Hoare triple {2113#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2113#true} is VALID [2022-04-27 11:05:56,262 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {2113#true} {2114#false} #656#return; {2114#false} is VALID [2022-04-27 11:05:56,263 INFO L272 TraceCheckUtils]: 0: Hoare triple {2113#true} call ULTIMATE.init(); {2132#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 11:05:56,263 INFO L290 TraceCheckUtils]: 1: Hoare triple {2132#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2113#true} is VALID [2022-04-27 11:05:56,263 INFO L290 TraceCheckUtils]: 2: Hoare triple {2113#true} assume true; {2113#true} is VALID [2022-04-27 11:05:56,263 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2113#true} {2113#true} #682#return; {2113#true} is VALID [2022-04-27 11:05:56,264 INFO L272 TraceCheckUtils]: 4: Hoare triple {2113#true} call #t~ret187 := main(); {2113#true} is VALID [2022-04-27 11:05:56,264 INFO L290 TraceCheckUtils]: 5: Hoare triple {2113#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2113#true} is VALID [2022-04-27 11:05:56,264 INFO L272 TraceCheckUtils]: 6: Hoare triple {2113#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {2113#true} is VALID [2022-04-27 11:05:56,264 INFO L290 TraceCheckUtils]: 7: Hoare triple {2113#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2113#true} is VALID [2022-04-27 11:05:56,264 INFO L290 TraceCheckUtils]: 8: Hoare triple {2113#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2113#true} is VALID [2022-04-27 11:05:56,264 INFO L290 TraceCheckUtils]: 9: Hoare triple {2113#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2113#true} is VALID [2022-04-27 11:05:56,264 INFO L290 TraceCheckUtils]: 10: Hoare triple {2113#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2113#true} is VALID [2022-04-27 11:05:56,264 INFO L290 TraceCheckUtils]: 11: Hoare triple {2113#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2113#true} is VALID [2022-04-27 11:05:56,264 INFO L290 TraceCheckUtils]: 12: Hoare triple {2113#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2113#true} is VALID [2022-04-27 11:05:56,265 INFO L290 TraceCheckUtils]: 13: Hoare triple {2113#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2113#true} is VALID [2022-04-27 11:05:56,265 INFO L290 TraceCheckUtils]: 14: Hoare triple {2113#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2113#true} is VALID [2022-04-27 11:05:56,265 INFO L290 TraceCheckUtils]: 15: Hoare triple {2113#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2113#true} is VALID [2022-04-27 11:05:56,266 INFO L272 TraceCheckUtils]: 16: Hoare triple {2113#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {2133#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:05:56,266 INFO L290 TraceCheckUtils]: 17: Hoare triple {2133#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2134#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:05:56,267 INFO L290 TraceCheckUtils]: 18: Hoare triple {2134#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2135#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:05:56,268 INFO L290 TraceCheckUtils]: 19: Hoare triple {2135#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2136#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-27 11:05:56,269 INFO L290 TraceCheckUtils]: 20: Hoare triple {2136#(and (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 2)) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2137#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:05:56,269 INFO L290 TraceCheckUtils]: 21: Hoare triple {2137#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2137#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:05:56,270 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2137#(or (<= |#Ultimate.C_memset_#amount| 2) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {2113#true} #672#return; {2114#false} is VALID [2022-04-27 11:05:56,270 INFO L290 TraceCheckUtils]: 23: Hoare triple {2114#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2114#false} is VALID [2022-04-27 11:05:56,270 INFO L290 TraceCheckUtils]: 24: Hoare triple {2114#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {2114#false} is VALID [2022-04-27 11:05:56,271 INFO L290 TraceCheckUtils]: 25: Hoare triple {2114#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2114#false} is VALID [2022-04-27 11:05:56,271 INFO L290 TraceCheckUtils]: 26: Hoare triple {2114#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2114#false} is VALID [2022-04-27 11:05:56,271 INFO L290 TraceCheckUtils]: 27: Hoare triple {2114#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2114#false} is VALID [2022-04-27 11:05:56,271 INFO L290 TraceCheckUtils]: 28: Hoare triple {2114#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2114#false} is VALID [2022-04-27 11:05:56,271 INFO L290 TraceCheckUtils]: 29: Hoare triple {2114#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2114#false} is VALID [2022-04-27 11:05:56,271 INFO L290 TraceCheckUtils]: 30: Hoare triple {2114#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2114#false} is VALID [2022-04-27 11:05:56,271 INFO L290 TraceCheckUtils]: 31: Hoare triple {2114#false} assume #t~short172; {2114#false} is VALID [2022-04-27 11:05:56,271 INFO L290 TraceCheckUtils]: 32: Hoare triple {2114#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2114#false} is VALID [2022-04-27 11:05:56,271 INFO L290 TraceCheckUtils]: 33: Hoare triple {2114#false} assume 0 != #t~mem173;havoc #t~mem173; {2114#false} is VALID [2022-04-27 11:05:56,272 INFO L272 TraceCheckUtils]: 34: Hoare triple {2114#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2114#false} is VALID [2022-04-27 11:05:56,272 INFO L290 TraceCheckUtils]: 35: Hoare triple {2114#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2114#false} is VALID [2022-04-27 11:05:56,272 INFO L290 TraceCheckUtils]: 36: Hoare triple {2114#false} assume !(~len <= 0); {2114#false} is VALID [2022-04-27 11:05:56,272 INFO L272 TraceCheckUtils]: 37: Hoare triple {2114#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2133#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:05:56,272 INFO L290 TraceCheckUtils]: 38: Hoare triple {2133#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {2113#true} is VALID [2022-04-27 11:05:56,272 INFO L290 TraceCheckUtils]: 39: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:56,272 INFO L290 TraceCheckUtils]: 40: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:56,272 INFO L290 TraceCheckUtils]: 41: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:56,273 INFO L290 TraceCheckUtils]: 42: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:56,273 INFO L290 TraceCheckUtils]: 43: Hoare triple {2113#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2113#true} is VALID [2022-04-27 11:05:56,273 INFO L290 TraceCheckUtils]: 44: Hoare triple {2113#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2113#true} is VALID [2022-04-27 11:05:56,273 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {2113#true} {2114#false} #656#return; {2114#false} is VALID [2022-04-27 11:05:56,273 INFO L290 TraceCheckUtils]: 46: Hoare triple {2114#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2114#false} is VALID [2022-04-27 11:05:56,273 INFO L290 TraceCheckUtils]: 47: Hoare triple {2114#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2114#false} is VALID [2022-04-27 11:05:56,273 INFO L272 TraceCheckUtils]: 48: Hoare triple {2114#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2114#false} is VALID [2022-04-27 11:05:56,273 INFO L290 TraceCheckUtils]: 49: Hoare triple {2114#false} ~cond := #in~cond; {2114#false} is VALID [2022-04-27 11:05:56,273 INFO L290 TraceCheckUtils]: 50: Hoare triple {2114#false} assume 0 == ~cond; {2114#false} is VALID [2022-04-27 11:05:56,274 INFO L290 TraceCheckUtils]: 51: Hoare triple {2114#false} assume !false; {2114#false} is VALID [2022-04-27 11:05:56,274 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-27 11:05:56,274 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 11:05:56,274 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201868540] [2022-04-27 11:05:56,274 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1201868540] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 11:05:56,274 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1742585690] [2022-04-27 11:05:56,275 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 11:05:56,275 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 11:05:56,275 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 11:05:56,276 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 11:05:56,301 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 11:05:56,789 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 11:05:56,790 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 11:05:56,793 INFO L263 TraceCheckSpWp]: Trace formula consists of 723 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-27 11:05:56,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:05:56,814 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 11:05:57,117 INFO L272 TraceCheckUtils]: 0: Hoare triple {2113#true} call ULTIMATE.init(); {2113#true} is VALID [2022-04-27 11:05:57,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {2113#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2113#true} is VALID [2022-04-27 11:05:57,118 INFO L290 TraceCheckUtils]: 2: Hoare triple {2113#true} assume true; {2113#true} is VALID [2022-04-27 11:05:57,118 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2113#true} {2113#true} #682#return; {2113#true} is VALID [2022-04-27 11:05:57,118 INFO L272 TraceCheckUtils]: 4: Hoare triple {2113#true} call #t~ret187 := main(); {2113#true} is VALID [2022-04-27 11:05:57,118 INFO L290 TraceCheckUtils]: 5: Hoare triple {2113#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2113#true} is VALID [2022-04-27 11:05:57,118 INFO L272 TraceCheckUtils]: 6: Hoare triple {2113#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {2113#true} is VALID [2022-04-27 11:05:57,118 INFO L290 TraceCheckUtils]: 7: Hoare triple {2113#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2113#true} is VALID [2022-04-27 11:05:57,118 INFO L290 TraceCheckUtils]: 8: Hoare triple {2113#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2113#true} is VALID [2022-04-27 11:05:57,118 INFO L290 TraceCheckUtils]: 9: Hoare triple {2113#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2113#true} is VALID [2022-04-27 11:05:57,119 INFO L290 TraceCheckUtils]: 10: Hoare triple {2113#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2113#true} is VALID [2022-04-27 11:05:57,119 INFO L290 TraceCheckUtils]: 11: Hoare triple {2113#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2113#true} is VALID [2022-04-27 11:05:57,119 INFO L290 TraceCheckUtils]: 12: Hoare triple {2113#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2113#true} is VALID [2022-04-27 11:05:57,119 INFO L290 TraceCheckUtils]: 13: Hoare triple {2113#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2113#true} is VALID [2022-04-27 11:05:57,119 INFO L290 TraceCheckUtils]: 14: Hoare triple {2113#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2113#true} is VALID [2022-04-27 11:05:57,123 INFO L290 TraceCheckUtils]: 15: Hoare triple {2113#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2113#true} is VALID [2022-04-27 11:05:57,123 INFO L272 TraceCheckUtils]: 16: Hoare triple {2113#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {2113#true} is VALID [2022-04-27 11:05:57,124 INFO L290 TraceCheckUtils]: 17: Hoare triple {2113#true} #t~loopctr188 := 0; {2134#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:05:57,125 INFO L290 TraceCheckUtils]: 18: Hoare triple {2134#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2195#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:05:57,126 INFO L290 TraceCheckUtils]: 19: Hoare triple {2195#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2199#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-27 11:05:57,127 INFO L290 TraceCheckUtils]: 20: Hoare triple {2199#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2203#(< 0 (+ (div (+ 2 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-27 11:05:57,127 INFO L290 TraceCheckUtils]: 21: Hoare triple {2203#(< 0 (+ (div (+ 2 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2203#(< 0 (+ (div (+ 2 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} is VALID [2022-04-27 11:05:57,129 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2203#(< 0 (+ (div (+ 2 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296) 1))} {2113#true} #672#return; {2114#false} is VALID [2022-04-27 11:05:57,129 INFO L290 TraceCheckUtils]: 23: Hoare triple {2114#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2114#false} is VALID [2022-04-27 11:05:57,129 INFO L290 TraceCheckUtils]: 24: Hoare triple {2114#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {2114#false} is VALID [2022-04-27 11:05:57,129 INFO L290 TraceCheckUtils]: 25: Hoare triple {2114#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2114#false} is VALID [2022-04-27 11:05:57,129 INFO L290 TraceCheckUtils]: 26: Hoare triple {2114#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2114#false} is VALID [2022-04-27 11:05:57,129 INFO L290 TraceCheckUtils]: 27: Hoare triple {2114#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2114#false} is VALID [2022-04-27 11:05:57,129 INFO L290 TraceCheckUtils]: 28: Hoare triple {2114#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2114#false} is VALID [2022-04-27 11:05:57,129 INFO L290 TraceCheckUtils]: 29: Hoare triple {2114#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2114#false} is VALID [2022-04-27 11:05:57,129 INFO L290 TraceCheckUtils]: 30: Hoare triple {2114#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L290 TraceCheckUtils]: 31: Hoare triple {2114#false} assume #t~short172; {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L290 TraceCheckUtils]: 32: Hoare triple {2114#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L290 TraceCheckUtils]: 33: Hoare triple {2114#false} assume 0 != #t~mem173;havoc #t~mem173; {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L272 TraceCheckUtils]: 34: Hoare triple {2114#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L290 TraceCheckUtils]: 35: Hoare triple {2114#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L290 TraceCheckUtils]: 36: Hoare triple {2114#false} assume !(~len <= 0); {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L272 TraceCheckUtils]: 37: Hoare triple {2114#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L290 TraceCheckUtils]: 38: Hoare triple {2114#false} #t~loopctr188 := 0; {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L290 TraceCheckUtils]: 39: Hoare triple {2114#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L290 TraceCheckUtils]: 40: Hoare triple {2114#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2114#false} is VALID [2022-04-27 11:05:57,130 INFO L290 TraceCheckUtils]: 41: Hoare triple {2114#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2114#false} is VALID [2022-04-27 11:05:57,131 INFO L290 TraceCheckUtils]: 42: Hoare triple {2114#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2114#false} is VALID [2022-04-27 11:05:57,131 INFO L290 TraceCheckUtils]: 43: Hoare triple {2114#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2114#false} is VALID [2022-04-27 11:05:57,131 INFO L290 TraceCheckUtils]: 44: Hoare triple {2114#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2114#false} is VALID [2022-04-27 11:05:57,131 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {2114#false} {2114#false} #656#return; {2114#false} is VALID [2022-04-27 11:05:57,131 INFO L290 TraceCheckUtils]: 46: Hoare triple {2114#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2114#false} is VALID [2022-04-27 11:05:57,132 INFO L290 TraceCheckUtils]: 47: Hoare triple {2114#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2114#false} is VALID [2022-04-27 11:05:57,132 INFO L272 TraceCheckUtils]: 48: Hoare triple {2114#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2114#false} is VALID [2022-04-27 11:05:57,132 INFO L290 TraceCheckUtils]: 49: Hoare triple {2114#false} ~cond := #in~cond; {2114#false} is VALID [2022-04-27 11:05:57,132 INFO L290 TraceCheckUtils]: 50: Hoare triple {2114#false} assume 0 == ~cond; {2114#false} is VALID [2022-04-27 11:05:57,132 INFO L290 TraceCheckUtils]: 51: Hoare triple {2114#false} assume !false; {2114#false} is VALID [2022-04-27 11:05:57,133 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 18 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 11:05:57,133 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 11:05:57,579 INFO L290 TraceCheckUtils]: 51: Hoare triple {2114#false} assume !false; {2114#false} is VALID [2022-04-27 11:05:57,579 INFO L290 TraceCheckUtils]: 50: Hoare triple {2114#false} assume 0 == ~cond; {2114#false} is VALID [2022-04-27 11:05:57,579 INFO L290 TraceCheckUtils]: 49: Hoare triple {2114#false} ~cond := #in~cond; {2114#false} is VALID [2022-04-27 11:05:57,580 INFO L272 TraceCheckUtils]: 48: Hoare triple {2114#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {2114#false} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 47: Hoare triple {2114#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {2114#false} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 46: Hoare triple {2114#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {2114#false} is VALID [2022-04-27 11:05:57,580 INFO L284 TraceCheckUtils]: 45: Hoare quadruple {2113#true} {2114#false} #656#return; {2114#false} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 44: Hoare triple {2113#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2113#true} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 43: Hoare triple {2113#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2113#true} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 42: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 41: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 40: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 39: Hoare triple {2113#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2113#true} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 38: Hoare triple {2113#true} #t~loopctr188 := 0; {2113#true} is VALID [2022-04-27 11:05:57,580 INFO L272 TraceCheckUtils]: 37: Hoare triple {2114#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {2113#true} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 36: Hoare triple {2114#false} assume !(~len <= 0); {2114#false} is VALID [2022-04-27 11:05:57,580 INFO L290 TraceCheckUtils]: 35: Hoare triple {2114#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {2114#false} is VALID [2022-04-27 11:05:57,581 INFO L272 TraceCheckUtils]: 34: Hoare triple {2114#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {2114#false} is VALID [2022-04-27 11:05:57,581 INFO L290 TraceCheckUtils]: 33: Hoare triple {2114#false} assume 0 != #t~mem173;havoc #t~mem173; {2114#false} is VALID [2022-04-27 11:05:57,581 INFO L290 TraceCheckUtils]: 32: Hoare triple {2114#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {2114#false} is VALID [2022-04-27 11:05:57,581 INFO L290 TraceCheckUtils]: 31: Hoare triple {2114#false} assume #t~short172; {2114#false} is VALID [2022-04-27 11:05:57,581 INFO L290 TraceCheckUtils]: 30: Hoare triple {2114#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {2114#false} is VALID [2022-04-27 11:05:57,581 INFO L290 TraceCheckUtils]: 29: Hoare triple {2114#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {2114#false} is VALID [2022-04-27 11:05:57,581 INFO L290 TraceCheckUtils]: 28: Hoare triple {2114#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {2114#false} is VALID [2022-04-27 11:05:57,581 INFO L290 TraceCheckUtils]: 27: Hoare triple {2114#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {2114#false} is VALID [2022-04-27 11:05:57,581 INFO L290 TraceCheckUtils]: 26: Hoare triple {2114#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {2114#false} is VALID [2022-04-27 11:05:57,582 INFO L290 TraceCheckUtils]: 25: Hoare triple {2114#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {2114#false} is VALID [2022-04-27 11:05:57,582 INFO L290 TraceCheckUtils]: 24: Hoare triple {2114#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {2114#false} is VALID [2022-04-27 11:05:57,582 INFO L290 TraceCheckUtils]: 23: Hoare triple {2114#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {2114#false} is VALID [2022-04-27 11:05:57,583 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2387#(not (= |#Ultimate.C_memset_#amount| 24))} {2113#true} #672#return; {2114#false} is VALID [2022-04-27 11:05:57,583 INFO L290 TraceCheckUtils]: 21: Hoare triple {2387#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {2387#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-27 11:05:57,583 INFO L290 TraceCheckUtils]: 20: Hoare triple {2394#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {2387#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-27 11:05:57,585 INFO L290 TraceCheckUtils]: 19: Hoare triple {2398#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2394#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:05:57,586 INFO L290 TraceCheckUtils]: 18: Hoare triple {2402#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {2398#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:05:57,587 INFO L290 TraceCheckUtils]: 17: Hoare triple {2113#true} #t~loopctr188 := 0; {2402#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:05:57,587 INFO L272 TraceCheckUtils]: 16: Hoare triple {2113#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {2113#true} is VALID [2022-04-27 11:05:57,587 INFO L290 TraceCheckUtils]: 15: Hoare triple {2113#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {2113#true} is VALID [2022-04-27 11:05:57,587 INFO L290 TraceCheckUtils]: 14: Hoare triple {2113#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {2113#true} is VALID [2022-04-27 11:05:57,587 INFO L290 TraceCheckUtils]: 13: Hoare triple {2113#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {2113#true} is VALID [2022-04-27 11:05:57,587 INFO L290 TraceCheckUtils]: 12: Hoare triple {2113#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {2113#true} is VALID [2022-04-27 11:05:57,587 INFO L290 TraceCheckUtils]: 11: Hoare triple {2113#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {2113#true} is VALID [2022-04-27 11:05:57,587 INFO L290 TraceCheckUtils]: 10: Hoare triple {2113#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {2113#true} is VALID [2022-04-27 11:05:57,588 INFO L290 TraceCheckUtils]: 9: Hoare triple {2113#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {2113#true} is VALID [2022-04-27 11:05:57,588 INFO L290 TraceCheckUtils]: 8: Hoare triple {2113#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {2113#true} is VALID [2022-04-27 11:05:57,588 INFO L290 TraceCheckUtils]: 7: Hoare triple {2113#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {2113#true} is VALID [2022-04-27 11:05:57,588 INFO L272 TraceCheckUtils]: 6: Hoare triple {2113#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {2113#true} is VALID [2022-04-27 11:05:57,588 INFO L290 TraceCheckUtils]: 5: Hoare triple {2113#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {2113#true} is VALID [2022-04-27 11:05:57,588 INFO L272 TraceCheckUtils]: 4: Hoare triple {2113#true} call #t~ret187 := main(); {2113#true} is VALID [2022-04-27 11:05:57,588 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2113#true} {2113#true} #682#return; {2113#true} is VALID [2022-04-27 11:05:57,588 INFO L290 TraceCheckUtils]: 2: Hoare triple {2113#true} assume true; {2113#true} is VALID [2022-04-27 11:05:57,588 INFO L290 TraceCheckUtils]: 1: Hoare triple {2113#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {2113#true} is VALID [2022-04-27 11:05:57,588 INFO L272 TraceCheckUtils]: 0: Hoare triple {2113#true} call ULTIMATE.init(); {2113#true} is VALID [2022-04-27 11:05:57,589 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-27 11:05:57,589 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1742585690] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 11:05:57,589 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 11:05:57,589 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2022-04-27 11:05:57,589 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1955501176] [2022-04-27 11:05:57,589 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 11:05:57,590 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 3.6666666666666665) internal successors, (55), 13 states have internal predecessors, (55), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 52 [2022-04-27 11:05:57,591 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 11:05:57,591 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 3.6666666666666665) internal successors, (55), 13 states have internal predecessors, (55), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:05:57,658 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:05:57,659 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 11:05:57,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 11:05:57,659 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 11:05:57,660 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2022-04-27 11:05:57,660 INFO L87 Difference]: Start difference. First operand 86 states and 110 transitions. Second operand has 15 states, 15 states have (on average 3.6666666666666665) internal successors, (55), 13 states have internal predecessors, (55), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:05:59,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:59,483 INFO L93 Difference]: Finished difference Result 161 states and 209 transitions. [2022-04-27 11:05:59,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-27 11:05:59,483 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 3.6666666666666665) internal successors, (55), 13 states have internal predecessors, (55), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 52 [2022-04-27 11:05:59,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 11:05:59,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 3.6666666666666665) internal successors, (55), 13 states have internal predecessors, (55), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:05:59,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 197 transitions. [2022-04-27 11:05:59,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 3.6666666666666665) internal successors, (55), 13 states have internal predecessors, (55), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:05:59,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 197 transitions. [2022-04-27 11:05:59,491 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 197 transitions. [2022-04-27 11:05:59,682 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 197 edges. 197 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:05:59,684 INFO L225 Difference]: With dead ends: 161 [2022-04-27 11:05:59,684 INFO L226 Difference]: Without dead ends: 94 [2022-04-27 11:05:59,685 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 101 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=197, Invalid=559, Unknown=0, NotChecked=0, Total=756 [2022-04-27 11:05:59,686 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 107 mSDsluCounter, 79 mSDsCounter, 0 mSdLazyCounter, 489 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 111 SdHoareTripleChecker+Valid, 162 SdHoareTripleChecker+Invalid, 544 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 489 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 11:05:59,686 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [111 Valid, 162 Invalid, 544 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 489 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-27 11:05:59,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-04-27 11:05:59,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 90. [2022-04-27 11:05:59,718 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 11:05:59,720 INFO L82 GeneralOperation]: Start isEquivalent. First operand 94 states. Second operand has 90 states, 71 states have (on average 1.2535211267605635) internal successors, (89), 71 states have internal predecessors, (89), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:59,721 INFO L74 IsIncluded]: Start isIncluded. First operand 94 states. Second operand has 90 states, 71 states have (on average 1.2535211267605635) internal successors, (89), 71 states have internal predecessors, (89), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:59,721 INFO L87 Difference]: Start difference. First operand 94 states. Second operand has 90 states, 71 states have (on average 1.2535211267605635) internal successors, (89), 71 states have internal predecessors, (89), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:59,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:59,726 INFO L93 Difference]: Finished difference Result 94 states and 118 transitions. [2022-04-27 11:05:59,726 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 118 transitions. [2022-04-27 11:05:59,726 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:05:59,726 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:05:59,726 INFO L74 IsIncluded]: Start isIncluded. First operand has 90 states, 71 states have (on average 1.2535211267605635) internal successors, (89), 71 states have internal predecessors, (89), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 94 states. [2022-04-27 11:05:59,727 INFO L87 Difference]: Start difference. First operand has 90 states, 71 states have (on average 1.2535211267605635) internal successors, (89), 71 states have internal predecessors, (89), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 94 states. [2022-04-27 11:05:59,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:05:59,730 INFO L93 Difference]: Finished difference Result 94 states and 118 transitions. [2022-04-27 11:05:59,730 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 118 transitions. [2022-04-27 11:05:59,731 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:05:59,731 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:05:59,731 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 11:05:59,731 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 11:05:59,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 71 states have (on average 1.2535211267605635) internal successors, (89), 71 states have internal predecessors, (89), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:05:59,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 112 transitions. [2022-04-27 11:05:59,734 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 112 transitions. Word has length 52 [2022-04-27 11:05:59,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 11:05:59,735 INFO L495 AbstractCegarLoop]: Abstraction has 90 states and 112 transitions. [2022-04-27 11:05:59,735 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 3.6666666666666665) internal successors, (55), 13 states have internal predecessors, (55), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:05:59,735 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 112 transitions. [2022-04-27 11:05:59,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-27 11:05:59,735 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 11:05:59,736 INFO L195 NwaCegarLoop]: trace histogram [10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 11:05:59,757 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-27 11:05:59,947 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 11:05:59,948 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 11:05:59,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 11:05:59,948 INFO L85 PathProgramCache]: Analyzing trace with hash -356459190, now seen corresponding path program 3 times [2022-04-27 11:05:59,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 11:05:59,948 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2051318744] [2022-04-27 11:05:59,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 11:05:59,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 11:06:00,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:00,136 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 11:06:00,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:00,147 INFO L290 TraceCheckUtils]: 0: Hoare triple {3037#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3014#true} is VALID [2022-04-27 11:06:00,147 INFO L290 TraceCheckUtils]: 1: Hoare triple {3014#true} assume true; {3014#true} is VALID [2022-04-27 11:06:00,148 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3014#true} {3014#true} #682#return; {3014#true} is VALID [2022-04-27 11:06:00,150 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 11:06:00,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:00,382 INFO L290 TraceCheckUtils]: 0: Hoare triple {3038#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3039#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:06:00,383 INFO L290 TraceCheckUtils]: 1: Hoare triple {3039#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3040#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:00,384 INFO L290 TraceCheckUtils]: 2: Hoare triple {3040#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3041#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-27 11:06:00,385 INFO L290 TraceCheckUtils]: 3: Hoare triple {3041#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3042#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:00,386 INFO L290 TraceCheckUtils]: 4: Hoare triple {3042#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3043#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:00,388 INFO L290 TraceCheckUtils]: 5: Hoare triple {3043#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3044#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-27 11:06:00,389 INFO L290 TraceCheckUtils]: 6: Hoare triple {3044#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3045#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} is VALID [2022-04-27 11:06:00,396 INFO L290 TraceCheckUtils]: 7: Hoare triple {3045#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3046#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:00,400 INFO L290 TraceCheckUtils]: 8: Hoare triple {3046#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3046#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:00,401 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {3046#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {3014#true} #672#return; {3015#false} is VALID [2022-04-27 11:06:00,401 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 41 [2022-04-27 11:06:00,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:00,411 INFO L290 TraceCheckUtils]: 0: Hoare triple {3038#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3014#true} is VALID [2022-04-27 11:06:00,411 INFO L290 TraceCheckUtils]: 1: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:00,411 INFO L290 TraceCheckUtils]: 2: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:00,411 INFO L290 TraceCheckUtils]: 3: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:00,411 INFO L290 TraceCheckUtils]: 4: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:00,411 INFO L290 TraceCheckUtils]: 5: Hoare triple {3014#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3014#true} is VALID [2022-04-27 11:06:00,411 INFO L290 TraceCheckUtils]: 6: Hoare triple {3014#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3014#true} is VALID [2022-04-27 11:06:00,411 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {3014#true} {3015#false} #656#return; {3015#false} is VALID [2022-04-27 11:06:00,412 INFO L272 TraceCheckUtils]: 0: Hoare triple {3014#true} call ULTIMATE.init(); {3037#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 11:06:00,412 INFO L290 TraceCheckUtils]: 1: Hoare triple {3037#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3014#true} is VALID [2022-04-27 11:06:00,413 INFO L290 TraceCheckUtils]: 2: Hoare triple {3014#true} assume true; {3014#true} is VALID [2022-04-27 11:06:00,413 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3014#true} {3014#true} #682#return; {3014#true} is VALID [2022-04-27 11:06:00,413 INFO L272 TraceCheckUtils]: 4: Hoare triple {3014#true} call #t~ret187 := main(); {3014#true} is VALID [2022-04-27 11:06:00,413 INFO L290 TraceCheckUtils]: 5: Hoare triple {3014#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3014#true} is VALID [2022-04-27 11:06:00,413 INFO L272 TraceCheckUtils]: 6: Hoare triple {3014#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {3014#true} is VALID [2022-04-27 11:06:00,413 INFO L290 TraceCheckUtils]: 7: Hoare triple {3014#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3014#true} is VALID [2022-04-27 11:06:00,413 INFO L290 TraceCheckUtils]: 8: Hoare triple {3014#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3014#true} is VALID [2022-04-27 11:06:00,413 INFO L290 TraceCheckUtils]: 9: Hoare triple {3014#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:00,413 INFO L290 TraceCheckUtils]: 10: Hoare triple {3014#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3014#true} is VALID [2022-04-27 11:06:00,414 INFO L290 TraceCheckUtils]: 11: Hoare triple {3014#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:00,414 INFO L290 TraceCheckUtils]: 12: Hoare triple {3014#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3014#true} is VALID [2022-04-27 11:06:00,414 INFO L290 TraceCheckUtils]: 13: Hoare triple {3014#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:00,414 INFO L290 TraceCheckUtils]: 14: Hoare triple {3014#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3014#true} is VALID [2022-04-27 11:06:00,414 INFO L290 TraceCheckUtils]: 15: Hoare triple {3014#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3014#true} is VALID [2022-04-27 11:06:00,415 INFO L272 TraceCheckUtils]: 16: Hoare triple {3014#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {3038#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:06:00,415 INFO L290 TraceCheckUtils]: 17: Hoare triple {3038#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3039#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:06:00,417 INFO L290 TraceCheckUtils]: 18: Hoare triple {3039#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3040#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:00,418 INFO L290 TraceCheckUtils]: 19: Hoare triple {3040#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3041#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-27 11:06:00,419 INFO L290 TraceCheckUtils]: 20: Hoare triple {3041#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3042#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:00,420 INFO L290 TraceCheckUtils]: 21: Hoare triple {3042#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3043#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:00,421 INFO L290 TraceCheckUtils]: 22: Hoare triple {3043#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3044#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-27 11:06:00,422 INFO L290 TraceCheckUtils]: 23: Hoare triple {3044#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3045#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} is VALID [2022-04-27 11:06:00,423 INFO L290 TraceCheckUtils]: 24: Hoare triple {3045#(and (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|)) (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (or (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296))) (<= |#Ultimate.C_memset_#t~loopctr188| 6)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3046#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:00,423 INFO L290 TraceCheckUtils]: 25: Hoare triple {3046#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3046#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:00,424 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {3046#(or (<= |#Ultimate.C_memset_#amount| 6) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {3014#true} #672#return; {3015#false} is VALID [2022-04-27 11:06:00,424 INFO L290 TraceCheckUtils]: 27: Hoare triple {3015#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3015#false} is VALID [2022-04-27 11:06:00,425 INFO L290 TraceCheckUtils]: 28: Hoare triple {3015#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {3015#false} is VALID [2022-04-27 11:06:00,425 INFO L290 TraceCheckUtils]: 29: Hoare triple {3015#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3015#false} is VALID [2022-04-27 11:06:00,425 INFO L290 TraceCheckUtils]: 30: Hoare triple {3015#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3015#false} is VALID [2022-04-27 11:06:00,425 INFO L290 TraceCheckUtils]: 31: Hoare triple {3015#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3015#false} is VALID [2022-04-27 11:06:00,425 INFO L290 TraceCheckUtils]: 32: Hoare triple {3015#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3015#false} is VALID [2022-04-27 11:06:00,425 INFO L290 TraceCheckUtils]: 33: Hoare triple {3015#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3015#false} is VALID [2022-04-27 11:06:00,425 INFO L290 TraceCheckUtils]: 34: Hoare triple {3015#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3015#false} is VALID [2022-04-27 11:06:00,425 INFO L290 TraceCheckUtils]: 35: Hoare triple {3015#false} assume #t~short172; {3015#false} is VALID [2022-04-27 11:06:00,425 INFO L290 TraceCheckUtils]: 36: Hoare triple {3015#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3015#false} is VALID [2022-04-27 11:06:00,426 INFO L290 TraceCheckUtils]: 37: Hoare triple {3015#false} assume 0 != #t~mem173;havoc #t~mem173; {3015#false} is VALID [2022-04-27 11:06:00,426 INFO L272 TraceCheckUtils]: 38: Hoare triple {3015#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3015#false} is VALID [2022-04-27 11:06:00,426 INFO L290 TraceCheckUtils]: 39: Hoare triple {3015#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3015#false} is VALID [2022-04-27 11:06:00,426 INFO L290 TraceCheckUtils]: 40: Hoare triple {3015#false} assume !(~len <= 0); {3015#false} is VALID [2022-04-27 11:06:00,426 INFO L272 TraceCheckUtils]: 41: Hoare triple {3015#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3038#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:06:00,445 INFO L290 TraceCheckUtils]: 42: Hoare triple {3038#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {3014#true} is VALID [2022-04-27 11:06:00,445 INFO L290 TraceCheckUtils]: 43: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:00,445 INFO L290 TraceCheckUtils]: 44: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:00,445 INFO L290 TraceCheckUtils]: 45: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:00,445 INFO L290 TraceCheckUtils]: 46: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:00,446 INFO L290 TraceCheckUtils]: 47: Hoare triple {3014#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3014#true} is VALID [2022-04-27 11:06:00,446 INFO L290 TraceCheckUtils]: 48: Hoare triple {3014#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3014#true} is VALID [2022-04-27 11:06:00,446 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {3014#true} {3015#false} #656#return; {3015#false} is VALID [2022-04-27 11:06:00,446 INFO L290 TraceCheckUtils]: 50: Hoare triple {3015#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3015#false} is VALID [2022-04-27 11:06:00,446 INFO L290 TraceCheckUtils]: 51: Hoare triple {3015#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3015#false} is VALID [2022-04-27 11:06:00,446 INFO L272 TraceCheckUtils]: 52: Hoare triple {3015#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3015#false} is VALID [2022-04-27 11:06:00,446 INFO L290 TraceCheckUtils]: 53: Hoare triple {3015#false} ~cond := #in~cond; {3015#false} is VALID [2022-04-27 11:06:00,446 INFO L290 TraceCheckUtils]: 54: Hoare triple {3015#false} assume 0 == ~cond; {3015#false} is VALID [2022-04-27 11:06:00,446 INFO L290 TraceCheckUtils]: 55: Hoare triple {3015#false} assume !false; {3015#false} is VALID [2022-04-27 11:06:00,447 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 58 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-27 11:06:00,447 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 11:06:00,447 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2051318744] [2022-04-27 11:06:00,447 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2051318744] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 11:06:00,447 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [26152174] [2022-04-27 11:06:00,447 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 11:06:00,447 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 11:06:00,447 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 11:06:00,452 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 11:06:00,453 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 11:06:01,215 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 11:06:01,215 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 11:06:01,220 INFO L263 TraceCheckSpWp]: Trace formula consists of 723 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 11:06:01,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:01,245 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 11:06:01,638 INFO L272 TraceCheckUtils]: 0: Hoare triple {3014#true} call ULTIMATE.init(); {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L290 TraceCheckUtils]: 1: Hoare triple {3014#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L290 TraceCheckUtils]: 2: Hoare triple {3014#true} assume true; {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3014#true} {3014#true} #682#return; {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L272 TraceCheckUtils]: 4: Hoare triple {3014#true} call #t~ret187 := main(); {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L290 TraceCheckUtils]: 5: Hoare triple {3014#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L272 TraceCheckUtils]: 6: Hoare triple {3014#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L290 TraceCheckUtils]: 7: Hoare triple {3014#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L290 TraceCheckUtils]: 8: Hoare triple {3014#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L290 TraceCheckUtils]: 9: Hoare triple {3014#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L290 TraceCheckUtils]: 10: Hoare triple {3014#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3014#true} is VALID [2022-04-27 11:06:01,639 INFO L290 TraceCheckUtils]: 11: Hoare triple {3014#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 12: Hoare triple {3014#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 13: Hoare triple {3014#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 14: Hoare triple {3014#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 15: Hoare triple {3014#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L272 TraceCheckUtils]: 16: Hoare triple {3014#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 17: Hoare triple {3014#true} #t~loopctr188 := 0; {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 18: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 19: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 20: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 21: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 22: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 23: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 24: Hoare triple {3014#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3014#true} is VALID [2022-04-27 11:06:01,640 INFO L290 TraceCheckUtils]: 25: Hoare triple {3014#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3014#true} is VALID [2022-04-27 11:06:01,641 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {3014#true} {3014#true} #672#return; {3014#true} is VALID [2022-04-27 11:06:01,641 INFO L290 TraceCheckUtils]: 27: Hoare triple {3014#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3014#true} is VALID [2022-04-27 11:06:01,641 INFO L290 TraceCheckUtils]: 28: Hoare triple {3014#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,641 INFO L290 TraceCheckUtils]: 29: Hoare triple {3014#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3014#true} is VALID [2022-04-27 11:06:01,641 INFO L290 TraceCheckUtils]: 30: Hoare triple {3014#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3014#true} is VALID [2022-04-27 11:06:01,641 INFO L290 TraceCheckUtils]: 31: Hoare triple {3014#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3014#true} is VALID [2022-04-27 11:06:01,641 INFO L290 TraceCheckUtils]: 32: Hoare triple {3014#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3014#true} is VALID [2022-04-27 11:06:01,641 INFO L290 TraceCheckUtils]: 33: Hoare triple {3014#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3014#true} is VALID [2022-04-27 11:06:01,641 INFO L290 TraceCheckUtils]: 34: Hoare triple {3014#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3014#true} is VALID [2022-04-27 11:06:01,641 INFO L290 TraceCheckUtils]: 35: Hoare triple {3014#true} assume #t~short172; {3014#true} is VALID [2022-04-27 11:06:01,642 INFO L290 TraceCheckUtils]: 36: Hoare triple {3014#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,642 INFO L290 TraceCheckUtils]: 37: Hoare triple {3014#true} assume 0 != #t~mem173;havoc #t~mem173; {3014#true} is VALID [2022-04-27 11:06:01,642 INFO L272 TraceCheckUtils]: 38: Hoare triple {3014#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3014#true} is VALID [2022-04-27 11:06:01,642 INFO L290 TraceCheckUtils]: 39: Hoare triple {3014#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3014#true} is VALID [2022-04-27 11:06:01,642 INFO L290 TraceCheckUtils]: 40: Hoare triple {3014#true} assume !(~len <= 0); {3014#true} is VALID [2022-04-27 11:06:01,642 INFO L272 TraceCheckUtils]: 41: Hoare triple {3014#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3014#true} is VALID [2022-04-27 11:06:01,645 INFO L290 TraceCheckUtils]: 42: Hoare triple {3014#true} #t~loopctr188 := 0; {3039#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:06:01,646 INFO L290 TraceCheckUtils]: 43: Hoare triple {3039#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3179#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:01,647 INFO L290 TraceCheckUtils]: 44: Hoare triple {3179#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3183#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-27 11:06:01,647 INFO L290 TraceCheckUtils]: 45: Hoare triple {3183#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3187#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-27 11:06:01,648 INFO L290 TraceCheckUtils]: 46: Hoare triple {3187#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3191#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:01,650 INFO L290 TraceCheckUtils]: 47: Hoare triple {3191#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3195#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4) 4294967296) 1))} is VALID [2022-04-27 11:06:01,650 INFO L290 TraceCheckUtils]: 48: Hoare triple {3195#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4) 4294967296) 1))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3195#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4) 4294967296) 1))} is VALID [2022-04-27 11:06:01,651 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {3195#(< 0 (+ (div (+ (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296)) 4) 4294967296) 1))} {3014#true} #656#return; {3015#false} is VALID [2022-04-27 11:06:01,651 INFO L290 TraceCheckUtils]: 50: Hoare triple {3015#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3015#false} is VALID [2022-04-27 11:06:01,651 INFO L290 TraceCheckUtils]: 51: Hoare triple {3015#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3015#false} is VALID [2022-04-27 11:06:01,652 INFO L272 TraceCheckUtils]: 52: Hoare triple {3015#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3015#false} is VALID [2022-04-27 11:06:01,652 INFO L290 TraceCheckUtils]: 53: Hoare triple {3015#false} ~cond := #in~cond; {3015#false} is VALID [2022-04-27 11:06:01,652 INFO L290 TraceCheckUtils]: 54: Hoare triple {3015#false} assume 0 == ~cond; {3015#false} is VALID [2022-04-27 11:06:01,652 INFO L290 TraceCheckUtils]: 55: Hoare triple {3015#false} assume !false; {3015#false} is VALID [2022-04-27 11:06:01,652 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 37 proven. 10 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-27 11:06:01,652 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 11:06:01,949 INFO L290 TraceCheckUtils]: 55: Hoare triple {3015#false} assume !false; {3015#false} is VALID [2022-04-27 11:06:01,950 INFO L290 TraceCheckUtils]: 54: Hoare triple {3015#false} assume 0 == ~cond; {3015#false} is VALID [2022-04-27 11:06:01,950 INFO L290 TraceCheckUtils]: 53: Hoare triple {3015#false} ~cond := #in~cond; {3015#false} is VALID [2022-04-27 11:06:01,950 INFO L272 TraceCheckUtils]: 52: Hoare triple {3015#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {3015#false} is VALID [2022-04-27 11:06:01,950 INFO L290 TraceCheckUtils]: 51: Hoare triple {3015#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {3015#false} is VALID [2022-04-27 11:06:01,950 INFO L290 TraceCheckUtils]: 50: Hoare triple {3015#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {3015#false} is VALID [2022-04-27 11:06:01,951 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {3241#(not (= |#Ultimate.C_memset_#amount| 80))} {3014#true} #656#return; {3015#false} is VALID [2022-04-27 11:06:01,951 INFO L290 TraceCheckUtils]: 48: Hoare triple {3241#(not (= |#Ultimate.C_memset_#amount| 80))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3241#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-27 11:06:01,951 INFO L290 TraceCheckUtils]: 47: Hoare triple {3248#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3241#(not (= |#Ultimate.C_memset_#amount| 80))} is VALID [2022-04-27 11:06:01,952 INFO L290 TraceCheckUtils]: 46: Hoare triple {3252#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3248#(or (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-27 11:06:01,953 INFO L290 TraceCheckUtils]: 45: Hoare triple {3256#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3252#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:06:01,954 INFO L290 TraceCheckUtils]: 44: Hoare triple {3260#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3256#(or (not (= |#Ultimate.C_memset_#amount| 80)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:06:01,955 INFO L290 TraceCheckUtils]: 43: Hoare triple {3264#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3260#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-27 11:06:01,956 INFO L290 TraceCheckUtils]: 42: Hoare triple {3014#true} #t~loopctr188 := 0; {3264#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 80)))} is VALID [2022-04-27 11:06:01,956 INFO L272 TraceCheckUtils]: 41: Hoare triple {3014#true} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {3014#true} is VALID [2022-04-27 11:06:01,956 INFO L290 TraceCheckUtils]: 40: Hoare triple {3014#true} assume !(~len <= 0); {3014#true} is VALID [2022-04-27 11:06:01,956 INFO L290 TraceCheckUtils]: 39: Hoare triple {3014#true} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {3014#true} is VALID [2022-04-27 11:06:01,956 INFO L272 TraceCheckUtils]: 38: Hoare triple {3014#true} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {3014#true} is VALID [2022-04-27 11:06:01,956 INFO L290 TraceCheckUtils]: 37: Hoare triple {3014#true} assume 0 != #t~mem173;havoc #t~mem173; {3014#true} is VALID [2022-04-27 11:06:01,956 INFO L290 TraceCheckUtils]: 36: Hoare triple {3014#true} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,956 INFO L290 TraceCheckUtils]: 35: Hoare triple {3014#true} assume #t~short172; {3014#true} is VALID [2022-04-27 11:06:01,956 INFO L290 TraceCheckUtils]: 34: Hoare triple {3014#true} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L290 TraceCheckUtils]: 33: Hoare triple {3014#true} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L290 TraceCheckUtils]: 32: Hoare triple {3014#true} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L290 TraceCheckUtils]: 31: Hoare triple {3014#true} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L290 TraceCheckUtils]: 30: Hoare triple {3014#true} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L290 TraceCheckUtils]: 29: Hoare triple {3014#true} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L290 TraceCheckUtils]: 28: Hoare triple {3014#true} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L290 TraceCheckUtils]: 27: Hoare triple {3014#true} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {3014#true} {3014#true} #672#return; {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L290 TraceCheckUtils]: 25: Hoare triple {3014#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L290 TraceCheckUtils]: 24: Hoare triple {3014#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {3014#true} is VALID [2022-04-27 11:06:01,957 INFO L290 TraceCheckUtils]: 23: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 22: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 21: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 20: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 19: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 18: Hoare triple {3014#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 17: Hoare triple {3014#true} #t~loopctr188 := 0; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L272 TraceCheckUtils]: 16: Hoare triple {3014#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 15: Hoare triple {3014#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 14: Hoare triple {3014#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 13: Hoare triple {3014#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 12: Hoare triple {3014#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 11: Hoare triple {3014#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 10: Hoare triple {3014#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 9: Hoare triple {3014#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 8: Hoare triple {3014#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {3014#true} is VALID [2022-04-27 11:06:01,958 INFO L290 TraceCheckUtils]: 7: Hoare triple {3014#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {3014#true} is VALID [2022-04-27 11:06:01,959 INFO L272 TraceCheckUtils]: 6: Hoare triple {3014#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {3014#true} is VALID [2022-04-27 11:06:01,959 INFO L290 TraceCheckUtils]: 5: Hoare triple {3014#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {3014#true} is VALID [2022-04-27 11:06:01,959 INFO L272 TraceCheckUtils]: 4: Hoare triple {3014#true} call #t~ret187 := main(); {3014#true} is VALID [2022-04-27 11:06:01,959 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3014#true} {3014#true} #682#return; {3014#true} is VALID [2022-04-27 11:06:01,959 INFO L290 TraceCheckUtils]: 2: Hoare triple {3014#true} assume true; {3014#true} is VALID [2022-04-27 11:06:01,959 INFO L290 TraceCheckUtils]: 1: Hoare triple {3014#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {3014#true} is VALID [2022-04-27 11:06:01,959 INFO L272 TraceCheckUtils]: 0: Hoare triple {3014#true} call ULTIMATE.init(); {3014#true} is VALID [2022-04-27 11:06:01,959 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 37 proven. 10 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-27 11:06:01,959 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [26152174] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 11:06:01,959 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 11:06:01,959 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 23 [2022-04-27 11:06:01,960 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011821378] [2022-04-27 11:06:01,960 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 11:06:01,960 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.130434782608696) internal successors, (72), 21 states have internal predecessors, (72), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 56 [2022-04-27 11:06:01,961 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 11:06:01,961 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 3.130434782608696) internal successors, (72), 21 states have internal predecessors, (72), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:06:02,028 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:06:02,028 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-27 11:06:02,028 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 11:06:02,028 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-27 11:06:02,029 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=382, Unknown=0, NotChecked=0, Total=506 [2022-04-27 11:06:02,029 INFO L87 Difference]: Start difference. First operand 90 states and 112 transitions. Second operand has 23 states, 23 states have (on average 3.130434782608696) internal successors, (72), 21 states have internal predecessors, (72), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:06:04,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:06:04,574 INFO L93 Difference]: Finished difference Result 174 states and 228 transitions. [2022-04-27 11:06:04,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-27 11:06:04,575 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.130434782608696) internal successors, (72), 21 states have internal predecessors, (72), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 56 [2022-04-27 11:06:04,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 11:06:04,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 3.130434782608696) internal successors, (72), 21 states have internal predecessors, (72), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:06:04,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 220 transitions. [2022-04-27 11:06:04,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 3.130434782608696) internal successors, (72), 21 states have internal predecessors, (72), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:06:04,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 220 transitions. [2022-04-27 11:06:04,583 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 220 transitions. [2022-04-27 11:06:04,814 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 220 edges. 220 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:06:04,816 INFO L225 Difference]: With dead ends: 174 [2022-04-27 11:06:04,816 INFO L226 Difference]: Without dead ends: 103 [2022-04-27 11:06:04,818 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 105 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 337 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=521, Invalid=1735, Unknown=0, NotChecked=0, Total=2256 [2022-04-27 11:06:04,818 INFO L413 NwaCegarLoop]: 85 mSDtfsCounter, 149 mSDsluCounter, 93 mSDsCounter, 0 mSdLazyCounter, 640 mSolverCounterSat, 89 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 153 SdHoareTripleChecker+Valid, 178 SdHoareTripleChecker+Invalid, 729 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 89 IncrementalHoareTripleChecker+Valid, 640 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 11:06:04,819 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [153 Valid, 178 Invalid, 729 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [89 Valid, 640 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-27 11:06:04,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2022-04-27 11:06:04,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 99. [2022-04-27 11:06:04,864 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 11:06:04,864 INFO L82 GeneralOperation]: Start isEquivalent. First operand 103 states. Second operand has 99 states, 80 states have (on average 1.225) internal successors, (98), 80 states have internal predecessors, (98), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:06:04,865 INFO L74 IsIncluded]: Start isIncluded. First operand 103 states. Second operand has 99 states, 80 states have (on average 1.225) internal successors, (98), 80 states have internal predecessors, (98), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:06:04,865 INFO L87 Difference]: Start difference. First operand 103 states. Second operand has 99 states, 80 states have (on average 1.225) internal successors, (98), 80 states have internal predecessors, (98), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:06:04,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:06:04,868 INFO L93 Difference]: Finished difference Result 103 states and 127 transitions. [2022-04-27 11:06:04,868 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 127 transitions. [2022-04-27 11:06:04,869 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:06:04,869 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:06:04,869 INFO L74 IsIncluded]: Start isIncluded. First operand has 99 states, 80 states have (on average 1.225) internal successors, (98), 80 states have internal predecessors, (98), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 103 states. [2022-04-27 11:06:04,870 INFO L87 Difference]: Start difference. First operand has 99 states, 80 states have (on average 1.225) internal successors, (98), 80 states have internal predecessors, (98), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 103 states. [2022-04-27 11:06:04,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:06:04,873 INFO L93 Difference]: Finished difference Result 103 states and 127 transitions. [2022-04-27 11:06:04,873 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 127 transitions. [2022-04-27 11:06:04,873 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:06:04,873 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:06:04,873 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 11:06:04,873 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 11:06:04,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 80 states have (on average 1.225) internal successors, (98), 80 states have internal predecessors, (98), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:06:04,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 121 transitions. [2022-04-27 11:06:04,876 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 121 transitions. Word has length 56 [2022-04-27 11:06:04,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 11:06:04,877 INFO L495 AbstractCegarLoop]: Abstraction has 99 states and 121 transitions. [2022-04-27 11:06:04,877 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 3.130434782608696) internal successors, (72), 21 states have internal predecessors, (72), 2 states have call successors, (11), 4 states have call predecessors, (11), 4 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:06:04,877 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 121 transitions. [2022-04-27 11:06:04,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-04-27 11:06:04,877 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 11:06:04,878 INFO L195 NwaCegarLoop]: trace histogram [19, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 11:06:04,904 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 11:06:05,091 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 11:06:05,092 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 11:06:05,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 11:06:05,092 INFO L85 PathProgramCache]: Analyzing trace with hash -2022236638, now seen corresponding path program 4 times [2022-04-27 11:06:05,092 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 11:06:05,092 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263183313] [2022-04-27 11:06:05,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 11:06:05,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 11:06:05,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:05,243 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 11:06:05,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:05,253 INFO L290 TraceCheckUtils]: 0: Hoare triple {4065#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4033#true} is VALID [2022-04-27 11:06:05,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {4033#true} assume true; {4033#true} is VALID [2022-04-27 11:06:05,253 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4033#true} {4033#true} #682#return; {4033#true} is VALID [2022-04-27 11:06:05,256 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 11:06:05,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:05,515 INFO L290 TraceCheckUtils]: 0: Hoare triple {4066#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4067#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:06:05,516 INFO L290 TraceCheckUtils]: 1: Hoare triple {4067#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4068#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:05,517 INFO L290 TraceCheckUtils]: 2: Hoare triple {4068#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4069#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-27 11:06:05,518 INFO L290 TraceCheckUtils]: 3: Hoare triple {4069#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4070#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:05,518 INFO L290 TraceCheckUtils]: 4: Hoare triple {4070#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4071#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:05,519 INFO L290 TraceCheckUtils]: 5: Hoare triple {4071#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4072#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-27 11:06:05,520 INFO L290 TraceCheckUtils]: 6: Hoare triple {4072#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4073#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-27 11:06:05,521 INFO L290 TraceCheckUtils]: 7: Hoare triple {4073#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4074#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-27 11:06:05,522 INFO L290 TraceCheckUtils]: 8: Hoare triple {4074#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4075#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:05,522 INFO L290 TraceCheckUtils]: 9: Hoare triple {4075#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4075#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:05,523 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {4075#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {4033#true} #672#return; {4034#false} is VALID [2022-04-27 11:06:05,523 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-27 11:06:05,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:05,549 INFO L290 TraceCheckUtils]: 0: Hoare triple {4066#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4033#true} is VALID [2022-04-27 11:06:05,550 INFO L290 TraceCheckUtils]: 1: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,550 INFO L290 TraceCheckUtils]: 2: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,550 INFO L290 TraceCheckUtils]: 3: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,550 INFO L290 TraceCheckUtils]: 4: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,550 INFO L290 TraceCheckUtils]: 5: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,550 INFO L290 TraceCheckUtils]: 6: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,550 INFO L290 TraceCheckUtils]: 7: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,550 INFO L290 TraceCheckUtils]: 8: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,551 INFO L290 TraceCheckUtils]: 9: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,551 INFO L290 TraceCheckUtils]: 10: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,551 INFO L290 TraceCheckUtils]: 11: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,551 INFO L290 TraceCheckUtils]: 12: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,551 INFO L290 TraceCheckUtils]: 13: Hoare triple {4033#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4033#true} is VALID [2022-04-27 11:06:05,551 INFO L290 TraceCheckUtils]: 14: Hoare triple {4033#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4033#true} is VALID [2022-04-27 11:06:05,551 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {4033#true} {4034#false} #656#return; {4034#false} is VALID [2022-04-27 11:06:05,552 INFO L272 TraceCheckUtils]: 0: Hoare triple {4033#true} call ULTIMATE.init(); {4065#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 11:06:05,552 INFO L290 TraceCheckUtils]: 1: Hoare triple {4065#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4033#true} is VALID [2022-04-27 11:06:05,552 INFO L290 TraceCheckUtils]: 2: Hoare triple {4033#true} assume true; {4033#true} is VALID [2022-04-27 11:06:05,552 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4033#true} {4033#true} #682#return; {4033#true} is VALID [2022-04-27 11:06:05,552 INFO L272 TraceCheckUtils]: 4: Hoare triple {4033#true} call #t~ret187 := main(); {4033#true} is VALID [2022-04-27 11:06:05,552 INFO L290 TraceCheckUtils]: 5: Hoare triple {4033#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4033#true} is VALID [2022-04-27 11:06:05,552 INFO L272 TraceCheckUtils]: 6: Hoare triple {4033#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {4033#true} is VALID [2022-04-27 11:06:05,553 INFO L290 TraceCheckUtils]: 7: Hoare triple {4033#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4033#true} is VALID [2022-04-27 11:06:05,553 INFO L290 TraceCheckUtils]: 8: Hoare triple {4033#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4033#true} is VALID [2022-04-27 11:06:05,553 INFO L290 TraceCheckUtils]: 9: Hoare triple {4033#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4033#true} is VALID [2022-04-27 11:06:05,553 INFO L290 TraceCheckUtils]: 10: Hoare triple {4033#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4033#true} is VALID [2022-04-27 11:06:05,553 INFO L290 TraceCheckUtils]: 11: Hoare triple {4033#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4033#true} is VALID [2022-04-27 11:06:05,553 INFO L290 TraceCheckUtils]: 12: Hoare triple {4033#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4033#true} is VALID [2022-04-27 11:06:05,553 INFO L290 TraceCheckUtils]: 13: Hoare triple {4033#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4033#true} is VALID [2022-04-27 11:06:05,553 INFO L290 TraceCheckUtils]: 14: Hoare triple {4033#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4033#true} is VALID [2022-04-27 11:06:05,553 INFO L290 TraceCheckUtils]: 15: Hoare triple {4033#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4033#true} is VALID [2022-04-27 11:06:05,554 INFO L272 TraceCheckUtils]: 16: Hoare triple {4033#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {4066#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:06:05,554 INFO L290 TraceCheckUtils]: 17: Hoare triple {4066#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4067#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:06:05,556 INFO L290 TraceCheckUtils]: 18: Hoare triple {4067#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4068#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:05,557 INFO L290 TraceCheckUtils]: 19: Hoare triple {4068#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4069#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-27 11:06:05,558 INFO L290 TraceCheckUtils]: 20: Hoare triple {4069#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4070#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:05,559 INFO L290 TraceCheckUtils]: 21: Hoare triple {4070#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4071#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:05,560 INFO L290 TraceCheckUtils]: 22: Hoare triple {4071#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4072#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-27 11:06:05,561 INFO L290 TraceCheckUtils]: 23: Hoare triple {4072#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4073#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-27 11:06:05,573 INFO L290 TraceCheckUtils]: 24: Hoare triple {4073#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4074#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-27 11:06:05,574 INFO L290 TraceCheckUtils]: 25: Hoare triple {4074#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 7) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4075#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:05,574 INFO L290 TraceCheckUtils]: 26: Hoare triple {4075#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4075#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:05,575 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {4075#(or (<= |#Ultimate.C_memset_#amount| 7) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {4033#true} #672#return; {4034#false} is VALID [2022-04-27 11:06:05,575 INFO L290 TraceCheckUtils]: 28: Hoare triple {4034#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 29: Hoare triple {4034#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 30: Hoare triple {4034#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 31: Hoare triple {4034#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 32: Hoare triple {4034#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 33: Hoare triple {4034#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 34: Hoare triple {4034#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 35: Hoare triple {4034#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 36: Hoare triple {4034#false} assume #t~short172; {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 37: Hoare triple {4034#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 38: Hoare triple {4034#false} assume 0 != #t~mem173;havoc #t~mem173; {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L272 TraceCheckUtils]: 39: Hoare triple {4034#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4034#false} is VALID [2022-04-27 11:06:05,576 INFO L290 TraceCheckUtils]: 40: Hoare triple {4034#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4034#false} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 41: Hoare triple {4034#false} assume !(~len <= 0); {4034#false} is VALID [2022-04-27 11:06:05,577 INFO L272 TraceCheckUtils]: 42: Hoare triple {4034#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4066#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 43: Hoare triple {4066#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {4033#true} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 44: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 45: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 46: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 47: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 48: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 49: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 50: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 51: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,577 INFO L290 TraceCheckUtils]: 52: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,578 INFO L290 TraceCheckUtils]: 53: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,578 INFO L290 TraceCheckUtils]: 54: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,578 INFO L290 TraceCheckUtils]: 55: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:05,578 INFO L290 TraceCheckUtils]: 56: Hoare triple {4033#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4033#true} is VALID [2022-04-27 11:06:05,578 INFO L290 TraceCheckUtils]: 57: Hoare triple {4033#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4033#true} is VALID [2022-04-27 11:06:05,578 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {4033#true} {4034#false} #656#return; {4034#false} is VALID [2022-04-27 11:06:05,578 INFO L290 TraceCheckUtils]: 59: Hoare triple {4034#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4034#false} is VALID [2022-04-27 11:06:05,578 INFO L290 TraceCheckUtils]: 60: Hoare triple {4034#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4034#false} is VALID [2022-04-27 11:06:05,578 INFO L272 TraceCheckUtils]: 61: Hoare triple {4034#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4034#false} is VALID [2022-04-27 11:06:05,578 INFO L290 TraceCheckUtils]: 62: Hoare triple {4034#false} ~cond := #in~cond; {4034#false} is VALID [2022-04-27 11:06:05,578 INFO L290 TraceCheckUtils]: 63: Hoare triple {4034#false} assume 0 == ~cond; {4034#false} is VALID [2022-04-27 11:06:05,578 INFO L290 TraceCheckUtils]: 64: Hoare triple {4034#false} assume !false; {4034#false} is VALID [2022-04-27 11:06:05,579 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2022-04-27 11:06:05,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 11:06:05,579 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263183313] [2022-04-27 11:06:05,579 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [263183313] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 11:06:05,579 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1437345613] [2022-04-27 11:06:05,579 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 11:06:05,580 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 11:06:05,580 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 11:06:05,581 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 11:06:05,586 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 11:06:05,817 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 11:06:05,817 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 11:06:05,821 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 11:06:05,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:05,839 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 11:06:06,540 INFO L272 TraceCheckUtils]: 0: Hoare triple {4033#true} call ULTIMATE.init(); {4033#true} is VALID [2022-04-27 11:06:06,540 INFO L290 TraceCheckUtils]: 1: Hoare triple {4033#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4033#true} is VALID [2022-04-27 11:06:06,540 INFO L290 TraceCheckUtils]: 2: Hoare triple {4033#true} assume true; {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4033#true} {4033#true} #682#return; {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L272 TraceCheckUtils]: 4: Hoare triple {4033#true} call #t~ret187 := main(); {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L290 TraceCheckUtils]: 5: Hoare triple {4033#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L272 TraceCheckUtils]: 6: Hoare triple {4033#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L290 TraceCheckUtils]: 7: Hoare triple {4033#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L290 TraceCheckUtils]: 8: Hoare triple {4033#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L290 TraceCheckUtils]: 9: Hoare triple {4033#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L290 TraceCheckUtils]: 10: Hoare triple {4033#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L290 TraceCheckUtils]: 11: Hoare triple {4033#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L290 TraceCheckUtils]: 12: Hoare triple {4033#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L290 TraceCheckUtils]: 13: Hoare triple {4033#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L290 TraceCheckUtils]: 14: Hoare triple {4033#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L290 TraceCheckUtils]: 15: Hoare triple {4033#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4033#true} is VALID [2022-04-27 11:06:06,541 INFO L272 TraceCheckUtils]: 16: Hoare triple {4033#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {4033#true} is VALID [2022-04-27 11:06:06,542 INFO L290 TraceCheckUtils]: 17: Hoare triple {4033#true} #t~loopctr188 := 0; {4067#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:06:06,543 INFO L290 TraceCheckUtils]: 18: Hoare triple {4067#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4133#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:06,544 INFO L290 TraceCheckUtils]: 19: Hoare triple {4133#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4137#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-27 11:06:06,544 INFO L290 TraceCheckUtils]: 20: Hoare triple {4137#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4141#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} is VALID [2022-04-27 11:06:06,545 INFO L290 TraceCheckUtils]: 21: Hoare triple {4141#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4145#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:06,546 INFO L290 TraceCheckUtils]: 22: Hoare triple {4145#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4149#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-27 11:06:06,547 INFO L290 TraceCheckUtils]: 23: Hoare triple {4149#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967295) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4153#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:06:06,548 INFO L290 TraceCheckUtils]: 24: Hoare triple {4153#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 6) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967294) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4157#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967293) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:06,550 INFO L290 TraceCheckUtils]: 25: Hoare triple {4157#(and (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4294967293) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4161#(and (< (div (+ (- 4294967301) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ 4294967303 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} is VALID [2022-04-27 11:06:06,550 INFO L290 TraceCheckUtils]: 26: Hoare triple {4161#(and (< (div (+ (- 4294967301) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ 4294967303 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4161#(and (< (div (+ (- 4294967301) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ 4294967303 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} is VALID [2022-04-27 11:06:06,551 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {4161#(and (< (div (+ (- 4294967301) (mod |#Ultimate.C_memset_#amount| 4294967296)) (- 4294967296)) 2) (< 0 (div (+ 4294967303 (* (- 1) (mod |#Ultimate.C_memset_#amount| 4294967296))) 4294967296)))} {4033#true} #672#return; {4034#false} is VALID [2022-04-27 11:06:06,551 INFO L290 TraceCheckUtils]: 28: Hoare triple {4034#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4034#false} is VALID [2022-04-27 11:06:06,551 INFO L290 TraceCheckUtils]: 29: Hoare triple {4034#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {4034#false} is VALID [2022-04-27 11:06:06,551 INFO L290 TraceCheckUtils]: 30: Hoare triple {4034#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4034#false} is VALID [2022-04-27 11:06:06,551 INFO L290 TraceCheckUtils]: 31: Hoare triple {4034#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4034#false} is VALID [2022-04-27 11:06:06,551 INFO L290 TraceCheckUtils]: 32: Hoare triple {4034#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4034#false} is VALID [2022-04-27 11:06:06,551 INFO L290 TraceCheckUtils]: 33: Hoare triple {4034#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 34: Hoare triple {4034#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 35: Hoare triple {4034#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 36: Hoare triple {4034#false} assume #t~short172; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 37: Hoare triple {4034#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 38: Hoare triple {4034#false} assume 0 != #t~mem173;havoc #t~mem173; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L272 TraceCheckUtils]: 39: Hoare triple {4034#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 40: Hoare triple {4034#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 41: Hoare triple {4034#false} assume !(~len <= 0); {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L272 TraceCheckUtils]: 42: Hoare triple {4034#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 43: Hoare triple {4034#false} #t~loopctr188 := 0; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 44: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 45: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 46: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 47: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 48: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,552 INFO L290 TraceCheckUtils]: 49: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 50: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 51: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 52: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 53: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 54: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 55: Hoare triple {4034#false} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 56: Hoare triple {4034#false} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 57: Hoare triple {4034#false} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {4034#false} {4034#false} #656#return; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 59: Hoare triple {4034#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 60: Hoare triple {4034#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L272 TraceCheckUtils]: 61: Hoare triple {4034#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 62: Hoare triple {4034#false} ~cond := #in~cond; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 63: Hoare triple {4034#false} assume 0 == ~cond; {4034#false} is VALID [2022-04-27 11:06:06,553 INFO L290 TraceCheckUtils]: 64: Hoare triple {4034#false} assume !false; {4034#false} is VALID [2022-04-27 11:06:06,554 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 107 proven. 28 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2022-04-27 11:06:06,554 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 11:06:07,267 INFO L290 TraceCheckUtils]: 64: Hoare triple {4034#false} assume !false; {4034#false} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 63: Hoare triple {4034#false} assume 0 == ~cond; {4034#false} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 62: Hoare triple {4034#false} ~cond := #in~cond; {4034#false} is VALID [2022-04-27 11:06:07,268 INFO L272 TraceCheckUtils]: 61: Hoare triple {4034#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {4034#false} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 60: Hoare triple {4034#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {4034#false} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 59: Hoare triple {4034#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {4034#false} is VALID [2022-04-27 11:06:07,268 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {4033#true} {4034#false} #656#return; {4034#false} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 57: Hoare triple {4033#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4033#true} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 56: Hoare triple {4033#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4033#true} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 55: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 54: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 53: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 52: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 51: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 50: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,268 INFO L290 TraceCheckUtils]: 49: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 48: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 47: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 46: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 45: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 44: Hoare triple {4033#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4033#true} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 43: Hoare triple {4033#true} #t~loopctr188 := 0; {4033#true} is VALID [2022-04-27 11:06:07,269 INFO L272 TraceCheckUtils]: 42: Hoare triple {4034#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {4033#true} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 41: Hoare triple {4034#false} assume !(~len <= 0); {4034#false} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 40: Hoare triple {4034#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {4034#false} is VALID [2022-04-27 11:06:07,269 INFO L272 TraceCheckUtils]: 39: Hoare triple {4034#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {4034#false} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 38: Hoare triple {4034#false} assume 0 != #t~mem173;havoc #t~mem173; {4034#false} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 37: Hoare triple {4034#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {4034#false} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 36: Hoare triple {4034#false} assume #t~short172; {4034#false} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 35: Hoare triple {4034#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {4034#false} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 34: Hoare triple {4034#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {4034#false} is VALID [2022-04-27 11:06:07,269 INFO L290 TraceCheckUtils]: 33: Hoare triple {4034#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {4034#false} is VALID [2022-04-27 11:06:07,270 INFO L290 TraceCheckUtils]: 32: Hoare triple {4034#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {4034#false} is VALID [2022-04-27 11:06:07,270 INFO L290 TraceCheckUtils]: 31: Hoare triple {4034#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {4034#false} is VALID [2022-04-27 11:06:07,270 INFO L290 TraceCheckUtils]: 30: Hoare triple {4034#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {4034#false} is VALID [2022-04-27 11:06:07,270 INFO L290 TraceCheckUtils]: 29: Hoare triple {4034#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {4034#false} is VALID [2022-04-27 11:06:07,270 INFO L290 TraceCheckUtils]: 28: Hoare triple {4034#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {4034#false} is VALID [2022-04-27 11:06:07,271 INFO L284 TraceCheckUtils]: 27: Hoare quadruple {4393#(not (= |#Ultimate.C_memset_#amount| 24))} {4033#true} #672#return; {4034#false} is VALID [2022-04-27 11:06:07,271 INFO L290 TraceCheckUtils]: 26: Hoare triple {4393#(not (= |#Ultimate.C_memset_#amount| 24))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {4393#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-27 11:06:07,271 INFO L290 TraceCheckUtils]: 25: Hoare triple {4400#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {4393#(not (= |#Ultimate.C_memset_#amount| 24))} is VALID [2022-04-27 11:06:07,273 INFO L290 TraceCheckUtils]: 24: Hoare triple {4404#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4400#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:06:07,274 INFO L290 TraceCheckUtils]: 23: Hoare triple {4408#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4404#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:06:07,275 INFO L290 TraceCheckUtils]: 22: Hoare triple {4412#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4408#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)))} is VALID [2022-04-27 11:06:07,276 INFO L290 TraceCheckUtils]: 21: Hoare triple {4416#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4412#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod |#Ultimate.C_memset_#t~loopctr188| 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-27 11:06:07,278 INFO L290 TraceCheckUtils]: 20: Hoare triple {4420#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4416#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 1) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-27 11:06:07,279 INFO L290 TraceCheckUtils]: 19: Hoare triple {4424#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4420#(or (not (= |#Ultimate.C_memset_#amount| 24)) (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 5) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 2) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-27 11:06:07,280 INFO L290 TraceCheckUtils]: 18: Hoare triple {4428#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {4424#(or (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 6) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (= |#Ultimate.C_memset_#amount| 24)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 3) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))))} is VALID [2022-04-27 11:06:07,281 INFO L290 TraceCheckUtils]: 17: Hoare triple {4033#true} #t~loopctr188 := 0; {4428#(or (< (mod (+ 7 |#Ultimate.C_memset_#t~loopctr188|) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296)) (not (< (mod (+ |#Ultimate.C_memset_#t~loopctr188| 4) 4294967296) (mod |#Ultimate.C_memset_#amount| 4294967296))) (not (= |#Ultimate.C_memset_#amount| 24)))} is VALID [2022-04-27 11:06:07,281 INFO L272 TraceCheckUtils]: 16: Hoare triple {4033#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {4033#true} is VALID [2022-04-27 11:06:07,281 INFO L290 TraceCheckUtils]: 15: Hoare triple {4033#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {4033#true} is VALID [2022-04-27 11:06:07,281 INFO L290 TraceCheckUtils]: 14: Hoare triple {4033#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {4033#true} is VALID [2022-04-27 11:06:07,281 INFO L290 TraceCheckUtils]: 13: Hoare triple {4033#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {4033#true} is VALID [2022-04-27 11:06:07,281 INFO L290 TraceCheckUtils]: 12: Hoare triple {4033#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {4033#true} is VALID [2022-04-27 11:06:07,281 INFO L290 TraceCheckUtils]: 11: Hoare triple {4033#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {4033#true} is VALID [2022-04-27 11:06:07,281 INFO L290 TraceCheckUtils]: 10: Hoare triple {4033#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {4033#true} is VALID [2022-04-27 11:06:07,281 INFO L290 TraceCheckUtils]: 9: Hoare triple {4033#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {4033#true} is VALID [2022-04-27 11:06:07,281 INFO L290 TraceCheckUtils]: 8: Hoare triple {4033#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {4033#true} is VALID [2022-04-27 11:06:07,281 INFO L290 TraceCheckUtils]: 7: Hoare triple {4033#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {4033#true} is VALID [2022-04-27 11:06:07,282 INFO L272 TraceCheckUtils]: 6: Hoare triple {4033#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {4033#true} is VALID [2022-04-27 11:06:07,282 INFO L290 TraceCheckUtils]: 5: Hoare triple {4033#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {4033#true} is VALID [2022-04-27 11:06:07,282 INFO L272 TraceCheckUtils]: 4: Hoare triple {4033#true} call #t~ret187 := main(); {4033#true} is VALID [2022-04-27 11:06:07,282 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4033#true} {4033#true} #682#return; {4033#true} is VALID [2022-04-27 11:06:07,282 INFO L290 TraceCheckUtils]: 2: Hoare triple {4033#true} assume true; {4033#true} is VALID [2022-04-27 11:06:07,282 INFO L290 TraceCheckUtils]: 1: Hoare triple {4033#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {4033#true} is VALID [2022-04-27 11:06:07,282 INFO L272 TraceCheckUtils]: 0: Hoare triple {4033#true} call ULTIMATE.init(); {4033#true} is VALID [2022-04-27 11:06:07,282 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2022-04-27 11:06:07,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1437345613] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 11:06:07,282 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 11:06:07,283 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11, 11] total 30 [2022-04-27 11:06:07,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [677785642] [2022-04-27 11:06:07,283 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 11:06:07,283 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.3333333333333335) internal successors, (70), 28 states have internal predecessors, (70), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 65 [2022-04-27 11:06:07,285 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 11:06:07,285 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 2.3333333333333335) internal successors, (70), 28 states have internal predecessors, (70), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:06:07,374 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:06:07,375 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-27 11:06:07,375 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 11:06:07,375 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-27 11:06:07,376 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=651, Unknown=0, NotChecked=0, Total=870 [2022-04-27 11:06:07,376 INFO L87 Difference]: Start difference. First operand 99 states and 121 transitions. Second operand has 30 states, 30 states have (on average 2.3333333333333335) internal successors, (70), 28 states have internal predecessors, (70), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:06:14,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:06:14,482 INFO L93 Difference]: Finished difference Result 185 states and 235 transitions. [2022-04-27 11:06:14,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-04-27 11:06:14,482 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.3333333333333335) internal successors, (70), 28 states have internal predecessors, (70), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 65 [2022-04-27 11:06:14,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 11:06:14,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.3333333333333335) internal successors, (70), 28 states have internal predecessors, (70), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:06:14,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 216 transitions. [2022-04-27 11:06:14,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.3333333333333335) internal successors, (70), 28 states have internal predecessors, (70), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:06:14,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 216 transitions. [2022-04-27 11:06:14,489 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 33 states and 216 transitions. [2022-04-27 11:06:14,710 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 216 edges. 216 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 11:06:14,712 INFO L225 Difference]: With dead ends: 185 [2022-04-27 11:06:14,712 INFO L226 Difference]: Without dead ends: 112 [2022-04-27 11:06:14,713 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 117 SyntacticMatches, 1 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 608 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=784, Invalid=2638, Unknown=0, NotChecked=0, Total=3422 [2022-04-27 11:06:14,714 INFO L413 NwaCegarLoop]: 83 mSDtfsCounter, 151 mSDsluCounter, 166 mSDsCounter, 0 mSdLazyCounter, 1013 mSolverCounterSat, 105 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 155 SdHoareTripleChecker+Valid, 249 SdHoareTripleChecker+Invalid, 1118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 105 IncrementalHoareTripleChecker+Valid, 1013 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-27 11:06:14,715 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [155 Valid, 249 Invalid, 1118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [105 Valid, 1013 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-27 11:06:14,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2022-04-27 11:06:14,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 108. [2022-04-27 11:06:14,768 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 11:06:14,769 INFO L82 GeneralOperation]: Start isEquivalent. First operand 112 states. Second operand has 108 states, 89 states have (on average 1.202247191011236) internal successors, (107), 89 states have internal predecessors, (107), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:06:14,769 INFO L74 IsIncluded]: Start isIncluded. First operand 112 states. Second operand has 108 states, 89 states have (on average 1.202247191011236) internal successors, (107), 89 states have internal predecessors, (107), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:06:14,770 INFO L87 Difference]: Start difference. First operand 112 states. Second operand has 108 states, 89 states have (on average 1.202247191011236) internal successors, (107), 89 states have internal predecessors, (107), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:06:14,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:06:14,773 INFO L93 Difference]: Finished difference Result 112 states and 136 transitions. [2022-04-27 11:06:14,773 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 136 transitions. [2022-04-27 11:06:14,776 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:06:14,776 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:06:14,777 INFO L74 IsIncluded]: Start isIncluded. First operand has 108 states, 89 states have (on average 1.202247191011236) internal successors, (107), 89 states have internal predecessors, (107), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 112 states. [2022-04-27 11:06:14,777 INFO L87 Difference]: Start difference. First operand has 108 states, 89 states have (on average 1.202247191011236) internal successors, (107), 89 states have internal predecessors, (107), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Second operand 112 states. [2022-04-27 11:06:14,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 11:06:14,780 INFO L93 Difference]: Finished difference Result 112 states and 136 transitions. [2022-04-27 11:06:14,781 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 136 transitions. [2022-04-27 11:06:14,786 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 11:06:14,786 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 11:06:14,787 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 11:06:14,787 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 11:06:14,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 89 states have (on average 1.202247191011236) internal successors, (107), 89 states have internal predecessors, (107), 13 states have call successors, (13), 8 states have call predecessors, (13), 5 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-27 11:06:14,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 130 transitions. [2022-04-27 11:06:14,790 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 130 transitions. Word has length 65 [2022-04-27 11:06:14,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 11:06:14,790 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 130 transitions. [2022-04-27 11:06:14,790 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 2.3333333333333335) internal successors, (70), 28 states have internal predecessors, (70), 2 states have call successors, (11), 4 states have call predecessors, (11), 5 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 11:06:14,791 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 130 transitions. [2022-04-27 11:06:14,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-04-27 11:06:14,793 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 11:06:14,793 INFO L195 NwaCegarLoop]: trace histogram [28, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 11:06:14,811 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 11:06:14,995 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 11:06:14,995 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 11:06:14,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 11:06:14,996 INFO L85 PathProgramCache]: Analyzing trace with hash 785898314, now seen corresponding path program 5 times [2022-04-27 11:06:14,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 11:06:14,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356900632] [2022-04-27 11:06:14,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 11:06:14,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 11:06:15,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:15,130 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 11:06:15,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:15,139 INFO L290 TraceCheckUtils]: 0: Hoare triple {5235#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5194#true} is VALID [2022-04-27 11:06:15,139 INFO L290 TraceCheckUtils]: 1: Hoare triple {5194#true} assume true; {5194#true} is VALID [2022-04-27 11:06:15,139 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5194#true} {5194#true} #682#return; {5194#true} is VALID [2022-04-27 11:06:15,142 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 11:06:15,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:15,764 INFO L290 TraceCheckUtils]: 0: Hoare triple {5236#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5237#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:06:15,765 INFO L290 TraceCheckUtils]: 1: Hoare triple {5237#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5238#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,766 INFO L290 TraceCheckUtils]: 2: Hoare triple {5238#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-27 11:06:15,767 INFO L290 TraceCheckUtils]: 3: Hoare triple {5239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5240#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:15,768 INFO L290 TraceCheckUtils]: 4: Hoare triple {5240#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5241#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,769 INFO L290 TraceCheckUtils]: 5: Hoare triple {5241#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5242#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-27 11:06:15,770 INFO L290 TraceCheckUtils]: 6: Hoare triple {5242#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5243#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-27 11:06:15,771 INFO L290 TraceCheckUtils]: 7: Hoare triple {5243#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5244#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:15,772 INFO L290 TraceCheckUtils]: 8: Hoare triple {5244#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5245#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-27 11:06:15,773 INFO L290 TraceCheckUtils]: 9: Hoare triple {5245#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5246#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,774 INFO L290 TraceCheckUtils]: 10: Hoare triple {5246#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5247#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,775 INFO L290 TraceCheckUtils]: 11: Hoare triple {5247#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5248#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,776 INFO L290 TraceCheckUtils]: 12: Hoare triple {5248#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5249#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,777 INFO L290 TraceCheckUtils]: 13: Hoare triple {5249#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5250#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-27 11:06:15,778 INFO L290 TraceCheckUtils]: 14: Hoare triple {5250#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5251#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-27 11:06:15,780 INFO L290 TraceCheckUtils]: 15: Hoare triple {5251#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5252#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,782 INFO L290 TraceCheckUtils]: 16: Hoare triple {5252#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5253#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-27 11:06:15,783 INFO L290 TraceCheckUtils]: 17: Hoare triple {5253#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5254#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:15,783 INFO L290 TraceCheckUtils]: 18: Hoare triple {5254#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5254#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:15,784 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {5254#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {5194#true} #672#return; {5195#false} is VALID [2022-04-27 11:06:15,784 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 51 [2022-04-27 11:06:15,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 11:06:15,804 INFO L290 TraceCheckUtils]: 0: Hoare triple {5236#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5194#true} is VALID [2022-04-27 11:06:15,804 INFO L290 TraceCheckUtils]: 1: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 2: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 3: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 4: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 5: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 6: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 7: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 8: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 9: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 10: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 11: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,805 INFO L290 TraceCheckUtils]: 12: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,806 INFO L290 TraceCheckUtils]: 13: Hoare triple {5194#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5194#true} is VALID [2022-04-27 11:06:15,806 INFO L290 TraceCheckUtils]: 14: Hoare triple {5194#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5194#true} is VALID [2022-04-27 11:06:15,806 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {5194#true} {5195#false} #656#return; {5195#false} is VALID [2022-04-27 11:06:15,806 INFO L272 TraceCheckUtils]: 0: Hoare triple {5194#true} call ULTIMATE.init(); {5235#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 11:06:15,807 INFO L290 TraceCheckUtils]: 1: Hoare triple {5235#(and (= |~#smp_def_rrlen_arr~0.base| |old(~#smp_def_rrlen_arr~0.base)|) (= |old(~__tmpTR__int_1~0)| ~__tmpTR__int_1~0) (= |~#smp_def_rrlen_arr~0.offset| |old(~#smp_def_rrlen_arr~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(5, 4);call write~init~int(37, 4, 0, 1);call write~init~int(46, 4, 1, 1);call write~init~int(50, 4, 2, 1);call write~init~int(120, 4, 3, 1);call write~init~int(0, 4, 4, 1);call #Ultimate.allocInit(19, 5);call #Ultimate.allocInit(19, 6);call #Ultimate.allocInit(5, 7);call write~init~int(37, 7, 0, 1);call write~init~int(46, 7, 1, 1);call write~init~int(50, 7, 2, 1);call write~init~int(120, 7, 3, 1);call write~init~int(0, 7, 4, 1);call #Ultimate.allocInit(19, 8);call #Ultimate.allocInit(19, 9);call #Ultimate.allocInit(5, 10);call write~init~int(37, 10, 0, 1);call write~init~int(46, 10, 1, 1);call write~init~int(50, 10, 2, 1);call write~init~int(120, 10, 3, 1);call write~init~int(0, 10, 4, 1);call #Ultimate.allocInit(19, 11);~__tmpTR__int_1~0 := 0;~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset := 12, 0;call #Ultimate.allocInit(384, 12);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 4 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 8 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(1, ~#smp_def_rrlen_arr~0.base, 12 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 16 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(14, ~#smp_def_rrlen_arr~0.base, 20 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 24 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 28 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 32 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 36 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 40 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 44 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(4, ~#smp_def_rrlen_arr~0.base, 48 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 52 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 56 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(5, ~#smp_def_rrlen_arr~0.base, 60 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 64 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 68 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 72 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 76 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 80 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(7, ~#smp_def_rrlen_arr~0.base, 84 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 88 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 92 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(16, ~#smp_def_rrlen_arr~0.base, 96 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 100 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(12, ~#smp_def_rrlen_arr~0.base, 104 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(17, ~#smp_def_rrlen_arr~0.base, 108 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 112 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(6, ~#smp_def_rrlen_arr~0.base, 116 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(18, ~#smp_def_rrlen_arr~0.base, 120 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 124 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(13, ~#smp_def_rrlen_arr~0.base, 128 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(19, ~#smp_def_rrlen_arr~0.base, 132 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(2, ~#smp_def_rrlen_arr~0.base, 136 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 140 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(20, ~#smp_def_rrlen_arr~0.base, 144 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 148 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 152 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(32, ~#smp_def_rrlen_arr~0.base, 156 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 160 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 164 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(33, ~#smp_def_rrlen_arr~0.base, 168 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 172 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 176 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(34, ~#smp_def_rrlen_arr~0.base, 180 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 184 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 188 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(128, ~#smp_def_rrlen_arr~0.base, 192 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(3, ~#smp_def_rrlen_arr~0.base, 196 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 200 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(129, ~#smp_def_rrlen_arr~0.base, 204 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 208 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 212 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(130, ~#smp_def_rrlen_arr~0.base, 216 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 220 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 224 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(131, ~#smp_def_rrlen_arr~0.base, 228 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 232 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-3, ~#smp_def_rrlen_arr~0.base, 236 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(133, ~#smp_def_rrlen_arr~0.base, 240 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 244 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 248 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(134, ~#smp_def_rrlen_arr~0.base, 252 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 256 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 260 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(135, ~#smp_def_rrlen_arr~0.base, 264 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 268 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 272 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(136, ~#smp_def_rrlen_arr~0.base, 276 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 280 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 284 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(137, ~#smp_def_rrlen_arr~0.base, 288 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 292 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 296 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(138, ~#smp_def_rrlen_arr~0.base, 300 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 304 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 308 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(139, ~#smp_def_rrlen_arr~0.base, 312 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 316 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 320 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(144, ~#smp_def_rrlen_arr~0.base, 324 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 328 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 332 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(145, ~#smp_def_rrlen_arr~0.base, 336 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 340 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 344 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(146, ~#smp_def_rrlen_arr~0.base, 348 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(9, ~#smp_def_rrlen_arr~0.base, 352 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 356 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(147, ~#smp_def_rrlen_arr~0.base, 360 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-2, ~#smp_def_rrlen_arr~0.base, 364 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(0, ~#smp_def_rrlen_arr~0.base, 368 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 372 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 376 + ~#smp_def_rrlen_arr~0.offset, 4);call write~init~int(-1, ~#smp_def_rrlen_arr~0.base, 380 + ~#smp_def_rrlen_arr~0.offset, 4); {5194#true} is VALID [2022-04-27 11:06:15,807 INFO L290 TraceCheckUtils]: 2: Hoare triple {5194#true} assume true; {5194#true} is VALID [2022-04-27 11:06:15,807 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5194#true} {5194#true} #682#return; {5194#true} is VALID [2022-04-27 11:06:15,807 INFO L272 TraceCheckUtils]: 4: Hoare triple {5194#true} call #t~ret187 := main(); {5194#true} is VALID [2022-04-27 11:06:15,807 INFO L290 TraceCheckUtils]: 5: Hoare triple {5194#true} call ~#tobj~0.base, ~#tobj~0.offset := #Ultimate.allocOnStack(280);call ~#opts~0.base, ~#opts~0.offset := #Ultimate.allocOnStack(80);havoc ~resp~0.base, ~resp~0.offset;call #t~malloc184.base, #t~malloc184.offset := #Ultimate.allocOnHeap(1);~resp~0.base, ~resp~0.offset := #t~malloc184.base, #t~malloc184.offset;havoc #t~malloc184.base, #t~malloc184.offset;assume -2147483648 <= #t~nondet185 && #t~nondet185 <= 2147483647; {5194#true} is VALID [2022-04-27 11:06:15,807 INFO L272 TraceCheckUtils]: 6: Hoare triple {5194#true} call #t~ret186 := do_discover_list(~#tobj~0.base, ~#tobj~0.offset, #t~nondet185, ~resp~0.base, ~resp~0.offset, 4, ~#opts~0.base, ~#opts~0.offset); {5194#true} is VALID [2022-04-27 11:06:15,807 INFO L290 TraceCheckUtils]: 7: Hoare triple {5194#true} ~top.base, ~top.offset := #in~top.base, #in~top.offset;~sphy_id := #in~sphy_id;~resp.base, ~resp.offset := #in~resp.base, #in~resp.offset;~max_resp_len := #in~max_resp_len;~op.base, ~op.offset := #in~op.base, #in~op.offset;call ~#smp_req~0.base, ~#smp_req~0.offset := #Ultimate.allocOnStack(32);call write~init~int(64, ~#smp_req~0.base, ~#smp_req~0.offset, 1);call write~init~int(32, ~#smp_req~0.base, 1 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);call write~init~int(6, ~#smp_req~0.base, 3 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 4 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 5 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 6 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 7 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 12 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 13 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 14 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 15 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 16 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 17 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 18 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 19 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 20 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 21 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 22 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 23 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 24 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 25 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 26 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 27 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 28 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 29 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 30 + ~#smp_req~0.offset, 1);call write~init~int(0, ~#smp_req~0.base, 31 + ~#smp_req~0.offset, 1);call ~#smp_rr~0.base, ~#smp_rr~0.offset := #Ultimate.allocOnStack(24);havoc ~len~2;havoc ~res~2;havoc ~dword_resp_len~0;havoc ~mnum_desc~0;~dword_resp_len~0 := (if ~max_resp_len - 8 < 0 && 0 != (~max_resp_len - 8) % 4 then 1 + (~max_resp_len - 8) / 4 else (~max_resp_len - 8) / 4); {5194#true} is VALID [2022-04-27 11:06:15,807 INFO L290 TraceCheckUtils]: 8: Hoare triple {5194#true} assume ~dword_resp_len~0 < 256;#t~ite150 := ~dword_resp_len~0; {5194#true} is VALID [2022-04-27 11:06:15,807 INFO L290 TraceCheckUtils]: 9: Hoare triple {5194#true} call write~int(#t~ite150, ~#smp_req~0.base, 2 + ~#smp_req~0.offset, 1);havoc #t~ite150;call write~int(~sphy_id, ~#smp_req~0.base, 8 + ~#smp_req~0.offset, 1);call #t~mem151 := read~int(~op.base, 28 + ~op.offset, 4);~mnum_desc~0 := #t~mem151;havoc #t~mem151;call #t~mem152 := read~int(~op.base, 8 + ~op.offset, 4); {5194#true} is VALID [2022-04-27 11:06:15,807 INFO L290 TraceCheckUtils]: 10: Hoare triple {5194#true} assume 0 == #t~mem152 && ~mnum_desc~0 > 8;havoc #t~mem152;~mnum_desc~0 := 8; {5194#true} is VALID [2022-04-27 11:06:15,808 INFO L290 TraceCheckUtils]: 11: Hoare triple {5194#true} call #t~mem153 := read~int(~op.base, 8 + ~op.offset, 4); {5194#true} is VALID [2022-04-27 11:06:15,808 INFO L290 TraceCheckUtils]: 12: Hoare triple {5194#true} assume !(1 == #t~mem153 && ~mnum_desc~0 > 40);havoc #t~mem153; {5194#true} is VALID [2022-04-27 11:06:15,808 INFO L290 TraceCheckUtils]: 13: Hoare triple {5194#true} call write~int(~mnum_desc~0, ~#smp_req~0.base, 9 + ~#smp_req~0.offset, 1);call #t~mem154 := read~int(~op.base, 16 + ~op.offset, 4);call write~int((if 0 == #t~mem154 then 0 else (if 1 == #t~mem154 then 1 else ~bitwiseAnd(#t~mem154, 15))), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem154;call #t~mem155 := read~int(~op.base, 24 + ~op.offset, 4); {5194#true} is VALID [2022-04-27 11:06:15,808 INFO L290 TraceCheckUtils]: 14: Hoare triple {5194#true} assume 0 != #t~mem155;havoc #t~mem155;call #t~mem156 := read~int(~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);call write~int(~bitwiseOr(#t~mem156 % 256, 128), ~#smp_req~0.base, 10 + ~#smp_req~0.offset, 1);havoc #t~mem156; {5194#true} is VALID [2022-04-27 11:06:15,808 INFO L290 TraceCheckUtils]: 15: Hoare triple {5194#true} call #t~mem157 := read~int(~op.base, 8 + ~op.offset, 4);call write~int((if 0 == #t~mem157 then 0 else (if 1 == #t~mem157 then 1 else ~bitwiseAnd(#t~mem157, 15))), ~#smp_req~0.base, 11 + ~#smp_req~0.offset, 1);havoc #t~mem157; {5194#true} is VALID [2022-04-27 11:06:15,809 INFO L272 TraceCheckUtils]: 16: Hoare triple {5194#true} call #t~memset~res158.base, #t~memset~res158.offset := #Ultimate.C_memset(~#smp_rr~0.base, ~#smp_rr~0.offset, 0, 24); {5236#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:06:15,809 INFO L290 TraceCheckUtils]: 17: Hoare triple {5236#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5237#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} is VALID [2022-04-27 11:06:15,811 INFO L290 TraceCheckUtils]: 18: Hoare triple {5237#(and (<= 0 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 0))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5238#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,812 INFO L290 TraceCheckUtils]: 19: Hoare triple {5238#(and (<= |#Ultimate.C_memset_#t~loopctr188| 1) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 1 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} is VALID [2022-04-27 11:06:15,813 INFO L290 TraceCheckUtils]: 20: Hoare triple {5239#(and (<= 2 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 2))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5240#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:15,814 INFO L290 TraceCheckUtils]: 21: Hoare triple {5240#(and (<= 3 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 3) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5241#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,816 INFO L290 TraceCheckUtils]: 22: Hoare triple {5241#(and (<= |#Ultimate.C_memset_#t~loopctr188| 4) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 4 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5242#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} is VALID [2022-04-27 11:06:15,817 INFO L290 TraceCheckUtils]: 23: Hoare triple {5242#(and (<= 5 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 5))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5243#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} is VALID [2022-04-27 11:06:15,818 INFO L290 TraceCheckUtils]: 24: Hoare triple {5243#(and (<= 6 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 6))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5244#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:15,819 INFO L290 TraceCheckUtils]: 25: Hoare triple {5244#(and (<= |#Ultimate.C_memset_#t~loopctr188| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5245#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} is VALID [2022-04-27 11:06:15,820 INFO L290 TraceCheckUtils]: 26: Hoare triple {5245#(and (<= 8 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 8))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5246#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,822 INFO L290 TraceCheckUtils]: 27: Hoare triple {5246#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5247#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,823 INFO L290 TraceCheckUtils]: 28: Hoare triple {5247#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 10) (<= 10 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5248#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,824 INFO L290 TraceCheckUtils]: 29: Hoare triple {5248#(and (<= |#Ultimate.C_memset_#t~loopctr188| 11) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 11 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5249#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,825 INFO L290 TraceCheckUtils]: 30: Hoare triple {5249#(and (<= |#Ultimate.C_memset_#t~loopctr188| 12) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 12 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5250#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} is VALID [2022-04-27 11:06:15,826 INFO L290 TraceCheckUtils]: 31: Hoare triple {5250#(and (<= 13 |#Ultimate.C_memset_#t~loopctr188|) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr188| 13))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5251#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} is VALID [2022-04-27 11:06:15,828 INFO L290 TraceCheckUtils]: 32: Hoare triple {5251#(and (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 14 |#Ultimate.C_memset_#t~loopctr188|) (<= |#Ultimate.C_memset_#t~loopctr188| 14))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5252#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} is VALID [2022-04-27 11:06:15,829 INFO L290 TraceCheckUtils]: 33: Hoare triple {5252#(and (<= |#Ultimate.C_memset_#t~loopctr188| 15) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|) (<= 15 |#Ultimate.C_memset_#t~loopctr188|))} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5253#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} is VALID [2022-04-27 11:06:15,830 INFO L290 TraceCheckUtils]: 34: Hoare triple {5253#(and (or (<= |#Ultimate.C_memset_#t~loopctr188| 16) (not (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)))) (or (<= (div |#Ultimate.C_memset_#amount| 4294967296) (div |#Ultimate.C_memset_#t~loopctr188| 4294967296)) (and (not (<= (+ (div |#Ultimate.C_memset_#t~loopctr188| 4294967296) 1) 0)) (<= (+ (* (div |#Ultimate.C_memset_#amount| 4294967296) 4294967296) 1) |#Ultimate.C_memset_#amount|))))} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5254#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:15,831 INFO L290 TraceCheckUtils]: 35: Hoare triple {5254#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5254#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} is VALID [2022-04-27 11:06:15,832 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {5254#(or (<= |#Ultimate.C_memset_#amount| 16) (<= 4294967297 |#Ultimate.C_memset_#amount|))} {5194#true} #672#return; {5195#false} is VALID [2022-04-27 11:06:15,832 INFO L290 TraceCheckUtils]: 37: Hoare triple {5195#false} havoc #t~memset~res158.base, #t~memset~res158.offset;call #t~mem159 := read~int(~op.base, 56 + ~op.offset, 4);call #t~ret160 := smp_send_req(~top.base, ~top.offset, ~#smp_rr~0.base, ~#smp_rr~0.offset, #t~mem159);assume -2147483648 <= #t~ret160 && #t~ret160 <= 2147483647;~res~2 := #t~ret160;havoc #t~mem159;havoc #t~ret160; {5195#false} is VALID [2022-04-27 11:06:15,832 INFO L290 TraceCheckUtils]: 38: Hoare triple {5195#false} assume !(0 != ~res~2);call #t~mem161 := read~int(~#smp_rr~0.base, 20 + ~#smp_rr~0.offset, 4); {5195#false} is VALID [2022-04-27 11:06:15,832 INFO L290 TraceCheckUtils]: 39: Hoare triple {5195#false} assume !(0 != #t~mem161);havoc #t~mem161;call #t~mem162 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem162 >= 0; {5195#false} is VALID [2022-04-27 11:06:15,832 INFO L290 TraceCheckUtils]: 40: Hoare triple {5195#false} assume #t~short164;call #t~mem163 := read~int(~#smp_rr~0.base, 16 + ~#smp_rr~0.offset, 4);#t~short164 := #t~mem163 < 4; {5195#false} is VALID [2022-04-27 11:06:15,832 INFO L290 TraceCheckUtils]: 41: Hoare triple {5195#false} assume !#t~short164;havoc #t~mem162;havoc #t~mem163;havoc #t~short164;call #t~mem165 := read~int(~resp.base, 3 + ~resp.offset, 1);~len~2 := #t~mem165 % 256;havoc #t~mem165;#t~short167 := 0 == ~len~2; {5195#false} is VALID [2022-04-27 11:06:15,832 INFO L290 TraceCheckUtils]: 42: Hoare triple {5195#false} assume #t~short167;call #t~mem166 := read~int(~resp.base, 2 + ~resp.offset, 1);#t~short167 := 0 == #t~mem166 % 256; {5195#false} is VALID [2022-04-27 11:06:15,832 INFO L290 TraceCheckUtils]: 43: Hoare triple {5195#false} assume !#t~short167;havoc #t~mem166;havoc #t~short167; {5195#false} is VALID [2022-04-27 11:06:15,833 INFO L290 TraceCheckUtils]: 44: Hoare triple {5195#false} ~len~2 := 4 + 4 * ~len~2;call #t~mem170 := read~int(~op.base, 20 + ~op.offset, 4);#t~short172 := 0 != #t~mem170; {5195#false} is VALID [2022-04-27 11:06:15,833 INFO L290 TraceCheckUtils]: 45: Hoare triple {5195#false} assume #t~short172; {5195#false} is VALID [2022-04-27 11:06:15,833 INFO L290 TraceCheckUtils]: 46: Hoare triple {5195#false} assume #t~short172;havoc #t~mem170;havoc #t~mem171;havoc #t~short172;call #t~mem173 := read~int(~op.base, 20 + ~op.offset, 4); {5195#false} is VALID [2022-04-27 11:06:15,833 INFO L290 TraceCheckUtils]: 47: Hoare triple {5195#false} assume 0 != #t~mem173;havoc #t~mem173; {5195#false} is VALID [2022-04-27 11:06:15,833 INFO L272 TraceCheckUtils]: 48: Hoare triple {5195#false} call dStrHex(~resp.base, ~resp.offset, ~len~2, 1); {5195#false} is VALID [2022-04-27 11:06:15,833 INFO L290 TraceCheckUtils]: 49: Hoare triple {5195#false} ~str.base, ~str.offset := #in~str.base, #in~str.offset;~len := #in~len;~no_ascii := #in~no_ascii;~p~0.base, ~p~0.offset := ~str.base, ~str.offset;havoc ~c~0;call ~#buff~0.base, ~#buff~0.offset := #Ultimate.allocOnStack(82);~a~0 := 0;~bpstart~0 := 5;~cpstart~0 := 60;~cpos~0 := ~cpstart~0;~bpos~0 := ~bpstart~0;havoc ~i~0;havoc ~k~0; {5195#false} is VALID [2022-04-27 11:06:15,833 INFO L290 TraceCheckUtils]: 50: Hoare triple {5195#false} assume !(~len <= 0); {5195#false} is VALID [2022-04-27 11:06:15,833 INFO L272 TraceCheckUtils]: 51: Hoare triple {5195#false} call #t~memset~res8.base, #t~memset~res8.offset := #Ultimate.C_memset(~#buff~0.base, ~#buff~0.offset, 32, 80); {5236#(= |#memory_int| |old(#memory_int)|)} is VALID [2022-04-27 11:06:15,833 INFO L290 TraceCheckUtils]: 52: Hoare triple {5236#(= |#memory_int| |old(#memory_int)|)} #t~loopctr188 := 0; {5194#true} is VALID [2022-04-27 11:06:15,833 INFO L290 TraceCheckUtils]: 53: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,833 INFO L290 TraceCheckUtils]: 54: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,833 INFO L290 TraceCheckUtils]: 55: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 56: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 57: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 58: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 59: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 60: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 61: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 62: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 63: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 64: Hoare triple {5194#true} assume #t~loopctr188 % 4294967296 < #amount % 4294967296;#memory_int := #memory_int[#ptr.base,#ptr.offset + #t~loopctr188 := #value];#t~loopctr188 := 1 + #t~loopctr188; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 65: Hoare triple {5194#true} assume !(#t~loopctr188 % 4294967296 < #amount % 4294967296); {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L290 TraceCheckUtils]: 66: Hoare triple {5194#true} assume #res.base == #ptr.base && #res.offset == #ptr.offset; {5194#true} is VALID [2022-04-27 11:06:15,834 INFO L284 TraceCheckUtils]: 67: Hoare quadruple {5194#true} {5195#false} #656#return; {5195#false} is VALID [2022-04-27 11:06:15,835 INFO L290 TraceCheckUtils]: 68: Hoare triple {5195#false} havoc #t~memset~res8.base, #t~memset~res8.offset;call write~int(0, ~#buff~0.base, 80 + ~#buff~0.offset, 1); {5195#false} is VALID [2022-04-27 11:06:15,835 INFO L290 TraceCheckUtils]: 69: Hoare triple {5195#false} assume !(~no_ascii < 0);havoc #t~nondet9;~k~0 := #t~nondet9; {5195#false} is VALID [2022-04-27 11:06:15,835 INFO L272 TraceCheckUtils]: 70: Hoare triple {5195#false} call __VERIFIER_assert((if 1 + ~k~0 >= 0 && 1 + ~k~0 < 82 then 1 else 0)); {5195#false} is VALID [2022-04-27 11:06:15,835 INFO L290 TraceCheckUtils]: 71: Hoare triple {5195#false} ~cond := #in~cond; {5195#false} is VALID [2022-04-27 11:06:15,835 INFO L290 TraceCheckUtils]: 72: Hoare triple {5195#false} assume 0 == ~cond; {5195#false} is VALID [2022-04-27 11:06:15,835 INFO L290 TraceCheckUtils]: 73: Hoare triple {5195#false} assume !false; {5195#false} is VALID [2022-04-27 11:06:15,836 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 0 proven. 359 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2022-04-27 11:06:15,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 11:06:15,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356900632] [2022-04-27 11:06:15,836 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1356900632] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 11:06:15,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [795503775] [2022-04-27 11:06:15,836 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 11:06:15,836 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 11:06:15,836 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 11:06:15,840 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 11:06:15,854 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process