/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 15:17:32,134 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 15:17:32,136 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 15:17:32,167 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 15:17:32,168 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 15:17:32,169 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 15:17:32,170 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 15:17:32,172 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 15:17:32,173 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 15:17:32,174 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 15:17:32,175 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 15:17:32,176 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 15:17:32,176 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 15:17:32,177 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 15:17:32,178 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 15:17:32,180 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 15:17:32,180 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 15:17:32,181 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 15:17:32,183 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 15:17:32,184 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 15:17:32,186 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 15:17:32,188 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 15:17:32,189 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 15:17:32,190 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 15:17:32,190 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 15:17:32,193 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-04-27 15:17:32,193 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-04-27 15:17:32,194 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-04-27 15:17:32,195 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-04-27 15:17:32,195 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-04-27 15:17:32,196 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-04-27 15:17:32,196 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-04-27 15:17:32,197 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-04-27 15:17:32,198 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-04-27 15:17:32,198 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-04-27 15:17:32,206 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-04-27 15:17:32,207 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-04-27 15:17:32,208 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-04-27 15:17:32,209 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-04-27 15:17:32,209 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 15:17:32,210 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 15:17:32,212 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 15:17:32,213 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2022-04-27 15:17:32,239 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 15:17:32,239 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 15:17:32,239 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-04-27 15:17:32,240 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-04-27 15:17:32,240 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 15:17:32,240 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 15:17:32,241 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 15:17:32,241 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 15:17:32,241 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 15:17:32,241 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 15:17:32,242 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 15:17:32,242 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 15:17:32,242 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 15:17:32,242 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 15:17:32,242 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 15:17:32,242 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 15:17:32,242 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 15:17:32,242 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 15:17:32,243 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 15:17:32,243 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 15:17:32,243 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 15:17:32,243 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 15:17:32,243 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 15:17:32,243 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 15:17:32,243 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 15:17:32,244 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 15:17:32,244 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 15:17:32,244 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 15:17:32,244 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 15:17:32,244 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 15:17:32,244 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-04-27 15:17:32,244 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-04-27 15:17:32,245 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 15:17:32,245 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 15:17:32,482 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 15:17:32,508 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 15:17:32,510 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 15:17:32,511 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 15:17:32,512 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 15:17:32,513 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c [2022-04-27 15:17:32,575 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8975880f2/05c4b72351184911820fd1dc559cec6b/FLAG0590edc1f [2022-04-27 15:17:33,264 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 15:17:33,265 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c [2022-04-27 15:17:33,300 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8975880f2/05c4b72351184911820fd1dc559cec6b/FLAG0590edc1f [2022-04-27 15:17:33,393 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8975880f2/05c4b72351184911820fd1dc559cec6b [2022-04-27 15:17:33,395 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 15:17:33,396 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-27 15:17:33,397 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 15:17:33,397 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 15:17:33,400 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 15:17:33,401 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 03:17:33" (1/1) ... [2022-04-27 15:17:33,402 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@77d53b2e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:33, skipping insertion in model container [2022-04-27 15:17:33,402 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 03:17:33" (1/1) ... [2022-04-27 15:17:33,413 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 15:17:33,516 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 15:17:34,384 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c[86591,86604] [2022-04-27 15:17:35,236 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 15:17:35,264 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 15:17:35,362 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c[86591,86604] [2022-04-27 15:17:35,663 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 15:17:35,716 INFO L208 MainTranslator]: Completed translation [2022-04-27 15:17:35,717 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:35 WrapperNode [2022-04-27 15:17:35,717 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 15:17:35,718 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 15:17:35,718 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 15:17:35,718 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 15:17:35,728 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:35" (1/1) ... [2022-04-27 15:17:35,729 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:35" (1/1) ... [2022-04-27 15:17:35,819 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:35" (1/1) ... [2022-04-27 15:17:35,820 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:35" (1/1) ... [2022-04-27 15:17:35,987 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:35" (1/1) ... [2022-04-27 15:17:36,026 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:35" (1/1) ... [2022-04-27 15:17:36,118 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:35" (1/1) ... [2022-04-27 15:17:36,146 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 15:17:36,147 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 15:17:36,147 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 15:17:36,147 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 15:17:36,148 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:35" (1/1) ... [2022-04-27 15:17:36,154 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 15:17:36,166 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 15:17:36,180 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 15:17:36,208 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 15:17:36,224 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 15:17:36,224 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 15:17:36,224 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~PVOID~0~TO~~BOOLEAN~0 [2022-04-27 15:17:36,225 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~PVOID~0~X~~UCHAR~0~TO~~NTSTATUS~0 [2022-04-27 15:17:36,226 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~PVOID~0~TO~VOID [2022-04-27 15:17:36,226 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 15:17:36,226 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-27 15:17:36,226 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_guard [2022-04-27 15:17:36,226 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlIntegerToUnicodeString [2022-04-27 15:17:36,226 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlUnicodeStringToInteger [2022-04-27 15:17:36,226 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCompareUnicodeString [2022-04-27 15:17:36,226 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlAppendUnicodeStringToString [2022-04-27 15:17:36,226 INFO L138 BoogieDeclarations]: Found implementation of procedure READ_PORT_UCHAR [2022-04-27 15:17:36,226 INFO L138 BoogieDeclarations]: Found implementation of procedure WRITE_PORT_UCHAR [2022-04-27 15:17:36,227 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedIncrement [2022-04-27 15:17:36,227 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedDecrement [2022-04-27 15:17:36,227 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedExchange [2022-04-27 15:17:36,227 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeDpc [2022-04-27 15:17:36,227 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInsertQueueDpc [2022-04-27 15:17:36,227 INFO L138 BoogieDeclarations]: Found implementation of procedure KeSynchronizeExecution [2022-04-27 15:17:36,227 INFO L138 BoogieDeclarations]: Found implementation of procedure KeQueryTimeIncrement [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAcquireCancelSpinLock [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAllocateErrorLogEntry [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure IoConnectInterrupt [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReportResourceUsage [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure IoInitializeRemoveLockEx [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseRemoveLockEx [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseRemoveLockAndWaitEx [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure IoWriteErrorLogEntry [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure IoWMIRegistrationControl [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure IoOpenDeviceRegistryKey [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure KeStallExecutionProcessor [2022-04-27 15:17:36,228 INFO L138 BoogieDeclarations]: Found implementation of procedure PoRequestPowerIrp [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure PoSetPowerState [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure ObfReferenceObject [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwQueryValueKey [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwSetValueKey [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure WmiCompleteRequest [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure errorFn [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchCleanup [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpPnpIrpInfo [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAcquireRemoveLock [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure PptReleaseRemoveLock [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure PptReleaseRemoveLockAndWait [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpResourceList [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpResourceRequirementsList [2022-04-27 15:17:36,229 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLogError [2022-04-27 15:17:36,230 INFO L138 BoogieDeclarations]: Found implementation of procedure DriverEntry [2022-04-27 15:17:36,230 INFO L138 BoogieDeclarations]: Found implementation of procedure PptUnload [2022-04-27 15:17:36,230 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCleanRemovalRelationsList [2022-04-27 15:17:36,230 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAddPptRemovalRelation [2022-04-27 15:17:36,230 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRemovePptRemovalRelation [2022-04-27 15:17:36,230 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDumpRemovalRelationsList [2022-04-27 15:17:36,230 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDumpPptRemovalRelationsStruct [2022-04-27 15:17:36,230 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchInternalDeviceControl [2022-04-27 15:17:36,231 INFO L138 BoogieDeclarations]: Found implementation of procedure PptIsNecR98Machine [2022-04-27 15:17:36,231 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchCreate [2022-04-27 15:17:36,231 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchClose [2022-04-27 15:17:36,231 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInitiate1284_3 [2022-04-27 15:17:36,231 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTrySelectDevice [2022-04-27 15:17:36,231 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDeselectDevice [2022-04-27 15:17:36,231 INFO L138 BoogieDeclarations]: Found implementation of procedure Ppt1284_3AssignAddress [2022-04-27 15:17:36,232 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfNon1284_3Present [2022-04-27 15:17:36,232 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfStl1284_3 [2022-04-27 15:17:36,232 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfStlProductId [2022-04-27 15:17:36,232 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSend1284_3Command [2022-04-27 15:17:36,232 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectChipFilter [2022-04-27 15:17:36,232 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectPortType [2022-04-27 15:17:36,232 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectPortCapabilities [2022-04-27 15:17:36,232 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEcpPort [2022-04-27 15:17:36,233 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPortIfDot3DevicePresent [2022-04-27 15:17:36,233 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPortIfUserRequested [2022-04-27 15:17:36,233 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPort [2022-04-27 15:17:36,234 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectBytePort [2022-04-27 15:17:36,234 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetermineFifoDepth [2022-04-27 15:17:36,234 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetermineFifoWidth [2022-04-27 15:17:36,234 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetChipMode [2022-04-27 15:17:36,234 INFO L138 BoogieDeclarations]: Found implementation of procedure PptClearChipMode [2022-04-27 15:17:36,234 INFO L138 BoogieDeclarations]: Found implementation of procedure PptEcrSetMode [2022-04-27 15:17:36,234 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetByteMode [2022-04-27 15:17:36,234 INFO L138 BoogieDeclarations]: Found implementation of procedure PptClearByteMode [2022-04-27 15:17:36,234 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckByteMode [2022-04-27 15:17:36,235 INFO L138 BoogieDeclarations]: Found implementation of procedure PptEcrClearMode [2022-04-27 15:17:36,235 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFindNatChip [2022-04-27 15:17:36,235 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildResourceList [2022-04-27 15:17:36,235 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpBuildRemovalRelations [2022-04-27 15:17:36,235 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartScanPciCardCmResourceList [2022-04-27 15:17:36,235 INFO L138 BoogieDeclarations]: Found implementation of procedure PptIsPci [2022-04-27 15:17:36,236 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCompleteRequest [2022-04-27 15:17:36,236 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpInitDispatchFunctionTable [2022-04-27 15:17:36,236 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpAddDevice [2022-04-27 15:17:36,236 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPnp [2022-04-27 15:17:36,236 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartDevice [2022-04-27 15:17:36,236 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartScanCmResourceList [2022-04-27 15:17:36,236 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartValidateResources [2022-04-27 15:17:36,236 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterResourceRequirements [2022-04-27 15:17:36,236 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterExistsNonIrqResourceList [2022-04-27 15:17:36,237 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterRemoveIrqResourceLists [2022-04-27 15:17:36,237 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterGetEndOfResourceRequirementsList [2022-04-27 15:17:36,237 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterNukeIrqResourceDescriptorsFromAllLists [2022-04-27 15:17:36,237 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterNukeIrqResourceDescriptors [2022-04-27 15:17:36,238 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryDeviceRelations [2022-04-27 15:17:36,238 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryStopDevice [2022-04-27 15:17:36,238 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpCancelStopDevice [2022-04-27 15:17:36,238 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStopDevice [2022-04-27 15:17:36,238 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryRemoveDevice [2022-04-27 15:17:36,238 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpCancelRemoveDevice [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpRemoveDevice [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpSurpriseRemoval [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpListContainsIrqResourceDescriptor [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpBounceAndCatchPnpIrp [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpPassThroughPnpIrpAndReleaseRemoveLock [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpUnhandledIrp [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPowerComplete [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure InitNEC_98 [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPower [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipClockDiskModeByte [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipClockPrtModeByte [2022-04-27 15:17:36,239 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipSetDiskMode [2022-04-27 15:17:36,240 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipCheckDevice [2022-04-27 15:17:36,240 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTrySelectLegacyZip [2022-04-27 15:17:36,240 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDeselectLegacyZip [2022-04-27 15:17:36,240 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegInitDriverSettings [2022-04-27 15:17:36,240 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegGetDeviceParameterDword [2022-04-27 15:17:36,240 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegSetDeviceParameterDword [2022-04-27 15:17:36,240 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFailRequest [2022-04-27 15:17:36,241 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAcquireRemoveLockOrFailIrp [2022-04-27 15:17:36,242 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPreProcessIrp [2022-04-27 15:17:36,242 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPostProcessIrp [2022-04-27 15:17:36,243 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchCompletionRoutine [2022-04-27 15:17:36,245 INFO L138 BoogieDeclarations]: Found implementation of procedure PptGetPortNameFromPhysicalDeviceObject [2022-04-27 15:17:36,245 INFO L138 BoogieDeclarations]: Found implementation of procedure PptConnectInterrupt [2022-04-27 15:17:36,250 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDisconnectInterrupt [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedIncrement [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedDecrement [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedRead [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedQueue [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedDisconnect [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCancelRoutine [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePortDpc [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTryAllocatePortAtInterruptLevel [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePortFromInterruptLevel [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInterruptService [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTryAllocatePort [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTraversePortCheckList [2022-04-27 15:17:36,251 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePort [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure PptQueryNumWaiters [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetCancelRoutine [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure KeQueryTickCount [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure CheckPort [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildParallelPortDeviceName [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInitializeDeviceExtension [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure PptGetPortNumberFromLptName [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildDeviceObject [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiInitWmi [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchSystemControl [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiQueryWmiRegInfo [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiQueryWmiDataBlock [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure _BLAST_init [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure stub_driver_init [2022-04-27 15:17:36,252 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure ExAcquireFastMutex [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure ExReleaseFastMutex [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure ExAllocatePoolWithTag [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure ExFreePool [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedInsertHeadList [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedInsertTailList [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedRemoveHeadList [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAllocateMdl [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAttachDeviceToDeviceStack [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure IoBuildAsynchronousFsdRequest [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure IoBuildDeviceIoControlRequest [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure IoCreateDevice [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure IoCreateSymbolicLink [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDeleteDevice [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDeleteSymbolicLink [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDetachDevice [2022-04-27 15:17:36,253 INFO L138 BoogieDeclarations]: Found implementation of procedure IoFreeIrp [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure IoFreeMdl [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure IoGetConfigurationInformation [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure IoQueryDeviceDescription [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure IoRegisterDeviceInterface [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseCancelSpinLock [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure IoSetDeviceInterfaceState [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure IoSetHardErrorOrVerifyDevice [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure stubMoreProcessingRequired [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure IofCallDriver [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure IofCompleteRequest [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure KeAcquireSpinLockRaiseToDpc [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure KeDelayExecutionThread [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeEvent [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeSemaphore [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeSpinLock [2022-04-27 15:17:36,254 INFO L138 BoogieDeclarations]: Found implementation of procedure KeReleaseSemaphore [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure KfReleaseSpinLock [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure KeSetEvent [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure KeWaitForSingleObject [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure MmAllocateContiguousMemory [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure MmFreeContiguousMemory [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure MmMapLockedPagesSpecifyCache [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure MmPageEntireDriver [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure MmResetDriverPaging [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure MmUnlockPages [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure ObReferenceObjectByHandle [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure ObfDereferenceObject [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure PoCallDriver [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure PoStartNextPowerIrp [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure PsCreateSystemThread [2022-04-27 15:17:36,255 INFO L138 BoogieDeclarations]: Found implementation of procedure PsTerminateSystemThread [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlAnsiStringToUnicodeString [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCompareMemory [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCopyUnicodeString [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlDeleteRegistryValue [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlFreeUnicodeString [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlInitString [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlInitUnicodeString [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlQueryRegistryValues [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwClose [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure WmiSystemControl [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAcquireRemoveLockEx [2022-04-27 15:17:36,256 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-04-27 15:17:36,257 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-04-27 15:17:36,257 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memmove [2022-04-27 15:17:36,257 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 15:17:36,257 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 15:17:36,257 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 15:17:36,257 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 15:17:36,257 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-27 15:17:36,257 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_short [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_long [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_guard [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure memmove [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure RtlQueryRegistryValues [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure RtlDeleteRegistryValue [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure RtlIntegerToUnicodeString [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure RtlUnicodeStringToInteger [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 15:17:36,258 INFO L130 BoogieDeclarations]: Found specification of procedure RtlInitString [2022-04-27 15:17:36,259 INFO L130 BoogieDeclarations]: Found specification of procedure RtlInitUnicodeString [2022-04-27 15:17:36,259 INFO L130 BoogieDeclarations]: Found specification of procedure RtlAnsiStringToUnicodeString [2022-04-27 15:17:36,259 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCompareUnicodeString [2022-04-27 15:17:36,259 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCopyUnicodeString [2022-04-27 15:17:36,259 INFO L130 BoogieDeclarations]: Found specification of procedure RtlAppendUnicodeStringToString [2022-04-27 15:17:36,259 INFO L130 BoogieDeclarations]: Found specification of procedure RtlFreeUnicodeString [2022-04-27 15:17:36,259 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCompareMemory [2022-04-27 15:17:36,259 INFO L130 BoogieDeclarations]: Found specification of procedure READ_PORT_UCHAR [2022-04-27 15:17:36,259 INFO L130 BoogieDeclarations]: Found specification of procedure WRITE_PORT_UCHAR [2022-04-27 15:17:36,259 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedIncrement [2022-04-27 15:17:36,260 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedDecrement [2022-04-27 15:17:36,260 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedExchange [2022-04-27 15:17:36,263 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeDpc [2022-04-27 15:17:36,263 INFO L130 BoogieDeclarations]: Found specification of procedure KeInsertQueueDpc [2022-04-27 15:17:36,264 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-04-27 15:17:36,264 INFO L130 BoogieDeclarations]: Found specification of procedure KeSynchronizeExecution [2022-04-27 15:17:36,264 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeEvent [2022-04-27 15:17:36,264 INFO L130 BoogieDeclarations]: Found specification of procedure KeSetEvent [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeSemaphore [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure KeReleaseSemaphore [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure KeDelayExecutionThread [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure KeWaitForSingleObject [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeSpinLock [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure KfReleaseSpinLock [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure KeQueryTimeIncrement [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure ExAllocatePoolWithTag [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure ExFreePool [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure ExAcquireFastMutex [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure ExReleaseFastMutex [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedInsertHeadList [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedInsertTailList [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedRemoveHeadList [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure MmUnlockPages [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure MmMapLockedPagesSpecifyCache [2022-04-27 15:17:36,265 INFO L130 BoogieDeclarations]: Found specification of procedure MmAllocateContiguousMemory [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure MmFreeContiguousMemory [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure MmResetDriverPaging [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure MmPageEntireDriver [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure PsCreateSystemThread [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure PsTerminateSystemThread [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure IoAcquireCancelSpinLock [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure IoAllocateErrorLogEntry [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure IoAllocateMdl [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure IoAttachDeviceToDeviceStack [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure IoBuildAsynchronousFsdRequest [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure IoBuildDeviceIoControlRequest [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure IofCallDriver [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure IofCompleteRequest [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure IoConnectInterrupt [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~PVOID~0~TO~~BOOLEAN~0 [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-04-27 15:17:36,266 INFO L130 BoogieDeclarations]: Found specification of procedure IoCreateDevice [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoCreateSymbolicLink [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoDeleteDevice [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoDeleteSymbolicLink [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoDetachDevice [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoFreeIrp [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoFreeMdl [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoGetConfigurationInformation [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoQueryDeviceDescription [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseCancelSpinLock [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoReportResourceUsage [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoSetHardErrorOrVerifyDevice [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoInitializeRemoveLockEx [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoAcquireRemoveLockEx [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseRemoveLockEx [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseRemoveLockAndWaitEx [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoWriteErrorLogEntry [2022-04-27 15:17:36,267 INFO L130 BoogieDeclarations]: Found specification of procedure IoWMIRegistrationControl [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure IoOpenDeviceRegistryKey [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure IoRegisterDeviceInterface [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure IoSetDeviceInterfaceState [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure KeStallExecutionProcessor [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure PoRequestPowerIrp [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure PoSetPowerState [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure PoCallDriver [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure PoStartNextPowerIrp [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure ObReferenceObjectByHandle [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure ObfReferenceObject [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure ObfDereferenceObject [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure ZwClose [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure ZwQueryValueKey [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure ZwSetValueKey [2022-04-27 15:17:36,268 INFO L130 BoogieDeclarations]: Found specification of procedure WmiCompleteRequest [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure WmiSystemControl [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptCompleteRequest [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure errorFn [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiInitWmi [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchSystemControl [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpInitDispatchFunctionTable [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpAddDevice [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPnp [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptFailRequest [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPreProcessIrp [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPostProcessIrp [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure DriverEntry [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptUnload [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchCompletionRoutine [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptLogError [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptConnectInterrupt [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptDisconnectInterrupt [2022-04-27 15:17:36,269 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchCreate [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchClose [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedIncrement [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedDecrement [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedRead [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedQueue [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedDisconnect [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptCancelRoutine [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePortDpc [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptTryAllocatePortAtInterruptLevel [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePortFromInterruptLevel [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptInterruptService [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptTryAllocatePort [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptTraversePortCheckList [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePort [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptQueryNumWaiters [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchInternalDeviceControl [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchCleanup [2022-04-27 15:17:36,270 INFO L130 BoogieDeclarations]: Found specification of procedure PptIsNecR98Machine [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPower [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegInitDriverSettings [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptGetPortNameFromPhysicalDeviceObject [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetCancelRoutine [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptAcquireRemoveLockOrFailIrp [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpPnpIrpInfo [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptAcquireRemoveLock [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptReleaseRemoveLock [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptReleaseRemoveLockAndWait [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpResourceList [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpResourceRequirementsList [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectChipFilter [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectPortType [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetChipMode [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptClearChipMode [2022-04-27 15:17:36,271 INFO L130 BoogieDeclarations]: Found specification of procedure PptInitiate1284_3 [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptTrySelectDevice [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptDeselectDevice [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure Ppt1284_3AssignAddress [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptSend1284_3Command [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptTrySelectLegacyZip [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptDeselectLegacyZip [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptDumpRemovalRelationsList [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegGetDeviceParameterDword [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegSetDeviceParameterDword [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildParallelPortDeviceName [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptInitializeDeviceExtension [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptGetPortNumberFromLptName [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildDeviceObject [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPort [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure PptCleanRemovalRelationsList [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure CheckPort [2022-04-27 15:17:36,272 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memmove [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptAddPptRemovalRelation [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptRemovePptRemovalRelation [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptDumpPptRemovalRelationsStruct [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfStl1284_3 [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfNon1284_3Present [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfStlProductId [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectPortCapabilities [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEcpPort [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPortIfDot3DevicePresent [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPortIfUserRequested [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectBytePort [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetermineFifoDepth [2022-04-27 15:17:36,273 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetermineFifoWidth [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptEcrSetMode [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptEcrClearMode [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptFindNatChip [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildResourceList [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetByteMode [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptClearByteMode [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckByteMode [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~PVOID~0~X~~UCHAR~0~TO~~NTSTATUS~0 [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterResourceRequirements [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryDeviceRelations [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryStopDevice [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpCancelStopDevice [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStopDevice [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryRemoveDevice [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpCancelRemoveDevice [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpRemoveDevice [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpSurpriseRemoval [2022-04-27 15:17:36,274 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpUnhandledIrp [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartDevice [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartValidateResources [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartScanCmResourceList [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpPassThroughPnpIrpAndReleaseRemoveLock [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterNukeIrqResourceDescriptors [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterNukeIrqResourceDescriptorsFromAllLists [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterExistsNonIrqResourceList [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterGetEndOfResourceRequirementsList [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpListContainsIrqResourceDescriptor [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterRemoveIrqResourceLists [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpBounceAndCatchPnpIrp [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpBuildRemovalRelations [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartScanPciCardCmResourceList [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptIsPci [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure PptPowerComplete [2022-04-27 15:17:36,275 INFO L130 BoogieDeclarations]: Found specification of procedure InitNEC_98 [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipClockDiskModeByte [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipClockPrtModeByte [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipSetDiskMode [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipCheckDevice [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~PVOID~0~TO~VOID [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure KeQueryTickCount [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiQueryWmiRegInfo [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiQueryWmiDataBlock [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure _BLAST_init [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure stub_driver_init [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure stubMoreProcessingRequired [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure KeAcquireSpinLockRaiseToDpc [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 15:17:36,276 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-04-27 15:17:36,277 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 15:17:36,277 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-04-27 15:17:36,277 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-04-27 15:17:36,277 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-04-27 15:17:36,277 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-04-27 15:17:37,137 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 15:17:37,144 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 15:17:37,186 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:37,222 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:37,222 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:37,525 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:37,687 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##8: assume !false; [2022-04-27 15:17:37,687 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##7: assume false; [2022-04-27 15:17:37,707 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:37,741 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##16: assume !false; [2022-04-27 15:17:37,741 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##15: assume false; [2022-04-27 15:17:37,741 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:37,756 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:37,756 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:37,889 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:37,935 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##9: assume false; [2022-04-27 15:17:37,936 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##10: assume !false; [2022-04-27 15:17:37,936 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:37,948 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:37,948 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:38,221 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:38,246 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:38,246 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:38,375 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:38,405 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-27 15:17:38,406 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-27 15:17:38,487 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:38,557 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##27: assume !false; [2022-04-27 15:17:38,557 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume false; [2022-04-27 15:17:38,558 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:38,576 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-27 15:17:38,577 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-27 15:17:38,606 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:38,613 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:38,613 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:38,884 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:42,685 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##39: assume !false; [2022-04-27 15:17:42,685 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##38: assume false; [2022-04-27 15:17:44,849 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:44,854 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:44,855 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:44,970 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:44,970 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:45,518 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume !false; [2022-04-27 15:17:45,518 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##20: assume !false; [2022-04-27 15:17:45,518 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##25: assume false; [2022-04-27 15:17:45,518 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##19: assume false; [2022-04-27 15:17:45,834 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:45,841 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:45,841 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:46,040 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:46,053 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:46,054 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:46,419 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:46,425 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:46,425 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:46,426 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:46,438 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:46,439 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:46,469 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:46,476 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:46,476 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:46,477 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:46,483 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:46,483 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:46,484 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:46,498 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:46,498 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:46,681 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:46,688 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:46,688 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:46,697 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:46,703 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:46,703 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:46,790 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:46,796 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:46,796 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:46,821 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:46,827 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:46,827 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:47,434 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:47,439 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:47,440 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:47,451 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:47,498 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##6: assume !false; [2022-04-27 15:17:47,499 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##5: assume false; [2022-04-27 15:17:47,505 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:47,740 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##31: assume !false; [2022-04-27 15:17:47,740 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##30: assume false; [2022-04-27 15:17:48,143 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:48,150 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:48,150 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:48,318 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:48,375 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##21: assume !false; [2022-04-27 15:17:48,375 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##20: assume false; [2022-04-27 15:17:48,473 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:50,941 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##27: assume !false; [2022-04-27 15:17:50,941 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume false; [2022-04-27 15:17:50,989 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:51,024 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-27 15:17:51,024 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-27 15:17:51,024 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:51,047 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-27 15:17:51,047 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-27 15:17:51,092 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:51,103 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##16: assume !false; [2022-04-27 15:17:51,103 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##15: assume false; [2022-04-27 15:17:51,258 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:51,264 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-27 15:17:51,265 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-27 15:17:51,505 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-27 15:17:51,527 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##12: assume !false; [2022-04-27 15:17:51,527 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##11: assume false; [2022-04-27 15:17:51,613 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 15:17:51,633 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 15:17:51,633 INFO L299 CfgBuilder]: Removed 38 assume(true) statements. [2022-04-27 15:17:51,638 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 03:17:51 BoogieIcfgContainer [2022-04-27 15:17:51,638 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 15:17:51,639 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 15:17:51,639 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 15:17:51,642 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 15:17:51,643 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 03:17:33" (1/3) ... [2022-04-27 15:17:51,643 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cffa427 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 03:17:51, skipping insertion in model container [2022-04-27 15:17:51,643 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 03:17:35" (2/3) ... [2022-04-27 15:17:51,644 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cffa427 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 03:17:51, skipping insertion in model container [2022-04-27 15:17:51,644 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 03:17:51" (3/3) ... [2022-04-27 15:17:51,645 INFO L111 eAbstractionObserver]: Analyzing ICFG parport.i.cil-2.c [2022-04-27 15:17:51,658 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 15:17:51,658 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 15:17:51,748 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 15:17:51,753 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@4ea06401, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@9e64abe [2022-04-27 15:17:51,753 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 15:17:51,777 INFO L276 IsEmpty]: Start isEmpty. Operand has 2250 states, 1521 states have (on average 1.4372123602892835) internal successors, (2186), 1577 states have internal predecessors, (2186), 562 states have call successors, (562), 151 states have call predecessors, (562), 151 states have return successors, (562), 547 states have call predecessors, (562), 562 states have call successors, (562) [2022-04-27 15:17:51,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-27 15:17:51,784 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:17:51,784 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:17:51,785 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:17:51,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:17:51,789 INFO L85 PathProgramCache]: Analyzing trace with hash -2073400986, now seen corresponding path program 1 times [2022-04-27 15:17:51,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:17:51,797 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [48969661] [2022-04-27 15:17:51,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:17:51,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:17:52,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:17:52,642 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:17:52,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:17:52,689 INFO L290 TraceCheckUtils]: 0: Hoare triple {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {2253#true} is VALID [2022-04-27 15:17:52,690 INFO L290 TraceCheckUtils]: 1: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-27 15:17:52,690 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2253#true} {2253#true} #6857#return; {2253#true} is VALID [2022-04-27 15:17:52,727 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-27 15:17:52,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:17:52,747 INFO L290 TraceCheckUtils]: 0: Hoare triple {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {2253#true} is VALID [2022-04-27 15:17:52,747 INFO L290 TraceCheckUtils]: 1: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-27 15:17:52,747 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2253#true} {2254#false} #6457#return; {2254#false} is VALID [2022-04-27 15:17:52,752 INFO L272 TraceCheckUtils]: 0: Hoare triple {2253#true} call ULTIMATE.init(); {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:17:52,752 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {2253#true} is VALID [2022-04-27 15:17:52,752 INFO L290 TraceCheckUtils]: 2: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-27 15:17:52,752 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2253#true} {2253#true} #6857#return; {2253#true} is VALID [2022-04-27 15:17:52,753 INFO L272 TraceCheckUtils]: 4: Hoare triple {2253#true} call #t~ret1155 := main(); {2253#true} is VALID [2022-04-27 15:17:52,753 INFO L290 TraceCheckUtils]: 5: Hoare triple {2253#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {2258#(= main_~i~24 0)} is VALID [2022-04-27 15:17:52,754 INFO L290 TraceCheckUtils]: 6: Hoare triple {2258#(= main_~i~24 0)} assume !(~i~24 < 4); {2254#false} is VALID [2022-04-27 15:17:52,754 INFO L290 TraceCheckUtils]: 7: Hoare triple {2254#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {2254#false} is VALID [2022-04-27 15:17:52,754 INFO L272 TraceCheckUtils]: 8: Hoare triple {2254#false} call _BLAST_init(); {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:17:52,755 INFO L290 TraceCheckUtils]: 9: Hoare triple {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {2253#true} is VALID [2022-04-27 15:17:52,755 INFO L290 TraceCheckUtils]: 10: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-27 15:17:52,755 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {2253#true} {2254#false} #6457#return; {2254#false} is VALID [2022-04-27 15:17:52,755 INFO L290 TraceCheckUtils]: 12: Hoare triple {2254#false} assume !(~status~31 >= 0); {2254#false} is VALID [2022-04-27 15:17:52,755 INFO L290 TraceCheckUtils]: 13: Hoare triple {2254#false} assume !(1 == ~pended~0); {2254#false} is VALID [2022-04-27 15:17:52,756 INFO L290 TraceCheckUtils]: 14: Hoare triple {2254#false} assume !(1 == ~pended~0); {2254#false} is VALID [2022-04-27 15:17:52,756 INFO L290 TraceCheckUtils]: 15: Hoare triple {2254#false} assume !(~s~0 == ~UNLOADED~0); {2254#false} is VALID [2022-04-27 15:17:52,756 INFO L290 TraceCheckUtils]: 16: Hoare triple {2254#false} assume !(-1 == ~status~31); {2254#false} is VALID [2022-04-27 15:17:52,757 INFO L290 TraceCheckUtils]: 17: Hoare triple {2254#false} assume !(~s~0 != ~SKIP2~0); {2254#false} is VALID [2022-04-27 15:17:52,757 INFO L290 TraceCheckUtils]: 18: Hoare triple {2254#false} assume 1 == ~pended~0; {2254#false} is VALID [2022-04-27 15:17:52,758 INFO L290 TraceCheckUtils]: 19: Hoare triple {2254#false} assume 259 != ~status~31; {2254#false} is VALID [2022-04-27 15:17:52,758 INFO L272 TraceCheckUtils]: 20: Hoare triple {2254#false} call errorFn(); {2254#false} is VALID [2022-04-27 15:17:52,758 INFO L290 TraceCheckUtils]: 21: Hoare triple {2254#false} assume !false; {2254#false} is VALID [2022-04-27 15:17:52,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:17:52,759 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:17:52,759 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [48969661] [2022-04-27 15:17:52,760 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [48969661] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 15:17:52,760 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 15:17:52,760 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 15:17:52,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300248475] [2022-04-27 15:17:52,763 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 15:17:52,769 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 22 [2022-04-27 15:17:52,770 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:17:52,773 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:17:52,814 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:17:52,815 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 15:17:52,815 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:17:52,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 15:17:52,831 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-27 15:17:52,846 INFO L87 Difference]: Start difference. First operand has 2250 states, 1521 states have (on average 1.4372123602892835) internal successors, (2186), 1577 states have internal predecessors, (2186), 562 states have call successors, (562), 151 states have call predecessors, (562), 151 states have return successors, (562), 547 states have call predecessors, (562), 562 states have call successors, (562) Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:18:03,769 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.27s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:18:08,292 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:18:16,921 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:18:18,991 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:18:37,681 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:19:04,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:19:04,623 INFO L93 Difference]: Finished difference Result 4216 states and 6551 transitions. [2022-04-27 15:19:04,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 15:19:04,624 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 22 [2022-04-27 15:19:04,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:19:04,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:19:05,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6551 transitions. [2022-04-27 15:19:05,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:19:05,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6551 transitions. [2022-04-27 15:19:05,597 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 6551 transitions. [2022-04-27 15:19:18,611 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6551 edges. 6551 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:19:19,027 INFO L225 Difference]: With dead ends: 4216 [2022-04-27 15:19:19,027 INFO L226 Difference]: Without dead ends: 2226 [2022-04-27 15:19:19,041 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-27 15:19:19,047 INFO L413 NwaCegarLoop]: 2420 mSDtfsCounter, 3235 mSDsluCounter, 361 mSDsCounter, 0 mSdLazyCounter, 3761 mSolverCounterSat, 1561 mSolverCounterUnsat, 4 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 29.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3638 SdHoareTripleChecker+Valid, 2781 SdHoareTripleChecker+Invalid, 5326 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1561 IncrementalHoareTripleChecker+Valid, 3761 IncrementalHoareTripleChecker+Invalid, 4 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 30.0s IncrementalHoareTripleChecker+Time [2022-04-27 15:19:19,051 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3638 Valid, 2781 Invalid, 5326 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1561 Valid, 3761 Invalid, 4 Unknown, 0 Unchecked, 30.0s Time] [2022-04-27 15:19:19,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2226 states. [2022-04-27 15:19:19,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2226 to 1985. [2022-04-27 15:19:19,393 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:19:19,402 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:19:19,408 INFO L74 IsIncluded]: Start isIncluded. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:19:19,414 INFO L87 Difference]: Start difference. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:19:19,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:19:19,680 INFO L93 Difference]: Finished difference Result 2226 states and 3242 transitions. [2022-04-27 15:19:19,681 INFO L276 IsEmpty]: Start isEmpty. Operand 2226 states and 3242 transitions. [2022-04-27 15:19:19,698 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:19:19,698 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:19:19,705 INFO L74 IsIncluded]: Start isIncluded. First operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2226 states. [2022-04-27 15:19:19,710 INFO L87 Difference]: Start difference. First operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2226 states. [2022-04-27 15:19:19,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:19:19,963 INFO L93 Difference]: Finished difference Result 2226 states and 3242 transitions. [2022-04-27 15:19:19,963 INFO L276 IsEmpty]: Start isEmpty. Operand 2226 states and 3242 transitions. [2022-04-27 15:19:19,973 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:19:19,974 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:19:19,974 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:19:19,974 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:19:19,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:19:20,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2849 transitions. [2022-04-27 15:19:20,279 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2849 transitions. Word has length 22 [2022-04-27 15:19:20,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:19:20,280 INFO L495 AbstractCegarLoop]: Abstraction has 1985 states and 2849 transitions. [2022-04-27 15:19:20,280 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 15:19:20,280 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2849 transitions. [2022-04-27 15:19:20,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-27 15:19:20,281 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:19:20,281 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:19:20,281 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 15:19:20,281 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:19:20,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:19:20,282 INFO L85 PathProgramCache]: Analyzing trace with hash 1828450504, now seen corresponding path program 1 times [2022-04-27 15:19:20,283 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:19:20,283 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [157796505] [2022-04-27 15:19:20,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:19:20,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:19:20,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:20,599 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:19:20,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:20,631 INFO L290 TraceCheckUtils]: 0: Hoare triple {15451#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {15441#true} is VALID [2022-04-27 15:19:20,632 INFO L290 TraceCheckUtils]: 1: Hoare triple {15441#true} assume true; {15441#true} is VALID [2022-04-27 15:19:20,632 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15441#true} {15441#true} #6857#return; {15441#true} is VALID [2022-04-27 15:19:20,664 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-27 15:19:20,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:20,678 INFO L290 TraceCheckUtils]: 0: Hoare triple {15452#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {15441#true} is VALID [2022-04-27 15:19:20,679 INFO L290 TraceCheckUtils]: 1: Hoare triple {15441#true} assume true; {15441#true} is VALID [2022-04-27 15:19:20,679 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15441#true} {15442#false} #6457#return; {15442#false} is VALID [2022-04-27 15:19:20,682 INFO L272 TraceCheckUtils]: 0: Hoare triple {15441#true} call ULTIMATE.init(); {15451#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:19:20,683 INFO L290 TraceCheckUtils]: 1: Hoare triple {15451#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {15441#true} is VALID [2022-04-27 15:19:20,683 INFO L290 TraceCheckUtils]: 2: Hoare triple {15441#true} assume true; {15441#true} is VALID [2022-04-27 15:19:20,683 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15441#true} {15441#true} #6857#return; {15441#true} is VALID [2022-04-27 15:19:20,683 INFO L272 TraceCheckUtils]: 4: Hoare triple {15441#true} call #t~ret1155 := main(); {15441#true} is VALID [2022-04-27 15:19:20,684 INFO L290 TraceCheckUtils]: 5: Hoare triple {15441#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {15446#(= main_~i~24 0)} is VALID [2022-04-27 15:19:20,684 INFO L290 TraceCheckUtils]: 6: Hoare triple {15446#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {15446#(= main_~i~24 0)} is VALID [2022-04-27 15:19:20,685 INFO L290 TraceCheckUtils]: 7: Hoare triple {15446#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {15447#(<= main_~i~24 1)} is VALID [2022-04-27 15:19:20,685 INFO L290 TraceCheckUtils]: 8: Hoare triple {15447#(<= main_~i~24 1)} assume !(~i~24 < 4); {15442#false} is VALID [2022-04-27 15:19:20,685 INFO L290 TraceCheckUtils]: 9: Hoare triple {15442#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {15442#false} is VALID [2022-04-27 15:19:20,685 INFO L272 TraceCheckUtils]: 10: Hoare triple {15442#false} call _BLAST_init(); {15452#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:19:20,685 INFO L290 TraceCheckUtils]: 11: Hoare triple {15452#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {15441#true} is VALID [2022-04-27 15:19:20,686 INFO L290 TraceCheckUtils]: 12: Hoare triple {15441#true} assume true; {15441#true} is VALID [2022-04-27 15:19:20,686 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {15441#true} {15442#false} #6457#return; {15442#false} is VALID [2022-04-27 15:19:20,686 INFO L290 TraceCheckUtils]: 14: Hoare triple {15442#false} assume !(~status~31 >= 0); {15442#false} is VALID [2022-04-27 15:19:20,686 INFO L290 TraceCheckUtils]: 15: Hoare triple {15442#false} assume !(1 == ~pended~0); {15442#false} is VALID [2022-04-27 15:19:20,686 INFO L290 TraceCheckUtils]: 16: Hoare triple {15442#false} assume !(1 == ~pended~0); {15442#false} is VALID [2022-04-27 15:19:20,686 INFO L290 TraceCheckUtils]: 17: Hoare triple {15442#false} assume !(~s~0 == ~UNLOADED~0); {15442#false} is VALID [2022-04-27 15:19:20,686 INFO L290 TraceCheckUtils]: 18: Hoare triple {15442#false} assume !(-1 == ~status~31); {15442#false} is VALID [2022-04-27 15:19:20,687 INFO L290 TraceCheckUtils]: 19: Hoare triple {15442#false} assume !(~s~0 != ~SKIP2~0); {15442#false} is VALID [2022-04-27 15:19:20,687 INFO L290 TraceCheckUtils]: 20: Hoare triple {15442#false} assume 1 == ~pended~0; {15442#false} is VALID [2022-04-27 15:19:20,687 INFO L290 TraceCheckUtils]: 21: Hoare triple {15442#false} assume 259 != ~status~31; {15442#false} is VALID [2022-04-27 15:19:20,687 INFO L272 TraceCheckUtils]: 22: Hoare triple {15442#false} call errorFn(); {15442#false} is VALID [2022-04-27 15:19:20,687 INFO L290 TraceCheckUtils]: 23: Hoare triple {15442#false} assume !false; {15442#false} is VALID [2022-04-27 15:19:20,688 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:19:20,688 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:19:20,688 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [157796505] [2022-04-27 15:19:20,689 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [157796505] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 15:19:20,689 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1660481820] [2022-04-27 15:19:20,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:19:20,689 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:19:20,689 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 15:19:20,692 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 15:19:20,725 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 15:19:21,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:21,411 INFO L263 TraceCheckSpWp]: Trace formula consists of 1345 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-27 15:19:21,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:21,463 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 15:19:21,539 INFO L272 TraceCheckUtils]: 0: Hoare triple {15441#true} call ULTIMATE.init(); {15441#true} is VALID [2022-04-27 15:19:21,539 INFO L290 TraceCheckUtils]: 1: Hoare triple {15441#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {15441#true} is VALID [2022-04-27 15:19:21,539 INFO L290 TraceCheckUtils]: 2: Hoare triple {15441#true} assume true; {15441#true} is VALID [2022-04-27 15:19:21,539 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15441#true} {15441#true} #6857#return; {15441#true} is VALID [2022-04-27 15:19:21,540 INFO L272 TraceCheckUtils]: 4: Hoare triple {15441#true} call #t~ret1155 := main(); {15441#true} is VALID [2022-04-27 15:19:21,540 INFO L290 TraceCheckUtils]: 5: Hoare triple {15441#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {15441#true} is VALID [2022-04-27 15:19:21,540 INFO L290 TraceCheckUtils]: 6: Hoare triple {15441#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {15441#true} is VALID [2022-04-27 15:19:21,540 INFO L290 TraceCheckUtils]: 7: Hoare triple {15441#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {15441#true} is VALID [2022-04-27 15:19:21,540 INFO L290 TraceCheckUtils]: 8: Hoare triple {15441#true} assume !(~i~24 < 4); {15441#true} is VALID [2022-04-27 15:19:21,540 INFO L290 TraceCheckUtils]: 9: Hoare triple {15441#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {15441#true} is VALID [2022-04-27 15:19:21,540 INFO L272 TraceCheckUtils]: 10: Hoare triple {15441#true} call _BLAST_init(); {15441#true} is VALID [2022-04-27 15:19:21,541 INFO L290 TraceCheckUtils]: 11: Hoare triple {15441#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {15489#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-27 15:19:21,541 INFO L290 TraceCheckUtils]: 12: Hoare triple {15489#(= ~s~0 ~UNLOADED~0)} assume true; {15489#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-27 15:19:21,542 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {15489#(= ~s~0 ~UNLOADED~0)} {15441#true} #6457#return; {15489#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-27 15:19:21,542 INFO L290 TraceCheckUtils]: 14: Hoare triple {15489#(= ~s~0 ~UNLOADED~0)} assume !(~status~31 >= 0); {15489#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-27 15:19:21,543 INFO L290 TraceCheckUtils]: 15: Hoare triple {15489#(= ~s~0 ~UNLOADED~0)} assume !(1 == ~pended~0); {15489#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-27 15:19:21,543 INFO L290 TraceCheckUtils]: 16: Hoare triple {15489#(= ~s~0 ~UNLOADED~0)} assume !(1 == ~pended~0); {15489#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-27 15:19:21,543 INFO L290 TraceCheckUtils]: 17: Hoare triple {15489#(= ~s~0 ~UNLOADED~0)} assume !(~s~0 == ~UNLOADED~0); {15442#false} is VALID [2022-04-27 15:19:21,543 INFO L290 TraceCheckUtils]: 18: Hoare triple {15442#false} assume !(-1 == ~status~31); {15442#false} is VALID [2022-04-27 15:19:21,544 INFO L290 TraceCheckUtils]: 19: Hoare triple {15442#false} assume !(~s~0 != ~SKIP2~0); {15442#false} is VALID [2022-04-27 15:19:21,544 INFO L290 TraceCheckUtils]: 20: Hoare triple {15442#false} assume 1 == ~pended~0; {15442#false} is VALID [2022-04-27 15:19:21,544 INFO L290 TraceCheckUtils]: 21: Hoare triple {15442#false} assume 259 != ~status~31; {15442#false} is VALID [2022-04-27 15:19:21,545 INFO L272 TraceCheckUtils]: 22: Hoare triple {15442#false} call errorFn(); {15442#false} is VALID [2022-04-27 15:19:21,545 INFO L290 TraceCheckUtils]: 23: Hoare triple {15442#false} assume !false; {15442#false} is VALID [2022-04-27 15:19:21,545 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 15:19:21,545 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-27 15:19:21,545 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1660481820] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 15:19:21,546 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-27 15:19:21,546 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2022-04-27 15:19:21,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338405526] [2022-04-27 15:19:21,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 15:19:21,547 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-27 15:19:21,547 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:19:21,548 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-27 15:19:21,583 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:19:21,583 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 15:19:21,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:19:21,584 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 15:19:21,584 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-27 15:19:21,584 INFO L87 Difference]: Start difference. First operand 1985 states and 2849 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-27 15:19:41,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:19:41,139 INFO L93 Difference]: Finished difference Result 2005 states and 2875 transitions. [2022-04-27 15:19:41,139 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 15:19:41,139 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-27 15:19:41,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:19:41,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-27 15:19:41,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2874 transitions. [2022-04-27 15:19:41,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-27 15:19:41,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2874 transitions. [2022-04-27 15:19:41,449 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2874 transitions. [2022-04-27 15:19:43,754 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2874 edges. 2874 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:19:44,016 INFO L225 Difference]: With dead ends: 2005 [2022-04-27 15:19:44,017 INFO L226 Difference]: Without dead ends: 1985 [2022-04-27 15:19:44,018 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-27 15:19:44,019 INFO L413 NwaCegarLoop]: 2846 mSDtfsCounter, 7 mSDsluCounter, 2787 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 5633 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 15:19:44,019 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 5633 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 15:19:44,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1985 states. [2022-04-27 15:19:44,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1985 to 1985. [2022-04-27 15:19:44,256 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:19:44,262 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:19:44,269 INFO L74 IsIncluded]: Start isIncluded. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:19:44,275 INFO L87 Difference]: Start difference. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:19:44,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:19:44,479 INFO L93 Difference]: Finished difference Result 1985 states and 2848 transitions. [2022-04-27 15:19:44,479 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-27 15:19:44,486 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:19:44,486 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:19:44,492 INFO L74 IsIncluded]: Start isIncluded. First operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 1985 states. [2022-04-27 15:19:44,496 INFO L87 Difference]: Start difference. First operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 1985 states. [2022-04-27 15:19:44,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:19:44,700 INFO L93 Difference]: Finished difference Result 1985 states and 2848 transitions. [2022-04-27 15:19:44,700 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-27 15:19:44,709 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:19:44,710 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:19:44,710 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:19:44,710 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:19:44,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:19:45,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2848 transitions. [2022-04-27 15:19:45,002 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2848 transitions. Word has length 24 [2022-04-27 15:19:45,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:19:45,002 INFO L495 AbstractCegarLoop]: Abstraction has 1985 states and 2848 transitions. [2022-04-27 15:19:45,002 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-27 15:19:45,002 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-27 15:19:45,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 15:19:45,003 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:19:45,003 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:19:45,035 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 15:19:45,219 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:19:45,220 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:19:45,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:19:45,220 INFO L85 PathProgramCache]: Analyzing trace with hash -975584275, now seen corresponding path program 1 times [2022-04-27 15:19:45,220 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:19:45,220 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484510801] [2022-04-27 15:19:45,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:19:45,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:19:45,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:45,576 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:19:45,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:45,608 INFO L290 TraceCheckUtils]: 0: Hoare triple {25124#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {25111#true} is VALID [2022-04-27 15:19:45,608 INFO L290 TraceCheckUtils]: 1: Hoare triple {25111#true} assume true; {25111#true} is VALID [2022-04-27 15:19:45,608 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25111#true} {25111#true} #6857#return; {25111#true} is VALID [2022-04-27 15:19:45,648 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-27 15:19:45,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:45,668 INFO L290 TraceCheckUtils]: 0: Hoare triple {25125#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {25111#true} is VALID [2022-04-27 15:19:45,668 INFO L290 TraceCheckUtils]: 1: Hoare triple {25111#true} assume true; {25111#true} is VALID [2022-04-27 15:19:45,668 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25111#true} {25112#false} #6457#return; {25112#false} is VALID [2022-04-27 15:19:45,685 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 15:19:45,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:45,708 INFO L290 TraceCheckUtils]: 0: Hoare triple {25126#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {25111#true} is VALID [2022-04-27 15:19:45,709 INFO L290 TraceCheckUtils]: 1: Hoare triple {25111#true} assume true; {25111#true} is VALID [2022-04-27 15:19:45,709 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25111#true} {25112#false} #6459#return; {25112#false} is VALID [2022-04-27 15:19:45,712 INFO L272 TraceCheckUtils]: 0: Hoare triple {25111#true} call ULTIMATE.init(); {25124#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:19:45,712 INFO L290 TraceCheckUtils]: 1: Hoare triple {25124#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {25111#true} is VALID [2022-04-27 15:19:45,712 INFO L290 TraceCheckUtils]: 2: Hoare triple {25111#true} assume true; {25111#true} is VALID [2022-04-27 15:19:45,713 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25111#true} {25111#true} #6857#return; {25111#true} is VALID [2022-04-27 15:19:45,713 INFO L272 TraceCheckUtils]: 4: Hoare triple {25111#true} call #t~ret1155 := main(); {25111#true} is VALID [2022-04-27 15:19:45,713 INFO L290 TraceCheckUtils]: 5: Hoare triple {25111#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {25116#(= main_~i~24 0)} is VALID [2022-04-27 15:19:45,714 INFO L290 TraceCheckUtils]: 6: Hoare triple {25116#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {25116#(= main_~i~24 0)} is VALID [2022-04-27 15:19:45,714 INFO L290 TraceCheckUtils]: 7: Hoare triple {25116#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {25117#(<= main_~i~24 1)} is VALID [2022-04-27 15:19:45,715 INFO L290 TraceCheckUtils]: 8: Hoare triple {25117#(<= main_~i~24 1)} assume !(~i~24 < 4); {25112#false} is VALID [2022-04-27 15:19:45,715 INFO L290 TraceCheckUtils]: 9: Hoare triple {25112#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {25112#false} is VALID [2022-04-27 15:19:45,717 INFO L272 TraceCheckUtils]: 10: Hoare triple {25112#false} call _BLAST_init(); {25125#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:19:45,717 INFO L290 TraceCheckUtils]: 11: Hoare triple {25125#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {25111#true} is VALID [2022-04-27 15:19:45,717 INFO L290 TraceCheckUtils]: 12: Hoare triple {25111#true} assume true; {25111#true} is VALID [2022-04-27 15:19:45,717 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {25111#true} {25112#false} #6457#return; {25112#false} is VALID [2022-04-27 15:19:45,718 INFO L290 TraceCheckUtils]: 14: Hoare triple {25112#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {25112#false} is VALID [2022-04-27 15:19:45,718 INFO L290 TraceCheckUtils]: 15: Hoare triple {25112#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {25112#false} is VALID [2022-04-27 15:19:45,718 INFO L272 TraceCheckUtils]: 16: Hoare triple {25112#false} call stub_driver_init(); {25126#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:19:45,718 INFO L290 TraceCheckUtils]: 17: Hoare triple {25126#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {25111#true} is VALID [2022-04-27 15:19:45,718 INFO L290 TraceCheckUtils]: 18: Hoare triple {25111#true} assume true; {25111#true} is VALID [2022-04-27 15:19:45,718 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {25111#true} {25112#false} #6459#return; {25112#false} is VALID [2022-04-27 15:19:45,718 INFO L290 TraceCheckUtils]: 20: Hoare triple {25112#false} assume !!(~status~31 >= 0); {25112#false} is VALID [2022-04-27 15:19:45,719 INFO L290 TraceCheckUtils]: 21: Hoare triple {25112#false} assume !(0 == ~__BLAST_NONDET~3); {25112#false} is VALID [2022-04-27 15:19:45,720 INFO L290 TraceCheckUtils]: 22: Hoare triple {25112#false} assume 1 == ~__BLAST_NONDET~3; {25112#false} is VALID [2022-04-27 15:19:45,721 INFO L272 TraceCheckUtils]: 23: Hoare triple {25112#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {25112#false} is VALID [2022-04-27 15:19:45,721 INFO L290 TraceCheckUtils]: 24: Hoare triple {25112#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {25112#false} is VALID [2022-04-27 15:19:45,721 INFO L290 TraceCheckUtils]: 25: Hoare triple {25112#false} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {25112#false} is VALID [2022-04-27 15:19:45,722 INFO L272 TraceCheckUtils]: 26: Hoare triple {25112#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {25112#false} is VALID [2022-04-27 15:19:45,722 INFO L290 TraceCheckUtils]: 27: Hoare triple {25112#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {25112#false} is VALID [2022-04-27 15:19:45,722 INFO L272 TraceCheckUtils]: 28: Hoare triple {25112#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {25112#false} is VALID [2022-04-27 15:19:45,722 INFO L290 TraceCheckUtils]: 29: Hoare triple {25112#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {25112#false} is VALID [2022-04-27 15:19:45,722 INFO L290 TraceCheckUtils]: 30: Hoare triple {25112#false} assume !(~s~0 == ~NP~0); {25112#false} is VALID [2022-04-27 15:19:45,722 INFO L272 TraceCheckUtils]: 31: Hoare triple {25112#false} call errorFn(); {25112#false} is VALID [2022-04-27 15:19:45,722 INFO L290 TraceCheckUtils]: 32: Hoare triple {25112#false} assume !false; {25112#false} is VALID [2022-04-27 15:19:45,723 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:19:45,723 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:19:45,723 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484510801] [2022-04-27 15:19:45,723 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1484510801] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 15:19:45,723 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1539988288] [2022-04-27 15:19:45,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:19:45,724 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 15:19:45,724 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 15:19:45,729 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 15:19:45,733 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 15:19:46,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:46,410 INFO L263 TraceCheckSpWp]: Trace formula consists of 1531 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-27 15:19:46,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:19:46,447 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 15:19:46,581 INFO L272 TraceCheckUtils]: 0: Hoare triple {25111#true} call ULTIMATE.init(); {25111#true} is VALID [2022-04-27 15:19:46,581 INFO L290 TraceCheckUtils]: 1: Hoare triple {25111#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {25111#true} is VALID [2022-04-27 15:19:46,581 INFO L290 TraceCheckUtils]: 2: Hoare triple {25111#true} assume true; {25111#true} is VALID [2022-04-27 15:19:46,582 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25111#true} {25111#true} #6857#return; {25111#true} is VALID [2022-04-27 15:19:46,582 INFO L272 TraceCheckUtils]: 4: Hoare triple {25111#true} call #t~ret1155 := main(); {25111#true} is VALID [2022-04-27 15:19:46,589 INFO L290 TraceCheckUtils]: 5: Hoare triple {25111#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {25145#(<= main_~i~24 0)} is VALID [2022-04-27 15:19:46,590 INFO L290 TraceCheckUtils]: 6: Hoare triple {25145#(<= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {25145#(<= main_~i~24 0)} is VALID [2022-04-27 15:19:46,591 INFO L290 TraceCheckUtils]: 7: Hoare triple {25145#(<= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {25117#(<= main_~i~24 1)} is VALID [2022-04-27 15:19:46,592 INFO L290 TraceCheckUtils]: 8: Hoare triple {25117#(<= main_~i~24 1)} assume !(~i~24 < 4); {25112#false} is VALID [2022-04-27 15:19:46,592 INFO L290 TraceCheckUtils]: 9: Hoare triple {25112#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {25112#false} is VALID [2022-04-27 15:19:46,592 INFO L272 TraceCheckUtils]: 10: Hoare triple {25112#false} call _BLAST_init(); {25112#false} is VALID [2022-04-27 15:19:46,592 INFO L290 TraceCheckUtils]: 11: Hoare triple {25112#false} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {25112#false} is VALID [2022-04-27 15:19:46,594 INFO L290 TraceCheckUtils]: 12: Hoare triple {25112#false} assume true; {25112#false} is VALID [2022-04-27 15:19:46,594 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {25112#false} {25112#false} #6457#return; {25112#false} is VALID [2022-04-27 15:19:46,594 INFO L290 TraceCheckUtils]: 14: Hoare triple {25112#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {25112#false} is VALID [2022-04-27 15:19:46,594 INFO L290 TraceCheckUtils]: 15: Hoare triple {25112#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {25112#false} is VALID [2022-04-27 15:19:46,594 INFO L272 TraceCheckUtils]: 16: Hoare triple {25112#false} call stub_driver_init(); {25112#false} is VALID [2022-04-27 15:19:46,595 INFO L290 TraceCheckUtils]: 17: Hoare triple {25112#false} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {25112#false} is VALID [2022-04-27 15:19:46,595 INFO L290 TraceCheckUtils]: 18: Hoare triple {25112#false} assume true; {25112#false} is VALID [2022-04-27 15:19:46,595 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {25112#false} {25112#false} #6459#return; {25112#false} is VALID [2022-04-27 15:19:46,595 INFO L290 TraceCheckUtils]: 20: Hoare triple {25112#false} assume !!(~status~31 >= 0); {25112#false} is VALID [2022-04-27 15:19:46,596 INFO L290 TraceCheckUtils]: 21: Hoare triple {25112#false} assume !(0 == ~__BLAST_NONDET~3); {25112#false} is VALID [2022-04-27 15:19:46,596 INFO L290 TraceCheckUtils]: 22: Hoare triple {25112#false} assume 1 == ~__BLAST_NONDET~3; {25112#false} is VALID [2022-04-27 15:19:46,596 INFO L272 TraceCheckUtils]: 23: Hoare triple {25112#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {25112#false} is VALID [2022-04-27 15:19:46,596 INFO L290 TraceCheckUtils]: 24: Hoare triple {25112#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {25112#false} is VALID [2022-04-27 15:19:46,596 INFO L290 TraceCheckUtils]: 25: Hoare triple {25112#false} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {25112#false} is VALID [2022-04-27 15:19:46,596 INFO L272 TraceCheckUtils]: 26: Hoare triple {25112#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {25112#false} is VALID [2022-04-27 15:19:46,596 INFO L290 TraceCheckUtils]: 27: Hoare triple {25112#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {25112#false} is VALID [2022-04-27 15:19:46,596 INFO L272 TraceCheckUtils]: 28: Hoare triple {25112#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {25112#false} is VALID [2022-04-27 15:19:46,597 INFO L290 TraceCheckUtils]: 29: Hoare triple {25112#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {25112#false} is VALID [2022-04-27 15:19:46,597 INFO L290 TraceCheckUtils]: 30: Hoare triple {25112#false} assume !(~s~0 == ~NP~0); {25112#false} is VALID [2022-04-27 15:19:46,597 INFO L272 TraceCheckUtils]: 31: Hoare triple {25112#false} call errorFn(); {25112#false} is VALID [2022-04-27 15:19:46,597 INFO L290 TraceCheckUtils]: 32: Hoare triple {25112#false} assume !false; {25112#false} is VALID [2022-04-27 15:19:46,597 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:19:46,597 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 15:19:46,791 INFO L290 TraceCheckUtils]: 32: Hoare triple {25112#false} assume !false; {25112#false} is VALID [2022-04-27 15:19:46,791 INFO L272 TraceCheckUtils]: 31: Hoare triple {25112#false} call errorFn(); {25112#false} is VALID [2022-04-27 15:19:46,792 INFO L290 TraceCheckUtils]: 30: Hoare triple {25112#false} assume !(~s~0 == ~NP~0); {25112#false} is VALID [2022-04-27 15:19:46,792 INFO L290 TraceCheckUtils]: 29: Hoare triple {25112#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {25112#false} is VALID [2022-04-27 15:19:46,792 INFO L272 TraceCheckUtils]: 28: Hoare triple {25112#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {25112#false} is VALID [2022-04-27 15:19:46,792 INFO L290 TraceCheckUtils]: 27: Hoare triple {25112#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {25112#false} is VALID [2022-04-27 15:19:46,792 INFO L272 TraceCheckUtils]: 26: Hoare triple {25112#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {25112#false} is VALID [2022-04-27 15:19:46,792 INFO L290 TraceCheckUtils]: 25: Hoare triple {25112#false} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {25112#false} is VALID [2022-04-27 15:19:46,792 INFO L290 TraceCheckUtils]: 24: Hoare triple {25112#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {25112#false} is VALID [2022-04-27 15:19:46,792 INFO L272 TraceCheckUtils]: 23: Hoare triple {25112#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {25112#false} is VALID [2022-04-27 15:19:46,792 INFO L290 TraceCheckUtils]: 22: Hoare triple {25112#false} assume 1 == ~__BLAST_NONDET~3; {25112#false} is VALID [2022-04-27 15:19:46,792 INFO L290 TraceCheckUtils]: 21: Hoare triple {25112#false} assume !(0 == ~__BLAST_NONDET~3); {25112#false} is VALID [2022-04-27 15:19:46,793 INFO L290 TraceCheckUtils]: 20: Hoare triple {25112#false} assume !!(~status~31 >= 0); {25112#false} is VALID [2022-04-27 15:19:46,793 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {25111#true} {25112#false} #6459#return; {25112#false} is VALID [2022-04-27 15:19:46,793 INFO L290 TraceCheckUtils]: 18: Hoare triple {25111#true} assume true; {25111#true} is VALID [2022-04-27 15:19:46,793 INFO L290 TraceCheckUtils]: 17: Hoare triple {25111#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {25111#true} is VALID [2022-04-27 15:19:46,793 INFO L272 TraceCheckUtils]: 16: Hoare triple {25112#false} call stub_driver_init(); {25111#true} is VALID [2022-04-27 15:19:46,793 INFO L290 TraceCheckUtils]: 15: Hoare triple {25112#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {25112#false} is VALID [2022-04-27 15:19:46,793 INFO L290 TraceCheckUtils]: 14: Hoare triple {25112#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {25112#false} is VALID [2022-04-27 15:19:46,794 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {25111#true} {25112#false} #6457#return; {25112#false} is VALID [2022-04-27 15:19:46,794 INFO L290 TraceCheckUtils]: 12: Hoare triple {25111#true} assume true; {25111#true} is VALID [2022-04-27 15:19:46,794 INFO L290 TraceCheckUtils]: 11: Hoare triple {25111#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {25111#true} is VALID [2022-04-27 15:19:46,794 INFO L272 TraceCheckUtils]: 10: Hoare triple {25112#false} call _BLAST_init(); {25111#true} is VALID [2022-04-27 15:19:46,794 INFO L290 TraceCheckUtils]: 9: Hoare triple {25112#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {25112#false} is VALID [2022-04-27 15:19:46,795 INFO L290 TraceCheckUtils]: 8: Hoare triple {25299#(< main_~i~24 4)} assume !(~i~24 < 4); {25112#false} is VALID [2022-04-27 15:19:46,798 INFO L290 TraceCheckUtils]: 7: Hoare triple {25303#(< main_~i~24 3)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {25299#(< main_~i~24 4)} is VALID [2022-04-27 15:19:46,798 INFO L290 TraceCheckUtils]: 6: Hoare triple {25303#(< main_~i~24 3)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {25303#(< main_~i~24 3)} is VALID [2022-04-27 15:19:46,801 INFO L290 TraceCheckUtils]: 5: Hoare triple {25111#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {25303#(< main_~i~24 3)} is VALID [2022-04-27 15:19:46,801 INFO L272 TraceCheckUtils]: 4: Hoare triple {25111#true} call #t~ret1155 := main(); {25111#true} is VALID [2022-04-27 15:19:46,801 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25111#true} {25111#true} #6857#return; {25111#true} is VALID [2022-04-27 15:19:46,801 INFO L290 TraceCheckUtils]: 2: Hoare triple {25111#true} assume true; {25111#true} is VALID [2022-04-27 15:19:46,801 INFO L290 TraceCheckUtils]: 1: Hoare triple {25111#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {25111#true} is VALID [2022-04-27 15:19:46,801 INFO L272 TraceCheckUtils]: 0: Hoare triple {25111#true} call ULTIMATE.init(); {25111#true} is VALID [2022-04-27 15:19:46,802 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 15:19:46,802 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1539988288] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 15:19:46,802 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 15:19:46,802 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4] total 10 [2022-04-27 15:19:46,802 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2082159579] [2022-04-27 15:19:46,802 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 15:19:46,803 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.6) internal successors, (36), 7 states have internal predecessors, (36), 2 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 33 [2022-04-27 15:19:46,805 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:19:46,805 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 3.6) internal successors, (36), 7 states have internal predecessors, (36), 2 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-04-27 15:19:46,884 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:19:46,884 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 15:19:46,885 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:19:46,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 15:19:46,885 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2022-04-27 15:19:46,885 INFO L87 Difference]: Start difference. First operand 1985 states and 2848 transitions. Second operand has 10 states, 10 states have (on average 3.6) internal successors, (36), 7 states have internal predecessors, (36), 2 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-04-27 15:20:00,923 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.26s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:20:03,790 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.34s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:20:08,440 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:20:10,466 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:20:24,446 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.66s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:20:27,296 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.15s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:20:33,452 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:20:57,655 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:20:59,672 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:21:31,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:21:31,500 INFO L93 Difference]: Finished difference Result 4207 states and 6087 transitions. [2022-04-27 15:21:31,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 15:21:31,501 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.6) internal successors, (36), 7 states have internal predecessors, (36), 2 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 33 [2022-04-27 15:21:31,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:21:31,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 3.6) internal successors, (36), 7 states have internal predecessors, (36), 2 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-04-27 15:21:31,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 6087 transitions. [2022-04-27 15:21:31,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 3.6) internal successors, (36), 7 states have internal predecessors, (36), 2 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-04-27 15:21:32,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 6087 transitions. [2022-04-27 15:21:32,070 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 6087 transitions. [2022-04-27 15:21:44,472 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6087 edges. 6087 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:21:44,748 INFO L225 Difference]: With dead ends: 4207 [2022-04-27 15:21:44,748 INFO L226 Difference]: Without dead ends: 2231 [2022-04-27 15:21:44,754 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2022-04-27 15:21:44,755 INFO L413 NwaCegarLoop]: 2406 mSDtfsCounter, 1665 mSDsluCounter, 673 mSDsCounter, 0 mSdLazyCounter, 7470 mSolverCounterSat, 591 mSolverCounterUnsat, 5 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 44.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2068 SdHoareTripleChecker+Valid, 3079 SdHoareTripleChecker+Invalid, 8066 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 591 IncrementalHoareTripleChecker+Valid, 7470 IncrementalHoareTripleChecker+Invalid, 5 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 45.1s IncrementalHoareTripleChecker+Time [2022-04-27 15:21:44,755 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2068 Valid, 3079 Invalid, 8066 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [591 Valid, 7470 Invalid, 5 Unknown, 0 Unchecked, 45.1s Time] [2022-04-27 15:21:44,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2231 states. [2022-04-27 15:21:44,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2231 to 1991. [2022-04-27 15:21:44,965 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:21:44,970 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2231 states. Second operand has 1991 states, 1341 states have (on average 1.372110365398956) internal successors, (1840), 1391 states have internal predecessors, (1840), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:21:44,974 INFO L74 IsIncluded]: Start isIncluded. First operand 2231 states. Second operand has 1991 states, 1341 states have (on average 1.372110365398956) internal successors, (1840), 1391 states have internal predecessors, (1840), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:21:44,978 INFO L87 Difference]: Start difference. First operand 2231 states. Second operand has 1991 states, 1341 states have (on average 1.372110365398956) internal successors, (1840), 1391 states have internal predecessors, (1840), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:21:45,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:21:45,183 INFO L93 Difference]: Finished difference Result 2231 states and 3246 transitions. [2022-04-27 15:21:45,183 INFO L276 IsEmpty]: Start isEmpty. Operand 2231 states and 3246 transitions. [2022-04-27 15:21:45,198 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:21:45,198 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:21:45,203 INFO L74 IsIncluded]: Start isIncluded. First operand has 1991 states, 1341 states have (on average 1.372110365398956) internal successors, (1840), 1391 states have internal predecessors, (1840), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2231 states. [2022-04-27 15:21:45,207 INFO L87 Difference]: Start difference. First operand has 1991 states, 1341 states have (on average 1.372110365398956) internal successors, (1840), 1391 states have internal predecessors, (1840), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2231 states. [2022-04-27 15:21:45,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:21:45,389 INFO L93 Difference]: Finished difference Result 2231 states and 3246 transitions. [2022-04-27 15:21:45,389 INFO L276 IsEmpty]: Start isEmpty. Operand 2231 states and 3246 transitions. [2022-04-27 15:21:45,399 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:21:45,399 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:21:45,399 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:21:45,400 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:21:45,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1991 states, 1341 states have (on average 1.372110365398956) internal successors, (1840), 1391 states have internal predecessors, (1840), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-27 15:21:45,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1991 states to 1991 states and 2854 transitions. [2022-04-27 15:21:45,697 INFO L78 Accepts]: Start accepts. Automaton has 1991 states and 2854 transitions. Word has length 33 [2022-04-27 15:21:45,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:21:45,697 INFO L495 AbstractCegarLoop]: Abstraction has 1991 states and 2854 transitions. [2022-04-27 15:21:45,698 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.6) internal successors, (36), 7 states have internal predecessors, (36), 2 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2022-04-27 15:21:45,698 INFO L276 IsEmpty]: Start isEmpty. Operand 1991 states and 2854 transitions. [2022-04-27 15:21:45,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-04-27 15:21:45,700 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:21:45,700 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:21:45,731 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 15:21:45,927 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-04-27 15:21:45,928 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:21:45,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:21:45,928 INFO L85 PathProgramCache]: Analyzing trace with hash -380716153, now seen corresponding path program 2 times [2022-04-27 15:21:45,928 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:21:45,928 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023305243] [2022-04-27 15:21:45,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:21:45,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:21:46,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:21:46,358 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:21:46,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:21:46,384 INFO L290 TraceCheckUtils]: 0: Hoare triple {38525#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {38513#true} is VALID [2022-04-27 15:21:46,384 INFO L290 TraceCheckUtils]: 1: Hoare triple {38513#true} assume true; {38513#true} is VALID [2022-04-27 15:21:46,385 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {38513#true} {38513#true} #6857#return; {38513#true} is VALID [2022-04-27 15:21:46,419 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 15:21:46,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:21:46,431 INFO L290 TraceCheckUtils]: 0: Hoare triple {38526#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {38513#true} is VALID [2022-04-27 15:21:46,432 INFO L290 TraceCheckUtils]: 1: Hoare triple {38513#true} assume true; {38513#true} is VALID [2022-04-27 15:21:46,432 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {38513#true} {38513#true} #6457#return; {38513#true} is VALID [2022-04-27 15:21:46,450 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 15:21:46,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:21:46,466 INFO L290 TraceCheckUtils]: 0: Hoare triple {38527#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,466 INFO L290 TraceCheckUtils]: 1: Hoare triple {38524#(= ~s~0 ~NP~0)} assume true; {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,467 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {38524#(= ~s~0 ~NP~0)} {38513#true} #6459#return; {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,470 INFO L272 TraceCheckUtils]: 0: Hoare triple {38513#true} call ULTIMATE.init(); {38525#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:21:46,470 INFO L290 TraceCheckUtils]: 1: Hoare triple {38525#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {38513#true} is VALID [2022-04-27 15:21:46,471 INFO L290 TraceCheckUtils]: 2: Hoare triple {38513#true} assume true; {38513#true} is VALID [2022-04-27 15:21:46,471 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38513#true} {38513#true} #6857#return; {38513#true} is VALID [2022-04-27 15:21:46,471 INFO L272 TraceCheckUtils]: 4: Hoare triple {38513#true} call #t~ret1155 := main(); {38513#true} is VALID [2022-04-27 15:21:46,471 INFO L290 TraceCheckUtils]: 5: Hoare triple {38513#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {38513#true} is VALID [2022-04-27 15:21:46,471 INFO L290 TraceCheckUtils]: 6: Hoare triple {38513#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {38513#true} is VALID [2022-04-27 15:21:46,471 INFO L290 TraceCheckUtils]: 7: Hoare triple {38513#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {38513#true} is VALID [2022-04-27 15:21:46,471 INFO L290 TraceCheckUtils]: 8: Hoare triple {38513#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {38513#true} is VALID [2022-04-27 15:21:46,471 INFO L290 TraceCheckUtils]: 9: Hoare triple {38513#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {38513#true} is VALID [2022-04-27 15:21:46,472 INFO L290 TraceCheckUtils]: 10: Hoare triple {38513#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {38513#true} is VALID [2022-04-27 15:21:46,472 INFO L290 TraceCheckUtils]: 11: Hoare triple {38513#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {38513#true} is VALID [2022-04-27 15:21:46,472 INFO L290 TraceCheckUtils]: 12: Hoare triple {38513#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {38513#true} is VALID [2022-04-27 15:21:46,472 INFO L290 TraceCheckUtils]: 13: Hoare triple {38513#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {38513#true} is VALID [2022-04-27 15:21:46,472 INFO L290 TraceCheckUtils]: 14: Hoare triple {38513#true} assume !(~i~24 < 4); {38513#true} is VALID [2022-04-27 15:21:46,472 INFO L290 TraceCheckUtils]: 15: Hoare triple {38513#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {38513#true} is VALID [2022-04-27 15:21:46,473 INFO L272 TraceCheckUtils]: 16: Hoare triple {38513#true} call _BLAST_init(); {38526#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:21:46,473 INFO L290 TraceCheckUtils]: 17: Hoare triple {38526#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {38513#true} is VALID [2022-04-27 15:21:46,474 INFO L290 TraceCheckUtils]: 18: Hoare triple {38513#true} assume true; {38513#true} is VALID [2022-04-27 15:21:46,474 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {38513#true} {38513#true} #6457#return; {38513#true} is VALID [2022-04-27 15:21:46,474 INFO L290 TraceCheckUtils]: 20: Hoare triple {38513#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {38513#true} is VALID [2022-04-27 15:21:46,474 INFO L290 TraceCheckUtils]: 21: Hoare triple {38513#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {38513#true} is VALID [2022-04-27 15:21:46,475 INFO L272 TraceCheckUtils]: 22: Hoare triple {38513#true} call stub_driver_init(); {38527#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:21:46,475 INFO L290 TraceCheckUtils]: 23: Hoare triple {38527#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,475 INFO L290 TraceCheckUtils]: 24: Hoare triple {38524#(= ~s~0 ~NP~0)} assume true; {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,476 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {38524#(= ~s~0 ~NP~0)} {38513#true} #6459#return; {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,476 INFO L290 TraceCheckUtils]: 26: Hoare triple {38524#(= ~s~0 ~NP~0)} assume !!(~status~31 >= 0); {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,476 INFO L290 TraceCheckUtils]: 27: Hoare triple {38524#(= ~s~0 ~NP~0)} assume !(0 == ~__BLAST_NONDET~3); {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,477 INFO L290 TraceCheckUtils]: 28: Hoare triple {38524#(= ~s~0 ~NP~0)} assume 1 == ~__BLAST_NONDET~3; {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,477 INFO L272 TraceCheckUtils]: 29: Hoare triple {38524#(= ~s~0 ~NP~0)} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,478 INFO L290 TraceCheckUtils]: 30: Hoare triple {38524#(= ~s~0 ~NP~0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,478 INFO L290 TraceCheckUtils]: 31: Hoare triple {38524#(= ~s~0 ~NP~0)} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,479 INFO L272 TraceCheckUtils]: 32: Hoare triple {38524#(= ~s~0 ~NP~0)} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,479 INFO L290 TraceCheckUtils]: 33: Hoare triple {38524#(= ~s~0 ~NP~0)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,480 INFO L272 TraceCheckUtils]: 34: Hoare triple {38524#(= ~s~0 ~NP~0)} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,480 INFO L290 TraceCheckUtils]: 35: Hoare triple {38524#(= ~s~0 ~NP~0)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {38524#(= ~s~0 ~NP~0)} is VALID [2022-04-27 15:21:46,480 INFO L290 TraceCheckUtils]: 36: Hoare triple {38524#(= ~s~0 ~NP~0)} assume !(~s~0 == ~NP~0); {38514#false} is VALID [2022-04-27 15:21:46,481 INFO L272 TraceCheckUtils]: 37: Hoare triple {38514#false} call errorFn(); {38514#false} is VALID [2022-04-27 15:21:46,481 INFO L290 TraceCheckUtils]: 38: Hoare triple {38514#false} assume !false; {38514#false} is VALID [2022-04-27 15:21:46,481 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 15:21:46,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:21:46,481 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1023305243] [2022-04-27 15:21:46,481 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1023305243] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 15:21:46,481 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 15:21:46,482 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-27 15:21:46,482 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831704532] [2022-04-27 15:21:46,482 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 15:21:46,482 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 6 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 39 [2022-04-27 15:21:46,482 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:21:46,483 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 6 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-27 15:21:46,532 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:21:46,532 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 15:21:46,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:21:46,533 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 15:21:46,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-04-27 15:21:46,533 INFO L87 Difference]: Start difference. First operand 1991 states and 2854 transitions. Second operand has 6 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 6 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-27 15:22:09,257 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.05s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:22:12,012 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:22:16,067 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:22:18,099 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:22:37,513 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.38s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:23:58,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:23:58,068 INFO L93 Difference]: Finished difference Result 5168 states and 7519 transitions. [2022-04-27 15:23:58,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 15:23:58,069 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 6 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 39 [2022-04-27 15:23:58,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:23:58,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 6 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-27 15:23:58,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 7512 transitions. [2022-04-27 15:23:58,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 6 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-27 15:23:58,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 7512 transitions. [2022-04-27 15:23:58,758 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 7512 transitions. [2022-04-27 15:24:19,340 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 7512 edges. 7512 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:24:20,061 INFO L225 Difference]: With dead ends: 5168 [2022-04-27 15:24:20,061 INFO L226 Difference]: Without dead ends: 3855 [2022-04-27 15:24:20,067 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=24, Invalid=32, Unknown=0, NotChecked=0, Total=56 [2022-04-27 15:24:20,068 INFO L413 NwaCegarLoop]: 2756 mSDtfsCounter, 10063 mSDsluCounter, 496 mSDsCounter, 0 mSdLazyCounter, 4034 mSolverCounterSat, 5673 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 52.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10443 SdHoareTripleChecker+Valid, 3252 SdHoareTripleChecker+Invalid, 9710 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 5673 IncrementalHoareTripleChecker+Valid, 4034 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 53.0s IncrementalHoareTripleChecker+Time [2022-04-27 15:24:20,068 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10443 Valid, 3252 Invalid, 9710 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [5673 Valid, 4034 Invalid, 3 Unknown, 0 Unchecked, 53.0s Time] [2022-04-27 15:24:20,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3855 states. [2022-04-27 15:24:20,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3855 to 3722. [2022-04-27 15:24:20,512 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:24:20,520 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3855 states. Second operand has 3722 states, 2516 states have (on average 1.368839427662957) internal successors, (3444), 2587 states have internal predecessors, (3444), 957 states have call successors, (957), 248 states have call predecessors, (957), 248 states have return successors, (997), 924 states have call predecessors, (997), 940 states have call successors, (997) [2022-04-27 15:24:20,528 INFO L74 IsIncluded]: Start isIncluded. First operand 3855 states. Second operand has 3722 states, 2516 states have (on average 1.368839427662957) internal successors, (3444), 2587 states have internal predecessors, (3444), 957 states have call successors, (957), 248 states have call predecessors, (957), 248 states have return successors, (997), 924 states have call predecessors, (997), 940 states have call successors, (997) [2022-04-27 15:24:20,537 INFO L87 Difference]: Start difference. First operand 3855 states. Second operand has 3722 states, 2516 states have (on average 1.368839427662957) internal successors, (3444), 2587 states have internal predecessors, (3444), 957 states have call successors, (957), 248 states have call predecessors, (957), 248 states have return successors, (997), 924 states have call predecessors, (997), 940 states have call successors, (997) [2022-04-27 15:24:21,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:24:21,201 INFO L93 Difference]: Finished difference Result 3855 states and 5592 transitions. [2022-04-27 15:24:21,201 INFO L276 IsEmpty]: Start isEmpty. Operand 3855 states and 5592 transitions. [2022-04-27 15:24:21,216 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:24:21,216 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:24:21,224 INFO L74 IsIncluded]: Start isIncluded. First operand has 3722 states, 2516 states have (on average 1.368839427662957) internal successors, (3444), 2587 states have internal predecessors, (3444), 957 states have call successors, (957), 248 states have call predecessors, (957), 248 states have return successors, (997), 924 states have call predecessors, (997), 940 states have call successors, (997) Second operand 3855 states. [2022-04-27 15:24:21,231 INFO L87 Difference]: Start difference. First operand has 3722 states, 2516 states have (on average 1.368839427662957) internal successors, (3444), 2587 states have internal predecessors, (3444), 957 states have call successors, (957), 248 states have call predecessors, (957), 248 states have return successors, (997), 924 states have call predecessors, (997), 940 states have call successors, (997) Second operand 3855 states. [2022-04-27 15:24:21,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:24:21,919 INFO L93 Difference]: Finished difference Result 3855 states and 5592 transitions. [2022-04-27 15:24:21,919 INFO L276 IsEmpty]: Start isEmpty. Operand 3855 states and 5592 transitions. [2022-04-27 15:24:21,935 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:24:21,935 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:24:21,935 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:24:21,935 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:24:21,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3722 states, 2516 states have (on average 1.368839427662957) internal successors, (3444), 2587 states have internal predecessors, (3444), 957 states have call successors, (957), 248 states have call predecessors, (957), 248 states have return successors, (997), 924 states have call predecessors, (997), 940 states have call successors, (997) [2022-04-27 15:24:22,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3722 states to 3722 states and 5398 transitions. [2022-04-27 15:24:22,691 INFO L78 Accepts]: Start accepts. Automaton has 3722 states and 5398 transitions. Word has length 39 [2022-04-27 15:24:22,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:24:22,692 INFO L495 AbstractCegarLoop]: Abstraction has 3722 states and 5398 transitions. [2022-04-27 15:24:22,692 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 6 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-27 15:24:22,692 INFO L276 IsEmpty]: Start isEmpty. Operand 3722 states and 5398 transitions. [2022-04-27 15:24:22,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-04-27 15:24:22,695 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:24:22,696 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:24:22,696 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-27 15:24:22,696 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:24:22,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:24:22,696 INFO L85 PathProgramCache]: Analyzing trace with hash -1254032395, now seen corresponding path program 1 times [2022-04-27 15:24:22,697 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:24:22,697 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1616536968] [2022-04-27 15:24:22,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:24:22,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:24:22,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:24:23,175 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:24:23,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:24:23,200 INFO L290 TraceCheckUtils]: 0: Hoare triple {58788#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {58761#true} is VALID [2022-04-27 15:24:23,201 INFO L290 TraceCheckUtils]: 1: Hoare triple {58761#true} assume true; {58761#true} is VALID [2022-04-27 15:24:23,201 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {58761#true} {58761#true} #6857#return; {58761#true} is VALID [2022-04-27 15:24:23,238 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 15:24:23,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:24:23,255 INFO L290 TraceCheckUtils]: 0: Hoare triple {58789#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,256 INFO L290 TraceCheckUtils]: 1: Hoare triple {58769#(not (= ~SKIP2~0 ~DC~0))} assume true; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,256 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {58769#(not (= ~SKIP2~0 ~DC~0))} {58761#true} #6457#return; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,276 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 15:24:23,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:24:23,291 INFO L290 TraceCheckUtils]: 0: Hoare triple {58790#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {58761#true} is VALID [2022-04-27 15:24:23,292 INFO L290 TraceCheckUtils]: 1: Hoare triple {58761#true} assume true; {58761#true} is VALID [2022-04-27 15:24:23,294 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {58761#true} {58769#(not (= ~SKIP2~0 ~DC~0))} #6459#return; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,310 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-27 15:24:23,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:24:23,366 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-27 15:24:23,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:24:23,385 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-27 15:24:23,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:24:23,401 INFO L290 TraceCheckUtils]: 0: Hoare triple {58801#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {58761#true} is VALID [2022-04-27 15:24:23,408 INFO L290 TraceCheckUtils]: 1: Hoare triple {58761#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,409 INFO L290 TraceCheckUtils]: 2: Hoare triple {58800#(= ~s~0 ~DC~0)} assume true; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,410 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {58800#(= ~s~0 ~DC~0)} {58761#true} #6659#return; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,410 INFO L290 TraceCheckUtils]: 0: Hoare triple {58801#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {58761#true} is VALID [2022-04-27 15:24:23,411 INFO L272 TraceCheckUtils]: 1: Hoare triple {58761#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {58801#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-27 15:24:23,412 INFO L290 TraceCheckUtils]: 2: Hoare triple {58801#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {58761#true} is VALID [2022-04-27 15:24:23,412 INFO L290 TraceCheckUtils]: 3: Hoare triple {58761#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,415 INFO L290 TraceCheckUtils]: 4: Hoare triple {58800#(= ~s~0 ~DC~0)} assume true; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,417 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {58800#(= ~s~0 ~DC~0)} {58761#true} #6659#return; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,418 INFO L290 TraceCheckUtils]: 6: Hoare triple {58800#(= ~s~0 ~DC~0)} assume true; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,419 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {58800#(= ~s~0 ~DC~0)} {58761#true} #5919#return; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,419 INFO L290 TraceCheckUtils]: 0: Hoare triple {58791#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {58761#true} is VALID [2022-04-27 15:24:23,419 INFO L290 TraceCheckUtils]: 1: Hoare triple {58761#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {58761#true} is VALID [2022-04-27 15:24:23,420 INFO L272 TraceCheckUtils]: 2: Hoare triple {58761#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {58801#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-27 15:24:23,420 INFO L290 TraceCheckUtils]: 3: Hoare triple {58801#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {58761#true} is VALID [2022-04-27 15:24:23,421 INFO L272 TraceCheckUtils]: 4: Hoare triple {58761#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {58801#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-27 15:24:23,421 INFO L290 TraceCheckUtils]: 5: Hoare triple {58801#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {58761#true} is VALID [2022-04-27 15:24:23,421 INFO L290 TraceCheckUtils]: 6: Hoare triple {58761#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,422 INFO L290 TraceCheckUtils]: 7: Hoare triple {58800#(= ~s~0 ~DC~0)} assume true; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,422 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {58800#(= ~s~0 ~DC~0)} {58761#true} #6659#return; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,423 INFO L290 TraceCheckUtils]: 9: Hoare triple {58800#(= ~s~0 ~DC~0)} assume true; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,423 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {58800#(= ~s~0 ~DC~0)} {58761#true} #5919#return; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,424 INFO L290 TraceCheckUtils]: 11: Hoare triple {58800#(= ~s~0 ~DC~0)} #res := 0; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,424 INFO L290 TraceCheckUtils]: 12: Hoare triple {58800#(= ~s~0 ~DC~0)} assume true; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,425 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {58800#(= ~s~0 ~DC~0)} {58769#(not (= ~SKIP2~0 ~DC~0))} #6463#return; {58787#(not (= ~SKIP2~0 ~s~0))} is VALID [2022-04-27 15:24:23,429 INFO L272 TraceCheckUtils]: 0: Hoare triple {58761#true} call ULTIMATE.init(); {58788#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:24:23,429 INFO L290 TraceCheckUtils]: 1: Hoare triple {58788#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {58761#true} is VALID [2022-04-27 15:24:23,429 INFO L290 TraceCheckUtils]: 2: Hoare triple {58761#true} assume true; {58761#true} is VALID [2022-04-27 15:24:23,429 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {58761#true} {58761#true} #6857#return; {58761#true} is VALID [2022-04-27 15:24:23,429 INFO L272 TraceCheckUtils]: 4: Hoare triple {58761#true} call #t~ret1155 := main(); {58761#true} is VALID [2022-04-27 15:24:23,429 INFO L290 TraceCheckUtils]: 5: Hoare triple {58761#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {58761#true} is VALID [2022-04-27 15:24:23,429 INFO L290 TraceCheckUtils]: 6: Hoare triple {58761#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {58761#true} is VALID [2022-04-27 15:24:23,430 INFO L290 TraceCheckUtils]: 7: Hoare triple {58761#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {58761#true} is VALID [2022-04-27 15:24:23,430 INFO L290 TraceCheckUtils]: 8: Hoare triple {58761#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {58761#true} is VALID [2022-04-27 15:24:23,430 INFO L290 TraceCheckUtils]: 9: Hoare triple {58761#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {58761#true} is VALID [2022-04-27 15:24:23,431 INFO L290 TraceCheckUtils]: 10: Hoare triple {58761#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {58761#true} is VALID [2022-04-27 15:24:23,431 INFO L290 TraceCheckUtils]: 11: Hoare triple {58761#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {58761#true} is VALID [2022-04-27 15:24:23,431 INFO L290 TraceCheckUtils]: 12: Hoare triple {58761#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {58761#true} is VALID [2022-04-27 15:24:23,431 INFO L290 TraceCheckUtils]: 13: Hoare triple {58761#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {58761#true} is VALID [2022-04-27 15:24:23,431 INFO L290 TraceCheckUtils]: 14: Hoare triple {58761#true} assume !(~i~24 < 4); {58761#true} is VALID [2022-04-27 15:24:23,432 INFO L290 TraceCheckUtils]: 15: Hoare triple {58761#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {58761#true} is VALID [2022-04-27 15:24:23,433 INFO L272 TraceCheckUtils]: 16: Hoare triple {58761#true} call _BLAST_init(); {58789#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:24:23,434 INFO L290 TraceCheckUtils]: 17: Hoare triple {58789#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,434 INFO L290 TraceCheckUtils]: 18: Hoare triple {58769#(not (= ~SKIP2~0 ~DC~0))} assume true; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,434 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {58769#(not (= ~SKIP2~0 ~DC~0))} {58761#true} #6457#return; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,435 INFO L290 TraceCheckUtils]: 20: Hoare triple {58769#(not (= ~SKIP2~0 ~DC~0))} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,436 INFO L290 TraceCheckUtils]: 21: Hoare triple {58769#(not (= ~SKIP2~0 ~DC~0))} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,437 INFO L272 TraceCheckUtils]: 22: Hoare triple {58769#(not (= ~SKIP2~0 ~DC~0))} call stub_driver_init(); {58790#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:24:23,437 INFO L290 TraceCheckUtils]: 23: Hoare triple {58790#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {58761#true} is VALID [2022-04-27 15:24:23,437 INFO L290 TraceCheckUtils]: 24: Hoare triple {58761#true} assume true; {58761#true} is VALID [2022-04-27 15:24:23,437 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {58761#true} {58769#(not (= ~SKIP2~0 ~DC~0))} #6459#return; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,438 INFO L290 TraceCheckUtils]: 26: Hoare triple {58769#(not (= ~SKIP2~0 ~DC~0))} assume !!(~status~31 >= 0); {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,438 INFO L290 TraceCheckUtils]: 27: Hoare triple {58769#(not (= ~SKIP2~0 ~DC~0))} assume !(0 == ~__BLAST_NONDET~3); {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,438 INFO L290 TraceCheckUtils]: 28: Hoare triple {58769#(not (= ~SKIP2~0 ~DC~0))} assume 1 == ~__BLAST_NONDET~3; {58769#(not (= ~SKIP2~0 ~DC~0))} is VALID [2022-04-27 15:24:23,440 INFO L272 TraceCheckUtils]: 29: Hoare triple {58769#(not (= ~SKIP2~0 ~DC~0))} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {58791#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:24:23,440 INFO L290 TraceCheckUtils]: 30: Hoare triple {58791#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {58761#true} is VALID [2022-04-27 15:24:23,440 INFO L290 TraceCheckUtils]: 31: Hoare triple {58761#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {58761#true} is VALID [2022-04-27 15:24:23,440 INFO L272 TraceCheckUtils]: 32: Hoare triple {58761#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {58801#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-27 15:24:23,441 INFO L290 TraceCheckUtils]: 33: Hoare triple {58801#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {58761#true} is VALID [2022-04-27 15:24:23,441 INFO L272 TraceCheckUtils]: 34: Hoare triple {58761#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {58801#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-27 15:24:23,441 INFO L290 TraceCheckUtils]: 35: Hoare triple {58801#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {58761#true} is VALID [2022-04-27 15:24:23,442 INFO L290 TraceCheckUtils]: 36: Hoare triple {58761#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,442 INFO L290 TraceCheckUtils]: 37: Hoare triple {58800#(= ~s~0 ~DC~0)} assume true; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,443 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {58800#(= ~s~0 ~DC~0)} {58761#true} #6659#return; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,444 INFO L290 TraceCheckUtils]: 39: Hoare triple {58800#(= ~s~0 ~DC~0)} assume true; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,445 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {58800#(= ~s~0 ~DC~0)} {58761#true} #5919#return; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,446 INFO L290 TraceCheckUtils]: 41: Hoare triple {58800#(= ~s~0 ~DC~0)} #res := 0; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,446 INFO L290 TraceCheckUtils]: 42: Hoare triple {58800#(= ~s~0 ~DC~0)} assume true; {58800#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:24:23,447 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {58800#(= ~s~0 ~DC~0)} {58769#(not (= ~SKIP2~0 ~DC~0))} #6463#return; {58787#(not (= ~SKIP2~0 ~s~0))} is VALID [2022-04-27 15:24:23,448 INFO L290 TraceCheckUtils]: 44: Hoare triple {58787#(not (= ~SKIP2~0 ~s~0))} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {58787#(not (= ~SKIP2~0 ~s~0))} is VALID [2022-04-27 15:24:23,449 INFO L290 TraceCheckUtils]: 45: Hoare triple {58787#(not (= ~SKIP2~0 ~s~0))} assume !(0 != ~we_should_unload~0); {58787#(not (= ~SKIP2~0 ~s~0))} is VALID [2022-04-27 15:24:23,449 INFO L290 TraceCheckUtils]: 46: Hoare triple {58787#(not (= ~SKIP2~0 ~s~0))} assume !(1 == ~pended~0); {58787#(not (= ~SKIP2~0 ~s~0))} is VALID [2022-04-27 15:24:23,449 INFO L290 TraceCheckUtils]: 47: Hoare triple {58787#(not (= ~SKIP2~0 ~s~0))} assume !(1 == ~pended~0); {58787#(not (= ~SKIP2~0 ~s~0))} is VALID [2022-04-27 15:24:23,450 INFO L290 TraceCheckUtils]: 48: Hoare triple {58787#(not (= ~SKIP2~0 ~s~0))} assume !(~s~0 == ~UNLOADED~0); {58787#(not (= ~SKIP2~0 ~s~0))} is VALID [2022-04-27 15:24:23,450 INFO L290 TraceCheckUtils]: 49: Hoare triple {58787#(not (= ~SKIP2~0 ~s~0))} assume !(-1 == ~status~31); {58787#(not (= ~SKIP2~0 ~s~0))} is VALID [2022-04-27 15:24:23,450 INFO L290 TraceCheckUtils]: 50: Hoare triple {58787#(not (= ~SKIP2~0 ~s~0))} assume !(~s~0 != ~SKIP2~0); {58762#false} is VALID [2022-04-27 15:24:23,451 INFO L290 TraceCheckUtils]: 51: Hoare triple {58762#false} assume 1 == ~pended~0; {58762#false} is VALID [2022-04-27 15:24:23,451 INFO L290 TraceCheckUtils]: 52: Hoare triple {58762#false} assume 259 != ~status~31; {58762#false} is VALID [2022-04-27 15:24:23,451 INFO L272 TraceCheckUtils]: 53: Hoare triple {58762#false} call errorFn(); {58762#false} is VALID [2022-04-27 15:24:23,451 INFO L290 TraceCheckUtils]: 54: Hoare triple {58762#false} assume !false; {58762#false} is VALID [2022-04-27 15:24:23,453 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 15:24:23,453 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:24:23,453 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1616536968] [2022-04-27 15:24:23,453 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1616536968] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 15:24:23,453 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 15:24:23,454 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-27 15:24:23,454 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [519111609] [2022-04-27 15:24:23,454 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 15:24:23,454 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.5) internal successors, (35), 5 states have internal predecessors, (35), 3 states have call successors, (8), 7 states have call predecessors, (8), 3 states have return successors, (6), 4 states have call predecessors, (6), 2 states have call successors, (6) Word has length 55 [2022-04-27 15:24:23,454 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:24:23,455 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 3.5) internal successors, (35), 5 states have internal predecessors, (35), 3 states have call successors, (8), 7 states have call predecessors, (8), 3 states have return successors, (6), 4 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 15:24:23,524 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:24:23,524 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 15:24:23,524 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:24:23,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 15:24:23,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2022-04-27 15:24:23,525 INFO L87 Difference]: Start difference. First operand 3722 states and 5398 transitions. Second operand has 10 states, 10 states have (on average 3.5) internal successors, (35), 5 states have internal predecessors, (35), 3 states have call successors, (8), 7 states have call predecessors, (8), 3 states have return successors, (6), 4 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 15:24:46,836 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:24:48,860 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:24:50,876 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:24:55,993 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:24:58,025 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:25:00,044 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:25:20,006 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.47s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:25:22,807 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.65s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:25:26,148 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.31s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:25:32,531 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:25:34,570 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.04s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:25:36,593 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:26:07,727 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:26:09,749 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:26:13,536 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.74s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:28:21,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:28:21,733 INFO L93 Difference]: Finished difference Result 5364 states and 7832 transitions. [2022-04-27 15:28:21,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-27 15:28:21,734 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.5) internal successors, (35), 5 states have internal predecessors, (35), 3 states have call successors, (8), 7 states have call predecessors, (8), 3 states have return successors, (6), 4 states have call predecessors, (6), 2 states have call successors, (6) Word has length 55 [2022-04-27 15:28:21,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 15:28:21,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 3.5) internal successors, (35), 5 states have internal predecessors, (35), 3 states have call successors, (8), 7 states have call predecessors, (8), 3 states have return successors, (6), 4 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 15:28:21,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 5446 transitions. [2022-04-27 15:28:21,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 3.5) internal successors, (35), 5 states have internal predecessors, (35), 3 states have call successors, (8), 7 states have call predecessors, (8), 3 states have return successors, (6), 4 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 15:28:22,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 5446 transitions. [2022-04-27 15:28:22,048 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 5446 transitions. [2022-04-27 15:28:41,308 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5446 edges. 5446 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:28:42,586 INFO L225 Difference]: With dead ends: 5364 [2022-04-27 15:28:42,587 INFO L226 Difference]: Without dead ends: 5353 [2022-04-27 15:28:42,588 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 119 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=211, Invalid=491, Unknown=0, NotChecked=0, Total=702 [2022-04-27 15:28:42,589 INFO L413 NwaCegarLoop]: 2990 mSDtfsCounter, 10163 mSDsluCounter, 1030 mSDsCounter, 0 mSdLazyCounter, 10224 mSolverCounterSat, 7968 mSolverCounterUnsat, 11 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 113.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10201 SdHoareTripleChecker+Valid, 4020 SdHoareTripleChecker+Invalid, 18203 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 7968 IncrementalHoareTripleChecker+Valid, 10224 IncrementalHoareTripleChecker+Invalid, 11 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 113.7s IncrementalHoareTripleChecker+Time [2022-04-27 15:28:42,589 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10201 Valid, 4020 Invalid, 18203 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [7968 Valid, 10224 Invalid, 11 Unknown, 0 Unchecked, 113.7s Time] [2022-04-27 15:28:42,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5353 states. [2022-04-27 15:28:43,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5353 to 4537. [2022-04-27 15:28:43,198 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 15:28:43,208 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5353 states. Second operand has 4537 states, 3021 states have (on average 1.3614697120158887) internal successors, (4113), 3102 states have internal predecessors, (4113), 1206 states have call successors, (1206), 304 states have call predecessors, (1206), 309 states have return successors, (1252), 1174 states have call predecessors, (1252), 1189 states have call successors, (1252) [2022-04-27 15:28:43,218 INFO L74 IsIncluded]: Start isIncluded. First operand 5353 states. Second operand has 4537 states, 3021 states have (on average 1.3614697120158887) internal successors, (4113), 3102 states have internal predecessors, (4113), 1206 states have call successors, (1206), 304 states have call predecessors, (1206), 309 states have return successors, (1252), 1174 states have call predecessors, (1252), 1189 states have call successors, (1252) [2022-04-27 15:28:43,227 INFO L87 Difference]: Start difference. First operand 5353 states. Second operand has 4537 states, 3021 states have (on average 1.3614697120158887) internal successors, (4113), 3102 states have internal predecessors, (4113), 1206 states have call successors, (1206), 304 states have call predecessors, (1206), 309 states have return successors, (1252), 1174 states have call predecessors, (1252), 1189 states have call successors, (1252) [2022-04-27 15:28:44,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:28:44,278 INFO L93 Difference]: Finished difference Result 5353 states and 7817 transitions. [2022-04-27 15:28:44,278 INFO L276 IsEmpty]: Start isEmpty. Operand 5353 states and 7817 transitions. [2022-04-27 15:28:44,299 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:28:44,299 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:28:44,308 INFO L74 IsIncluded]: Start isIncluded. First operand has 4537 states, 3021 states have (on average 1.3614697120158887) internal successors, (4113), 3102 states have internal predecessors, (4113), 1206 states have call successors, (1206), 304 states have call predecessors, (1206), 309 states have return successors, (1252), 1174 states have call predecessors, (1252), 1189 states have call successors, (1252) Second operand 5353 states. [2022-04-27 15:28:44,317 INFO L87 Difference]: Start difference. First operand has 4537 states, 3021 states have (on average 1.3614697120158887) internal successors, (4113), 3102 states have internal predecessors, (4113), 1206 states have call successors, (1206), 304 states have call predecessors, (1206), 309 states have return successors, (1252), 1174 states have call predecessors, (1252), 1189 states have call successors, (1252) Second operand 5353 states. [2022-04-27 15:28:45,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 15:28:45,228 INFO L93 Difference]: Finished difference Result 5353 states and 7817 transitions. [2022-04-27 15:28:45,228 INFO L276 IsEmpty]: Start isEmpty. Operand 5353 states and 7817 transitions. [2022-04-27 15:28:45,241 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 15:28:45,241 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 15:28:45,241 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 15:28:45,241 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 15:28:45,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4537 states, 3021 states have (on average 1.3614697120158887) internal successors, (4113), 3102 states have internal predecessors, (4113), 1206 states have call successors, (1206), 304 states have call predecessors, (1206), 309 states have return successors, (1252), 1174 states have call predecessors, (1252), 1189 states have call successors, (1252) [2022-04-27 15:28:46,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4537 states to 4537 states and 6571 transitions. [2022-04-27 15:28:46,220 INFO L78 Accepts]: Start accepts. Automaton has 4537 states and 6571 transitions. Word has length 55 [2022-04-27 15:28:46,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 15:28:46,220 INFO L495 AbstractCegarLoop]: Abstraction has 4537 states and 6571 transitions. [2022-04-27 15:28:46,220 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.5) internal successors, (35), 5 states have internal predecessors, (35), 3 states have call successors, (8), 7 states have call predecessors, (8), 3 states have return successors, (6), 4 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 15:28:46,220 INFO L276 IsEmpty]: Start isEmpty. Operand 4537 states and 6571 transitions. [2022-04-27 15:28:46,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-27 15:28:46,221 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 15:28:46,222 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 15:28:46,222 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-27 15:28:46,222 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 15:28:46,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 15:28:46,222 INFO L85 PathProgramCache]: Analyzing trace with hash -658365057, now seen corresponding path program 1 times [2022-04-27 15:28:46,222 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 15:28:46,222 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [153770560] [2022-04-27 15:28:46,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 15:28:46,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 15:28:46,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:28:46,593 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 15:28:46,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:28:46,627 INFO L290 TraceCheckUtils]: 0: Hoare triple {83492#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {83465#true} is VALID [2022-04-27 15:28:46,627 INFO L290 TraceCheckUtils]: 1: Hoare triple {83465#true} assume true; {83465#true} is VALID [2022-04-27 15:28:46,627 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {83465#true} {83465#true} #6857#return; {83465#true} is VALID [2022-04-27 15:28:46,666 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-27 15:28:46,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:28:46,687 INFO L290 TraceCheckUtils]: 0: Hoare triple {83493#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {83473#(not (= ~IPC~0 ~DC~0))} assume true; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,688 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {83473#(not (= ~IPC~0 ~DC~0))} {83465#true} #6457#return; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,708 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-27 15:28:46,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:28:46,722 INFO L290 TraceCheckUtils]: 0: Hoare triple {83494#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {83465#true} is VALID [2022-04-27 15:28:46,723 INFO L290 TraceCheckUtils]: 1: Hoare triple {83465#true} assume true; {83465#true} is VALID [2022-04-27 15:28:46,723 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {83465#true} {83473#(not (= ~IPC~0 ~DC~0))} #6459#return; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,743 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-27 15:28:46,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:28:46,786 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-27 15:28:46,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:28:46,800 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-27 15:28:46,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 15:28:46,820 INFO L290 TraceCheckUtils]: 0: Hoare triple {83505#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {83465#true} is VALID [2022-04-27 15:28:46,821 INFO L290 TraceCheckUtils]: 1: Hoare triple {83465#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,821 INFO L290 TraceCheckUtils]: 2: Hoare triple {83504#(= ~s~0 ~DC~0)} assume true; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,822 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83504#(= ~s~0 ~DC~0)} {83465#true} #6659#return; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,822 INFO L290 TraceCheckUtils]: 0: Hoare triple {83505#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {83465#true} is VALID [2022-04-27 15:28:46,823 INFO L272 TraceCheckUtils]: 1: Hoare triple {83465#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {83505#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-27 15:28:46,823 INFO L290 TraceCheckUtils]: 2: Hoare triple {83505#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {83465#true} is VALID [2022-04-27 15:28:46,823 INFO L290 TraceCheckUtils]: 3: Hoare triple {83465#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,823 INFO L290 TraceCheckUtils]: 4: Hoare triple {83504#(= ~s~0 ~DC~0)} assume true; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,824 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {83504#(= ~s~0 ~DC~0)} {83465#true} #6659#return; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,824 INFO L290 TraceCheckUtils]: 6: Hoare triple {83504#(= ~s~0 ~DC~0)} assume true; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,825 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {83504#(= ~s~0 ~DC~0)} {83465#true} #5919#return; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,825 INFO L290 TraceCheckUtils]: 0: Hoare triple {83495#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {83465#true} is VALID [2022-04-27 15:28:46,825 INFO L290 TraceCheckUtils]: 1: Hoare triple {83465#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {83465#true} is VALID [2022-04-27 15:28:46,826 INFO L272 TraceCheckUtils]: 2: Hoare triple {83465#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {83505#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-27 15:28:46,826 INFO L290 TraceCheckUtils]: 3: Hoare triple {83505#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {83465#true} is VALID [2022-04-27 15:28:46,827 INFO L272 TraceCheckUtils]: 4: Hoare triple {83465#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {83505#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-27 15:28:46,827 INFO L290 TraceCheckUtils]: 5: Hoare triple {83505#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {83465#true} is VALID [2022-04-27 15:28:46,828 INFO L290 TraceCheckUtils]: 6: Hoare triple {83465#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,828 INFO L290 TraceCheckUtils]: 7: Hoare triple {83504#(= ~s~0 ~DC~0)} assume true; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,829 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {83504#(= ~s~0 ~DC~0)} {83465#true} #6659#return; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,829 INFO L290 TraceCheckUtils]: 9: Hoare triple {83504#(= ~s~0 ~DC~0)} assume true; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,830 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {83504#(= ~s~0 ~DC~0)} {83465#true} #5919#return; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,830 INFO L290 TraceCheckUtils]: 11: Hoare triple {83504#(= ~s~0 ~DC~0)} #res := 0; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,830 INFO L290 TraceCheckUtils]: 12: Hoare triple {83504#(= ~s~0 ~DC~0)} assume true; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,831 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {83504#(= ~s~0 ~DC~0)} {83473#(not (= ~IPC~0 ~DC~0))} #6463#return; {83491#(not (= ~IPC~0 ~s~0))} is VALID [2022-04-27 15:28:46,835 INFO L272 TraceCheckUtils]: 0: Hoare triple {83465#true} call ULTIMATE.init(); {83492#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 15:28:46,835 INFO L290 TraceCheckUtils]: 1: Hoare triple {83492#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {83465#true} is VALID [2022-04-27 15:28:46,835 INFO L290 TraceCheckUtils]: 2: Hoare triple {83465#true} assume true; {83465#true} is VALID [2022-04-27 15:28:46,835 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {83465#true} {83465#true} #6857#return; {83465#true} is VALID [2022-04-27 15:28:46,835 INFO L272 TraceCheckUtils]: 4: Hoare triple {83465#true} call #t~ret1155 := main(); {83465#true} is VALID [2022-04-27 15:28:46,835 INFO L290 TraceCheckUtils]: 5: Hoare triple {83465#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {83465#true} is VALID [2022-04-27 15:28:46,836 INFO L290 TraceCheckUtils]: 6: Hoare triple {83465#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {83465#true} is VALID [2022-04-27 15:28:46,836 INFO L290 TraceCheckUtils]: 7: Hoare triple {83465#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {83465#true} is VALID [2022-04-27 15:28:46,836 INFO L290 TraceCheckUtils]: 8: Hoare triple {83465#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {83465#true} is VALID [2022-04-27 15:28:46,836 INFO L290 TraceCheckUtils]: 9: Hoare triple {83465#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {83465#true} is VALID [2022-04-27 15:28:46,838 INFO L290 TraceCheckUtils]: 10: Hoare triple {83465#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {83465#true} is VALID [2022-04-27 15:28:46,839 INFO L290 TraceCheckUtils]: 11: Hoare triple {83465#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {83465#true} is VALID [2022-04-27 15:28:46,840 INFO L290 TraceCheckUtils]: 12: Hoare triple {83465#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {83465#true} is VALID [2022-04-27 15:28:46,840 INFO L290 TraceCheckUtils]: 13: Hoare triple {83465#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {83465#true} is VALID [2022-04-27 15:28:46,840 INFO L290 TraceCheckUtils]: 14: Hoare triple {83465#true} assume !(~i~24 < 4); {83465#true} is VALID [2022-04-27 15:28:46,840 INFO L290 TraceCheckUtils]: 15: Hoare triple {83465#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {83465#true} is VALID [2022-04-27 15:28:46,842 INFO L272 TraceCheckUtils]: 16: Hoare triple {83465#true} call _BLAST_init(); {83493#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:28:46,842 INFO L290 TraceCheckUtils]: 17: Hoare triple {83493#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,843 INFO L290 TraceCheckUtils]: 18: Hoare triple {83473#(not (= ~IPC~0 ~DC~0))} assume true; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,843 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {83473#(not (= ~IPC~0 ~DC~0))} {83465#true} #6457#return; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,843 INFO L290 TraceCheckUtils]: 20: Hoare triple {83473#(not (= ~IPC~0 ~DC~0))} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,844 INFO L290 TraceCheckUtils]: 21: Hoare triple {83473#(not (= ~IPC~0 ~DC~0))} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,845 INFO L272 TraceCheckUtils]: 22: Hoare triple {83473#(not (= ~IPC~0 ~DC~0))} call stub_driver_init(); {83494#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:28:46,845 INFO L290 TraceCheckUtils]: 23: Hoare triple {83494#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {83465#true} is VALID [2022-04-27 15:28:46,845 INFO L290 TraceCheckUtils]: 24: Hoare triple {83465#true} assume true; {83465#true} is VALID [2022-04-27 15:28:46,845 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {83465#true} {83473#(not (= ~IPC~0 ~DC~0))} #6459#return; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,846 INFO L290 TraceCheckUtils]: 26: Hoare triple {83473#(not (= ~IPC~0 ~DC~0))} assume !!(~status~31 >= 0); {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,846 INFO L290 TraceCheckUtils]: 27: Hoare triple {83473#(not (= ~IPC~0 ~DC~0))} assume !(0 == ~__BLAST_NONDET~3); {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,846 INFO L290 TraceCheckUtils]: 28: Hoare triple {83473#(not (= ~IPC~0 ~DC~0))} assume 1 == ~__BLAST_NONDET~3; {83473#(not (= ~IPC~0 ~DC~0))} is VALID [2022-04-27 15:28:46,847 INFO L272 TraceCheckUtils]: 29: Hoare triple {83473#(not (= ~IPC~0 ~DC~0))} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {83495#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-27 15:28:46,847 INFO L290 TraceCheckUtils]: 30: Hoare triple {83495#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {83465#true} is VALID [2022-04-27 15:28:46,848 INFO L290 TraceCheckUtils]: 31: Hoare triple {83465#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {83465#true} is VALID [2022-04-27 15:28:46,848 INFO L272 TraceCheckUtils]: 32: Hoare triple {83465#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {83505#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-27 15:28:46,848 INFO L290 TraceCheckUtils]: 33: Hoare triple {83505#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {83465#true} is VALID [2022-04-27 15:28:46,849 INFO L272 TraceCheckUtils]: 34: Hoare triple {83465#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {83505#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-27 15:28:46,849 INFO L290 TraceCheckUtils]: 35: Hoare triple {83505#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {83465#true} is VALID [2022-04-27 15:28:46,849 INFO L290 TraceCheckUtils]: 36: Hoare triple {83465#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,850 INFO L290 TraceCheckUtils]: 37: Hoare triple {83504#(= ~s~0 ~DC~0)} assume true; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,850 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {83504#(= ~s~0 ~DC~0)} {83465#true} #6659#return; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,851 INFO L290 TraceCheckUtils]: 39: Hoare triple {83504#(= ~s~0 ~DC~0)} assume true; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,851 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {83504#(= ~s~0 ~DC~0)} {83465#true} #5919#return; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,852 INFO L290 TraceCheckUtils]: 41: Hoare triple {83504#(= ~s~0 ~DC~0)} #res := 0; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,852 INFO L290 TraceCheckUtils]: 42: Hoare triple {83504#(= ~s~0 ~DC~0)} assume true; {83504#(= ~s~0 ~DC~0)} is VALID [2022-04-27 15:28:46,853 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {83504#(= ~s~0 ~DC~0)} {83473#(not (= ~IPC~0 ~DC~0))} #6463#return; {83491#(not (= ~IPC~0 ~s~0))} is VALID [2022-04-27 15:28:46,853 INFO L290 TraceCheckUtils]: 44: Hoare triple {83491#(not (= ~IPC~0 ~s~0))} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {83491#(not (= ~IPC~0 ~s~0))} is VALID [2022-04-27 15:28:46,854 INFO L290 TraceCheckUtils]: 45: Hoare triple {83491#(not (= ~IPC~0 ~s~0))} assume !(0 != ~we_should_unload~0); {83491#(not (= ~IPC~0 ~s~0))} is VALID [2022-04-27 15:28:46,854 INFO L290 TraceCheckUtils]: 46: Hoare triple {83491#(not (= ~IPC~0 ~s~0))} assume !(1 == ~pended~0); {83491#(not (= ~IPC~0 ~s~0))} is VALID [2022-04-27 15:28:46,854 INFO L290 TraceCheckUtils]: 47: Hoare triple {83491#(not (= ~IPC~0 ~s~0))} assume !(1 == ~pended~0); {83491#(not (= ~IPC~0 ~s~0))} is VALID [2022-04-27 15:28:46,855 INFO L290 TraceCheckUtils]: 48: Hoare triple {83491#(not (= ~IPC~0 ~s~0))} assume !(~s~0 == ~UNLOADED~0); {83491#(not (= ~IPC~0 ~s~0))} is VALID [2022-04-27 15:28:46,855 INFO L290 TraceCheckUtils]: 49: Hoare triple {83491#(not (= ~IPC~0 ~s~0))} assume !(-1 == ~status~31); {83491#(not (= ~IPC~0 ~s~0))} is VALID [2022-04-27 15:28:46,860 INFO L290 TraceCheckUtils]: 50: Hoare triple {83491#(not (= ~IPC~0 ~s~0))} assume ~s~0 != ~SKIP2~0; {83491#(not (= ~IPC~0 ~s~0))} is VALID [2022-04-27 15:28:46,861 INFO L290 TraceCheckUtils]: 51: Hoare triple {83491#(not (= ~IPC~0 ~s~0))} assume !(~s~0 != ~IPC~0); {83466#false} is VALID [2022-04-27 15:28:46,861 INFO L290 TraceCheckUtils]: 52: Hoare triple {83466#false} assume 1 == ~pended~0; {83466#false} is VALID [2022-04-27 15:28:46,861 INFO L290 TraceCheckUtils]: 53: Hoare triple {83466#false} assume 259 != ~status~31; {83466#false} is VALID [2022-04-27 15:28:46,861 INFO L272 TraceCheckUtils]: 54: Hoare triple {83466#false} call errorFn(); {83466#false} is VALID [2022-04-27 15:28:46,861 INFO L290 TraceCheckUtils]: 55: Hoare triple {83466#false} assume !false; {83466#false} is VALID [2022-04-27 15:28:46,862 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 15:28:46,862 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 15:28:46,862 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [153770560] [2022-04-27 15:28:46,862 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [153770560] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 15:28:46,862 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 15:28:46,862 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-27 15:28:46,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410772881] [2022-04-27 15:28:46,862 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 15:28:46,864 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.6) internal successors, (36), 5 states have internal predecessors, (36), 3 states have call successors, (8), 7 states have call predecessors, (8), 3 states have return successors, (6), 4 states have call predecessors, (6), 2 states have call successors, (6) Word has length 56 [2022-04-27 15:28:46,864 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 15:28:46,864 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 3.6) internal successors, (36), 5 states have internal predecessors, (36), 3 states have call successors, (8), 7 states have call predecessors, (8), 3 states have return successors, (6), 4 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 15:28:46,935 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 15:28:46,935 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 15:28:46,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 15:28:46,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 15:28:46,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2022-04-27 15:28:46,936 INFO L87 Difference]: Start difference. First operand 4537 states and 6571 transitions. Second operand has 10 states, 10 states have (on average 3.6) internal successors, (36), 5 states have internal predecessors, (36), 3 states have call successors, (8), 7 states have call predecessors, (8), 3 states have return successors, (6), 4 states have call predecessors, (6), 2 states have call successors, (6) [2022-04-27 15:29:10,127 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.62s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:29:12,939 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.38s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:29:14,946 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:29:20,088 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:29:22,129 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.04s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-27 15:29:24,148 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers []