java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AbstractInterpretationC.xml -s ../../../trunk/examples/settings/ai/svcomp-Reach-32bit-Automizer_Default+AIv2_INT.epf -i ../../../trunk/examples/svcomp/systemc/pipeline.cil-2.c


--------------------------------------------------------------------------------


This is Ultimate 0.1.24-112bae1
[2019-09-11 16:38:17,752 INFO  L177        SettingsManager]: Resetting all preferences to default values...
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[2019-09-11 16:38:17,780 INFO  L181        SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2019-09-11 16:38:17,782 INFO  L181        SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
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[2019-09-11 16:38:17,801 INFO  L101        SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/svcomp-Reach-32bit-Automizer_Default+AIv2_INT.epf
[2019-09-11 16:38:17,816 INFO  L113        SettingsManager]: Loading preferences was successful
[2019-09-11 16:38:17,816 INFO  L115        SettingsManager]: Preferences different from defaults after loading the file:
[2019-09-11 16:38:17,817 INFO  L136        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2019-09-11 16:38:17,817 INFO  L138        SettingsManager]:  * Log level for plugins=info
[2019-09-11 16:38:17,817 INFO  L136        SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2019-09-11 16:38:17,818 INFO  L138        SettingsManager]:  * User list type=DISABLED
[2019-09-11 16:38:17,818 INFO  L138        SettingsManager]:  * Ignore calls to and inside polymorphic procedures=false
[2019-09-11 16:38:17,818 INFO  L138        SettingsManager]:  * Ignore calls to recursive procedures=false
[2019-09-11 16:38:17,818 INFO  L136        SettingsManager]: Preferences of Abstract Interpretation differ from their defaults:
[2019-09-11 16:38:17,818 INFO  L138        SettingsManager]:  * Abstract domain=IntervalDomain
[2019-09-11 16:38:17,819 INFO  L136        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2019-09-11 16:38:17,819 INFO  L138        SettingsManager]:  * sizeof long=4
[2019-09-11 16:38:17,819 INFO  L138        SettingsManager]:  * sizeof POINTER=4
[2019-09-11 16:38:17,820 INFO  L138        SettingsManager]:  * Check division by zero=IGNORE
[2019-09-11 16:38:17,820 INFO  L138        SettingsManager]:  * Pointer to allocated memory at dereference=IGNORE
[2019-09-11 16:38:17,820 INFO  L138        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2019-09-11 16:38:17,820 INFO  L138        SettingsManager]:  * Check array bounds for arrays that are off heap=IGNORE
[2019-09-11 16:38:17,820 INFO  L138        SettingsManager]:  * sizeof long double=12
[2019-09-11 16:38:17,821 INFO  L138        SettingsManager]:  * Check if freed pointer was valid=false
[2019-09-11 16:38:17,821 INFO  L138        SettingsManager]:  * Pointer base address is valid at dereference=IGNORE
[2019-09-11 16:38:17,821 INFO  L136        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2019-09-11 16:38:17,821 INFO  L138        SettingsManager]:  * Remove goto edges from RCFG=true
[2019-09-11 16:38:17,821 INFO  L138        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2019-09-11 16:38:17,822 INFO  L138        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2019-09-11 16:38:17,822 INFO  L136        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2019-09-11 16:38:17,822 INFO  L138        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2019-09-11 16:38:17,822 INFO  L138        SettingsManager]:  * Trace refinement strategy=TAIPAN
[2019-09-11 16:38:17,822 INFO  L138        SettingsManager]:  * SMT solver=External_ModelsAndUnsatCoreMode
[2019-09-11 16:38:17,823 INFO  L138        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in
[2019-09-11 16:38:17,823 INFO  L138        SettingsManager]:  * Abstract interpretation Mode=USE_PREDICATES
[2019-09-11 16:38:17,851 INFO  L81    nceAwareModelManager]: Repository-Root is: /tmp
[2019-09-11 16:38:17,863 INFO  L258   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2019-09-11 16:38:17,867 INFO  L214   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2019-09-11 16:38:17,868 INFO  L271        PluginConnector]: Initializing CDTParser...
[2019-09-11 16:38:17,868 INFO  L275        PluginConnector]: CDTParser initialized
[2019-09-11 16:38:17,869 INFO  L428   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/pipeline.cil-2.c
[2019-09-11 16:38:17,927 INFO  L220              CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fd137345d/f9a840e372c14189a03f9db36dfe64d6/FLAG19699fd4a
[2019-09-11 16:38:18,365 INFO  L306              CDTParser]: Found 1 translation units.
[2019-09-11 16:38:18,366 INFO  L160              CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/pipeline.cil-2.c
[2019-09-11 16:38:18,377 INFO  L349              CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fd137345d/f9a840e372c14189a03f9db36dfe64d6/FLAG19699fd4a
[2019-09-11 16:38:18,759 INFO  L357              CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/fd137345d/f9a840e372c14189a03f9db36dfe64d6
[2019-09-11 16:38:18,773 INFO  L296   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2019-09-11 16:38:18,775 INFO  L131        ToolchainWalker]: Walking toolchain with 4 elements.
[2019-09-11 16:38:18,779 INFO  L113        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2019-09-11 16:38:18,780 INFO  L271        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2019-09-11 16:38:18,783 INFO  L275        PluginConnector]: CACSL2BoogieTranslator initialized
[2019-09-11 16:38:18,784 INFO  L185        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.09 04:38:18" (1/1) ...
[2019-09-11 16:38:18,787 INFO  L205        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@262768b3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.09 04:38:18, skipping insertion in model container
[2019-09-11 16:38:18,788 INFO  L185        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.09 04:38:18" (1/1) ...
[2019-09-11 16:38:18,795 INFO  L142         MainTranslator]: Starting translation in SV-COMP mode 
[2019-09-11 16:38:18,854 INFO  L173         MainTranslator]: Built tables and reachable declarations
[2019-09-11 16:38:19,094 INFO  L206          PostProcessor]: Analyzing one entry point: main
[2019-09-11 16:38:19,101 INFO  L188         MainTranslator]: Completed pre-run
[2019-09-11 16:38:19,259 INFO  L206          PostProcessor]: Analyzing one entry point: main
[2019-09-11 16:38:19,281 INFO  L192         MainTranslator]: Completed translation
[2019-09-11 16:38:19,281 INFO  L202        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.09 04:38:19 WrapperNode
[2019-09-11 16:38:19,282 INFO  L132        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2019-09-11 16:38:19,282 INFO  L113        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2019-09-11 16:38:19,282 INFO  L271        PluginConnector]: Initializing Boogie Preprocessor...
[2019-09-11 16:38:19,282 INFO  L275        PluginConnector]: Boogie Preprocessor initialized
[2019-09-11 16:38:19,292 INFO  L185        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.09 04:38:19" (1/1) ...
[2019-09-11 16:38:19,293 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.09 04:38:19" (1/1) ...
[2019-09-11 16:38:19,303 INFO  L185        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.09 04:38:19" (1/1) ...
[2019-09-11 16:38:19,304 INFO  L185        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.09 04:38:19" (1/1) ...
[2019-09-11 16:38:19,325 INFO  L185        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.09 04:38:19" (1/1) ...
[2019-09-11 16:38:19,353 INFO  L185        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.09 04:38:19" (1/1) ...
[2019-09-11 16:38:19,357 INFO  L185        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.09 04:38:19" (1/1) ...
[2019-09-11 16:38:19,363 INFO  L132        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2019-09-11 16:38:19,363 INFO  L113        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2019-09-11 16:38:19,363 INFO  L271        PluginConnector]: Initializing RCFGBuilder...
[2019-09-11 16:38:19,363 INFO  L275        PluginConnector]: RCFGBuilder initialized
[2019-09-11 16:38:19,364 INFO  L185        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.09 04:38:19" (1/1) ...
No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2019-09-11 16:38:19,430 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.init
[2019-09-11 16:38:19,430 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2019-09-11 16:38:19,430 INFO  L138     BoogieDeclarations]: Found implementation of procedure error
[2019-09-11 16:38:19,430 INFO  L138     BoogieDeclarations]: Found implementation of procedure N_generate
[2019-09-11 16:38:19,430 INFO  L138     BoogieDeclarations]: Found implementation of procedure S1_addsub
[2019-09-11 16:38:19,430 INFO  L138     BoogieDeclarations]: Found implementation of procedure S2_presdbl
[2019-09-11 16:38:19,430 INFO  L138     BoogieDeclarations]: Found implementation of procedure S3_zero
[2019-09-11 16:38:19,430 INFO  L138     BoogieDeclarations]: Found implementation of procedure D_print
[2019-09-11 16:38:19,431 INFO  L138     BoogieDeclarations]: Found implementation of procedure eval
[2019-09-11 16:38:19,431 INFO  L138     BoogieDeclarations]: Found implementation of procedure start_simulation
[2019-09-11 16:38:19,431 INFO  L138     BoogieDeclarations]: Found implementation of procedure main
[2019-09-11 16:38:19,431 INFO  L130     BoogieDeclarations]: Found specification of procedure __VERIFIER_error
[2019-09-11 16:38:19,431 INFO  L130     BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int
[2019-09-11 16:38:19,432 INFO  L130     BoogieDeclarations]: Found specification of procedure error
[2019-09-11 16:38:19,433 INFO  L130     BoogieDeclarations]: Found specification of procedure N_generate
[2019-09-11 16:38:19,433 INFO  L130     BoogieDeclarations]: Found specification of procedure S1_addsub
[2019-09-11 16:38:19,434 INFO  L130     BoogieDeclarations]: Found specification of procedure S2_presdbl
[2019-09-11 16:38:19,434 INFO  L130     BoogieDeclarations]: Found specification of procedure S3_zero
[2019-09-11 16:38:19,434 INFO  L130     BoogieDeclarations]: Found specification of procedure D_print
[2019-09-11 16:38:19,434 INFO  L130     BoogieDeclarations]: Found specification of procedure eval
[2019-09-11 16:38:19,434 INFO  L130     BoogieDeclarations]: Found specification of procedure start_simulation
[2019-09-11 16:38:19,435 INFO  L130     BoogieDeclarations]: Found specification of procedure main
[2019-09-11 16:38:19,435 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.init
[2019-09-11 16:38:19,435 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2019-09-11 16:38:20,192 INFO  L278             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2019-09-11 16:38:20,192 INFO  L283             CfgBuilder]: Removed 3 assume(true) statements.
[2019-09-11 16:38:20,193 INFO  L202        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.09 04:38:20 BoogieIcfgContainer
[2019-09-11 16:38:20,193 INFO  L132        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2019-09-11 16:38:20,194 INFO  L113        PluginConnector]: ------------------------Abstract Interpretation----------------------------
[2019-09-11 16:38:20,194 INFO  L271        PluginConnector]: Initializing Abstract Interpretation...
[2019-09-11 16:38:20,195 INFO  L275        PluginConnector]: Abstract Interpretation initialized
[2019-09-11 16:38:20,195 INFO  L185        PluginConnector]: Executing the observer AbstractInterpretationRcfgObserver from plugin Abstract Interpretation for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.09 04:38:20" (1/1) ...
[2019-09-11 16:38:20,224 INFO  L101         FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2)
[2019-09-11 16:39:19,763 INFO  L263    AbstractInterpreter]: Some error location(s) were reachable
[2019-09-11 16:39:19,884 INFO  L272    AbstractInterpreter]: Visited 290 different actions 150772 times. Merged at 223 different actions 67235 times. Widened at 6 different actions 228 times. Performed 828195 root evaluator evaluations with a maximum evaluation depth of 4. Performed 828195 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 26339 fixpoints after 145 different actions. Largest state had 100 variables.
[2019-09-11 16:39:19,884 INFO  L132        PluginConnector]: ------------------------ END Abstract Interpretation----------------------------
[2019-09-11 16:39:19,887 INFO  L168              Benchmark]: Toolchain (without parser) took 61110.93 ms. Allocated memory was 142.6 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 89.6 MB in the beginning and 252.2 MB in the end (delta: -162.6 MB). Peak memory consumption was 2.3 GB. Max. memory is 7.1 GB.
[2019-09-11 16:39:19,888 INFO  L168              Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 142.6 MB. Free memory was 108.9 MB in the beginning and 108.7 MB in the end (delta: 212.8 kB). Peak memory consumption was 212.8 kB. Max. memory is 7.1 GB.
[2019-09-11 16:39:19,889 INFO  L168              Benchmark]: CACSL2BoogieTranslator took 502.61 ms. Allocated memory was 142.6 MB in the beginning and 202.4 MB in the end (delta: 59.8 MB). Free memory was 89.4 MB in the beginning and 176.7 MB in the end (delta: -87.3 MB). Peak memory consumption was 24.4 MB. Max. memory is 7.1 GB.
[2019-09-11 16:39:19,889 INFO  L168              Benchmark]: Boogie Preprocessor took 80.48 ms. Allocated memory is still 202.4 MB. Free memory was 176.7 MB in the beginning and 173.6 MB in the end (delta: 3.1 MB). Peak memory consumption was 3.1 MB. Max. memory is 7.1 GB.
[2019-09-11 16:39:19,890 INFO  L168              Benchmark]: RCFGBuilder took 830.44 ms. Allocated memory is still 202.4 MB. Free memory was 173.6 MB in the beginning and 123.7 MB in the end (delta: 49.9 MB). Peak memory consumption was 49.9 MB. Max. memory is 7.1 GB.
[2019-09-11 16:39:19,891 INFO  L168              Benchmark]: Abstract Interpretation took 59689.90 ms. Allocated memory was 202.4 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 123.7 MB in the beginning and 252.2 MB in the end (delta: -128.5 MB). Peak memory consumption was 2.2 GB. Max. memory is 7.1 GB.
[2019-09-11 16:39:19,896 INFO  L335   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * CDTParser took 0.21 ms. Allocated memory is still 142.6 MB. Free memory was 108.9 MB in the beginning and 108.7 MB in the end (delta: 212.8 kB). Peak memory consumption was 212.8 kB. Max. memory is 7.1 GB.
 * CACSL2BoogieTranslator took 502.61 ms. Allocated memory was 142.6 MB in the beginning and 202.4 MB in the end (delta: 59.8 MB). Free memory was 89.4 MB in the beginning and 176.7 MB in the end (delta: -87.3 MB). Peak memory consumption was 24.4 MB. Max. memory is 7.1 GB.
 * Boogie Preprocessor took 80.48 ms. Allocated memory is still 202.4 MB. Free memory was 176.7 MB in the beginning and 173.6 MB in the end (delta: 3.1 MB). Peak memory consumption was 3.1 MB. Max. memory is 7.1 GB.
 * RCFGBuilder took 830.44 ms. Allocated memory is still 202.4 MB. Free memory was 173.6 MB in the beginning and 123.7 MB in the end (delta: 49.9 MB). Peak memory consumption was 49.9 MB. Max. memory is 7.1 GB.
 * Abstract Interpretation took 59689.90 ms. Allocated memory was 202.4 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 123.7 MB in the beginning and 252.2 MB in the end (delta: -128.5 MB). Peak memory consumption was 2.2 GB. Max. memory is 7.1 GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2:
  - UnprovableResult [Line: 9]: Unable to prove that call of __VERIFIER_error() unreachable
    Unable to prove that call of __VERIFIER_error() unreachable
 Reason: abstract domain could reach this error location. 
Possible FailurePath: 
[L13]               int main_in1_val  ;
[L14]               int main_in1_val_t  ;
[L15]               int main_in1_ev  ;
[L16]               int main_in1_req_up  ;
[L17]               int main_in2_val  ;
[L18]               int main_in2_val_t  ;
[L19]               int main_in2_ev  ;
[L20]               int main_in2_req_up  ;
[L21]               int main_diff_val  ;
[L22]               int main_diff_val_t  ;
[L23]               int main_diff_ev  ;
[L24]               int main_diff_req_up ;
[L25]               int main_sum_val  ;
[L26]               int main_sum_val_t  ;
[L27]               int main_sum_ev  ;
[L28]               int main_sum_req_up ;
[L29]               int main_pres_val  ;
[L30]               int main_pres_val_t  ;
[L31]               int main_pres_ev  ;
[L32]               int main_pres_req_up  ;
[L33]               int main_dbl_val  ;
[L34]               int main_dbl_val_t  ;
[L35]               int main_dbl_ev  ;
[L36]               int main_dbl_req_up  ;
[L37]               int main_zero_val  ;
[L38]               int main_zero_val_t  ;
[L39]               int main_zero_ev  ;
[L40]               int main_zero_req_up  ;
[L41]               int main_clk_val  ;
[L42]               int main_clk_val_t  ;
[L43]               int main_clk_ev  ;
[L44]               int main_clk_req_up  ;
[L45]               int main_clk_pos_edge  ;
[L46]               int main_clk_neg_edge  ;
[L47]               int N_generate_st  ;
[L48]               int N_generate_i  ;
[L49]               int S1_addsub_st  ;
[L50]               int S1_addsub_i  ;
[L51]               int S2_presdbl_st  ;
[L52]               int S2_presdbl_i  ;
[L53]               int S3_zero_st  ;
[L54]               int S3_zero_i  ;
[L55]               int D_z  ;
[L56]               int D_print_st  ;
[L57]               int D_print_i  ;
[L749]              int count ;
[L750]              int __retres2 ;
[L755]              main_in1_ev  =    2
[L756]              main_in1_req_up  =    0
[L757]              main_in2_ev  =    2
[L758]              main_in2_req_up  =    0
[L759]              main_diff_ev  =    2
[L760]              main_diff_req_up  =    0
[L761]              main_sum_ev  =    2
[L762]              main_sum_req_up  =    0
[L763]              main_pres_ev  =    2
[L764]              main_pres_req_up  =    0
[L765]              main_dbl_ev  =    2
[L766]              main_dbl_req_up  =    0
[L767]              main_zero_ev  =    2
[L768]              main_zero_req_up  =    0
[L769]              main_clk_val  =    0
[L770]              main_clk_ev  =    2
[L771]              main_clk_req_up  =    0
[L772]              main_clk_pos_edge  =    2
[L773]              main_clk_neg_edge  =    2
[L776]              count = 0
[L777]              N_generate_i = 0
[L778]              S1_addsub_i = 0
[L779]              S2_presdbl_i = 0
[L780]              S3_zero_i = 0
[L781]              D_print_i = 0
[L782]  CALL        start_simulation()
[L242]              int kernel_st ;
[L245]              kernel_st = 0
[L246]  COND FALSE  !((int )main_in1_req_up == 1)
[L257]  COND FALSE  !((int )main_in2_req_up == 1)
[L268]  COND FALSE  !((int )main_sum_req_up == 1)
[L279]  COND FALSE  !((int )main_diff_req_up == 1)
[L290]  COND FALSE  !((int )main_pres_req_up == 1)
[L301]  COND FALSE  !((int )main_dbl_req_up == 1)
[L312]  COND FALSE  !((int )main_zero_req_up == 1)
[L323]  COND FALSE  !((int )main_clk_req_up == 1)
[L341]  COND FALSE  !((int )N_generate_i == 1)
[L344]              N_generate_st = 2
[L346]  COND FALSE  !((int )S1_addsub_i == 1)
[L349]              S1_addsub_st = 2
[L351]  COND FALSE  !((int )S2_presdbl_i == 1)
[L354]              S2_presdbl_st = 2
[L356]  COND FALSE  !((int )S3_zero_i == 1)
[L359]              S3_zero_st = 2
[L361]  COND FALSE  !((int )D_print_i == 1)
[L364]              D_print_st = 2
[L366]  COND FALSE  !((int )main_in1_ev == 0)
[L371]  COND FALSE  !((int )main_in2_ev == 0)
[L376]  COND FALSE  !((int )main_sum_ev == 0)
[L381]  COND FALSE  !((int )main_diff_ev == 0)
[L386]  COND FALSE  !((int )main_pres_ev == 0)
[L391]  COND FALSE  !((int )main_dbl_ev == 0)
[L396]  COND FALSE  !((int )main_zero_ev == 0)
[L401]  COND FALSE  !((int )main_clk_ev == 0)
[L406]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L411]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L416]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L421]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L426]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L431]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L436]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L441]  COND FALSE  !((int )main_in1_ev == 1)
[L446]  COND FALSE  !((int )main_in2_ev == 1)
[L451]  COND FALSE  !((int )main_sum_ev == 1)
[L456]  COND FALSE  !((int )main_diff_ev == 1)
[L461]  COND FALSE  !((int )main_pres_ev == 1)
[L466]  COND FALSE  !((int )main_dbl_ev == 1)
[L471]  COND FALSE  !((int )main_zero_ev == 1)
[L476]  COND FALSE  !((int )main_clk_ev == 1)
[L481]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L486]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L492]  COND TRUE   1
[L495]              kernel_st = 1
[L496]  CALL        eval()
[L128]              int tmp ;
[L129]              int tmp___0 ;
[L130]              int tmp___1 ;
[L131]              int tmp___2 ;
[L132]              int tmp___3 ;
[L136]  COND TRUE   1
[L138]  COND FALSE  !((int )N_generate_st == 0)
[L141]  COND FALSE  !((int )S1_addsub_st == 0)
[L144]  COND FALSE  !((int )S2_presdbl_st == 0)
[L147]  COND FALSE  !((int )S3_zero_st == 0)
[L150]  COND FALSE  !((int )D_print_st == 0)
[L496]  RET         eval()
[L498]              kernel_st = 2
[L499]  COND FALSE  !((int )main_in1_req_up == 1)
[L510]  COND FALSE  !((int )main_in2_req_up == 1)
[L521]  COND FALSE  !((int )main_sum_req_up == 1)
[L532]  COND FALSE  !((int )main_diff_req_up == 1)
[L543]  COND FALSE  !((int )main_pres_req_up == 1)
[L554]  COND FALSE  !((int )main_dbl_req_up == 1)
[L565]  COND FALSE  !((int )main_zero_req_up == 1)
[L576]  COND FALSE  !((int )main_clk_req_up == 1)
[L594]              kernel_st = 3
[L595]  COND FALSE  !((int )main_in1_ev == 0)
[L600]  COND FALSE  !((int )main_in2_ev == 0)
[L605]  COND FALSE  !((int )main_sum_ev == 0)
[L610]  COND FALSE  !((int )main_diff_ev == 0)
[L615]  COND FALSE  !((int )main_pres_ev == 0)
[L620]  COND FALSE  !((int )main_dbl_ev == 0)
[L625]  COND FALSE  !((int )main_zero_ev == 0)
[L630]  COND FALSE  !((int )main_clk_ev == 0)
[L635]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L640]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L645]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L650]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L655]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L660]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L665]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L670]  COND FALSE  !((int )main_in1_ev == 1)
[L675]  COND FALSE  !((int )main_in2_ev == 1)
[L680]  COND FALSE  !((int )main_sum_ev == 1)
[L685]  COND FALSE  !((int )main_diff_ev == 1)
[L690]  COND FALSE  !((int )main_pres_ev == 1)
[L695]  COND FALSE  !((int )main_dbl_ev == 1)
[L700]  COND FALSE  !((int )main_zero_ev == 1)
[L705]  COND FALSE  !((int )main_clk_ev == 1)
[L710]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L715]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L720]  COND FALSE  !((int )N_generate_st == 0)
[L723]  COND FALSE  !((int )S1_addsub_st == 0)
[L726]  COND FALSE  !((int )S2_presdbl_st == 0)
[L729]  COND FALSE  !((int )S3_zero_st == 0)
[L732]  COND FALSE  !((int )D_print_st == 0)
[L782]  RET         start_simulation()
[L785]  COND TRUE   1
[L788]              main_clk_val_t = 1
[L789]              main_clk_req_up = 1
[L790]  CALL        start_simulation()
[L242]              int kernel_st ;
[L245]              kernel_st = 0
[L246]  COND FALSE  !((int )main_in1_req_up == 1)
[L257]  COND FALSE  !((int )main_in2_req_up == 1)
[L268]  COND FALSE  !((int )main_sum_req_up == 1)
[L279]  COND FALSE  !((int )main_diff_req_up == 1)
[L290]  COND FALSE  !((int )main_pres_req_up == 1)
[L301]  COND FALSE  !((int )main_dbl_req_up == 1)
[L312]  COND FALSE  !((int )main_zero_req_up == 1)
[L323]  COND TRUE   (int )main_clk_req_up == 1
[L324]  COND TRUE   (int )main_clk_val != (int )main_clk_val_t
[L325]              main_clk_val = main_clk_val_t
[L326]              main_clk_ev = 0
[L327]  COND TRUE   (int )main_clk_val == 1
[L328]              main_clk_pos_edge = 0
[L329]              main_clk_neg_edge = 2
[L337]              main_clk_req_up = 0
[L341]  COND FALSE  !((int )N_generate_i == 1)
[L344]              N_generate_st = 2
[L346]  COND FALSE  !((int )S1_addsub_i == 1)
[L349]              S1_addsub_st = 2
[L351]  COND FALSE  !((int )S2_presdbl_i == 1)
[L354]              S2_presdbl_st = 2
[L356]  COND FALSE  !((int )S3_zero_i == 1)
[L359]              S3_zero_st = 2
[L361]  COND FALSE  !((int )D_print_i == 1)
[L364]              D_print_st = 2
[L366]  COND FALSE  !((int )main_in1_ev == 0)
[L371]  COND FALSE  !((int )main_in2_ev == 0)
[L376]  COND FALSE  !((int )main_sum_ev == 0)
[L381]  COND FALSE  !((int )main_diff_ev == 0)
[L386]  COND FALSE  !((int )main_pres_ev == 0)
[L391]  COND FALSE  !((int )main_dbl_ev == 0)
[L396]  COND FALSE  !((int )main_zero_ev == 0)
[L401]  COND TRUE   (int )main_clk_ev == 0
[L402]              main_clk_ev = 1
[L406]  COND TRUE   (int )main_clk_pos_edge == 0
[L407]              main_clk_pos_edge = 1
[L411]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L416]  COND TRUE   (int )main_clk_pos_edge == 1
[L417]              N_generate_st = 0
[L421]  COND TRUE   (int )main_clk_pos_edge == 1
[L422]              S1_addsub_st = 0
[L426]  COND TRUE   (int )main_clk_pos_edge == 1
[L427]              S2_presdbl_st = 0
[L431]  COND TRUE   (int )main_clk_pos_edge == 1
[L432]              S3_zero_st = 0
[L436]  COND TRUE   (int )main_clk_pos_edge == 1
[L437]              D_print_st = 0
[L441]  COND FALSE  !((int )main_in1_ev == 1)
[L446]  COND FALSE  !((int )main_in2_ev == 1)
[L451]  COND FALSE  !((int )main_sum_ev == 1)
[L456]  COND FALSE  !((int )main_diff_ev == 1)
[L461]  COND FALSE  !((int )main_pres_ev == 1)
[L466]  COND FALSE  !((int )main_dbl_ev == 1)
[L471]  COND FALSE  !((int )main_zero_ev == 1)
[L476]  COND TRUE   (int )main_clk_ev == 1
[L477]              main_clk_ev = 2
[L481]  COND TRUE   (int )main_clk_pos_edge == 1
[L482]              main_clk_pos_edge = 2
[L486]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L492]  COND TRUE   1
[L495]              kernel_st = 1
[L496]  CALL        eval()
[L128]              int tmp ;
[L129]              int tmp___0 ;
[L130]              int tmp___1 ;
[L131]              int tmp___2 ;
[L132]              int tmp___3 ;
[L136]  COND TRUE   1
[L138]  COND TRUE   (int )N_generate_st == 0
[L159]  COND TRUE   (int )N_generate_st == 0
[L161]              tmp = __VERIFIER_nondet_int()
[L163]  COND FALSE  !(\read(tmp))
[L174]  COND TRUE   (int )S1_addsub_st == 0
[L176]              tmp___0 = __VERIFIER_nondet_int()
[L178]  COND FALSE  !(\read(tmp___0))
[L189]  COND TRUE   (int )S2_presdbl_st == 0
[L191]              tmp___1 = __VERIFIER_nondet_int()
[L193]  COND FALSE  !(\read(tmp___1))
[L204]  COND TRUE   (int )S3_zero_st == 0
[L206]              tmp___2 = __VERIFIER_nondet_int()
[L208]  COND FALSE  !(\read(tmp___2))
[L219]  COND TRUE   (int )D_print_st == 0
[L221]              tmp___3 = __VERIFIER_nondet_int()
[L223]  COND TRUE   \read(tmp___3)
[L225]              D_print_st = 1
[L226]  CALL        D_print()
[L122]              D_z = main_zero_val
[L226]  RET         D_print()
[L136]  COND TRUE   1
[L138]  COND FALSE  !((int )N_generate_st == 0)
[L141]  COND FALSE  !((int )S1_addsub_st == 0)
[L144]  COND FALSE  !((int )S2_presdbl_st == 0)
[L147]  COND FALSE  !((int )S3_zero_st == 0)
[L150]  COND FALSE  !((int )D_print_st == 0)
[L496]  RET         eval()
[L498]              kernel_st = 2
[L499]  COND FALSE  !((int )main_in1_req_up == 1)
[L510]  COND TRUE   (int )main_in2_req_up == 1
[L511]  COND TRUE   main_in2_val != main_in2_val_t
[L512]              main_in2_val = main_in2_val_t
[L513]              main_in2_ev = 0
[L517]              main_in2_req_up = 0
[L521]  COND FALSE  !((int )main_sum_req_up == 1)
[L532]  COND FALSE  !((int )main_diff_req_up == 1)
[L543]  COND FALSE  !((int )main_pres_req_up == 1)
[L554]  COND FALSE  !((int )main_dbl_req_up == 1)
[L565]  COND FALSE  !((int )main_zero_req_up == 1)
[L576]  COND FALSE  !((int )main_clk_req_up == 1)
[L594]              kernel_st = 3
[L595]  COND FALSE  !((int )main_in1_ev == 0)
[L600]  COND TRUE   (int )main_in2_ev == 0
[L601]              main_in2_ev = 1
[L605]  COND FALSE  !((int )main_sum_ev == 0)
[L610]  COND FALSE  !((int )main_diff_ev == 0)
[L615]  COND FALSE  !((int )main_pres_ev == 0)
[L620]  COND FALSE  !((int )main_dbl_ev == 0)
[L625]  COND FALSE  !((int )main_zero_ev == 0)
[L630]  COND FALSE  !((int )main_clk_ev == 0)
[L635]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L640]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L645]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L650]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L655]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L660]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L665]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L670]  COND FALSE  !((int )main_in1_ev == 1)
[L675]  COND TRUE   (int )main_in2_ev == 1
[L676]              main_in2_ev = 2
[L680]  COND FALSE  !((int )main_sum_ev == 1)
[L685]  COND FALSE  !((int )main_diff_ev == 1)
[L690]  COND FALSE  !((int )main_pres_ev == 1)
[L695]  COND FALSE  !((int )main_dbl_ev == 1)
[L700]  COND FALSE  !((int )main_zero_ev == 1)
[L705]  COND FALSE  !((int )main_clk_ev == 1)
[L710]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L715]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L720]  COND FALSE  !((int )N_generate_st == 0)
[L723]  COND FALSE  !((int )S1_addsub_st == 0)
[L726]  COND FALSE  !((int )S2_presdbl_st == 0)
[L729]  COND FALSE  !((int )S3_zero_st == 0)
[L732]  COND FALSE  !((int )D_print_st == 0)
[L790]  RET         start_simulation()
[L791]              count += 1
[L793]  COND FALSE  !(count == 5)
[L806]              main_clk_val_t = 0
[L807]              main_clk_req_up = 1
[L808]  CALL        start_simulation()
[L242]              int kernel_st ;
[L245]              kernel_st = 0
[L246]  COND FALSE  !((int )main_in1_req_up == 1)
[L257]  COND FALSE  !((int )main_in2_req_up == 1)
[L268]  COND FALSE  !((int )main_sum_req_up == 1)
[L279]  COND FALSE  !((int )main_diff_req_up == 1)
[L290]  COND FALSE  !((int )main_pres_req_up == 1)
[L301]  COND FALSE  !((int )main_dbl_req_up == 1)
[L312]  COND FALSE  !((int )main_zero_req_up == 1)
[L323]  COND TRUE   (int )main_clk_req_up == 1
[L324]  COND TRUE   (int )main_clk_val != (int )main_clk_val_t
[L325]              main_clk_val = main_clk_val_t
[L326]              main_clk_ev = 0
[L327]  COND FALSE  !((int )main_clk_val == 1)
[L331]              main_clk_neg_edge = 0
[L332]              main_clk_pos_edge = 2
[L337]              main_clk_req_up = 0
[L341]  COND FALSE  !((int )N_generate_i == 1)
[L344]              N_generate_st = 2
[L346]  COND FALSE  !((int )S1_addsub_i == 1)
[L349]              S1_addsub_st = 2
[L351]  COND FALSE  !((int )S2_presdbl_i == 1)
[L354]              S2_presdbl_st = 2
[L356]  COND FALSE  !((int )S3_zero_i == 1)
[L359]              S3_zero_st = 2
[L361]  COND FALSE  !((int )D_print_i == 1)
[L364]              D_print_st = 2
[L366]  COND FALSE  !((int )main_in1_ev == 0)
[L371]  COND FALSE  !((int )main_in2_ev == 0)
[L376]  COND FALSE  !((int )main_sum_ev == 0)
[L381]  COND FALSE  !((int )main_diff_ev == 0)
[L386]  COND FALSE  !((int )main_pres_ev == 0)
[L391]  COND FALSE  !((int )main_dbl_ev == 0)
[L396]  COND FALSE  !((int )main_zero_ev == 0)
[L401]  COND TRUE   (int )main_clk_ev == 0
[L402]              main_clk_ev = 1
[L406]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L411]  COND TRUE   (int )main_clk_neg_edge == 0
[L412]              main_clk_neg_edge = 1
[L416]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L421]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L426]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L431]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L436]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L441]  COND FALSE  !((int )main_in1_ev == 1)
[L446]  COND FALSE  !((int )main_in2_ev == 1)
[L451]  COND FALSE  !((int )main_sum_ev == 1)
[L456]  COND FALSE  !((int )main_diff_ev == 1)
[L461]  COND FALSE  !((int )main_pres_ev == 1)
[L466]  COND FALSE  !((int )main_dbl_ev == 1)
[L471]  COND FALSE  !((int )main_zero_ev == 1)
[L476]  COND TRUE   (int )main_clk_ev == 1
[L477]              main_clk_ev = 2
[L481]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L486]  COND TRUE   (int )main_clk_neg_edge == 1
[L487]              main_clk_neg_edge = 2
[L492]  COND TRUE   1
[L495]              kernel_st = 1
[L496]  CALL        eval()
[L128]              int tmp ;
[L129]              int tmp___0 ;
[L130]              int tmp___1 ;
[L131]              int tmp___2 ;
[L132]              int tmp___3 ;
[L136]  COND TRUE   1
[L138]  COND FALSE  !((int )N_generate_st == 0)
[L141]  COND FALSE  !((int )S1_addsub_st == 0)
[L144]  COND FALSE  !((int )S2_presdbl_st == 0)
[L147]  COND FALSE  !((int )S3_zero_st == 0)
[L150]  COND FALSE  !((int )D_print_st == 0)
[L496]  RET         eval()
[L498]              kernel_st = 2
[L499]  COND FALSE  !((int )main_in1_req_up == 1)
[L510]  COND FALSE  !((int )main_in2_req_up == 1)
[L521]  COND FALSE  !((int )main_sum_req_up == 1)
[L532]  COND FALSE  !((int )main_diff_req_up == 1)
[L543]  COND FALSE  !((int )main_pres_req_up == 1)
[L554]  COND FALSE  !((int )main_dbl_req_up == 1)
[L565]  COND FALSE  !((int )main_zero_req_up == 1)
[L576]  COND FALSE  !((int )main_clk_req_up == 1)
[L594]              kernel_st = 3
[L595]  COND FALSE  !((int )main_in1_ev == 0)
[L600]  COND FALSE  !((int )main_in2_ev == 0)
[L605]  COND FALSE  !((int )main_sum_ev == 0)
[L610]  COND FALSE  !((int )main_diff_ev == 0)
[L615]  COND FALSE  !((int )main_pres_ev == 0)
[L620]  COND FALSE  !((int )main_dbl_ev == 0)
[L625]  COND FALSE  !((int )main_zero_ev == 0)
[L630]  COND FALSE  !((int )main_clk_ev == 0)
[L635]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L640]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L645]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L650]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L655]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L660]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L665]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L670]  COND FALSE  !((int )main_in1_ev == 1)
[L675]  COND FALSE  !((int )main_in2_ev == 1)
[L680]  COND FALSE  !((int )main_sum_ev == 1)
[L685]  COND FALSE  !((int )main_diff_ev == 1)
[L690]  COND FALSE  !((int )main_pres_ev == 1)
[L695]  COND FALSE  !((int )main_dbl_ev == 1)
[L700]  COND FALSE  !((int )main_zero_ev == 1)
[L705]  COND FALSE  !((int )main_clk_ev == 1)
[L710]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L715]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L720]  COND FALSE  !((int )N_generate_st == 0)
[L723]  COND FALSE  !((int )S1_addsub_st == 0)
[L726]  COND FALSE  !((int )S2_presdbl_st == 0)
[L729]  COND FALSE  !((int )S3_zero_st == 0)
[L732]  COND FALSE  !((int )D_print_st == 0)
[L808]  RET         start_simulation()
[L785]  COND TRUE   1
[L788]              main_clk_val_t = 1
[L789]              main_clk_req_up = 1
[L790]  CALL        start_simulation()
[L242]              int kernel_st ;
[L245]              kernel_st = 0
[L246]  COND FALSE  !((int )main_in1_req_up == 1)
[L257]  COND FALSE  !((int )main_in2_req_up == 1)
[L268]  COND FALSE  !((int )main_sum_req_up == 1)
[L279]  COND FALSE  !((int )main_diff_req_up == 1)
[L290]  COND FALSE  !((int )main_pres_req_up == 1)
[L301]  COND FALSE  !((int )main_dbl_req_up == 1)
[L312]  COND FALSE  !((int )main_zero_req_up == 1)
[L323]  COND TRUE   (int )main_clk_req_up == 1
[L324]  COND TRUE   (int )main_clk_val != (int )main_clk_val_t
[L325]              main_clk_val = main_clk_val_t
[L326]              main_clk_ev = 0
[L327]  COND TRUE   (int )main_clk_val == 1
[L328]              main_clk_pos_edge = 0
[L329]              main_clk_neg_edge = 2
[L337]              main_clk_req_up = 0
[L341]  COND FALSE  !((int )N_generate_i == 1)
[L344]              N_generate_st = 2
[L346]  COND FALSE  !((int )S1_addsub_i == 1)
[L349]              S1_addsub_st = 2
[L351]  COND FALSE  !((int )S2_presdbl_i == 1)
[L354]              S2_presdbl_st = 2
[L356]  COND FALSE  !((int )S3_zero_i == 1)
[L359]              S3_zero_st = 2
[L361]  COND FALSE  !((int )D_print_i == 1)
[L364]              D_print_st = 2
[L366]  COND FALSE  !((int )main_in1_ev == 0)
[L371]  COND FALSE  !((int )main_in2_ev == 0)
[L376]  COND FALSE  !((int )main_sum_ev == 0)
[L381]  COND FALSE  !((int )main_diff_ev == 0)
[L386]  COND FALSE  !((int )main_pres_ev == 0)
[L391]  COND FALSE  !((int )main_dbl_ev == 0)
[L396]  COND FALSE  !((int )main_zero_ev == 0)
[L401]  COND TRUE   (int )main_clk_ev == 0
[L402]              main_clk_ev = 1
[L406]  COND TRUE   (int )main_clk_pos_edge == 0
[L407]              main_clk_pos_edge = 1
[L411]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L416]  COND TRUE   (int )main_clk_pos_edge == 1
[L417]              N_generate_st = 0
[L421]  COND TRUE   (int )main_clk_pos_edge == 1
[L422]              S1_addsub_st = 0
[L426]  COND TRUE   (int )main_clk_pos_edge == 1
[L427]              S2_presdbl_st = 0
[L431]  COND TRUE   (int )main_clk_pos_edge == 1
[L432]              S3_zero_st = 0
[L436]  COND TRUE   (int )main_clk_pos_edge == 1
[L437]              D_print_st = 0
[L441]  COND FALSE  !((int )main_in1_ev == 1)
[L446]  COND FALSE  !((int )main_in2_ev == 1)
[L451]  COND FALSE  !((int )main_sum_ev == 1)
[L456]  COND FALSE  !((int )main_diff_ev == 1)
[L461]  COND FALSE  !((int )main_pres_ev == 1)
[L466]  COND FALSE  !((int )main_dbl_ev == 1)
[L471]  COND FALSE  !((int )main_zero_ev == 1)
[L476]  COND TRUE   (int )main_clk_ev == 1
[L477]              main_clk_ev = 2
[L481]  COND TRUE   (int )main_clk_pos_edge == 1
[L482]              main_clk_pos_edge = 2
[L486]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L492]  COND TRUE   1
[L495]              kernel_st = 1
[L496]  CALL        eval()
[L128]              int tmp ;
[L129]              int tmp___0 ;
[L130]              int tmp___1 ;
[L131]              int tmp___2 ;
[L132]              int tmp___3 ;
[L136]  COND TRUE   1
[L138]  COND TRUE   (int )N_generate_st == 0
[L159]  COND TRUE   (int )N_generate_st == 0
[L161]              tmp = __VERIFIER_nondet_int()
[L163]  COND FALSE  !(\read(tmp))
[L174]  COND TRUE   (int )S1_addsub_st == 0
[L176]              tmp___0 = __VERIFIER_nondet_int()
[L178]  COND FALSE  !(\read(tmp___0))
[L189]  COND TRUE   (int )S2_presdbl_st == 0
[L191]              tmp___1 = __VERIFIER_nondet_int()
[L193]  COND FALSE  !(\read(tmp___1))
[L204]  COND TRUE   (int )S3_zero_st == 0
[L206]              tmp___2 = __VERIFIER_nondet_int()
[L208]  COND FALSE  !(\read(tmp___2))
[L219]  COND TRUE   (int )D_print_st == 0
[L221]              tmp___3 = __VERIFIER_nondet_int()
[L223]  COND TRUE   \read(tmp___3)
[L225]              D_print_st = 1
[L226]  CALL        D_print()
[L122]              D_z = main_zero_val
[L226]  RET         D_print()
[L136]  COND TRUE   1
[L138]  COND FALSE  !((int )N_generate_st == 0)
[L141]  COND FALSE  !((int )S1_addsub_st == 0)
[L144]  COND FALSE  !((int )S2_presdbl_st == 0)
[L147]  COND FALSE  !((int )S3_zero_st == 0)
[L150]  COND FALSE  !((int )D_print_st == 0)
[L496]  RET         eval()
[L498]              kernel_st = 2
[L499]  COND FALSE  !((int )main_in1_req_up == 1)
[L510]  COND FALSE  !((int )main_in2_req_up == 1)
[L521]  COND FALSE  !((int )main_sum_req_up == 1)
[L532]  COND TRUE   (int )main_diff_req_up == 1
[L533]  COND TRUE   main_diff_val != main_diff_val_t
[L534]              main_diff_val = main_diff_val_t
[L535]              main_diff_ev = 0
[L539]              main_diff_req_up = 0
[L543]  COND FALSE  !((int )main_pres_req_up == 1)
[L554]  COND FALSE  !((int )main_dbl_req_up == 1)
[L565]  COND FALSE  !((int )main_zero_req_up == 1)
[L576]  COND FALSE  !((int )main_clk_req_up == 1)
[L594]              kernel_st = 3
[L595]  COND FALSE  !((int )main_in1_ev == 0)
[L600]  COND FALSE  !((int )main_in2_ev == 0)
[L605]  COND TRUE   (int )main_sum_ev == 0
[L606]              main_sum_ev = 1
[L610]  COND TRUE   (int )main_diff_ev == 0
[L611]              main_diff_ev = 1
[L615]  COND FALSE  !((int )main_pres_ev == 0)
[L620]  COND FALSE  !((int )main_dbl_ev == 0)
[L625]  COND FALSE  !((int )main_zero_ev == 0)
[L630]  COND FALSE  !((int )main_clk_ev == 0)
[L635]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L640]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L645]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L650]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L655]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L660]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L665]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L670]  COND FALSE  !((int )main_in1_ev == 1)
[L675]  COND FALSE  !((int )main_in2_ev == 1)
[L680]  COND TRUE   (int )main_sum_ev == 1
[L681]              main_sum_ev = 2
[L685]  COND TRUE   (int )main_diff_ev == 1
[L686]              main_diff_ev = 2
[L690]  COND FALSE  !((int )main_pres_ev == 1)
[L695]  COND FALSE  !((int )main_dbl_ev == 1)
[L700]  COND FALSE  !((int )main_zero_ev == 1)
[L705]  COND FALSE  !((int )main_clk_ev == 1)
[L710]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L715]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L720]  COND FALSE  !((int )N_generate_st == 0)
[L723]  COND FALSE  !((int )S1_addsub_st == 0)
[L726]  COND FALSE  !((int )S2_presdbl_st == 0)
[L729]  COND FALSE  !((int )S3_zero_st == 0)
[L732]  COND FALSE  !((int )D_print_st == 0)
[L790]  RET         start_simulation()
[L791]              count += 1
[L793]  COND FALSE  !(count == 5)
[L806]              main_clk_val_t = 0
[L807]              main_clk_req_up = 1
[L808]  CALL        start_simulation()
[L242]              int kernel_st ;
[L245]              kernel_st = 0
[L246]  COND FALSE  !((int )main_in1_req_up == 1)
[L257]  COND FALSE  !((int )main_in2_req_up == 1)
[L268]  COND FALSE  !((int )main_sum_req_up == 1)
[L279]  COND FALSE  !((int )main_diff_req_up == 1)
[L290]  COND FALSE  !((int )main_pres_req_up == 1)
[L301]  COND FALSE  !((int )main_dbl_req_up == 1)
[L312]  COND FALSE  !((int )main_zero_req_up == 1)
[L323]  COND TRUE   (int )main_clk_req_up == 1
[L324]  COND TRUE   (int )main_clk_val != (int )main_clk_val_t
[L325]              main_clk_val = main_clk_val_t
[L326]              main_clk_ev = 0
[L327]  COND FALSE  !((int )main_clk_val == 1)
[L331]              main_clk_neg_edge = 0
[L332]              main_clk_pos_edge = 2
[L337]              main_clk_req_up = 0
[L341]  COND FALSE  !((int )N_generate_i == 1)
[L344]              N_generate_st = 2
[L346]  COND FALSE  !((int )S1_addsub_i == 1)
[L349]              S1_addsub_st = 2
[L351]  COND FALSE  !((int )S2_presdbl_i == 1)
[L354]              S2_presdbl_st = 2
[L356]  COND FALSE  !((int )S3_zero_i == 1)
[L359]              S3_zero_st = 2
[L361]  COND FALSE  !((int )D_print_i == 1)
[L364]              D_print_st = 2
[L366]  COND FALSE  !((int )main_in1_ev == 0)
[L371]  COND FALSE  !((int )main_in2_ev == 0)
[L376]  COND FALSE  !((int )main_sum_ev == 0)
[L381]  COND FALSE  !((int )main_diff_ev == 0)
[L386]  COND FALSE  !((int )main_pres_ev == 0)
[L391]  COND FALSE  !((int )main_dbl_ev == 0)
[L396]  COND FALSE  !((int )main_zero_ev == 0)
[L401]  COND TRUE   (int )main_clk_ev == 0
[L402]              main_clk_ev = 1
[L406]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L411]  COND TRUE   (int )main_clk_neg_edge == 0
[L412]              main_clk_neg_edge = 1
[L416]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L421]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L426]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L431]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L436]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L441]  COND FALSE  !((int )main_in1_ev == 1)
[L446]  COND FALSE  !((int )main_in2_ev == 1)
[L451]  COND FALSE  !((int )main_sum_ev == 1)
[L456]  COND FALSE  !((int )main_diff_ev == 1)
[L461]  COND FALSE  !((int )main_pres_ev == 1)
[L466]  COND FALSE  !((int )main_dbl_ev == 1)
[L471]  COND FALSE  !((int )main_zero_ev == 1)
[L476]  COND TRUE   (int )main_clk_ev == 1
[L477]              main_clk_ev = 2
[L481]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L486]  COND TRUE   (int )main_clk_neg_edge == 1
[L487]              main_clk_neg_edge = 2
[L492]  COND TRUE   1
[L495]              kernel_st = 1
[L496]  CALL        eval()
[L128]              int tmp ;
[L129]              int tmp___0 ;
[L130]              int tmp___1 ;
[L131]              int tmp___2 ;
[L132]              int tmp___3 ;
[L136]  COND TRUE   1
[L138]  COND FALSE  !((int )N_generate_st == 0)
[L141]  COND FALSE  !((int )S1_addsub_st == 0)
[L144]  COND FALSE  !((int )S2_presdbl_st == 0)
[L147]  COND FALSE  !((int )S3_zero_st == 0)
[L150]  COND FALSE  !((int )D_print_st == 0)
[L496]  RET         eval()
[L498]              kernel_st = 2
[L499]  COND FALSE  !((int )main_in1_req_up == 1)
[L510]  COND FALSE  !((int )main_in2_req_up == 1)
[L521]  COND FALSE  !((int )main_sum_req_up == 1)
[L532]  COND FALSE  !((int )main_diff_req_up == 1)
[L543]  COND FALSE  !((int )main_pres_req_up == 1)
[L554]  COND FALSE  !((int )main_dbl_req_up == 1)
[L565]  COND FALSE  !((int )main_zero_req_up == 1)
[L576]  COND FALSE  !((int )main_clk_req_up == 1)
[L594]              kernel_st = 3
[L595]  COND FALSE  !((int )main_in1_ev == 0)
[L600]  COND FALSE  !((int )main_in2_ev == 0)
[L605]  COND FALSE  !((int )main_sum_ev == 0)
[L610]  COND FALSE  !((int )main_diff_ev == 0)
[L615]  COND FALSE  !((int )main_pres_ev == 0)
[L620]  COND FALSE  !((int )main_dbl_ev == 0)
[L625]  COND FALSE  !((int )main_zero_ev == 0)
[L630]  COND FALSE  !((int )main_clk_ev == 0)
[L635]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L640]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L645]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L650]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L655]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L660]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L665]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L670]  COND FALSE  !((int )main_in1_ev == 1)
[L675]  COND FALSE  !((int )main_in2_ev == 1)
[L680]  COND FALSE  !((int )main_sum_ev == 1)
[L685]  COND FALSE  !((int )main_diff_ev == 1)
[L690]  COND FALSE  !((int )main_pres_ev == 1)
[L695]  COND FALSE  !((int )main_dbl_ev == 1)
[L700]  COND FALSE  !((int )main_zero_ev == 1)
[L705]  COND FALSE  !((int )main_clk_ev == 1)
[L710]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L715]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L720]  COND FALSE  !((int )N_generate_st == 0)
[L723]  COND FALSE  !((int )S1_addsub_st == 0)
[L726]  COND FALSE  !((int )S2_presdbl_st == 0)
[L729]  COND FALSE  !((int )S3_zero_st == 0)
[L732]  COND FALSE  !((int )D_print_st == 0)
[L808]  RET         start_simulation()
[L785]  COND TRUE   1
[L788]              main_clk_val_t = 1
[L789]              main_clk_req_up = 1
[L790]  CALL        start_simulation()
[L242]              int kernel_st ;
[L245]              kernel_st = 0
[L246]  COND FALSE  !((int )main_in1_req_up == 1)
[L257]  COND FALSE  !((int )main_in2_req_up == 1)
[L268]  COND FALSE  !((int )main_sum_req_up == 1)
[L279]  COND FALSE  !((int )main_diff_req_up == 1)
[L290]  COND FALSE  !((int )main_pres_req_up == 1)
[L301]  COND FALSE  !((int )main_dbl_req_up == 1)
[L312]  COND FALSE  !((int )main_zero_req_up == 1)
[L323]  COND TRUE   (int )main_clk_req_up == 1
[L324]  COND TRUE   (int )main_clk_val != (int )main_clk_val_t
[L325]              main_clk_val = main_clk_val_t
[L326]              main_clk_ev = 0
[L327]  COND TRUE   (int )main_clk_val == 1
[L328]              main_clk_pos_edge = 0
[L329]              main_clk_neg_edge = 2
[L337]              main_clk_req_up = 0
[L341]  COND FALSE  !((int )N_generate_i == 1)
[L344]              N_generate_st = 2
[L346]  COND FALSE  !((int )S1_addsub_i == 1)
[L349]              S1_addsub_st = 2
[L351]  COND FALSE  !((int )S2_presdbl_i == 1)
[L354]              S2_presdbl_st = 2
[L356]  COND FALSE  !((int )S3_zero_i == 1)
[L359]              S3_zero_st = 2
[L361]  COND FALSE  !((int )D_print_i == 1)
[L364]              D_print_st = 2
[L366]  COND FALSE  !((int )main_in1_ev == 0)
[L371]  COND FALSE  !((int )main_in2_ev == 0)
[L376]  COND FALSE  !((int )main_sum_ev == 0)
[L381]  COND FALSE  !((int )main_diff_ev == 0)
[L386]  COND FALSE  !((int )main_pres_ev == 0)
[L391]  COND FALSE  !((int )main_dbl_ev == 0)
[L396]  COND FALSE  !((int )main_zero_ev == 0)
[L401]  COND TRUE   (int )main_clk_ev == 0
[L402]              main_clk_ev = 1
[L406]  COND TRUE   (int )main_clk_pos_edge == 0
[L407]              main_clk_pos_edge = 1
[L411]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L416]  COND TRUE   (int )main_clk_pos_edge == 1
[L417]              N_generate_st = 0
[L421]  COND TRUE   (int )main_clk_pos_edge == 1
[L422]              S1_addsub_st = 0
[L426]  COND TRUE   (int )main_clk_pos_edge == 1
[L427]              S2_presdbl_st = 0
[L431]  COND TRUE   (int )main_clk_pos_edge == 1
[L432]              S3_zero_st = 0
[L436]  COND TRUE   (int )main_clk_pos_edge == 1
[L437]              D_print_st = 0
[L441]  COND FALSE  !((int )main_in1_ev == 1)
[L446]  COND FALSE  !((int )main_in2_ev == 1)
[L451]  COND FALSE  !((int )main_sum_ev == 1)
[L456]  COND FALSE  !((int )main_diff_ev == 1)
[L461]  COND FALSE  !((int )main_pres_ev == 1)
[L466]  COND FALSE  !((int )main_dbl_ev == 1)
[L471]  COND FALSE  !((int )main_zero_ev == 1)
[L476]  COND TRUE   (int )main_clk_ev == 1
[L477]              main_clk_ev = 2
[L481]  COND TRUE   (int )main_clk_pos_edge == 1
[L482]              main_clk_pos_edge = 2
[L486]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L492]  COND TRUE   1
[L495]              kernel_st = 1
[L496]  CALL        eval()
[L128]              int tmp ;
[L129]              int tmp___0 ;
[L130]              int tmp___1 ;
[L131]              int tmp___2 ;
[L132]              int tmp___3 ;
[L136]  COND TRUE   1
[L138]  COND TRUE   (int )N_generate_st == 0
[L159]  COND TRUE   (int )N_generate_st == 0
[L161]              tmp = __VERIFIER_nondet_int()
[L163]  COND FALSE  !(\read(tmp))
[L174]  COND TRUE   (int )S1_addsub_st == 0
[L176]              tmp___0 = __VERIFIER_nondet_int()
[L178]  COND FALSE  !(\read(tmp___0))
[L189]  COND TRUE   (int )S2_presdbl_st == 0
[L191]              tmp___1 = __VERIFIER_nondet_int()
[L193]  COND FALSE  !(\read(tmp___1))
[L204]  COND TRUE   (int )S3_zero_st == 0
[L206]              tmp___2 = __VERIFIER_nondet_int()
[L208]  COND FALSE  !(\read(tmp___2))
[L219]  COND TRUE   (int )D_print_st == 0
[L221]              tmp___3 = __VERIFIER_nondet_int()
[L223]  COND TRUE   \read(tmp___3)
[L225]              D_print_st = 1
[L226]  CALL        D_print()
[L122]              D_z = main_zero_val
[L226]  RET         D_print()
[L136]  COND TRUE   1
[L138]  COND FALSE  !((int )N_generate_st == 0)
[L141]  COND FALSE  !((int )S1_addsub_st == 0)
[L144]  COND FALSE  !((int )S2_presdbl_st == 0)
[L147]  COND FALSE  !((int )S3_zero_st == 0)
[L150]  COND FALSE  !((int )D_print_st == 0)
[L496]  RET         eval()
[L498]              kernel_st = 2
[L499]  COND FALSE  !((int )main_in1_req_up == 1)
[L510]  COND FALSE  !((int )main_in2_req_up == 1)
[L521]  COND FALSE  !((int )main_sum_req_up == 1)
[L532]  COND FALSE  !((int )main_diff_req_up == 1)
[L543]  COND FALSE  !((int )main_pres_req_up == 1)
[L554]  COND FALSE  !((int )main_dbl_req_up == 1)
[L565]  COND FALSE  !((int )main_zero_req_up == 1)
[L576]  COND FALSE  !((int )main_clk_req_up == 1)
[L594]              kernel_st = 3
[L595]  COND FALSE  !((int )main_in1_ev == 0)
[L600]  COND FALSE  !((int )main_in2_ev == 0)
[L605]  COND FALSE  !((int )main_sum_ev == 0)
[L610]  COND FALSE  !((int )main_diff_ev == 0)
[L615]  COND FALSE  !((int )main_pres_ev == 0)
[L620]  COND FALSE  !((int )main_dbl_ev == 0)
[L625]  COND FALSE  !((int )main_zero_ev == 0)
[L630]  COND FALSE  !((int )main_clk_ev == 0)
[L635]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L640]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L645]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L650]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L655]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L660]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L665]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L670]  COND FALSE  !((int )main_in1_ev == 1)
[L675]  COND FALSE  !((int )main_in2_ev == 1)
[L680]  COND FALSE  !((int )main_sum_ev == 1)
[L685]  COND FALSE  !((int )main_diff_ev == 1)
[L690]  COND FALSE  !((int )main_pres_ev == 1)
[L695]  COND FALSE  !((int )main_dbl_ev == 1)
[L700]  COND FALSE  !((int )main_zero_ev == 1)
[L705]  COND FALSE  !((int )main_clk_ev == 1)
[L710]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L715]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L720]  COND FALSE  !((int )N_generate_st == 0)
[L723]  COND FALSE  !((int )S1_addsub_st == 0)
[L726]  COND FALSE  !((int )S2_presdbl_st == 0)
[L729]  COND FALSE  !((int )S3_zero_st == 0)
[L732]  COND FALSE  !((int )D_print_st == 0)
[L790]  RET         start_simulation()
[L791]              count += 1
[L793]  COND FALSE  !(count == 5)
[L806]              main_clk_val_t = 0
[L807]              main_clk_req_up = 1
[L808]  CALL        start_simulation()
[L242]              int kernel_st ;
[L245]              kernel_st = 0
[L246]  COND FALSE  !((int )main_in1_req_up == 1)
[L257]  COND FALSE  !((int )main_in2_req_up == 1)
[L268]  COND FALSE  !((int )main_sum_req_up == 1)
[L279]  COND FALSE  !((int )main_diff_req_up == 1)
[L290]  COND FALSE  !((int )main_pres_req_up == 1)
[L301]  COND FALSE  !((int )main_dbl_req_up == 1)
[L312]  COND FALSE  !((int )main_zero_req_up == 1)
[L323]  COND TRUE   (int )main_clk_req_up == 1
[L324]  COND TRUE   (int )main_clk_val != (int )main_clk_val_t
[L325]              main_clk_val = main_clk_val_t
[L326]              main_clk_ev = 0
[L327]  COND FALSE  !((int )main_clk_val == 1)
[L331]              main_clk_neg_edge = 0
[L332]              main_clk_pos_edge = 2
[L337]              main_clk_req_up = 0
[L341]  COND FALSE  !((int )N_generate_i == 1)
[L344]              N_generate_st = 2
[L346]  COND FALSE  !((int )S1_addsub_i == 1)
[L349]              S1_addsub_st = 2
[L351]  COND FALSE  !((int )S2_presdbl_i == 1)
[L354]              S2_presdbl_st = 2
[L356]  COND FALSE  !((int )S3_zero_i == 1)
[L359]              S3_zero_st = 2
[L361]  COND FALSE  !((int )D_print_i == 1)
[L364]              D_print_st = 2
[L366]  COND FALSE  !((int )main_in1_ev == 0)
[L371]  COND FALSE  !((int )main_in2_ev == 0)
[L376]  COND FALSE  !((int )main_sum_ev == 0)
[L381]  COND FALSE  !((int )main_diff_ev == 0)
[L386]  COND FALSE  !((int )main_pres_ev == 0)
[L391]  COND FALSE  !((int )main_dbl_ev == 0)
[L396]  COND FALSE  !((int )main_zero_ev == 0)
[L401]  COND TRUE   (int )main_clk_ev == 0
[L402]              main_clk_ev = 1
[L406]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L411]  COND TRUE   (int )main_clk_neg_edge == 0
[L412]              main_clk_neg_edge = 1
[L416]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L421]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L426]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L431]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L436]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L441]  COND FALSE  !((int )main_in1_ev == 1)
[L446]  COND FALSE  !((int )main_in2_ev == 1)
[L451]  COND FALSE  !((int )main_sum_ev == 1)
[L456]  COND FALSE  !((int )main_diff_ev == 1)
[L461]  COND FALSE  !((int )main_pres_ev == 1)
[L466]  COND FALSE  !((int )main_dbl_ev == 1)
[L471]  COND FALSE  !((int )main_zero_ev == 1)
[L476]  COND TRUE   (int )main_clk_ev == 1
[L477]              main_clk_ev = 2
[L481]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L486]  COND TRUE   (int )main_clk_neg_edge == 1
[L487]              main_clk_neg_edge = 2
[L492]  COND TRUE   1
[L495]              kernel_st = 1
[L496]  CALL        eval()
[L128]              int tmp ;
[L129]              int tmp___0 ;
[L130]              int tmp___1 ;
[L131]              int tmp___2 ;
[L132]              int tmp___3 ;
[L136]  COND TRUE   1
[L138]  COND FALSE  !((int )N_generate_st == 0)
[L141]  COND FALSE  !((int )S1_addsub_st == 0)
[L144]  COND FALSE  !((int )S2_presdbl_st == 0)
[L147]  COND FALSE  !((int )S3_zero_st == 0)
[L150]  COND FALSE  !((int )D_print_st == 0)
[L496]  RET         eval()
[L498]              kernel_st = 2
[L499]  COND FALSE  !((int )main_in1_req_up == 1)
[L510]  COND FALSE  !((int )main_in2_req_up == 1)
[L521]  COND FALSE  !((int )main_sum_req_up == 1)
[L532]  COND FALSE  !((int )main_diff_req_up == 1)
[L543]  COND FALSE  !((int )main_pres_req_up == 1)
[L554]  COND FALSE  !((int )main_dbl_req_up == 1)
[L565]  COND FALSE  !((int )main_zero_req_up == 1)
[L576]  COND FALSE  !((int )main_clk_req_up == 1)
[L594]              kernel_st = 3
[L595]  COND FALSE  !((int )main_in1_ev == 0)
[L600]  COND FALSE  !((int )main_in2_ev == 0)
[L605]  COND FALSE  !((int )main_sum_ev == 0)
[L610]  COND FALSE  !((int )main_diff_ev == 0)
[L615]  COND FALSE  !((int )main_pres_ev == 0)
[L620]  COND FALSE  !((int )main_dbl_ev == 0)
[L625]  COND FALSE  !((int )main_zero_ev == 0)
[L630]  COND FALSE  !((int )main_clk_ev == 0)
[L635]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L640]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L645]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L650]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L655]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L660]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L665]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L670]  COND FALSE  !((int )main_in1_ev == 1)
[L675]  COND FALSE  !((int )main_in2_ev == 1)
[L680]  COND FALSE  !((int )main_sum_ev == 1)
[L685]  COND FALSE  !((int )main_diff_ev == 1)
[L690]  COND FALSE  !((int )main_pres_ev == 1)
[L695]  COND FALSE  !((int )main_dbl_ev == 1)
[L700]  COND FALSE  !((int )main_zero_ev == 1)
[L705]  COND FALSE  !((int )main_clk_ev == 1)
[L710]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L715]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L720]  COND FALSE  !((int )N_generate_st == 0)
[L723]  COND FALSE  !((int )S1_addsub_st == 0)
[L726]  COND FALSE  !((int )S2_presdbl_st == 0)
[L729]  COND FALSE  !((int )S3_zero_st == 0)
[L732]  COND FALSE  !((int )D_print_st == 0)
[L808]  RET         start_simulation()
[L785]  COND TRUE   1
[L788]              main_clk_val_t = 1
[L789]              main_clk_req_up = 1
[L790]  CALL        start_simulation()
[L242]              int kernel_st ;
[L245]              kernel_st = 0
[L246]  COND FALSE  !((int )main_in1_req_up == 1)
[L257]  COND FALSE  !((int )main_in2_req_up == 1)
[L268]  COND FALSE  !((int )main_sum_req_up == 1)
[L279]  COND FALSE  !((int )main_diff_req_up == 1)
[L290]  COND FALSE  !((int )main_pres_req_up == 1)
[L301]  COND TRUE   (int )main_dbl_req_up == 1
[L302]  COND TRUE   main_dbl_val != main_dbl_val_t
[L303]              main_dbl_val = main_dbl_val_t
[L304]              main_dbl_ev = 0
[L308]              main_dbl_req_up = 0
[L312]  COND FALSE  !((int )main_zero_req_up == 1)
[L323]  COND TRUE   (int )main_clk_req_up == 1
[L324]  COND TRUE   (int )main_clk_val != (int )main_clk_val_t
[L325]              main_clk_val = main_clk_val_t
[L326]              main_clk_ev = 0
[L327]  COND TRUE   (int )main_clk_val == 1
[L328]              main_clk_pos_edge = 0
[L329]              main_clk_neg_edge = 2
[L337]              main_clk_req_up = 0
[L341]  COND FALSE  !((int )N_generate_i == 1)
[L344]              N_generate_st = 2
[L346]  COND FALSE  !((int )S1_addsub_i == 1)
[L349]              S1_addsub_st = 2
[L351]  COND FALSE  !((int )S2_presdbl_i == 1)
[L354]              S2_presdbl_st = 2
[L356]  COND FALSE  !((int )S3_zero_i == 1)
[L359]              S3_zero_st = 2
[L361]  COND FALSE  !((int )D_print_i == 1)
[L364]              D_print_st = 2
[L366]  COND FALSE  !((int )main_in1_ev == 0)
[L371]  COND FALSE  !((int )main_in2_ev == 0)
[L376]  COND FALSE  !((int )main_sum_ev == 0)
[L381]  COND TRUE   (int )main_diff_ev == 0
[L382]              main_diff_ev = 1
[L386]  COND TRUE   (int )main_pres_ev == 0
[L387]              main_pres_ev = 1
[L391]  COND TRUE   (int )main_dbl_ev == 0
[L392]              main_dbl_ev = 1
[L396]  COND FALSE  !((int )main_zero_ev == 0)
[L401]  COND TRUE   (int )main_clk_ev == 0
[L402]              main_clk_ev = 1
[L406]  COND TRUE   (int )main_clk_pos_edge == 0
[L407]              main_clk_pos_edge = 1
[L411]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L416]  COND TRUE   (int )main_clk_pos_edge == 1
[L417]              N_generate_st = 0
[L421]  COND TRUE   (int )main_clk_pos_edge == 1
[L422]              S1_addsub_st = 0
[L426]  COND TRUE   (int )main_clk_pos_edge == 1
[L427]              S2_presdbl_st = 0
[L431]  COND TRUE   (int )main_clk_pos_edge == 1
[L432]              S3_zero_st = 0
[L436]  COND TRUE   (int )main_clk_pos_edge == 1
[L437]              D_print_st = 0
[L441]  COND FALSE  !((int )main_in1_ev == 1)
[L446]  COND FALSE  !((int )main_in2_ev == 1)
[L451]  COND FALSE  !((int )main_sum_ev == 1)
[L456]  COND TRUE   (int )main_diff_ev == 1
[L457]              main_diff_ev = 2
[L461]  COND TRUE   (int )main_pres_ev == 1
[L462]              main_pres_ev = 2
[L466]  COND TRUE   (int )main_dbl_ev == 1
[L467]              main_dbl_ev = 2
[L471]  COND FALSE  !((int )main_zero_ev == 1)
[L476]  COND TRUE   (int )main_clk_ev == 1
[L477]              main_clk_ev = 2
[L481]  COND TRUE   (int )main_clk_pos_edge == 1
[L482]              main_clk_pos_edge = 2
[L486]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L492]  COND TRUE   1
[L495]              kernel_st = 1
[L496]  CALL        eval()
[L128]              int tmp ;
[L129]              int tmp___0 ;
[L130]              int tmp___1 ;
[L131]              int tmp___2 ;
[L132]              int tmp___3 ;
[L136]  COND TRUE   1
[L138]  COND TRUE   (int )N_generate_st == 0
[L159]  COND TRUE   (int )N_generate_st == 0
[L161]              tmp = __VERIFIER_nondet_int()
[L163]  COND FALSE  !(\read(tmp))
[L174]  COND TRUE   (int )S1_addsub_st == 0
[L176]              tmp___0 = __VERIFIER_nondet_int()
[L178]  COND FALSE  !(\read(tmp___0))
[L189]  COND TRUE   (int )S2_presdbl_st == 0
[L191]              tmp___1 = __VERIFIER_nondet_int()
[L193]  COND FALSE  !(\read(tmp___1))
[L204]  COND TRUE   (int )S3_zero_st == 0
[L206]              tmp___2 = __VERIFIER_nondet_int()
[L208]  COND FALSE  !(\read(tmp___2))
[L219]  COND TRUE   (int )D_print_st == 0
[L221]              tmp___3 = __VERIFIER_nondet_int()
[L223]  COND TRUE   \read(tmp___3)
[L225]              D_print_st = 1
[L226]  CALL        D_print()
[L122]              D_z = main_zero_val
[L226]  RET         D_print()
[L136]  COND TRUE   1
[L138]  COND FALSE  !((int )N_generate_st == 0)
[L141]  COND FALSE  !((int )S1_addsub_st == 0)
[L144]  COND FALSE  !((int )S2_presdbl_st == 0)
[L147]  COND FALSE  !((int )S3_zero_st == 0)
[L150]  COND FALSE  !((int )D_print_st == 0)
[L496]  RET         eval()
[L498]              kernel_st = 2
[L499]  COND FALSE  !((int )main_in1_req_up == 1)
[L510]  COND FALSE  !((int )main_in2_req_up == 1)
[L521]  COND FALSE  !((int )main_sum_req_up == 1)
[L532]  COND FALSE  !((int )main_diff_req_up == 1)
[L543]  COND FALSE  !((int )main_pres_req_up == 1)
[L554]  COND FALSE  !((int )main_dbl_req_up == 1)
[L565]  COND FALSE  !((int )main_zero_req_up == 1)
[L576]  COND FALSE  !((int )main_clk_req_up == 1)
[L594]              kernel_st = 3
[L595]  COND TRUE   (int )main_in1_ev == 0
[L596]              main_in1_ev = 1
[L600]  COND TRUE   (int )main_in2_ev == 0
[L601]              main_in2_ev = 1
[L605]  COND TRUE   (int )main_sum_ev == 0
[L606]              main_sum_ev = 1
[L610]  COND TRUE   (int )main_diff_ev == 0
[L611]              main_diff_ev = 1
[L615]  COND TRUE   (int )main_pres_ev == 0
[L616]              main_pres_ev = 1
[L620]  COND FALSE  !((int )main_dbl_ev == 0)
[L625]  COND FALSE  !((int )main_zero_ev == 0)
[L630]  COND FALSE  !((int )main_clk_ev == 0)
[L635]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L640]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L645]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L650]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L655]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L660]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L665]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L670]  COND TRUE   (int )main_in1_ev == 1
[L671]              main_in1_ev = 2
[L675]  COND TRUE   (int )main_in2_ev == 1
[L676]              main_in2_ev = 2
[L680]  COND TRUE   (int )main_sum_ev == 1
[L681]              main_sum_ev = 2
[L685]  COND TRUE   (int )main_diff_ev == 1
[L686]              main_diff_ev = 2
[L690]  COND TRUE   (int )main_pres_ev == 1
[L691]              main_pres_ev = 2
[L695]  COND FALSE  !((int )main_dbl_ev == 1)
[L700]  COND FALSE  !((int )main_zero_ev == 1)
[L705]  COND FALSE  !((int )main_clk_ev == 1)
[L710]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L715]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L720]  COND FALSE  !((int )N_generate_st == 0)
[L723]  COND FALSE  !((int )S1_addsub_st == 0)
[L726]  COND FALSE  !((int )S2_presdbl_st == 0)
[L729]  COND FALSE  !((int )S3_zero_st == 0)
[L732]  COND FALSE  !((int )D_print_st == 0)
[L790]  RET         start_simulation()
[L791]              count += 1
[L793]  COND FALSE  !(count == 5)
[L806]              main_clk_val_t = 0
[L807]              main_clk_req_up = 1
[L808]  CALL        start_simulation()
[L242]              int kernel_st ;
[L245]              kernel_st = 0
[L246]  COND FALSE  !((int )main_in1_req_up == 1)
[L257]  COND FALSE  !((int )main_in2_req_up == 1)
[L268]  COND FALSE  !((int )main_sum_req_up == 1)
[L279]  COND FALSE  !((int )main_diff_req_up == 1)
[L290]  COND FALSE  !((int )main_pres_req_up == 1)
[L301]  COND FALSE  !((int )main_dbl_req_up == 1)
[L312]  COND FALSE  !((int )main_zero_req_up == 1)
[L323]  COND TRUE   (int )main_clk_req_up == 1
[L324]  COND TRUE   (int )main_clk_val != (int )main_clk_val_t
[L325]              main_clk_val = main_clk_val_t
[L326]              main_clk_ev = 0
[L327]  COND FALSE  !((int )main_clk_val == 1)
[L331]              main_clk_neg_edge = 0
[L332]              main_clk_pos_edge = 2
[L337]              main_clk_req_up = 0
[L341]  COND FALSE  !((int )N_generate_i == 1)
[L344]              N_generate_st = 2
[L346]  COND FALSE  !((int )S1_addsub_i == 1)
[L349]              S1_addsub_st = 2
[L351]  COND FALSE  !((int )S2_presdbl_i == 1)
[L354]              S2_presdbl_st = 2
[L356]  COND FALSE  !((int )S3_zero_i == 1)
[L359]              S3_zero_st = 2
[L361]  COND FALSE  !((int )D_print_i == 1)
[L364]              D_print_st = 2
[L366]  COND FALSE  !((int )main_in1_ev == 0)
[L371]  COND FALSE  !((int )main_in2_ev == 0)
[L376]  COND FALSE  !((int )main_sum_ev == 0)
[L381]  COND FALSE  !((int )main_diff_ev == 0)
[L386]  COND FALSE  !((int )main_pres_ev == 0)
[L391]  COND FALSE  !((int )main_dbl_ev == 0)
[L396]  COND FALSE  !((int )main_zero_ev == 0)
[L401]  COND TRUE   (int )main_clk_ev == 0
[L402]              main_clk_ev = 1
[L406]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L411]  COND TRUE   (int )main_clk_neg_edge == 0
[L412]              main_clk_neg_edge = 1
[L416]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L421]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L426]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L431]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L436]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L441]  COND FALSE  !((int )main_in1_ev == 1)
[L446]  COND FALSE  !((int )main_in2_ev == 1)
[L451]  COND FALSE  !((int )main_sum_ev == 1)
[L456]  COND FALSE  !((int )main_diff_ev == 1)
[L461]  COND FALSE  !((int )main_pres_ev == 1)
[L466]  COND FALSE  !((int )main_dbl_ev == 1)
[L471]  COND FALSE  !((int )main_zero_ev == 1)
[L476]  COND TRUE   (int )main_clk_ev == 1
[L477]              main_clk_ev = 2
[L481]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L486]  COND TRUE   (int )main_clk_neg_edge == 1
[L487]              main_clk_neg_edge = 2
[L492]  COND TRUE   1
[L495]              kernel_st = 1
[L496]  CALL        eval()
[L128]              int tmp ;
[L129]              int tmp___0 ;
[L130]              int tmp___1 ;
[L131]              int tmp___2 ;
[L132]              int tmp___3 ;
[L136]  COND TRUE   1
[L138]  COND FALSE  !((int )N_generate_st == 0)
[L141]  COND FALSE  !((int )S1_addsub_st == 0)
[L144]  COND FALSE  !((int )S2_presdbl_st == 0)
[L147]  COND FALSE  !((int )S3_zero_st == 0)
[L150]  COND FALSE  !((int )D_print_st == 0)
[L496]  RET         eval()
[L498]              kernel_st = 2
[L499]  COND FALSE  !((int )main_in1_req_up == 1)
[L510]  COND FALSE  !((int )main_in2_req_up == 1)
[L521]  COND FALSE  !((int )main_sum_req_up == 1)
[L532]  COND FALSE  !((int )main_diff_req_up == 1)
[L543]  COND FALSE  !((int )main_pres_req_up == 1)
[L554]  COND FALSE  !((int )main_dbl_req_up == 1)
[L565]  COND FALSE  !((int )main_zero_req_up == 1)
[L576]  COND FALSE  !((int )main_clk_req_up == 1)
[L594]              kernel_st = 3
[L595]  COND FALSE  !((int )main_in1_ev == 0)
[L600]  COND FALSE  !((int )main_in2_ev == 0)
[L605]  COND FALSE  !((int )main_sum_ev == 0)
[L610]  COND FALSE  !((int )main_diff_ev == 0)
[L615]  COND FALSE  !((int )main_pres_ev == 0)
[L620]  COND FALSE  !((int )main_dbl_ev == 0)
[L625]  COND FALSE  !((int )main_zero_ev == 0)
[L630]  COND FALSE  !((int )main_clk_ev == 0)
[L635]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L640]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L645]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L650]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L655]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L660]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L665]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L670]  COND FALSE  !((int )main_in1_ev == 1)
[L675]  COND FALSE  !((int )main_in2_ev == 1)
[L680]  COND FALSE  !((int )main_sum_ev == 1)
[L685]  COND FALSE  !((int )main_diff_ev == 1)
[L690]  COND FALSE  !((int )main_pres_ev == 1)
[L695]  COND FALSE  !((int )main_dbl_ev == 1)
[L700]  COND FALSE  !((int )main_zero_ev == 1)
[L705]  COND FALSE  !((int )main_clk_ev == 1)
[L710]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L715]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L720]  COND FALSE  !((int )N_generate_st == 0)
[L723]  COND FALSE  !((int )S1_addsub_st == 0)
[L726]  COND FALSE  !((int )S2_presdbl_st == 0)
[L729]  COND FALSE  !((int )S3_zero_st == 0)
[L732]  COND FALSE  !((int )D_print_st == 0)
[L808]  RET         start_simulation()
[L785]  COND TRUE   1
[L788]              main_clk_val_t = 1
[L789]              main_clk_req_up = 1
[L790]  CALL        start_simulation()
[L242]              int kernel_st ;
[L245]              kernel_st = 0
[L246]  COND FALSE  !((int )main_in1_req_up == 1)
[L257]  COND FALSE  !((int )main_in2_req_up == 1)
[L268]  COND FALSE  !((int )main_sum_req_up == 1)
[L279]  COND FALSE  !((int )main_diff_req_up == 1)
[L290]  COND FALSE  !((int )main_pres_req_up == 1)
[L301]  COND FALSE  !((int )main_dbl_req_up == 1)
[L312]  COND TRUE   (int )main_zero_req_up == 1
[L313]  COND TRUE   main_zero_val != main_zero_val_t
[L314]              main_zero_val = main_zero_val_t
[L315]              main_zero_ev = 0
[L319]              main_zero_req_up = 0
[L323]  COND TRUE   (int )main_clk_req_up == 1
[L324]  COND TRUE   (int )main_clk_val != (int )main_clk_val_t
[L325]              main_clk_val = main_clk_val_t
[L326]              main_clk_ev = 0
[L327]  COND TRUE   (int )main_clk_val == 1
[L328]              main_clk_pos_edge = 0
[L329]              main_clk_neg_edge = 2
[L337]              main_clk_req_up = 0
[L341]  COND FALSE  !((int )N_generate_i == 1)
[L344]              N_generate_st = 2
[L346]  COND FALSE  !((int )S1_addsub_i == 1)
[L349]              S1_addsub_st = 2
[L351]  COND FALSE  !((int )S2_presdbl_i == 1)
[L354]              S2_presdbl_st = 2
[L356]  COND FALSE  !((int )S3_zero_i == 1)
[L359]              S3_zero_st = 2
[L361]  COND FALSE  !((int )D_print_i == 1)
[L364]              D_print_st = 2
[L366]  COND FALSE  !((int )main_in1_ev == 0)
[L371]  COND FALSE  !((int )main_in2_ev == 0)
[L376]  COND FALSE  !((int )main_sum_ev == 0)
[L381]  COND FALSE  !((int )main_diff_ev == 0)
[L386]  COND FALSE  !((int )main_pres_ev == 0)
[L391]  COND FALSE  !((int )main_dbl_ev == 0)
[L396]  COND FALSE  !((int )main_zero_ev == 0)
[L401]  COND TRUE   (int )main_clk_ev == 0
[L402]              main_clk_ev = 1
[L406]  COND TRUE   (int )main_clk_pos_edge == 0
[L407]              main_clk_pos_edge = 1
[L411]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L416]  COND TRUE   (int )main_clk_pos_edge == 1
[L417]              N_generate_st = 0
[L421]  COND TRUE   (int )main_clk_pos_edge == 1
[L422]              S1_addsub_st = 0
[L426]  COND TRUE   (int )main_clk_pos_edge == 1
[L427]              S2_presdbl_st = 0
[L431]  COND TRUE   (int )main_clk_pos_edge == 1
[L432]              S3_zero_st = 0
[L436]  COND TRUE   (int )main_clk_pos_edge == 1
[L437]              D_print_st = 0
[L441]  COND FALSE  !((int )main_in1_ev == 1)
[L446]  COND FALSE  !((int )main_in2_ev == 1)
[L451]  COND FALSE  !((int )main_sum_ev == 1)
[L456]  COND FALSE  !((int )main_diff_ev == 1)
[L461]  COND FALSE  !((int )main_pres_ev == 1)
[L466]  COND FALSE  !((int )main_dbl_ev == 1)
[L471]  COND TRUE   (int )main_zero_ev == 1
[L472]              main_zero_ev = 2
[L476]  COND TRUE   (int )main_clk_ev == 1
[L477]              main_clk_ev = 2
[L481]  COND TRUE   (int )main_clk_pos_edge == 1
[L482]              main_clk_pos_edge = 2
[L486]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L492]  COND TRUE   1
[L495]              kernel_st = 1
[L496]  CALL        eval()
[L128]              int tmp ;
[L129]              int tmp___0 ;
[L130]              int tmp___1 ;
[L131]              int tmp___2 ;
[L132]              int tmp___3 ;
[L136]  COND TRUE   1
[L138]  COND TRUE   (int )N_generate_st == 0
[L159]  COND TRUE   (int )N_generate_st == 0
[L161]              tmp = __VERIFIER_nondet_int()
[L163]  COND FALSE  !(\read(tmp))
[L174]  COND TRUE   (int )S1_addsub_st == 0
[L176]              tmp___0 = __VERIFIER_nondet_int()
[L178]  COND FALSE  !(\read(tmp___0))
[L189]  COND TRUE   (int )S2_presdbl_st == 0
[L191]              tmp___1 = __VERIFIER_nondet_int()
[L193]  COND FALSE  !(\read(tmp___1))
[L204]  COND TRUE   (int )S3_zero_st == 0
[L206]              tmp___2 = __VERIFIER_nondet_int()
[L208]  COND FALSE  !(\read(tmp___2))
[L219]  COND TRUE   (int )D_print_st == 0
[L221]              tmp___3 = __VERIFIER_nondet_int()
[L223]  COND TRUE   \read(tmp___3)
[L225]              D_print_st = 1
[L226]  CALL        D_print()
[L122]              D_z = main_zero_val
[L226]  RET         D_print()
[L136]  COND TRUE   1
[L138]  COND FALSE  !((int )N_generate_st == 0)
[L141]  COND FALSE  !((int )S1_addsub_st == 0)
[L144]  COND FALSE  !((int )S2_presdbl_st == 0)
[L147]  COND FALSE  !((int )S3_zero_st == 0)
[L150]  COND FALSE  !((int )D_print_st == 0)
[L496]  RET         eval()
[L498]              kernel_st = 2
[L499]  COND FALSE  !((int )main_in1_req_up == 1)
[L510]  COND FALSE  !((int )main_in2_req_up == 1)
[L521]  COND FALSE  !((int )main_sum_req_up == 1)
[L532]  COND FALSE  !((int )main_diff_req_up == 1)
[L543]  COND FALSE  !((int )main_pres_req_up == 1)
[L554]  COND FALSE  !((int )main_dbl_req_up == 1)
[L565]  COND FALSE  !((int )main_zero_req_up == 1)
[L576]  COND FALSE  !((int )main_clk_req_up == 1)
[L594]              kernel_st = 3
[L595]  COND TRUE   (int )main_in1_ev == 0
[L596]              main_in1_ev = 1
[L600]  COND TRUE   (int )main_in2_ev == 0
[L601]              main_in2_ev = 1
[L605]  COND TRUE   (int )main_sum_ev == 0
[L606]              main_sum_ev = 1
[L610]  COND TRUE   (int )main_diff_ev == 0
[L611]              main_diff_ev = 1
[L615]  COND TRUE   (int )main_pres_ev == 0
[L616]              main_pres_ev = 1
[L620]  COND TRUE   (int )main_dbl_ev == 0
[L621]              main_dbl_ev = 1
[L625]  COND FALSE  !((int )main_zero_ev == 0)
[L630]  COND FALSE  !((int )main_clk_ev == 0)
[L635]  COND FALSE  !((int )main_clk_pos_edge == 0)
[L640]  COND FALSE  !((int )main_clk_neg_edge == 0)
[L645]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L650]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L655]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L660]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L665]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L670]  COND TRUE   (int )main_in1_ev == 1
[L671]              main_in1_ev = 2
[L675]  COND TRUE   (int )main_in2_ev == 1
[L676]              main_in2_ev = 2
[L680]  COND TRUE   (int )main_sum_ev == 1
[L681]              main_sum_ev = 2
[L685]  COND TRUE   (int )main_diff_ev == 1
[L686]              main_diff_ev = 2
[L690]  COND TRUE   (int )main_pres_ev == 1
[L691]              main_pres_ev = 2
[L695]  COND TRUE   (int )main_dbl_ev == 1
[L696]              main_dbl_ev = 2
[L700]  COND TRUE   (int )main_zero_ev == 1
[L701]              main_zero_ev = 2
[L705]  COND FALSE  !((int )main_clk_ev == 1)
[L710]  COND FALSE  !((int )main_clk_pos_edge == 1)
[L715]  COND FALSE  !((int )main_clk_neg_edge == 1)
[L720]  COND FALSE  !((int )N_generate_st == 0)
[L723]  COND FALSE  !((int )S1_addsub_st == 0)
[L726]  COND FALSE  !((int )S2_presdbl_st == 0)
[L729]  COND FALSE  !((int )S3_zero_st == 0)
[L732]  COND FALSE  !((int )D_print_st == 0)
[L790]  RET         start_simulation()
[L791]              count += 1
[L793]  COND TRUE   count == 5
[L794]  COND TRUE   ! (D_z == 0)
[L796]  CALL        error()
[L9]                __VERIFIER_error()

RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces
Received shutdown request...