java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/ldv-validator-v0.8/linux-stable-1b0b0ac-1-108_1a-drivers--net--slip.ko-entry_point_ldv-val-v0.8.cil.out.i -------------------------------------------------------------------------------- This is Ultimate 0.1.24-112bae1 [2019-09-08 17:25:32,928 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-09-08 17:25:32,932 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-09-08 17:25:32,949 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-09-08 17:25:32,949 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-09-08 17:25:32,951 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-09-08 17:25:32,953 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-09-08 17:25:32,966 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-09-08 17:25:32,968 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-09-08 17:25:32,968 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-09-08 17:25:32,972 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-09-08 17:25:32,974 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-09-08 17:25:32,974 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-09-08 17:25:32,977 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-09-08 17:25:32,979 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-09-08 17:25:32,981 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-09-08 17:25:32,981 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-09-08 17:25:32,982 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-09-08 17:25:32,985 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-09-08 17:25:32,991 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-09-08 17:25:32,994 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-09-08 17:25:32,995 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-09-08 17:25:32,996 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-09-08 17:25:32,997 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-09-08 17:25:32,999 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-09-08 17:25:32,999 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-09-08 17:25:32,999 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-09-08 17:25:33,000 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-09-08 17:25:33,000 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-09-08 17:25:33,001 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-09-08 17:25:33,001 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-09-08 17:25:33,002 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-09-08 17:25:33,003 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-09-08 17:25:33,003 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-09-08 17:25:33,004 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-09-08 17:25:33,005 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-09-08 17:25:33,005 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-09-08 17:25:33,005 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-09-08 17:25:33,006 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-09-08 17:25:33,007 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-09-08 17:25:33,007 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-09-08 17:25:33,008 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-09-08 17:25:33,023 INFO L113 SettingsManager]: Loading preferences was successful [2019-09-08 17:25:33,023 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-09-08 17:25:33,025 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-09-08 17:25:33,025 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-09-08 17:25:33,025 INFO L138 SettingsManager]: * Use SBE=true [2019-09-08 17:25:33,025 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-09-08 17:25:33,026 INFO L138 SettingsManager]: * sizeof long=4 [2019-09-08 17:25:33,026 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-09-08 17:25:33,026 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-09-08 17:25:33,026 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-09-08 17:25:33,026 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-09-08 17:25:33,027 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-09-08 17:25:33,027 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-09-08 17:25:33,027 INFO L138 SettingsManager]: * sizeof long double=12 [2019-09-08 17:25:33,027 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-09-08 17:25:33,027 INFO L138 SettingsManager]: * Use constant arrays=true [2019-09-08 17:25:33,028 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-09-08 17:25:33,028 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-09-08 17:25:33,028 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-09-08 17:25:33,028 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-09-08 17:25:33,028 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-09-08 17:25:33,029 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-09-08 17:25:33,029 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-09-08 17:25:33,029 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-09-08 17:25:33,029 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-09-08 17:25:33,030 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-09-08 17:25:33,030 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-09-08 17:25:33,030 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-09-08 17:25:33,030 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-09-08 17:25:33,059 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-09-08 17:25:33,072 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-09-08 17:25:33,076 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-09-08 17:25:33,078 INFO L271 PluginConnector]: Initializing CDTParser... [2019-09-08 17:25:33,078 INFO L275 PluginConnector]: CDTParser initialized [2019-09-08 17:25:33,079 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-validator-v0.8/linux-stable-1b0b0ac-1-108_1a-drivers--net--slip.ko-entry_point_ldv-val-v0.8.cil.out.i [2019-09-08 17:25:33,156 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b684931f/0a47115836a44e6c92f431329648e9cb/FLAGf1dd263ea [2019-09-08 17:25:33,966 INFO L306 CDTParser]: Found 1 translation units. [2019-09-08 17:25:33,967 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ldv-validator-v0.8/linux-stable-1b0b0ac-1-108_1a-drivers--net--slip.ko-entry_point_ldv-val-v0.8.cil.out.i [2019-09-08 17:25:34,013 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b684931f/0a47115836a44e6c92f431329648e9cb/FLAGf1dd263ea [2019-09-08 17:25:34,472 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b684931f/0a47115836a44e6c92f431329648e9cb [2019-09-08 17:25:34,485 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-09-08 17:25:34,487 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-09-08 17:25:34,488 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-09-08 17:25:34,488 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-09-08 17:25:34,492 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-09-08 17:25:34,493 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.09 05:25:34" (1/1) ... [2019-09-08 17:25:34,495 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3df12f57 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:34, skipping insertion in model container [2019-09-08 17:25:34,495 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.09 05:25:34" (1/1) ... [2019-09-08 17:25:34,503 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-09-08 17:25:34,652 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-09-08 17:25:36,346 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-09-08 17:25:36,391 INFO L188 MainTranslator]: Completed pre-run [2019-09-08 17:25:36,828 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-09-08 17:25:37,214 INFO L192 MainTranslator]: Completed translation [2019-09-08 17:25:37,215 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:37 WrapperNode [2019-09-08 17:25:37,216 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-09-08 17:25:37,216 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-09-08 17:25:37,217 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-09-08 17:25:37,217 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-09-08 17:25:37,231 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:37" (1/1) ... [2019-09-08 17:25:37,231 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:37" (1/1) ... [2019-09-08 17:25:37,329 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:37" (1/1) ... [2019-09-08 17:25:37,332 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:37" (1/1) ... [2019-09-08 17:25:37,441 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:37" (1/1) ... [2019-09-08 17:25:37,459 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:37" (1/1) ... [2019-09-08 17:25:37,479 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:37" (1/1) ... [2019-09-08 17:25:37,505 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-09-08 17:25:37,506 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-09-08 17:25:37,506 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-09-08 17:25:37,507 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-09-08 17:25:37,508 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:37" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-09-08 17:25:37,591 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-09-08 17:25:37,592 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-09-08 17:25:37,592 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~X~int~TO~int [2019-09-08 17:25:37,592 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~int~TO~VOID [2019-09-08 17:25:37,593 INFO L138 BoogieDeclarations]: Found implementation of procedure set_bit [2019-09-08 17:25:37,594 INFO L138 BoogieDeclarations]: Found implementation of procedure clear_bit [2019-09-08 17:25:37,594 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_set_bit [2019-09-08 17:25:37,594 INFO L138 BoogieDeclarations]: Found implementation of procedure test_and_clear_bit [2019-09-08 17:25:37,595 INFO L138 BoogieDeclarations]: Found implementation of procedure constant_test_bit [2019-09-08 17:25:37,595 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2019-09-08 17:25:37,595 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2019-09-08 17:25:37,595 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_init_zalloc [2019-09-08 17:25:37,596 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_memset [2019-09-08 17:25:37,596 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int [2019-09-08 17:25:37,597 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_ptr [2019-09-08 17:25:37,597 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_ulong [2019-09-08 17:25:37,599 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_stop [2019-09-08 17:25:37,599 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_undef_int_nonpositive [2019-09-08 17:25:37,599 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv__builtin_expect [2019-09-08 17:25:37,600 INFO L138 BoogieDeclarations]: Found implementation of procedure get_current [2019-09-08 17:25:37,600 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2019-09-08 17:25:37,600 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock [2019-09-08 17:25:37,600 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_lock_bh [2019-09-08 17:25:37,600 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock [2019-09-08 17:25:37,600 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_bh [2019-09-08 17:25:37,601 INFO L138 BoogieDeclarations]: Found implementation of procedure __kmalloc [2019-09-08 17:25:37,601 INFO L138 BoogieDeclarations]: Found implementation of procedure kmalloc [2019-09-08 17:25:37,601 INFO L138 BoogieDeclarations]: Found implementation of procedure kzalloc [2019-09-08 17:25:37,601 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2019-09-08 17:25:37,602 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2019-09-08 17:25:37,602 INFO L138 BoogieDeclarations]: Found implementation of procedure compat_ptr [2019-09-08 17:25:37,602 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2019-09-08 17:25:37,602 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_priv [2019-09-08 17:25:37,603 INFO L138 BoogieDeclarations]: Found implementation of procedure unregister_netdevice [2019-09-08 17:25:37,603 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_start_queue [2019-09-08 17:25:37,603 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_start_queue [2019-09-08 17:25:37,603 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_wake_queue [2019-09-08 17:25:37,603 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2019-09-08 17:25:37,603 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_stop_queue [2019-09-08 17:25:37,604 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2019-09-08 17:25:37,604 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_tx_queue_stopped [2019-09-08 17:25:37,604 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_queue_stopped [2019-09-08 17:25:37,604 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_running [2019-09-08 17:25:37,604 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_alloc_bufs [2019-09-08 17:25:37,604 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_free_bufs [2019-09-08 17:25:37,604 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_realloc_bufs [2019-09-08 17:25:37,605 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_lock [2019-09-08 17:25:37,605 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_unlock [2019-09-08 17:25:37,605 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_bump [2019-09-08 17:25:37,605 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_encaps [2019-09-08 17:25:37,605 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_write_wakeup [2019-09-08 17:25:37,605 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_tx_timeout [2019-09-08 17:25:37,605 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_xmit [2019-09-08 17:25:37,606 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_close [2019-09-08 17:25:37,606 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_open [2019-09-08 17:25:37,606 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_change_mtu [2019-09-08 17:25:37,606 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_get_stats64 [2019-09-08 17:25:37,606 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_init [2019-09-08 17:25:37,606 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_uninit [2019-09-08 17:25:37,607 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_free_netdev [2019-09-08 17:25:37,607 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_setup [2019-09-08 17:25:37,607 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_receive_buf [2019-09-08 17:25:37,608 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_sync [2019-09-08 17:25:37,608 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_alloc [2019-09-08 17:25:37,608 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_open [2019-09-08 17:25:37,608 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_close [2019-09-08 17:25:37,608 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_hangup [2019-09-08 17:25:37,608 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_esc [2019-09-08 17:25:37,609 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_unesc [2019-09-08 17:25:37,609 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_esc6 [2019-09-08 17:25:37,609 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_unesc6 [2019-09-08 17:25:37,610 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_ioctl [2019-09-08 17:25:37,610 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_compat_ioctl [2019-09-08 17:25:37,610 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_ioctl [2019-09-08 17:25:37,611 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_init [2019-09-08 17:25:37,611 INFO L138 BoogieDeclarations]: Found implementation of procedure slip_exit [2019-09-08 17:25:37,611 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_outfill [2019-09-08 17:25:37,611 INFO L138 BoogieDeclarations]: Found implementation of procedure sl_keepalive [2019-09-08 17:25:37,612 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_target_type_3 [2019-09-08 17:25:37,612 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_net_device_ops_4 [2019-09-08 17:25:37,612 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_pending_timer_1 [2019-09-08 17:25:37,612 INFO L138 BoogieDeclarations]: Found implementation of procedure choose_timer_1 [2019-09-08 17:25:37,613 INFO L138 BoogieDeclarations]: Found implementation of procedure reg_timer_1 [2019-09-08 17:25:37,613 INFO L138 BoogieDeclarations]: Found implementation of procedure choose_timer_2 [2019-09-08 17:25:37,613 INFO L138 BoogieDeclarations]: Found implementation of procedure reg_timer_2 [2019-09-08 17:25:37,613 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_pending_timer_2 [2019-09-08 17:25:37,614 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_suitable_timer_2 [2019-09-08 17:25:37,615 INFO L138 BoogieDeclarations]: Found implementation of procedure disable_suitable_timer_1 [2019-09-08 17:25:37,615 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-09-08 17:25:37,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_sync_1 [2019-09-08 17:25:37,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_2 [2019-09-08 17:25:37,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_sl_alloc_bufs_3 [2019-09-08 17:25:37,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_register_netdevice_4 [2019-09-08 17:25:37,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_sync_5 [2019-09-08 17:25:37,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_sync_6 [2019-09-08 17:25:37,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_7 [2019-09-08 17:25:37,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_8 [2019-09-08 17:25:37,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_9 [2019-09-08 17:25:37,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_10 [2019-09-08 17:25:37,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_11 [2019-09-08 17:25:37,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_12 [2019-09-08 17:25:37,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_13 [2019-09-08 17:25:37,619 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_14 [2019-09-08 17:25:37,619 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_15 [2019-09-08 17:25:37,619 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_del_timer_16 [2019-09-08 17:25:37,619 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_mod_timer_17 [2019-09-08 17:25:37,619 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_slip_open_18 [2019-09-08 17:25:37,619 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_error [2019-09-08 17:25:37,619 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_callback_ret_val [2019-09-08 17:25:37,620 INFO L138 BoogieDeclarations]: Found implementation of procedure __netif_schedule [2019-09-08 17:25:37,620 INFO L138 BoogieDeclarations]: Found implementation of procedure __raw_spin_lock_init [2019-09-08 17:25:37,620 INFO L138 BoogieDeclarations]: Found implementation of procedure _copy_to_user [2019-09-08 17:25:37,620 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock [2019-09-08 17:25:37,620 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_bh [2019-09-08 17:25:37,620 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_unlock [2019-09-08 17:25:37,620 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_unlock_bh [2019-09-08 17:25:37,621 INFO L138 BoogieDeclarations]: Found implementation of procedure add_timer [2019-09-08 17:25:37,621 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_netdev_mqs [2019-09-08 17:25:37,621 INFO L138 BoogieDeclarations]: Found implementation of procedure capable [2019-09-08 17:25:37,622 INFO L138 BoogieDeclarations]: Found implementation of procedure consume_skb [2019-09-08 17:25:37,623 INFO L138 BoogieDeclarations]: Found implementation of procedure del_timer [2019-09-08 17:25:37,623 INFO L138 BoogieDeclarations]: Found implementation of procedure del_timer_sync [2019-09-08 17:25:37,623 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_alloc_skb [2019-09-08 17:25:37,623 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_close [2019-09-08 17:25:37,625 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_trans_start [2019-09-08 17:25:37,625 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2019-09-08 17:25:37,625 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_final_state [2019-09-08 17:25:37,625 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_initialize [2019-09-08 17:25:37,625 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2019-09-08 17:25:37,625 INFO L138 BoogieDeclarations]: Found implementation of procedure mod_timer [2019-09-08 17:25:37,626 INFO L138 BoogieDeclarations]: Found implementation of procedure msleep_interruptible [2019-09-08 17:25:37,627 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2019-09-08 17:25:37,627 INFO L138 BoogieDeclarations]: Found implementation of procedure netpoll_trap [2019-09-08 17:25:37,627 INFO L138 BoogieDeclarations]: Found implementation of procedure printk [2019-09-08 17:25:37,627 INFO L138 BoogieDeclarations]: Found implementation of procedure register_netdevice [2019-09-08 17:25:37,627 INFO L138 BoogieDeclarations]: Found implementation of procedure rtnl_lock [2019-09-08 17:25:37,627 INFO L138 BoogieDeclarations]: Found implementation of procedure rtnl_unlock [2019-09-08 17:25:37,627 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2019-09-08 17:25:37,629 INFO L138 BoogieDeclarations]: Found implementation of procedure slhc_compress [2019-09-08 17:25:37,630 INFO L138 BoogieDeclarations]: Found implementation of procedure slhc_free [2019-09-08 17:25:37,633 INFO L138 BoogieDeclarations]: Found implementation of procedure slhc_init [2019-09-08 17:25:37,634 INFO L138 BoogieDeclarations]: Found implementation of procedure slhc_remember [2019-09-08 17:25:37,637 INFO L138 BoogieDeclarations]: Found implementation of procedure slhc_uncompress [2019-09-08 17:25:37,638 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_chars_in_buffer [2019-09-08 17:25:37,643 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_devnum [2019-09-08 17:25:37,644 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_hangup [2019-09-08 17:25:37,644 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_mode_ioctl [2019-09-08 17:25:37,644 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_register_ldisc [2019-09-08 17:25:37,644 INFO L138 BoogieDeclarations]: Found implementation of procedure tty_unregister_ldisc [2019-09-08 17:25:37,644 INFO L138 BoogieDeclarations]: Found implementation of procedure unregister_netdev [2019-09-08 17:25:37,644 INFO L138 BoogieDeclarations]: Found implementation of procedure unregister_netdevice_queue [2019-09-08 17:25:37,645 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2019-09-08 17:25:37,645 INFO L138 BoogieDeclarations]: Found implementation of procedure external_alloc [2019-09-08 17:25:37,645 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2019-09-08 17:25:37,645 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2019-09-08 17:25:37,645 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2019-09-08 17:25:37,645 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2019-09-08 17:25:37,645 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-09-08 17:25:37,646 INFO L130 BoogieDeclarations]: Found specification of procedure ldv__builtin_expect [2019-09-08 17:25:37,646 INFO L130 BoogieDeclarations]: Found specification of procedure set_bit [2019-09-08 17:25:37,646 INFO L130 BoogieDeclarations]: Found specification of procedure clear_bit [2019-09-08 17:25:37,646 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_set_bit [2019-09-08 17:25:37,646 INFO L130 BoogieDeclarations]: Found specification of procedure test_and_clear_bit [2019-09-08 17:25:37,646 INFO L130 BoogieDeclarations]: Found specification of procedure constant_test_bit [2019-09-08 17:25:37,646 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-09-08 17:25:37,646 INFO L130 BoogieDeclarations]: Found specification of procedure printk [2019-09-08 17:25:37,647 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2019-09-08 17:25:37,647 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2019-09-08 17:25:37,647 INFO L130 BoogieDeclarations]: Found specification of procedure sprintf [2019-09-08 17:25:37,647 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2019-09-08 17:25:37,647 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2019-09-08 17:25:37,647 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2019-09-08 17:25:37,647 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-09-08 17:25:37,647 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2019-09-08 17:25:37,648 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2019-09-08 17:25:37,648 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2019-09-08 17:25:37,648 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2019-09-08 17:25:37,648 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2019-09-08 17:25:37,648 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2019-09-08 17:25:37,648 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2019-09-08 17:25:37,648 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_init_zalloc [2019-09-08 17:25:37,648 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_memset [2019-09-08 17:25:37,648 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2019-09-08 17:25:37,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int [2019-09-08 17:25:37,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_ptr [2019-09-08 17:25:37,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_ulong [2019-09-08 17:25:37,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_stop [2019-09-08 17:25:37,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_undef_int_nonpositive [2019-09-08 17:25:37,649 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_callback_ret_val [2019-09-08 17:25:37,649 INFO L130 BoogieDeclarations]: Found specification of procedure __bad_percpu_size [2019-09-08 17:25:37,649 INFO L130 BoogieDeclarations]: Found specification of procedure get_current [2019-09-08 17:25:37,650 INFO L130 BoogieDeclarations]: Found specification of procedure __xchg_wrong_size [2019-09-08 17:25:37,650 INFO L130 BoogieDeclarations]: Found specification of procedure strlen [2019-09-08 17:25:37,650 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2019-09-08 17:25:37,650 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock [2019-09-08 17:25:37,650 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_bh [2019-09-08 17:25:37,650 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock [2019-09-08 17:25:37,650 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_unlock_bh [2019-09-08 17:25:37,650 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2019-09-08 17:25:37,651 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock [2019-09-08 17:25:37,651 INFO L130 BoogieDeclarations]: Found specification of procedure spin_lock_bh [2019-09-08 17:25:37,651 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock [2019-09-08 17:25:37,651 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_bh [2019-09-08 17:25:37,651 INFO L130 BoogieDeclarations]: Found specification of procedure msleep_interruptible [2019-09-08 17:25:37,651 INFO L130 BoogieDeclarations]: Found specification of procedure del_timer [2019-09-08 17:25:37,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_2 [2019-09-08 17:25:37,651 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_8 [2019-09-08 17:25:37,652 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_10 [2019-09-08 17:25:37,652 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_12 [2019-09-08 17:25:37,652 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_14 [2019-09-08 17:25:37,652 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_16 [2019-09-08 17:25:37,652 INFO L130 BoogieDeclarations]: Found specification of procedure mod_timer [2019-09-08 17:25:37,652 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_7 [2019-09-08 17:25:37,652 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_9 [2019-09-08 17:25:37,652 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_11 [2019-09-08 17:25:37,653 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_13 [2019-09-08 17:25:37,653 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_15 [2019-09-08 17:25:37,653 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_mod_timer_17 [2019-09-08 17:25:37,653 INFO L130 BoogieDeclarations]: Found specification of procedure add_timer [2019-09-08 17:25:37,653 INFO L130 BoogieDeclarations]: Found specification of procedure del_timer_sync [2019-09-08 17:25:37,653 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_sync_1 [2019-09-08 17:25:37,653 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_sync_5 [2019-09-08 17:25:37,653 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_del_timer_sync_6 [2019-09-08 17:25:37,654 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2019-09-08 17:25:37,654 INFO L130 BoogieDeclarations]: Found specification of procedure __kmalloc [2019-09-08 17:25:37,654 INFO L130 BoogieDeclarations]: Found specification of procedure kmalloc [2019-09-08 17:25:37,654 INFO L130 BoogieDeclarations]: Found specification of procedure kzalloc [2019-09-08 17:25:37,654 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_target_type_3 [2019-09-08 17:25:37,654 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_net_device_ops_4 [2019-09-08 17:25:37,654 INFO L130 BoogieDeclarations]: Found specification of procedure activate_pending_timer_1 [2019-09-08 17:25:37,654 INFO L130 BoogieDeclarations]: Found specification of procedure choose_timer_1 [2019-09-08 17:25:37,655 INFO L130 BoogieDeclarations]: Found specification of procedure reg_timer_1 [2019-09-08 17:25:37,655 INFO L130 BoogieDeclarations]: Found specification of procedure choose_timer_2 [2019-09-08 17:25:37,655 INFO L130 BoogieDeclarations]: Found specification of procedure reg_timer_2 [2019-09-08 17:25:37,655 INFO L130 BoogieDeclarations]: Found specification of procedure activate_pending_timer_2 [2019-09-08 17:25:37,655 INFO L130 BoogieDeclarations]: Found specification of procedure disable_suitable_timer_2 [2019-09-08 17:25:37,655 INFO L130 BoogieDeclarations]: Found specification of procedure disable_suitable_timer_1 [2019-09-08 17:25:37,655 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_to_user [2019-09-08 17:25:37,655 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2019-09-08 17:25:37,656 INFO L130 BoogieDeclarations]: Found specification of procedure capable [2019-09-08 17:25:37,656 INFO L130 BoogieDeclarations]: Found specification of procedure tty_chars_in_buffer [2019-09-08 17:25:37,656 INFO L130 BoogieDeclarations]: Found specification of procedure tty_hangup [2019-09-08 17:25:37,656 INFO L130 BoogieDeclarations]: Found specification of procedure tty_mode_ioctl [2019-09-08 17:25:37,656 INFO L130 BoogieDeclarations]: Found specification of procedure tty_devnum [2019-09-08 17:25:37,656 INFO L130 BoogieDeclarations]: Found specification of procedure tty_register_ldisc [2019-09-08 17:25:37,656 INFO L130 BoogieDeclarations]: Found specification of procedure tty_unregister_ldisc [2019-09-08 17:25:37,656 INFO L130 BoogieDeclarations]: Found specification of procedure consume_skb [2019-09-08 17:25:37,657 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2019-09-08 17:25:37,657 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2019-09-08 17:25:37,657 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2019-09-08 17:25:37,657 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-09-08 17:25:37,657 INFO L130 BoogieDeclarations]: Found specification of procedure dev_alloc_skb [2019-09-08 17:25:37,657 INFO L130 BoogieDeclarations]: Found specification of procedure compat_ptr [2019-09-08 17:25:37,657 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2019-09-08 17:25:37,657 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_priv [2019-09-08 17:25:37,658 INFO L130 BoogieDeclarations]: Found specification of procedure dev_close [2019-09-08 17:25:37,658 INFO L130 BoogieDeclarations]: Found specification of procedure register_netdevice [2019-09-08 17:25:37,658 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_register_netdevice_4 [2019-09-08 17:25:37,658 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_netdevice_queue [2019-09-08 17:25:37,658 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_netdevice [2019-09-08 17:25:37,658 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2019-09-08 17:25:37,658 INFO L130 BoogieDeclarations]: Found specification of procedure netpoll_trap [2019-09-08 17:25:37,658 INFO L130 BoogieDeclarations]: Found specification of procedure __netif_schedule [2019-09-08 17:25:37,659 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_start_queue [2019-09-08 17:25:37,659 INFO L130 BoogieDeclarations]: Found specification of procedure netif_start_queue [2019-09-08 17:25:37,659 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_wake_queue [2019-09-08 17:25:37,660 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2019-09-08 17:25:37,664 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_stop_queue [2019-09-08 17:25:37,664 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-09-08 17:25:37,664 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2019-09-08 17:25:37,664 INFO L130 BoogieDeclarations]: Found specification of procedure netif_tx_queue_stopped [2019-09-08 17:25:37,664 INFO L130 BoogieDeclarations]: Found specification of procedure netif_queue_stopped [2019-09-08 17:25:37,668 INFO L130 BoogieDeclarations]: Found specification of procedure netif_running [2019-09-08 17:25:37,668 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2019-09-08 17:25:37,668 INFO L130 BoogieDeclarations]: Found specification of procedure dev_trans_start [2019-09-08 17:25:37,668 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_netdev_mqs [2019-09-08 17:25:37,668 INFO L130 BoogieDeclarations]: Found specification of procedure unregister_netdev [2019-09-08 17:25:37,668 INFO L130 BoogieDeclarations]: Found specification of procedure rtnl_lock [2019-09-08 17:25:37,668 INFO L130 BoogieDeclarations]: Found specification of procedure rtnl_unlock [2019-09-08 17:25:37,669 INFO L130 BoogieDeclarations]: Found specification of procedure slhc_init [2019-09-08 17:25:37,669 INFO L130 BoogieDeclarations]: Found specification of procedure slhc_free [2019-09-08 17:25:37,669 INFO L130 BoogieDeclarations]: Found specification of procedure slhc_compress [2019-09-08 17:25:37,669 INFO L130 BoogieDeclarations]: Found specification of procedure slhc_uncompress [2019-09-08 17:25:37,669 INFO L130 BoogieDeclarations]: Found specification of procedure slhc_remember [2019-09-08 17:25:37,669 INFO L130 BoogieDeclarations]: Found specification of procedure slip_esc [2019-09-08 17:25:37,669 INFO L130 BoogieDeclarations]: Found specification of procedure slip_unesc [2019-09-08 17:25:37,669 INFO L130 BoogieDeclarations]: Found specification of procedure slip_esc6 [2019-09-08 17:25:37,669 INFO L130 BoogieDeclarations]: Found specification of procedure slip_unesc6 [2019-09-08 17:25:37,670 INFO L130 BoogieDeclarations]: Found specification of procedure sl_keepalive [2019-09-08 17:25:37,670 INFO L130 BoogieDeclarations]: Found specification of procedure sl_outfill [2019-09-08 17:25:37,670 INFO L130 BoogieDeclarations]: Found specification of procedure sl_ioctl [2019-09-08 17:25:37,670 INFO L130 BoogieDeclarations]: Found specification of procedure sl_alloc_bufs [2019-09-08 17:25:37,670 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_sl_alloc_bufs_3 [2019-09-08 17:25:37,670 INFO L130 BoogieDeclarations]: Found specification of procedure sl_free_bufs [2019-09-08 17:25:37,670 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2019-09-08 17:25:37,670 INFO L130 BoogieDeclarations]: Found specification of procedure sl_realloc_bufs [2019-09-08 17:25:37,670 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2019-09-08 17:25:37,670 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2019-09-08 17:25:37,671 INFO L130 BoogieDeclarations]: Found specification of procedure sl_lock [2019-09-08 17:25:37,671 INFO L130 BoogieDeclarations]: Found specification of procedure sl_unlock [2019-09-08 17:25:37,671 INFO L130 BoogieDeclarations]: Found specification of procedure sl_bump [2019-09-08 17:25:37,671 INFO L130 BoogieDeclarations]: Found specification of procedure sl_encaps [2019-09-08 17:25:37,671 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~X~int~TO~int [2019-09-08 17:25:37,671 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-09-08 17:25:37,671 INFO L130 BoogieDeclarations]: Found specification of procedure slip_write_wakeup [2019-09-08 17:25:37,671 INFO L130 BoogieDeclarations]: Found specification of procedure sl_tx_timeout [2019-09-08 17:25:37,671 INFO L130 BoogieDeclarations]: Found specification of procedure sl_xmit [2019-09-08 17:25:37,672 INFO L130 BoogieDeclarations]: Found specification of procedure sl_close [2019-09-08 17:25:37,672 INFO L130 BoogieDeclarations]: Found specification of procedure sl_open [2019-09-08 17:25:37,672 INFO L130 BoogieDeclarations]: Found specification of procedure sl_change_mtu [2019-09-08 17:25:37,672 INFO L130 BoogieDeclarations]: Found specification of procedure sl_get_stats64 [2019-09-08 17:25:37,672 INFO L130 BoogieDeclarations]: Found specification of procedure sl_init [2019-09-08 17:25:37,672 INFO L130 BoogieDeclarations]: Found specification of procedure sl_uninit [2019-09-08 17:25:37,672 INFO L130 BoogieDeclarations]: Found specification of procedure sl_free_netdev [2019-09-08 17:25:37,672 INFO L130 BoogieDeclarations]: Found specification of procedure sl_setup [2019-09-08 17:25:37,672 INFO L130 BoogieDeclarations]: Found specification of procedure slip_receive_buf [2019-09-08 17:25:37,673 INFO L130 BoogieDeclarations]: Found specification of procedure sl_sync [2019-09-08 17:25:37,673 INFO L130 BoogieDeclarations]: Found specification of procedure sl_alloc [2019-09-08 17:25:37,673 INFO L130 BoogieDeclarations]: Found specification of procedure slip_open [2019-09-08 17:25:37,673 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_slip_open_18 [2019-09-08 17:25:37,673 INFO L130 BoogieDeclarations]: Found specification of procedure slip_close [2019-09-08 17:25:37,673 INFO L130 BoogieDeclarations]: Found specification of procedure slip_hangup [2019-09-08 17:25:37,673 INFO L130 BoogieDeclarations]: Found specification of procedure slip_ioctl [2019-09-08 17:25:37,673 INFO L130 BoogieDeclarations]: Found specification of procedure slip_compat_ioctl [2019-09-08 17:25:37,674 INFO L130 BoogieDeclarations]: Found specification of procedure slip_init [2019-09-08 17:25:37,674 INFO L130 BoogieDeclarations]: Found specification of procedure slip_exit [2019-09-08 17:25:37,674 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_initialize [2019-09-08 17:25:37,674 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_final_state [2019-09-08 17:25:37,674 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~int~TO~VOID [2019-09-08 17:25:37,674 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-09-08 17:25:37,674 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_error [2019-09-08 17:25:37,674 INFO L130 BoogieDeclarations]: Found specification of procedure external_alloc [2019-09-08 17:25:37,674 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2019-09-08 17:25:37,675 INFO L130 BoogieDeclarations]: Found specification of procedure free [2019-09-08 17:25:37,675 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-09-08 17:25:37,675 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2019-09-08 17:25:37,675 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-09-08 17:25:37,675 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-09-08 17:25:37,675 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2019-09-08 17:25:37,675 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2019-09-08 17:25:37,675 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2019-09-08 17:25:37,676 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2019-09-08 17:25:38,789 INFO L684 $ProcedureCfgBuilder]: dead code at ProgramPoint ldv_stopFINAL: assume true; [2019-09-08 17:25:42,302 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-09-08 17:25:42,303 INFO L283 CfgBuilder]: Removed 0 assume(true) statements. [2019-09-08 17:25:42,305 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.09 05:25:42 BoogieIcfgContainer [2019-09-08 17:25:42,305 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-09-08 17:25:42,306 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-09-08 17:25:42,306 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-09-08 17:25:42,310 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-09-08 17:25:42,310 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.09 05:25:34" (1/3) ... [2019-09-08 17:25:42,311 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@39a54fc7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.09 05:25:42, skipping insertion in model container [2019-09-08 17:25:42,311 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 05:25:37" (2/3) ... [2019-09-08 17:25:42,312 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@39a54fc7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.09 05:25:42, skipping insertion in model container [2019-09-08 17:25:42,312 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.09 05:25:42" (3/3) ... [2019-09-08 17:25:42,314 INFO L109 eAbstractionObserver]: Analyzing ICFG linux-stable-1b0b0ac-1-108_1a-drivers--net--slip.ko-entry_point_ldv-val-v0.8.cil.out.i [2019-09-08 17:25:42,324 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-09-08 17:25:42,335 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-09-08 17:25:42,354 INFO L252 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-09-08 17:25:42,393 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2019-09-08 17:25:42,394 INFO L377 AbstractCegarLoop]: Interprodecural is true [2019-09-08 17:25:42,394 INFO L378 AbstractCegarLoop]: Hoare is true [2019-09-08 17:25:42,394 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-09-08 17:25:42,394 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-09-08 17:25:42,395 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-09-08 17:25:42,395 INFO L382 AbstractCegarLoop]: Difference is false [2019-09-08 17:25:42,395 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-09-08 17:25:42,395 INFO L388 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-09-08 17:25:42,441 INFO L276 IsEmpty]: Start isEmpty. Operand 1450 states. [2019-09-08 17:25:42,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2019-09-08 17:25:42,468 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:42,469 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:42,472 INFO L418 AbstractCegarLoop]: === Iteration 1 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:42,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:42,479 INFO L82 PathProgramCache]: Analyzing trace with hash 1003017911, now seen corresponding path program 1 times [2019-09-08 17:25:42,481 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:42,482 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:42,550 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:42,551 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:42,551 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:42,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:43,227 INFO L134 CoverageAnalysis]: Checked inductivity of 269 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 269 trivial. 0 not checked. [2019-09-08 17:25:43,230 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:43,230 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-09-08 17:25:43,235 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-08 17:25:43,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-08 17:25:43,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-08 17:25:43,251 INFO L87 Difference]: Start difference. First operand 1450 states. Second operand 3 states. [2019-09-08 17:25:43,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:43,629 INFO L93 Difference]: Finished difference Result 3588 states and 4861 transitions. [2019-09-08 17:25:43,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-08 17:25:43,631 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 166 [2019-09-08 17:25:43,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:43,662 INFO L225 Difference]: With dead ends: 3588 [2019-09-08 17:25:43,663 INFO L226 Difference]: Without dead ends: 2080 [2019-09-08 17:25:43,675 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-08 17:25:43,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2080 states. [2019-09-08 17:25:43,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2080 to 2080. [2019-09-08 17:25:43,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2080 states. [2019-09-08 17:25:43,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 2080 states and 2799 transitions. [2019-09-08 17:25:43,912 INFO L78 Accepts]: Start accepts. Automaton has 2080 states and 2799 transitions. Word has length 166 [2019-09-08 17:25:43,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:43,914 INFO L475 AbstractCegarLoop]: Abstraction has 2080 states and 2799 transitions. [2019-09-08 17:25:43,914 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-08 17:25:43,914 INFO L276 IsEmpty]: Start isEmpty. Operand 2080 states and 2799 transitions. [2019-09-08 17:25:43,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2019-09-08 17:25:43,927 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:43,927 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:43,928 INFO L418 AbstractCegarLoop]: === Iteration 2 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:43,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:43,928 INFO L82 PathProgramCache]: Analyzing trace with hash -1537564376, now seen corresponding path program 1 times [2019-09-08 17:25:43,928 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:43,929 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:43,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:43,933 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:43,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:44,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:44,349 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 357 trivial. 0 not checked. [2019-09-08 17:25:44,352 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:44,353 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-08 17:25:44,356 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-08 17:25:44,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-08 17:25:44,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-08 17:25:44,357 INFO L87 Difference]: Start difference. First operand 2080 states and 2799 transitions. Second operand 5 states. [2019-09-08 17:25:49,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:49,041 INFO L93 Difference]: Finished difference Result 4110 states and 5539 transitions. [2019-09-08 17:25:49,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-08 17:25:49,042 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 234 [2019-09-08 17:25:49,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:49,056 INFO L225 Difference]: With dead ends: 4110 [2019-09-08 17:25:49,057 INFO L226 Difference]: Without dead ends: 2080 [2019-09-08 17:25:49,064 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-08 17:25:49,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2080 states. [2019-09-08 17:25:49,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2080 to 2080. [2019-09-08 17:25:49,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2080 states. [2019-09-08 17:25:49,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 2080 states and 2797 transitions. [2019-09-08 17:25:49,209 INFO L78 Accepts]: Start accepts. Automaton has 2080 states and 2797 transitions. Word has length 234 [2019-09-08 17:25:49,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:49,210 INFO L475 AbstractCegarLoop]: Abstraction has 2080 states and 2797 transitions. [2019-09-08 17:25:49,210 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-08 17:25:49,210 INFO L276 IsEmpty]: Start isEmpty. Operand 2080 states and 2797 transitions. [2019-09-08 17:25:49,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2019-09-08 17:25:49,217 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:49,217 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:49,218 INFO L418 AbstractCegarLoop]: === Iteration 3 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:49,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:49,218 INFO L82 PathProgramCache]: Analyzing trace with hash 1762709222, now seen corresponding path program 1 times [2019-09-08 17:25:49,218 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:49,218 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:49,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:49,222 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:49,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:49,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:49,487 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 357 trivial. 0 not checked. [2019-09-08 17:25:49,487 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:49,488 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-08 17:25:49,488 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-08 17:25:49,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-08 17:25:49,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-08 17:25:49,489 INFO L87 Difference]: Start difference. First operand 2080 states and 2797 transitions. Second operand 5 states. [2019-09-08 17:25:49,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:49,648 INFO L93 Difference]: Finished difference Result 4118 states and 5541 transitions. [2019-09-08 17:25:49,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-08 17:25:49,649 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 234 [2019-09-08 17:25:49,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:49,664 INFO L225 Difference]: With dead ends: 4118 [2019-09-08 17:25:49,664 INFO L226 Difference]: Without dead ends: 2080 [2019-09-08 17:25:49,672 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-08 17:25:49,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2080 states. [2019-09-08 17:25:49,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2080 to 2080. [2019-09-08 17:25:49,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2080 states. [2019-09-08 17:25:49,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 2080 states and 2795 transitions. [2019-09-08 17:25:49,761 INFO L78 Accepts]: Start accepts. Automaton has 2080 states and 2795 transitions. Word has length 234 [2019-09-08 17:25:49,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:49,762 INFO L475 AbstractCegarLoop]: Abstraction has 2080 states and 2795 transitions. [2019-09-08 17:25:49,762 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-08 17:25:49,763 INFO L276 IsEmpty]: Start isEmpty. Operand 2080 states and 2795 transitions. [2019-09-08 17:25:49,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 242 [2019-09-08 17:25:49,771 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:49,771 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:49,771 INFO L418 AbstractCegarLoop]: === Iteration 4 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:49,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:49,772 INFO L82 PathProgramCache]: Analyzing trace with hash 666500382, now seen corresponding path program 1 times [2019-09-08 17:25:49,772 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:49,772 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:49,775 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:49,775 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:49,775 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:49,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:50,097 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 357 trivial. 0 not checked. [2019-09-08 17:25:50,098 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:50,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-09-08 17:25:50,099 INFO L454 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-09-08 17:25:50,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-09-08 17:25:50,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2019-09-08 17:25:50,099 INFO L87 Difference]: Start difference. First operand 2080 states and 2795 transitions. Second operand 11 states. [2019-09-08 17:25:50,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:50,608 INFO L93 Difference]: Finished difference Result 4827 states and 6483 transitions. [2019-09-08 17:25:50,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-09-08 17:25:50,609 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 241 [2019-09-08 17:25:50,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:50,632 INFO L225 Difference]: With dead ends: 4827 [2019-09-08 17:25:50,632 INFO L226 Difference]: Without dead ends: 2783 [2019-09-08 17:25:50,643 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2019-09-08 17:25:50,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2783 states. [2019-09-08 17:25:50,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2783 to 2782. [2019-09-08 17:25:50,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2782 states. [2019-09-08 17:25:50,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2782 states to 2782 states and 3728 transitions. [2019-09-08 17:25:50,805 INFO L78 Accepts]: Start accepts. Automaton has 2782 states and 3728 transitions. Word has length 241 [2019-09-08 17:25:50,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:50,805 INFO L475 AbstractCegarLoop]: Abstraction has 2782 states and 3728 transitions. [2019-09-08 17:25:50,805 INFO L476 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-09-08 17:25:50,806 INFO L276 IsEmpty]: Start isEmpty. Operand 2782 states and 3728 transitions. [2019-09-08 17:25:50,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 242 [2019-09-08 17:25:50,820 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:50,820 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:50,821 INFO L418 AbstractCegarLoop]: === Iteration 5 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:50,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:50,821 INFO L82 PathProgramCache]: Analyzing trace with hash -542741857, now seen corresponding path program 1 times [2019-09-08 17:25:50,821 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:50,821 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:50,826 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:50,826 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:50,830 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:50,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:51,156 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 361 trivial. 0 not checked. [2019-09-08 17:25:51,156 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:51,157 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-09-08 17:25:51,158 INFO L454 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-09-08 17:25:51,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-09-08 17:25:51,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-09-08 17:25:51,159 INFO L87 Difference]: Start difference. First operand 2782 states and 3728 transitions. Second operand 7 states. [2019-09-08 17:25:51,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:51,300 INFO L93 Difference]: Finished difference Result 2796 states and 3742 transitions. [2019-09-08 17:25:51,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-09-08 17:25:51,301 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 241 [2019-09-08 17:25:51,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:51,321 INFO L225 Difference]: With dead ends: 2796 [2019-09-08 17:25:51,322 INFO L226 Difference]: Without dead ends: 2793 [2019-09-08 17:25:51,324 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-09-08 17:25:51,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2793 states. [2019-09-08 17:25:51,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2793 to 2790. [2019-09-08 17:25:51,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2790 states. [2019-09-08 17:25:51,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2790 states to 2790 states and 3736 transitions. [2019-09-08 17:25:51,440 INFO L78 Accepts]: Start accepts. Automaton has 2790 states and 3736 transitions. Word has length 241 [2019-09-08 17:25:51,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:51,442 INFO L475 AbstractCegarLoop]: Abstraction has 2790 states and 3736 transitions. [2019-09-08 17:25:51,442 INFO L476 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-09-08 17:25:51,442 INFO L276 IsEmpty]: Start isEmpty. Operand 2790 states and 3736 transitions. [2019-09-08 17:25:51,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 258 [2019-09-08 17:25:51,459 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:51,459 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:51,459 INFO L418 AbstractCegarLoop]: === Iteration 6 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:51,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:51,460 INFO L82 PathProgramCache]: Analyzing trace with hash 1951223054, now seen corresponding path program 1 times [2019-09-08 17:25:51,460 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:51,460 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:51,464 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:51,464 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:51,464 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:51,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:51,800 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 361 trivial. 0 not checked. [2019-09-08 17:25:51,800 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:51,800 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-09-08 17:25:51,801 INFO L454 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-09-08 17:25:51,801 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-09-08 17:25:51,802 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-09-08 17:25:51,802 INFO L87 Difference]: Start difference. First operand 2790 states and 3736 transitions. Second operand 8 states. [2019-09-08 17:25:51,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:51,983 INFO L93 Difference]: Finished difference Result 2824 states and 3776 transitions. [2019-09-08 17:25:51,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-09-08 17:25:51,984 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 257 [2019-09-08 17:25:51,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:52,001 INFO L225 Difference]: With dead ends: 2824 [2019-09-08 17:25:52,001 INFO L226 Difference]: Without dead ends: 2821 [2019-09-08 17:25:52,003 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-09-08 17:25:52,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2821 states. [2019-09-08 17:25:52,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2821 to 2792. [2019-09-08 17:25:52,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2792 states. [2019-09-08 17:25:52,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2792 states to 2792 states and 3739 transitions. [2019-09-08 17:25:52,123 INFO L78 Accepts]: Start accepts. Automaton has 2792 states and 3739 transitions. Word has length 257 [2019-09-08 17:25:52,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:52,124 INFO L475 AbstractCegarLoop]: Abstraction has 2792 states and 3739 transitions. [2019-09-08 17:25:52,124 INFO L476 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-09-08 17:25:52,125 INFO L276 IsEmpty]: Start isEmpty. Operand 2792 states and 3739 transitions. [2019-09-08 17:25:52,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 292 [2019-09-08 17:25:52,140 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:52,140 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:52,141 INFO L418 AbstractCegarLoop]: === Iteration 7 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:52,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:52,141 INFO L82 PathProgramCache]: Analyzing trace with hash -544326596, now seen corresponding path program 1 times [2019-09-08 17:25:52,141 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:52,141 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:52,144 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:52,145 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:52,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:52,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:52,468 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2019-09-08 17:25:52,468 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:52,469 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-08 17:25:52,469 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-08 17:25:52,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-08 17:25:52,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-08 17:25:52,470 INFO L87 Difference]: Start difference. First operand 2792 states and 3739 transitions. Second operand 4 states. [2019-09-08 17:25:55,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:55,066 INFO L93 Difference]: Finished difference Result 4849 states and 6512 transitions. [2019-09-08 17:25:55,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-08 17:25:55,066 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 291 [2019-09-08 17:25:55,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:55,082 INFO L225 Difference]: With dead ends: 4849 [2019-09-08 17:25:55,083 INFO L226 Difference]: Without dead ends: 2793 [2019-09-08 17:25:55,091 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-08 17:25:55,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2793 states. [2019-09-08 17:25:55,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2793 to 2792. [2019-09-08 17:25:55,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2792 states. [2019-09-08 17:25:55,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2792 states to 2792 states and 3738 transitions. [2019-09-08 17:25:55,225 INFO L78 Accepts]: Start accepts. Automaton has 2792 states and 3738 transitions. Word has length 291 [2019-09-08 17:25:55,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:55,225 INFO L475 AbstractCegarLoop]: Abstraction has 2792 states and 3738 transitions. [2019-09-08 17:25:55,226 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-08 17:25:55,226 INFO L276 IsEmpty]: Start isEmpty. Operand 2792 states and 3738 transitions. [2019-09-08 17:25:55,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2019-09-08 17:25:55,243 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:55,243 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:55,244 INFO L418 AbstractCegarLoop]: === Iteration 8 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:55,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:55,244 INFO L82 PathProgramCache]: Analyzing trace with hash 627257153, now seen corresponding path program 1 times [2019-09-08 17:25:55,245 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:55,245 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:55,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:55,248 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:55,248 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:55,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:55,459 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2019-09-08 17:25:55,459 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:55,459 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-09-08 17:25:55,461 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-08 17:25:55,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-08 17:25:55,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-08 17:25:55,462 INFO L87 Difference]: Start difference. First operand 2792 states and 3738 transitions. Second operand 3 states. [2019-09-08 17:25:55,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:55,590 INFO L93 Difference]: Finished difference Result 5537 states and 7468 transitions. [2019-09-08 17:25:55,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-08 17:25:55,590 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 293 [2019-09-08 17:25:55,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:55,608 INFO L225 Difference]: With dead ends: 5537 [2019-09-08 17:25:55,608 INFO L226 Difference]: Without dead ends: 2795 [2019-09-08 17:25:55,620 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-08 17:25:55,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2795 states. [2019-09-08 17:25:55,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2795 to 2792. [2019-09-08 17:25:55,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2792 states. [2019-09-08 17:25:55,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2792 states to 2792 states and 3729 transitions. [2019-09-08 17:25:55,751 INFO L78 Accepts]: Start accepts. Automaton has 2792 states and 3729 transitions. Word has length 293 [2019-09-08 17:25:55,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:55,753 INFO L475 AbstractCegarLoop]: Abstraction has 2792 states and 3729 transitions. [2019-09-08 17:25:55,754 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-08 17:25:55,754 INFO L276 IsEmpty]: Start isEmpty. Operand 2792 states and 3729 transitions. [2019-09-08 17:25:55,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 297 [2019-09-08 17:25:55,769 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:55,770 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:55,770 INFO L418 AbstractCegarLoop]: === Iteration 9 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:55,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:55,770 INFO L82 PathProgramCache]: Analyzing trace with hash -765487446, now seen corresponding path program 1 times [2019-09-08 17:25:55,771 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:55,771 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:55,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:55,774 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:55,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:55,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:56,267 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 364 trivial. 0 not checked. [2019-09-08 17:25:56,268 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:56,268 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-08 17:25:56,269 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-08 17:25:56,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-08 17:25:56,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-08 17:25:56,269 INFO L87 Difference]: Start difference. First operand 2792 states and 3729 transitions. Second operand 5 states. [2019-09-08 17:25:56,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:56,443 INFO L93 Difference]: Finished difference Result 4856 states and 6502 transitions. [2019-09-08 17:25:56,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-08 17:25:56,444 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 296 [2019-09-08 17:25:56,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:56,462 INFO L225 Difference]: With dead ends: 4856 [2019-09-08 17:25:56,462 INFO L226 Difference]: Without dead ends: 2800 [2019-09-08 17:25:56,475 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-08 17:25:56,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2800 states. [2019-09-08 17:25:56,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2800 to 2796. [2019-09-08 17:25:56,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2796 states. [2019-09-08 17:25:56,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2796 states to 2796 states and 3733 transitions. [2019-09-08 17:25:56,628 INFO L78 Accepts]: Start accepts. Automaton has 2796 states and 3733 transitions. Word has length 296 [2019-09-08 17:25:56,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:56,628 INFO L475 AbstractCegarLoop]: Abstraction has 2796 states and 3733 transitions. [2019-09-08 17:25:56,629 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-08 17:25:56,629 INFO L276 IsEmpty]: Start isEmpty. Operand 2796 states and 3733 transitions. [2019-09-08 17:25:56,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324 [2019-09-08 17:25:56,644 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:56,645 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:56,645 INFO L418 AbstractCegarLoop]: === Iteration 10 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:56,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:56,646 INFO L82 PathProgramCache]: Analyzing trace with hash 1523846816, now seen corresponding path program 1 times [2019-09-08 17:25:56,646 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:56,646 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:56,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:56,650 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:56,651 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:56,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:56,889 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 367 trivial. 0 not checked. [2019-09-08 17:25:56,890 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:56,890 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-09-08 17:25:56,892 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-08 17:25:56,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-08 17:25:56,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-08 17:25:56,893 INFO L87 Difference]: Start difference. First operand 2796 states and 3733 transitions. Second operand 3 states. [2019-09-08 17:25:57,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:57,069 INFO L93 Difference]: Finished difference Result 4859 states and 6507 transitions. [2019-09-08 17:25:57,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-08 17:25:57,071 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 323 [2019-09-08 17:25:57,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:57,102 INFO L225 Difference]: With dead ends: 4859 [2019-09-08 17:25:57,102 INFO L226 Difference]: Without dead ends: 2799 [2019-09-08 17:25:57,111 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-08 17:25:57,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2799 states. [2019-09-08 17:25:57,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2799 to 2797. [2019-09-08 17:25:57,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2797 states. [2019-09-08 17:25:57,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2797 states to 2797 states and 3734 transitions. [2019-09-08 17:25:57,263 INFO L78 Accepts]: Start accepts. Automaton has 2797 states and 3734 transitions. Word has length 323 [2019-09-08 17:25:57,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:57,264 INFO L475 AbstractCegarLoop]: Abstraction has 2797 states and 3734 transitions. [2019-09-08 17:25:57,265 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-08 17:25:57,265 INFO L276 IsEmpty]: Start isEmpty. Operand 2797 states and 3734 transitions. [2019-09-08 17:25:57,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2019-09-08 17:25:57,288 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:57,289 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:57,289 INFO L418 AbstractCegarLoop]: === Iteration 11 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:57,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:57,290 INFO L82 PathProgramCache]: Analyzing trace with hash -1895822625, now seen corresponding path program 1 times [2019-09-08 17:25:57,290 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:57,290 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:57,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:57,293 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:57,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:57,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:57,724 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 367 trivial. 0 not checked. [2019-09-08 17:25:57,725 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:57,725 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-09-08 17:25:57,726 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-08 17:25:57,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-08 17:25:57,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-08 17:25:57,726 INFO L87 Difference]: Start difference. First operand 2797 states and 3734 transitions. Second operand 3 states. [2019-09-08 17:25:57,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:57,856 INFO L93 Difference]: Finished difference Result 4849 states and 6494 transitions. [2019-09-08 17:25:57,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-08 17:25:57,858 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 325 [2019-09-08 17:25:57,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:57,873 INFO L225 Difference]: With dead ends: 4849 [2019-09-08 17:25:57,873 INFO L226 Difference]: Without dead ends: 2788 [2019-09-08 17:25:57,882 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-08 17:25:57,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2788 states. [2019-09-08 17:25:57,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2788 to 2783. [2019-09-08 17:25:57,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2783 states. [2019-09-08 17:25:58,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2783 states to 2783 states and 3715 transitions. [2019-09-08 17:25:58,004 INFO L78 Accepts]: Start accepts. Automaton has 2783 states and 3715 transitions. Word has length 325 [2019-09-08 17:25:58,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:58,005 INFO L475 AbstractCegarLoop]: Abstraction has 2783 states and 3715 transitions. [2019-09-08 17:25:58,005 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-08 17:25:58,006 INFO L276 IsEmpty]: Start isEmpty. Operand 2783 states and 3715 transitions. [2019-09-08 17:25:58,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2019-09-08 17:25:58,021 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:58,022 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:58,022 INFO L418 AbstractCegarLoop]: === Iteration 12 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:58,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:58,022 INFO L82 PathProgramCache]: Analyzing trace with hash 823889841, now seen corresponding path program 1 times [2019-09-08 17:25:58,022 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:58,023 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:58,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:58,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:58,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:58,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:25:58,349 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 363 trivial. 0 not checked. [2019-09-08 17:25:58,349 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-08 17:25:58,350 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-08 17:25:58,351 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-08 17:25:58,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-08 17:25:58,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-08 17:25:58,352 INFO L87 Difference]: Start difference. First operand 2783 states and 3715 transitions. Second operand 5 states. [2019-09-08 17:25:59,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:25:59,745 INFO L93 Difference]: Finished difference Result 4843 states and 6486 transitions. [2019-09-08 17:25:59,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-08 17:25:59,746 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 336 [2019-09-08 17:25:59,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:25:59,759 INFO L225 Difference]: With dead ends: 4843 [2019-09-08 17:25:59,759 INFO L226 Difference]: Without dead ends: 2796 [2019-09-08 17:25:59,768 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-08 17:25:59,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2796 states. [2019-09-08 17:25:59,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2796 to 2784. [2019-09-08 17:25:59,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2784 states. [2019-09-08 17:25:59,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2784 states to 2784 states and 3716 transitions. [2019-09-08 17:25:59,879 INFO L78 Accepts]: Start accepts. Automaton has 2784 states and 3716 transitions. Word has length 336 [2019-09-08 17:25:59,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:25:59,880 INFO L475 AbstractCegarLoop]: Abstraction has 2784 states and 3716 transitions. [2019-09-08 17:25:59,880 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-08 17:25:59,880 INFO L276 IsEmpty]: Start isEmpty. Operand 2784 states and 3716 transitions. [2019-09-08 17:25:59,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 339 [2019-09-08 17:25:59,897 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:25:59,898 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:25:59,898 INFO L418 AbstractCegarLoop]: === Iteration 13 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:25:59,898 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:25:59,899 INFO L82 PathProgramCache]: Analyzing trace with hash -813730862, now seen corresponding path program 1 times [2019-09-08 17:25:59,899 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:25:59,899 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:25:59,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:25:59,902 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:25:59,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:00,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:26:00,491 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2019-09-08 17:26:00,492 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-08 17:26:00,492 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-08 17:26:00,524 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:26:02,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:26:02,122 INFO L256 TraceCheckSpWp]: Trace formula consists of 2573 conjuncts, 11 conjunts are in the unsatisfiable core [2019-09-08 17:26:02,162 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-08 17:26:02,230 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-09-08 17:26:02,357 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 134 proven. 0 refuted. 0 times theorem prover too weak. 233 trivial. 0 not checked. [MP z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (2)] Exception during sending of exit command (exit): Broken pipe [2019-09-08 17:26:02,381 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-08 17:26:02,381 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 9 [2019-09-08 17:26:02,382 INFO L454 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-09-08 17:26:02,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-09-08 17:26:02,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-09-08 17:26:02,393 INFO L87 Difference]: Start difference. First operand 2784 states and 3716 transitions. Second operand 9 states. [2019-09-08 17:26:02,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:26:02,768 INFO L93 Difference]: Finished difference Result 5551 states and 7418 transitions. [2019-09-08 17:26:02,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-09-08 17:26:02,769 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 338 [2019-09-08 17:26:02,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:26:02,782 INFO L225 Difference]: With dead ends: 5551 [2019-09-08 17:26:02,782 INFO L226 Difference]: Without dead ends: 2790 [2019-09-08 17:26:02,793 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 346 GetRequests, 336 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2019-09-08 17:26:02,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2790 states. [2019-09-08 17:26:02,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2790 to 2790. [2019-09-08 17:26:02,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2790 states. [2019-09-08 17:26:02,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2790 states to 2790 states and 3722 transitions. [2019-09-08 17:26:02,953 INFO L78 Accepts]: Start accepts. Automaton has 2790 states and 3722 transitions. Word has length 338 [2019-09-08 17:26:02,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:26:02,954 INFO L475 AbstractCegarLoop]: Abstraction has 2790 states and 3722 transitions. [2019-09-08 17:26:02,954 INFO L476 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-09-08 17:26:02,954 INFO L276 IsEmpty]: Start isEmpty. Operand 2790 states and 3722 transitions. [2019-09-08 17:26:02,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2019-09-08 17:26:02,968 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:26:02,971 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:26:02,971 INFO L418 AbstractCegarLoop]: === Iteration 14 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:26:02,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:26:02,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1651443938, now seen corresponding path program 1 times [2019-09-08 17:26:02,972 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:26:02,972 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:26:02,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:02,983 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:26:02,983 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:03,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:26:03,748 INFO L134 CoverageAnalysis]: Checked inductivity of 437 backedges. 0 proven. 61 refuted. 0 times theorem prover too weak. 376 trivial. 0 not checked. [2019-09-08 17:26:03,748 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-08 17:26:03,749 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-08 17:26:03,788 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-08 17:26:05,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:26:05,408 INFO L256 TraceCheckSpWp]: Trace formula consists of 2615 conjuncts, 11 conjunts are in the unsatisfiable core [2019-09-08 17:26:05,424 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-08 17:26:05,589 INFO L134 CoverageAnalysis]: Checked inductivity of 437 backedges. 244 proven. 1 refuted. 0 times theorem prover too weak. 192 trivial. 0 not checked. [MP z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (3)] Exception during sending of exit command (exit): Broken pipe [2019-09-08 17:26:05,606 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-09-08 17:26:05,606 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 11 [2019-09-08 17:26:05,607 INFO L454 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-09-08 17:26:05,608 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-09-08 17:26:05,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2019-09-08 17:26:05,608 INFO L87 Difference]: Start difference. First operand 2790 states and 3722 transitions. Second operand 11 states. [2019-09-08 17:26:05,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:26:05,943 INFO L93 Difference]: Finished difference Result 5561 states and 7427 transitions. [2019-09-08 17:26:05,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-09-08 17:26:05,945 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 345 [2019-09-08 17:26:05,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:26:05,960 INFO L225 Difference]: With dead ends: 5561 [2019-09-08 17:26:05,960 INFO L226 Difference]: Without dead ends: 2791 [2019-09-08 17:26:05,972 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 354 GetRequests, 342 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2019-09-08 17:26:05,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2791 states. [2019-09-08 17:26:06,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2791 to 2791. [2019-09-08 17:26:06,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2791 states. [2019-09-08 17:26:06,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2791 states to 2791 states and 3723 transitions. [2019-09-08 17:26:06,111 INFO L78 Accepts]: Start accepts. Automaton has 2791 states and 3723 transitions. Word has length 345 [2019-09-08 17:26:06,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:26:06,112 INFO L475 AbstractCegarLoop]: Abstraction has 2791 states and 3723 transitions. [2019-09-08 17:26:06,112 INFO L476 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-09-08 17:26:06,112 INFO L276 IsEmpty]: Start isEmpty. Operand 2791 states and 3723 transitions. [2019-09-08 17:26:06,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2019-09-08 17:26:06,128 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:26:06,129 INFO L399 BasicCegarLoop]: trace histogram [14, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:26:06,129 INFO L418 AbstractCegarLoop]: === Iteration 15 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:26:06,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:26:06,130 INFO L82 PathProgramCache]: Analyzing trace with hash 1013425106, now seen corresponding path program 2 times [2019-09-08 17:26:06,130 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:26:06,130 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:26:06,133 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:06,134 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:26:06,134 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:06,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:26:06,819 INFO L134 CoverageAnalysis]: Checked inductivity of 556 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 463 trivial. 0 not checked. [2019-09-08 17:26:06,822 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-08 17:26:06,822 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-08 17:26:06,862 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-09-08 17:26:08,394 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-09-08 17:26:08,395 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-09-08 17:26:08,409 INFO L256 TraceCheckSpWp]: Trace formula consists of 2657 conjuncts, 16 conjunts are in the unsatisfiable core [2019-09-08 17:26:08,418 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-08 17:26:08,585 INFO L134 CoverageAnalysis]: Checked inductivity of 556 backedges. 182 proven. 3 refuted. 0 times theorem prover too weak. 371 trivial. 0 not checked. [2019-09-08 17:26:08,595 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-09-08 17:26:08,595 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2019-09-08 17:26:08,596 INFO L454 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-09-08 17:26:08,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-09-08 17:26:08,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-09-08 17:26:08,597 INFO L87 Difference]: Start difference. First operand 2791 states and 3723 transitions. Second operand 13 states. [2019-09-08 17:26:09,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:26:09,003 INFO L93 Difference]: Finished difference Result 5563 states and 7429 transitions. [2019-09-08 17:26:09,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-09-08 17:26:09,004 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 352 [2019-09-08 17:26:09,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:26:09,027 INFO L225 Difference]: With dead ends: 5563 [2019-09-08 17:26:09,028 INFO L226 Difference]: Without dead ends: 2792 [2019-09-08 17:26:09,040 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 363 GetRequests, 348 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2019-09-08 17:26:09,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2792 states. [2019-09-08 17:26:09,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2792 to 2792. [2019-09-08 17:26:09,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2792 states. [2019-09-08 17:26:09,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2792 states to 2792 states and 3724 transitions. [2019-09-08 17:26:09,173 INFO L78 Accepts]: Start accepts. Automaton has 2792 states and 3724 transitions. Word has length 352 [2019-09-08 17:26:09,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:26:09,174 INFO L475 AbstractCegarLoop]: Abstraction has 2792 states and 3724 transitions. [2019-09-08 17:26:09,174 INFO L476 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-09-08 17:26:09,174 INFO L276 IsEmpty]: Start isEmpty. Operand 2792 states and 3724 transitions. [2019-09-08 17:26:09,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 360 [2019-09-08 17:26:09,189 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:26:09,191 INFO L399 BasicCegarLoop]: trace histogram [21, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:26:09,191 INFO L418 AbstractCegarLoop]: === Iteration 16 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:26:09,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:26:09,192 INFO L82 PathProgramCache]: Analyzing trace with hash 1155206370, now seen corresponding path program 3 times [2019-09-08 17:26:09,192 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:26:09,192 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:26:09,195 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:09,195 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-09-08 17:26:09,195 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:09,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:26:09,816 INFO L134 CoverageAnalysis]: Checked inductivity of 724 backedges. 0 proven. 138 refuted. 0 times theorem prover too weak. 586 trivial. 0 not checked. [2019-09-08 17:26:09,816 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-08 17:26:09,817 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-08 17:26:09,848 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-08 17:26:46,508 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2019-09-08 17:26:46,508 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-09-08 17:26:46,536 INFO L256 TraceCheckSpWp]: Trace formula consists of 2241 conjuncts, 21 conjunts are in the unsatisfiable core [2019-09-08 17:26:46,545 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-08 17:26:46,815 INFO L134 CoverageAnalysis]: Checked inductivity of 724 backedges. 212 proven. 6 refuted. 0 times theorem prover too weak. 506 trivial. 0 not checked. [2019-09-08 17:26:46,837 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-09-08 17:26:46,837 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 16 [2019-09-08 17:26:46,838 INFO L454 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-09-08 17:26:46,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-09-08 17:26:46,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2019-09-08 17:26:46,840 INFO L87 Difference]: Start difference. First operand 2792 states and 3724 transitions. Second operand 16 states. [2019-09-08 17:26:47,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:26:47,208 INFO L93 Difference]: Finished difference Result 5565 states and 7431 transitions. [2019-09-08 17:26:47,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-09-08 17:26:47,208 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 359 [2019-09-08 17:26:47,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:26:47,221 INFO L225 Difference]: With dead ends: 5565 [2019-09-08 17:26:47,221 INFO L226 Difference]: Without dead ends: 2793 [2019-09-08 17:26:47,231 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 370 GetRequests, 353 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=65, Invalid=277, Unknown=0, NotChecked=0, Total=342 [2019-09-08 17:26:47,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2793 states. [2019-09-08 17:26:47,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2793 to 2793. [2019-09-08 17:26:47,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2793 states. [2019-09-08 17:26:47,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2793 states to 2793 states and 3725 transitions. [2019-09-08 17:26:47,353 INFO L78 Accepts]: Start accepts. Automaton has 2793 states and 3725 transitions. Word has length 359 [2019-09-08 17:26:47,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:26:47,353 INFO L475 AbstractCegarLoop]: Abstraction has 2793 states and 3725 transitions. [2019-09-08 17:26:47,353 INFO L476 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-09-08 17:26:47,353 INFO L276 IsEmpty]: Start isEmpty. Operand 2793 states and 3725 transitions. [2019-09-08 17:26:47,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 367 [2019-09-08 17:26:47,365 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:26:47,365 INFO L399 BasicCegarLoop]: trace histogram [28, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:26:47,366 INFO L418 AbstractCegarLoop]: === Iteration 17 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:26:47,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:26:47,366 INFO L82 PathProgramCache]: Analyzing trace with hash 1624921042, now seen corresponding path program 4 times [2019-09-08 17:26:47,366 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:26:47,366 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:26:47,369 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:47,369 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-09-08 17:26:47,369 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:47,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:26:48,073 INFO L134 CoverageAnalysis]: Checked inductivity of 941 backedges. 62 proven. 134 refuted. 0 times theorem prover too weak. 745 trivial. 0 not checked. [2019-09-08 17:26:48,073 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-08 17:26:48,073 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-08 17:26:48,098 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-09-08 17:26:50,927 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-09-08 17:26:50,927 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-09-08 17:26:50,942 INFO L256 TraceCheckSpWp]: Trace formula consists of 2741 conjuncts, 14 conjunts are in the unsatisfiable core [2019-09-08 17:26:50,951 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-08 17:26:51,205 INFO L134 CoverageAnalysis]: Checked inductivity of 941 backedges. 538 proven. 10 refuted. 0 times theorem prover too weak. 393 trivial. 0 not checked. [2019-09-08 17:26:51,227 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-09-08 17:26:51,227 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 17 [2019-09-08 17:26:51,228 INFO L454 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-09-08 17:26:51,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-09-08 17:26:51,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2019-09-08 17:26:51,229 INFO L87 Difference]: Start difference. First operand 2793 states and 3725 transitions. Second operand 17 states. [2019-09-08 17:26:51,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:26:51,608 INFO L93 Difference]: Finished difference Result 5566 states and 7426 transitions. [2019-09-08 17:26:51,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-09-08 17:26:51,609 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 366 [2019-09-08 17:26:51,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:26:51,620 INFO L225 Difference]: With dead ends: 5566 [2019-09-08 17:26:51,621 INFO L226 Difference]: Without dead ends: 2802 [2019-09-08 17:26:51,630 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 381 GetRequests, 360 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=125, Invalid=381, Unknown=0, NotChecked=0, Total=506 [2019-09-08 17:26:51,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2802 states. [2019-09-08 17:26:51,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2802 to 2802. [2019-09-08 17:26:51,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2802 states. [2019-09-08 17:26:51,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2802 states to 2802 states and 3735 transitions. [2019-09-08 17:26:51,740 INFO L78 Accepts]: Start accepts. Automaton has 2802 states and 3735 transitions. Word has length 366 [2019-09-08 17:26:51,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:26:51,741 INFO L475 AbstractCegarLoop]: Abstraction has 2802 states and 3735 transitions. [2019-09-08 17:26:51,741 INFO L476 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-09-08 17:26:51,741 INFO L276 IsEmpty]: Start isEmpty. Operand 2802 states and 3735 transitions. [2019-09-08 17:26:51,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 369 [2019-09-08 17:26:51,750 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:26:51,750 INFO L399 BasicCegarLoop]: trace histogram [30, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:26:51,751 INFO L418 AbstractCegarLoop]: === Iteration 18 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:26:51,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:26:51,751 INFO L82 PathProgramCache]: Analyzing trace with hash -641405810, now seen corresponding path program 5 times [2019-09-08 17:26:51,751 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:26:51,751 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:26:51,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:51,754 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-09-08 17:26:51,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:52,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:26:52,506 INFO L134 CoverageAnalysis]: Checked inductivity of 1012 backedges. 72 proven. 165 refuted. 0 times theorem prover too weak. 775 trivial. 0 not checked. [2019-09-08 17:26:52,506 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-08 17:26:52,506 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-08 17:26:52,530 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-09-08 17:26:52,795 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2019-09-08 17:26:52,795 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-09-08 17:26:52,797 INFO L256 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 20 conjunts are in the unsatisfiable core [2019-09-08 17:26:52,805 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-08 17:26:52,995 INFO L134 CoverageAnalysis]: Checked inductivity of 1012 backedges. 584 proven. 15 refuted. 0 times theorem prover too weak. 413 trivial. 0 not checked. [2019-09-08 17:26:52,999 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-09-08 17:26:53,000 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 15 [2019-09-08 17:26:53,001 INFO L454 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-09-08 17:26:53,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-09-08 17:26:53,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2019-09-08 17:26:53,001 INFO L87 Difference]: Start difference. First operand 2802 states and 3735 transitions. Second operand 15 states. [2019-09-08 17:26:53,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:26:53,455 INFO L93 Difference]: Finished difference Result 5591 states and 7460 transitions. [2019-09-08 17:26:53,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-09-08 17:26:53,456 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 368 [2019-09-08 17:26:53,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:26:53,467 INFO L225 Difference]: With dead ends: 5591 [2019-09-08 17:26:53,467 INFO L226 Difference]: Without dead ends: 2807 [2019-09-08 17:26:53,476 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 381 GetRequests, 363 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306 [2019-09-08 17:26:53,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2807 states. [2019-09-08 17:26:53,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2807 to 2805. [2019-09-08 17:26:53,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2805 states. [2019-09-08 17:26:53,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2805 states to 2805 states and 3739 transitions. [2019-09-08 17:26:53,605 INFO L78 Accepts]: Start accepts. Automaton has 2805 states and 3739 transitions. Word has length 368 [2019-09-08 17:26:53,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:26:53,605 INFO L475 AbstractCegarLoop]: Abstraction has 2805 states and 3739 transitions. [2019-09-08 17:26:53,606 INFO L476 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-09-08 17:26:53,606 INFO L276 IsEmpty]: Start isEmpty. Operand 2805 states and 3739 transitions. [2019-09-08 17:26:53,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 371 [2019-09-08 17:26:53,616 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:26:53,617 INFO L399 BasicCegarLoop]: trace histogram [32, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:26:53,617 INFO L418 AbstractCegarLoop]: === Iteration 19 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:26:53,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:26:53,618 INFO L82 PathProgramCache]: Analyzing trace with hash 1853276242, now seen corresponding path program 6 times [2019-09-08 17:26:53,618 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:26:53,618 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:26:53,621 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:53,622 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-09-08 17:26:53,622 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:26:54,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:26:54,406 INFO L134 CoverageAnalysis]: Checked inductivity of 1087 backedges. 82 proven. 199 refuted. 0 times theorem prover too weak. 806 trivial. 0 not checked. [2019-09-08 17:26:54,408 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-08 17:26:54,408 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-08 17:26:54,439 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-08 17:27:56,604 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2019-09-08 17:27:56,604 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-09-08 17:27:56,638 INFO L256 TraceCheckSpWp]: Trace formula consists of 2269 conjuncts, 22 conjunts are in the unsatisfiable core [2019-09-08 17:27:56,647 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-08 17:27:56,944 INFO L134 CoverageAnalysis]: Checked inductivity of 1087 backedges. 632 proven. 21 refuted. 0 times theorem prover too weak. 434 trivial. 0 not checked. [2019-09-08 17:27:56,972 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-09-08 17:27:56,973 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 16 [2019-09-08 17:27:56,974 INFO L454 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-09-08 17:27:56,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-09-08 17:27:56,974 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-09-08 17:27:56,974 INFO L87 Difference]: Start difference. First operand 2805 states and 3739 transitions. Second operand 16 states. [2019-09-08 17:27:57,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:27:57,654 INFO L93 Difference]: Finished difference Result 5596 states and 7466 transitions. [2019-09-08 17:27:57,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-09-08 17:27:57,654 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 370 [2019-09-08 17:27:57,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:27:57,666 INFO L225 Difference]: With dead ends: 5596 [2019-09-08 17:27:57,667 INFO L226 Difference]: Without dead ends: 2809 [2019-09-08 17:27:57,674 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 384 GetRequests, 365 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=49, Invalid=293, Unknown=0, NotChecked=0, Total=342 [2019-09-08 17:27:57,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2809 states. [2019-09-08 17:27:57,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2809 to 2807. [2019-09-08 17:27:57,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2807 states. [2019-09-08 17:27:57,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2807 states to 2807 states and 3741 transitions. [2019-09-08 17:27:57,798 INFO L78 Accepts]: Start accepts. Automaton has 2807 states and 3741 transitions. Word has length 370 [2019-09-08 17:27:57,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:27:57,798 INFO L475 AbstractCegarLoop]: Abstraction has 2807 states and 3741 transitions. [2019-09-08 17:27:57,798 INFO L476 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-09-08 17:27:57,798 INFO L276 IsEmpty]: Start isEmpty. Operand 2807 states and 3741 transitions. [2019-09-08 17:27:57,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 373 [2019-09-08 17:27:57,807 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:27:57,808 INFO L399 BasicCegarLoop]: trace histogram [34, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:27:57,808 INFO L418 AbstractCegarLoop]: === Iteration 20 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:27:57,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:27:57,809 INFO L82 PathProgramCache]: Analyzing trace with hash 1934064142, now seen corresponding path program 7 times [2019-09-08 17:27:57,809 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:27:57,809 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:27:57,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:27:57,812 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-09-08 17:27:57,813 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:27:58,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:27:58,793 INFO L134 CoverageAnalysis]: Checked inductivity of 1166 backedges. 92 proven. 236 refuted. 0 times theorem prover too weak. 838 trivial. 0 not checked. [2019-09-08 17:27:58,794 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-08 17:27:58,794 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-08 17:27:58,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-08 17:28:00,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-08 17:28:00,232 INFO L256 TraceCheckSpWp]: Trace formula consists of 2777 conjuncts, 34 conjunts are in the unsatisfiable core [2019-09-08 17:28:00,240 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-08 17:28:00,428 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-09-08 17:28:00,528 INFO L134 CoverageAnalysis]: Checked inductivity of 1166 backedges. 682 proven. 28 refuted. 0 times theorem prover too weak. 456 trivial. 0 not checked. [2019-09-08 17:28:00,538 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-09-08 17:28:00,538 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2019-09-08 17:28:00,539 INFO L454 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-09-08 17:28:00,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-09-08 17:28:00,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=441, Unknown=0, NotChecked=0, Total=552 [2019-09-08 17:28:00,540 INFO L87 Difference]: Start difference. First operand 2807 states and 3741 transitions. Second operand 24 states. [2019-09-08 17:28:01,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-08 17:28:01,176 INFO L93 Difference]: Finished difference Result 5590 states and 7453 transitions. [2019-09-08 17:28:01,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-09-08 17:28:01,176 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 372 [2019-09-08 17:28:01,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-08 17:28:01,187 INFO L225 Difference]: With dead ends: 5590 [2019-09-08 17:28:01,187 INFO L226 Difference]: Without dead ends: 2810 [2019-09-08 17:28:01,194 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 395 GetRequests, 363 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=191, Invalid=931, Unknown=0, NotChecked=0, Total=1122 [2019-09-08 17:28:01,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2810 states. [2019-09-08 17:28:01,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2810 to 2808. [2019-09-08 17:28:01,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2808 states. [2019-09-08 17:28:01,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2808 states to 2808 states and 3742 transitions. [2019-09-08 17:28:01,304 INFO L78 Accepts]: Start accepts. Automaton has 2808 states and 3742 transitions. Word has length 372 [2019-09-08 17:28:01,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-08 17:28:01,304 INFO L475 AbstractCegarLoop]: Abstraction has 2808 states and 3742 transitions. [2019-09-08 17:28:01,305 INFO L476 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-09-08 17:28:01,305 INFO L276 IsEmpty]: Start isEmpty. Operand 2808 states and 3742 transitions. [2019-09-08 17:28:01,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 375 [2019-09-08 17:28:01,318 INFO L391 BasicCegarLoop]: Found error trace [2019-09-08 17:28:01,319 INFO L399 BasicCegarLoop]: trace histogram [36, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-08 17:28:01,320 INFO L418 AbstractCegarLoop]: === Iteration 21 === [ldv_errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-08 17:28:01,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-08 17:28:01,320 INFO L82 PathProgramCache]: Analyzing trace with hash 1512361170, now seen corresponding path program 8 times [2019-09-08 17:28:01,321 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-08 17:28:01,321 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-08 17:28:01,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:28:01,325 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-08 17:28:01,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-08 17:28:03,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-09-08 17:28:05,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-09-08 17:28:06,787 INFO L466 BasicCegarLoop]: Counterexample might be feasible [2019-09-08 17:28:06,929 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-09-08 17:28:06,936 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-09-08 17:28:06,943 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-09-08 17:28:06,948 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-09-08 17:28:06,956 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-09-08 17:28:06,962 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-09-08 17:28:06,968 WARN L417 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2019-09-08 17:28:07,070 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 4294967331 could not be translated for associated CType STRUCT~~tty_ldisc_ops?magic~INT?name~*CHAR?num~INT?flags~INT?open~*((*tty_struct ) : INT)?close~*((*tty_struct ) : VOID)?flush_buffer~*((*tty_struct ) : VOID)?chars_in_buffer~*((*tty_struct ) : UINT)?read~*((*tty_struct *file *UCHAR UINT ) : UINT)?write~*((*tty_struct *file *UCHAR UINT ) : UINT)?ioctl~*((*tty_struct *file UINT ULONG ) : INT)?compat_ioctl~*((*tty_struct *file UINT ULONG ) : LONG)?set_termios~*((*tty_struct *ktermios ) : VOID)?poll~*((*tty_struct *file *poll_table_struct ) : UINT)?hangup~*((*tty_struct ) : INT)?receive_buf~*((*tty_struct *UCHAR *CHAR INT ) : VOID)?write_wakeup~*((*tty_struct ) : VOID)?dcd_change~*((*tty_struct UINT *pps_event_time ) : VOID)?owner~*module?refcount~INT# [2019-09-08 17:28:07,071 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 4294967336 could not be translated for associated CType STRUCT~~net_device_ops?ndo_init~*((*net_device ) : INT)?ndo_uninit~*((*net_device ) : VOID)?ndo_open~*((*net_device ) : INT)?ndo_stop~*((*net_device ) : INT)?ndo_start_xmit~*((*sk_buff *net_device ) : ~netdev_tx_t~0)?ndo_select_queue~*((*net_device *sk_buff ) : ~u16~0)?ndo_change_rx_flags~*((*net_device INT ) : VOID)?ndo_set_rx_mode~*((*net_device ) : VOID)?ndo_set_multicast_list~*((*net_device ) : VOID)?ndo_set_mac_address~*((*net_device *VOID ) : INT)?ndo_validate_addr~*((*net_device ) : INT)?ndo_do_ioctl~*((*net_device *ifreq INT ) : INT)?ndo_set_config~*((*net_device *ifmap ) : INT)?ndo_change_mtu~*((*net_device INT ) : INT)?ndo_neigh_setup~*((*net_device *neigh_parms ) : INT)?ndo_tx_timeout~*((*net_device ) : VOID)?ndo_get_stats64~*((*net_device *rtnl_link_stats64 ) : *rtnl_link_stats64)?ndo_get_stats~*((*net_device ) : *net_device_stats)?ndo_vlan_rx_register~*((*net_device *vlan_group ) : VOID)?ndo_vlan_rx_add_vid~*((*net_device USHORT ) : VOID)?ndo_vlan_rx_kill_vid~*((*net_device USHORT ) : VOID)?ndo_poll_controller~*((*net_device ) : VOID)?ndo_netpoll_setup~*((*net_device *netpoll_info ) : INT)?ndo_netpoll_cleanup~*((*net_device ) : VOID)?ndo_set_vf_mac~*((*net_device INT *~u8~0 ) : INT)?ndo_set_vf_vlan~*((*net_device INT ~u16~0 ~u8~0 ) : INT)?ndo_set_vf_tx_rate~*((*net_device INT INT ) : INT)?ndo_get_vf_config~*((*net_device INT *ifla_vf_info ) : INT)?ndo_set_vf_port~*((*net_device INT **nlattr ) : INT)?ndo_get_vf_port~*((*net_device INT *sk_buff ) : INT)?ndo_fcoe_enable~*((*net_device ) : INT)?ndo_fcoe_disable~*((*net_device ) : INT)?ndo_fcoe_ddp_setup~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_ddp_done~*((*net_device ~u16~0 ) : INT)?ndo_fcoe_get_wwn~*((*net_device *~u64~0 INT ) : INT)# [2019-09-08 17:28:07,072 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 4294967384 could not be translated for associated CType STRUCT~~tty_ldisc_ops?magic~INT?name~*CHAR?num~INT?flags~INT?open~*((*tty_struct ) : INT)?close~*((*tty_struct ) : VOID)?flush_buffer~*((*tty_struct ) : VOID)?chars_in_buffer~*((*tty_struct ) : UINT)?read~*((*tty_struct *file *UCHAR UINT ) : UINT)?write~*((*tty_struct *file *UCHAR UINT ) : UINT)?ioctl~*((*tty_struct *file UINT ULONG ) : INT)?compat_ioctl~*((*tty_struct *file UINT ULONG ) : LONG)?set_termios~*((*tty_struct *ktermios ) : VOID)?poll~*((*tty_struct *file *poll_table_struct ) : UINT)?hangup~*((*tty_struct ) : INT)?receive_buf~*((*tty_struct *UCHAR *CHAR INT ) : VOID)?write_wakeup~*((*tty_struct ) : VOID)?dcd_change~*((*tty_struct UINT *pps_event_time ) : VOID)?owner~*module?refcount~INT# [2019-09-08 17:28:07,074 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 4294967326 could not be translated for associated CType STRUCT~~net_device_ops?ndo_init~*((*net_device ) : INT)?ndo_uninit~*((*net_device ) : VOID)?ndo_open~*((*net_device ) : INT)?ndo_stop~*((*net_device ) : INT)?ndo_start_xmit~*((*sk_buff *net_device ) : ~netdev_tx_t~0)?ndo_select_queue~*((*net_device *sk_buff ) : ~u16~0)?ndo_change_rx_flags~*((*net_device INT ) : VOID)?ndo_set_rx_mode~*((*net_device ) : VOID)?ndo_set_multicast_list~*((*net_device ) : VOID)?ndo_set_mac_address~*((*net_device *VOID ) : INT)?ndo_validate_addr~*((*net_device ) : INT)?ndo_do_ioctl~*((*net_device *ifreq INT ) : INT)?ndo_set_config~*((*net_device *ifmap ) : INT)?ndo_change_mtu~*((*net_device INT ) : INT)?ndo_neigh_setup~*((*net_device *neigh_parms ) : INT)?ndo_tx_timeout~*((*net_device ) : VOID)?ndo_get_stats64~*((*net_device *rtnl_link_stats64 ) : *rtnl_link_stats64)?ndo_get_stats~*((*net_device ) : *net_device_stats)?ndo_vlan_rx_register~*((*net_device *vlan_group ) : VOID)?ndo_vlan_rx_add_vid~*((*net_device USHORT ) : VOID)?ndo_vlan_rx_kill_vid~*((*net_device USHORT ) : VOID)?ndo_poll_controller~*((*net_device ) : VOID)?ndo_netpoll_setup~*((*net_device *netpoll_info ) : INT)?ndo_netpoll_cleanup~*((*net_device ) : VOID)?ndo_set_vf_mac~*((*net_device INT *~u8~0 ) : INT)?ndo_set_vf_vlan~*((*net_device INT ~u16~0 ~u8~0 ) : INT)?ndo_set_vf_tx_rate~*((*net_device INT INT ) : INT)?ndo_get_vf_config~*((*net_device INT *ifla_vf_info ) : INT)?ndo_set_vf_port~*((*net_device INT **nlattr ) : INT)?ndo_get_vf_port~*((*net_device INT *sk_buff ) : INT)?ndo_fcoe_enable~*((*net_device ) : INT)?ndo_fcoe_disable~*((*net_device ) : INT)?ndo_fcoe_ddp_setup~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_ddp_done~*((*net_device ~u16~0 ) : INT)?ndo_fcoe_get_wwn~*((*net_device *~u64~0 INT ) : INT)# [2019-09-08 17:28:07,208 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,211 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,211 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,213 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,213 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,237 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,238 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,239 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,240 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,242 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,242 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,251 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,251 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,253 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,253 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,265 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,266 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,268 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,268 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,270 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,271 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch564 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,271 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,273 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,273 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch564 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,273 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,342 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch23 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,343 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: Expression #t~switch23 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement [2019-09-08 17:28:07,429 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.09 05:28:07 BoogieIcfgContainer [2019-09-08 17:28:07,429 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-09-08 17:28:07,432 INFO L168 Benchmark]: Toolchain (without parser) took 152944.14 ms. Allocated memory was 133.2 MB in the beginning and 1.4 GB in the end (delta: 1.2 GB). Free memory was 80.0 MB in the beginning and 847.5 MB in the end (delta: -767.6 MB). Peak memory consumption was 1.2 GB. Max. memory is 7.1 GB. [2019-09-08 17:28:07,432 INFO L168 Benchmark]: CDTParser took 0.55 ms. Allocated memory is still 133.2 MB. Free memory is still 107.2 MB. There was no memory consumed. Max. memory is 7.1 GB. [2019-09-08 17:28:07,433 INFO L168 Benchmark]: CACSL2BoogieTranslator took 2727.88 ms. Allocated memory was 133.2 MB in the beginning and 270.5 MB in the end (delta: 137.4 MB). Free memory was 79.5 MB in the beginning and 175.9 MB in the end (delta: -96.4 MB). Peak memory consumption was 119.5 MB. Max. memory is 7.1 GB. [2019-09-08 17:28:07,434 INFO L168 Benchmark]: Boogie Preprocessor took 289.33 ms. Allocated memory is still 270.5 MB. Free memory was 175.9 MB in the beginning and 157.5 MB in the end (delta: 18.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 7.1 GB. [2019-09-08 17:28:07,434 INFO L168 Benchmark]: RCFGBuilder took 4798.95 ms. Allocated memory was 270.5 MB in the beginning and 358.1 MB in the end (delta: 87.6 MB). Free memory was 157.5 MB in the beginning and 89.6 MB in the end (delta: 67.9 MB). Peak memory consumption was 155.4 MB. Max. memory is 7.1 GB. [2019-09-08 17:28:07,435 INFO L168 Benchmark]: TraceAbstraction took 145123.21 ms. Allocated memory was 358.1 MB in the beginning and 1.4 GB in the end (delta: 1.0 GB). Free memory was 89.6 MB in the beginning and 847.5 MB in the end (delta: -757.9 MB). Peak memory consumption was 969.6 MB. Max. memory is 7.1 GB. [2019-09-08 17:28:07,438 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.55 ms. Allocated memory is still 133.2 MB. Free memory is still 107.2 MB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 2727.88 ms. Allocated memory was 133.2 MB in the beginning and 270.5 MB in the end (delta: 137.4 MB). Free memory was 79.5 MB in the beginning and 175.9 MB in the end (delta: -96.4 MB). Peak memory consumption was 119.5 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 289.33 ms. Allocated memory is still 270.5 MB. Free memory was 175.9 MB in the beginning and 157.5 MB in the end (delta: 18.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 7.1 GB. * RCFGBuilder took 4798.95 ms. Allocated memory was 270.5 MB in the beginning and 358.1 MB in the end (delta: 87.6 MB). Free memory was 157.5 MB in the beginning and 89.6 MB in the end (delta: 67.9 MB). Peak memory consumption was 155.4 MB. Max. memory is 7.1 GB. * TraceAbstraction took 145123.21 ms. Allocated memory was 358.1 MB in the beginning and 1.4 GB in the end (delta: 1.0 GB). Free memory was 89.6 MB in the beginning and 847.5 MB in the end (delta: -757.9 MB). Peak memory consumption was 969.6 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 4294967331 could not be translated for associated CType STRUCT~~tty_ldisc_ops?magic~INT?name~*CHAR?num~INT?flags~INT?open~*((*tty_struct ) : INT)?close~*((*tty_struct ) : VOID)?flush_buffer~*((*tty_struct ) : VOID)?chars_in_buffer~*((*tty_struct ) : UINT)?read~*((*tty_struct *file *UCHAR UINT ) : UINT)?write~*((*tty_struct *file *UCHAR UINT ) : UINT)?ioctl~*((*tty_struct *file UINT ULONG ) : INT)?compat_ioctl~*((*tty_struct *file UINT ULONG ) : LONG)?set_termios~*((*tty_struct *ktermios ) : VOID)?poll~*((*tty_struct *file *poll_table_struct ) : UINT)?hangup~*((*tty_struct ) : INT)?receive_buf~*((*tty_struct *UCHAR *CHAR INT ) : VOID)?write_wakeup~*((*tty_struct ) : VOID)?dcd_change~*((*tty_struct UINT *pps_event_time ) : VOID)?owner~*module?refcount~INT# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 4294967336 could not be translated for associated CType STRUCT~~net_device_ops?ndo_init~*((*net_device ) : INT)?ndo_uninit~*((*net_device ) : VOID)?ndo_open~*((*net_device ) : INT)?ndo_stop~*((*net_device ) : INT)?ndo_start_xmit~*((*sk_buff *net_device ) : ~netdev_tx_t~0)?ndo_select_queue~*((*net_device *sk_buff ) : ~u16~0)?ndo_change_rx_flags~*((*net_device INT ) : VOID)?ndo_set_rx_mode~*((*net_device ) : VOID)?ndo_set_multicast_list~*((*net_device ) : VOID)?ndo_set_mac_address~*((*net_device *VOID ) : INT)?ndo_validate_addr~*((*net_device ) : INT)?ndo_do_ioctl~*((*net_device *ifreq INT ) : INT)?ndo_set_config~*((*net_device *ifmap ) : INT)?ndo_change_mtu~*((*net_device INT ) : INT)?ndo_neigh_setup~*((*net_device *neigh_parms ) : INT)?ndo_tx_timeout~*((*net_device ) : VOID)?ndo_get_stats64~*((*net_device *rtnl_link_stats64 ) : *rtnl_link_stats64)?ndo_get_stats~*((*net_device ) : *net_device_stats)?ndo_vlan_rx_register~*((*net_device *vlan_group ) : VOID)?ndo_vlan_rx_add_vid~*((*net_device USHORT ) : VOID)?ndo_vlan_rx_kill_vid~*((*net_device USHORT ) : VOID)?ndo_poll_controller~*((*net_device ) : VOID)?ndo_netpoll_setup~*((*net_device *netpoll_info ) : INT)?ndo_netpoll_cleanup~*((*net_device ) : VOID)?ndo_set_vf_mac~*((*net_device INT *~u8~0 ) : INT)?ndo_set_vf_vlan~*((*net_device INT ~u16~0 ~u8~0 ) : INT)?ndo_set_vf_tx_rate~*((*net_device INT INT ) : INT)?ndo_get_vf_config~*((*net_device INT *ifla_vf_info ) : INT)?ndo_set_vf_port~*((*net_device INT **nlattr ) : INT)?ndo_get_vf_port~*((*net_device INT *sk_buff ) : INT)?ndo_fcoe_enable~*((*net_device ) : INT)?ndo_fcoe_disable~*((*net_device ) : INT)?ndo_fcoe_ddp_setup~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_ddp_done~*((*net_device ~u16~0 ) : INT)?ndo_fcoe_get_wwn~*((*net_device *~u64~0 INT ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 4294967384 could not be translated for associated CType STRUCT~~tty_ldisc_ops?magic~INT?name~*CHAR?num~INT?flags~INT?open~*((*tty_struct ) : INT)?close~*((*tty_struct ) : VOID)?flush_buffer~*((*tty_struct ) : VOID)?chars_in_buffer~*((*tty_struct ) : UINT)?read~*((*tty_struct *file *UCHAR UINT ) : UINT)?write~*((*tty_struct *file *UCHAR UINT ) : UINT)?ioctl~*((*tty_struct *file UINT ULONG ) : INT)?compat_ioctl~*((*tty_struct *file UINT ULONG ) : LONG)?set_termios~*((*tty_struct *ktermios ) : VOID)?poll~*((*tty_struct *file *poll_table_struct ) : UINT)?hangup~*((*tty_struct ) : INT)?receive_buf~*((*tty_struct *UCHAR *CHAR INT ) : VOID)?write_wakeup~*((*tty_struct ) : VOID)?dcd_change~*((*tty_struct UINT *pps_event_time ) : VOID)?owner~*module?refcount~INT# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 4294967326 could not be translated for associated CType STRUCT~~net_device_ops?ndo_init~*((*net_device ) : INT)?ndo_uninit~*((*net_device ) : VOID)?ndo_open~*((*net_device ) : INT)?ndo_stop~*((*net_device ) : INT)?ndo_start_xmit~*((*sk_buff *net_device ) : ~netdev_tx_t~0)?ndo_select_queue~*((*net_device *sk_buff ) : ~u16~0)?ndo_change_rx_flags~*((*net_device INT ) : VOID)?ndo_set_rx_mode~*((*net_device ) : VOID)?ndo_set_multicast_list~*((*net_device ) : VOID)?ndo_set_mac_address~*((*net_device *VOID ) : INT)?ndo_validate_addr~*((*net_device ) : INT)?ndo_do_ioctl~*((*net_device *ifreq INT ) : INT)?ndo_set_config~*((*net_device *ifmap ) : INT)?ndo_change_mtu~*((*net_device INT ) : INT)?ndo_neigh_setup~*((*net_device *neigh_parms ) : INT)?ndo_tx_timeout~*((*net_device ) : VOID)?ndo_get_stats64~*((*net_device *rtnl_link_stats64 ) : *rtnl_link_stats64)?ndo_get_stats~*((*net_device ) : *net_device_stats)?ndo_vlan_rx_register~*((*net_device *vlan_group ) : VOID)?ndo_vlan_rx_add_vid~*((*net_device USHORT ) : VOID)?ndo_vlan_rx_kill_vid~*((*net_device USHORT ) : VOID)?ndo_poll_controller~*((*net_device ) : VOID)?ndo_netpoll_setup~*((*net_device *netpoll_info ) : INT)?ndo_netpoll_cleanup~*((*net_device ) : VOID)?ndo_set_vf_mac~*((*net_device INT *~u8~0 ) : INT)?ndo_set_vf_vlan~*((*net_device INT ~u16~0 ~u8~0 ) : INT)?ndo_set_vf_tx_rate~*((*net_device INT INT ) : INT)?ndo_get_vf_config~*((*net_device INT *ifla_vf_info ) : INT)?ndo_set_vf_port~*((*net_device INT **nlattr ) : INT)?ndo_get_vf_port~*((*net_device INT *sk_buff ) : INT)?ndo_fcoe_enable~*((*net_device ) : INT)?ndo_fcoe_disable~*((*net_device ) : INT)?ndo_fcoe_ddp_setup~*((*net_device ~u16~0 *scatterlist UINT ) : INT)?ndo_fcoe_ddp_done~*((*net_device ~u16~0 ) : INT)?ndo_fcoe_get_wwn~*((*net_device *~u64~0 INT ) : INT)# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch564 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch540 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch564 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch561 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch23 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Expression #t~switch23 has a C AST node but it is no IASTExpression: class org.eclipse.cdt.internal.core.dom.parser.c.CASTSwitchStatement * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 7649]: Unable to prove that call of __VERIFIER_error() unreachable Unable to prove that call of __VERIFIER_error() unreachable Reason: overapproximation of bitwiseOr at line 4936, overapproximation of bitwiseAnd at line 4711. Possible FailurePath: [L4940] int LDV_IN_INTERRUPT = 1; [L4941] int ldv_timer_state_2 = 0; [L4942] int ldv_state_variable_0 ; [L4943] struct tty_struct *sl_ldisc_group1 ; [L4944] int ldv_state_variable_3 ; [L4945] struct timer_list *ldv_timer_list_2 ; [L4946] int ldv_timer_state_1 = 0; [L4947] int ldv_state_variable_2 ; [L4948] int ref_cnt ; [L4949] int ldv_state_variable_1 ; [L4950] struct timer_list *ldv_timer_list_1 ; [L4951] struct net_device *sl_netdev_ops_group1 ; [L4952] int ldv_state_variable_4 ; [L5138] static struct net_device **slip_devs ; [L5139] static int slip_maxdev = 256; [L5954-L5957] static struct net_device_ops const sl_netdev_ops = {& sl_init, & sl_uninit, & sl_open, & sl_close, & sl_xmit, 0, 0, 0, 0, 0, 0, & sl_ioctl, 0, & sl_change_mtu, 0, & sl_tx_timeout, & sl_get_stats64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; [L6826-L6829] static struct tty_ldisc_ops sl_ldisc = {21507, (char *)"slip", 0, 0, & slip_open, & slip_close, 0, 0, 0, 0, & slip_ioctl, & slip_compat_ioctl, 0, 0, & slip_hangup, & slip_receive_buf, & slip_write_wakeup, 0, & __this_module, 0}; [L7008] int ldv_retval_0 ; [L7009] int ldv_retval_1 ; [L7012] int ldv_retval_3 ; [L7013] int ldv_retval_2 ; VAL [\old(LDV_IN_INTERRUPT)=4294967309, \old(ldv_retval_0)=4294967354, \old(ldv_retval_1)=4294967301, \old(ldv_retval_2)=4294967362, \old(ldv_retval_3)=4294967310, \old(ldv_state_variable_0)=4294967320, \old(ldv_state_variable_1)=4294967330, \old(ldv_state_variable_2)=4294967377, \old(ldv_state_variable_3)=4294967345, \old(ldv_state_variable_4)=4294967376, \old(ldv_timer_list_1)=4294967386, \old(ldv_timer_list_1)=4294967335, \old(ldv_timer_list_2)=4294967338, \old(ldv_timer_list_2)=4294967348, \old(ldv_timer_state_1)=4294967342, \old(ldv_timer_state_2)=4294967373, \old(ref_cnt)=4294967374, \old(sl_ldisc)=null, \old(sl_ldisc)=null, \old(sl_ldisc_group1)=4294967372, \old(sl_ldisc_group1)=4294967399, \old(sl_netdev_ops)=null, \old(sl_netdev_ops)=null, \old(sl_netdev_ops_group1)=4294967363, \old(sl_netdev_ops_group1)=4294967316, \old(slip_devs)=4294967380, \old(slip_devs)=4294967329, \old(slip_maxdev)=4294967339, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L7128] struct sk_buff *ldvarg1 ; [L7129] void *tmp ; [L7130] struct ifreq *ldvarg4 ; [L7131] void *tmp___0 ; [L7132] int ldvarg3 ; [L7133] struct rtnl_link_stats64 *ldvarg0 ; [L7134] void *tmp___1 ; [L7135] int ldvarg2 ; [L7136] unsigned long ldvarg11 ; [L7137] struct file *ldvarg7 ; [L7138] void *tmp___2 ; [L7139] unsigned int ldvarg12 ; [L7140] unsigned long ldvarg5 ; [L7141] unsigned int ldvarg6 ; [L7142] int ldvarg8 ; [L7143] struct file *ldvarg13 ; [L7144] void *tmp___3 ; [L7145] unsigned char *ldvarg10 ; [L7146] void *tmp___4 ; [L7147] char *ldvarg9 ; [L7148] void *tmp___5 ; [L7149] int tmp___6 ; [L7150] int tmp___7 ; [L7151] int tmp___8 ; [L7152] int tmp___9 ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg8={-30064771101:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L7154] CALL, EXPR ldv_init_zalloc(240UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=240, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=240, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, calloc(1UL, size)={-25769803775:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=240, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=240, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-25769803775:0}, __this_module={4294967351:4294967347}, calloc(1UL, size)={-25769803775:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-25769803775:0}, ref_cnt=0, size=240, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}] [L7154] RET, EXPR ldv_init_zalloc(240UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(240UL)={-25769803775:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg8={-30064771101:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L7154] tmp = ldv_init_zalloc(240UL) [L7155] ldvarg1 = (struct sk_buff *)tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg1={-25769803775:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg8={-30064771101:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}] [L7156] CALL, EXPR ldv_init_zalloc(40UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=40, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=40, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, calloc(1UL, size)={-21474836479:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=40, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=40, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-21474836479:0}, __this_module={4294967351:4294967347}, calloc(1UL, size)={-21474836479:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-21474836479:0}, ref_cnt=0, size=40, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-21474836479:0}] [L7156] RET, EXPR ldv_init_zalloc(40UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(40UL)={-21474836479:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg1={-25769803775:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg8={-30064771101:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}] [L7156] tmp___0 = ldv_init_zalloc(40UL) [L7157] ldvarg4 = (struct ifreq *)tmp___0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg1={-25769803775:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg8={-30064771101:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}] [L7158] CALL, EXPR ldv_init_zalloc(184UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=184, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=184, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, calloc(1UL, size)={-17179869183:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=184, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=184, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-17179869183:0}, __this_module={4294967351:4294967347}, calloc(1UL, size)={-17179869183:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-17179869183:0}, ref_cnt=0, size=184, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-17179869183:0}] [L7158] RET, EXPR ldv_init_zalloc(184UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(184UL)={-17179869183:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg1={-25769803775:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg8={-30064771101:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}] [L7158] tmp___1 = ldv_init_zalloc(184UL) [L7159] ldvarg0 = (struct rtnl_link_stats64 *)tmp___1 [L7160] tmp___2 = __VERIFIER_nondet_pointer() [L7161] ldvarg7 = (struct file *)tmp___2 [L7162] tmp___3 = __VERIFIER_nondet_pointer() [L7163] ldvarg13 = (struct file *)tmp___3 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}] [L7164] CALL, EXPR ldv_init_zalloc(1UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, calloc(1UL, size)={-12884901887:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=1, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-12884901887:0}, __this_module={4294967351:4294967347}, calloc(1UL, size)={-12884901887:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-12884901887:0}, ref_cnt=0, size=1, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-12884901887:0}] [L7164] RET, EXPR ldv_init_zalloc(1UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(1UL)={-12884901887:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}] [L7164] tmp___4 = ldv_init_zalloc(1UL) [L7165] ldvarg10 = (unsigned char *)tmp___4 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}] [L7166] CALL, EXPR ldv_init_zalloc(1UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, calloc(1UL, size)={-8589934591:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=1, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=1, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-8589934591:0}, __this_module={4294967351:4294967347}, calloc(1UL, size)={-8589934591:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-8589934591:0}, ref_cnt=0, size=1, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-8589934591:0}] [L7166] RET, EXPR ldv_init_zalloc(1UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(1UL)={-8589934591:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}] [L7166] tmp___5 = ldv_init_zalloc(1UL) [L7167] ldvarg9 = (char *)tmp___5 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}] [L7168] FCALL ldv_initialize() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}] [L7169] CALL ldv_memset((void *)(& ldvarg3), 0, 4UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-30064771099:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-30064771099:0}, s={-30064771099:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-30064771099:0}, n=4, ref_cnt=0, s={-30064771099:0}, s={-30064771099:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-30064771099:0}, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-30064771099:0}, s={-30064771099:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-30064771099:0}] [L7169] RET ldv_memset((void *)(& ldvarg3), 0, 4UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg3), 0, 4UL)={-30064771099:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}] [L7170] CALL ldv_memset((void *)(& ldvarg2), 0, 4UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-30064771100:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-30064771100:0}, s={-30064771100:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-30064771100:0}, n=4, ref_cnt=0, s={-30064771100:0}, s={-30064771100:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-30064771100:0}, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-30064771100:0}, s={-30064771100:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-30064771100:0}] [L7170] RET ldv_memset((void *)(& ldvarg2), 0, 4UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg2), 0, 4UL)={-30064771100:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}] [L7171] CALL ldv_memset((void *)(& ldvarg11), 0, 8UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-30064771103:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=8, ref_cnt=0, s={-30064771103:0}, s={-30064771103:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-30064771103:0}, n=8, ref_cnt=0, s={-30064771103:0}, s={-30064771103:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-30064771103:0}, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=8, ref_cnt=0, s={-30064771103:0}, s={-30064771103:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-30064771103:0}] [L7171] RET ldv_memset((void *)(& ldvarg11), 0, 8UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg11), 0, 8UL)={-30064771103:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}] [L7172] CALL ldv_memset((void *)(& ldvarg12), 0, 4UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-30064771105:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-30064771105:0}, s={-30064771105:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-30064771105:0}, n=4, ref_cnt=0, s={-30064771105:0}, s={-30064771105:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-30064771105:0}, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-30064771105:0}, s={-30064771105:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-30064771105:0}] [L7172] RET ldv_memset((void *)(& ldvarg12), 0, 4UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg12), 0, 4UL)={-30064771105:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}] [L7173] CALL ldv_memset((void *)(& ldvarg5), 0, 8UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-30064771102:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=8, ref_cnt=0, s={-30064771102:0}, s={-30064771102:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-30064771102:0}, n=8, ref_cnt=0, s={-30064771102:0}, s={-30064771102:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=8, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-30064771102:0}, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=8, ref_cnt=0, s={-30064771102:0}, s={-30064771102:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-30064771102:0}] [L7173] RET ldv_memset((void *)(& ldvarg5), 0, 8UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg5), 0, 8UL)={-30064771102:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}] [L7174] CALL ldv_memset((void *)(& ldvarg6), 0, 4UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-30064771104:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-30064771104:0}, s={-30064771104:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-30064771104:0}, n=4, ref_cnt=0, s={-30064771104:0}, s={-30064771104:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-30064771104:0}, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-30064771104:0}, s={-30064771104:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-30064771104:0}] [L7174] RET ldv_memset((void *)(& ldvarg6), 0, 4UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg6), 0, 4UL)={-30064771104:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}] [L7175] CALL ldv_memset((void *)(& ldvarg8), 0, 4UL) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, s={-30064771101:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4772] void *tmp ; VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-30064771101:0}, s={-30064771101:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] EXPR, FCALL memset(s, c, n) VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, memset(s, c, n)={-30064771101:0}, n=4, ref_cnt=0, s={-30064771101:0}, s={-30064771101:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4774] tmp = memset(s, c, n) [L4775] return (tmp); VAL [\old(c)=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(n)=4, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-30064771101:0}, __this_module={4294967351:4294967347}, c=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, n=4, ref_cnt=0, s={-30064771101:0}, s={-30064771101:0}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-30064771101:0}] [L7175] RET ldv_memset((void *)(& ldvarg8), 0, 4UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_memset((void *)(& ldvarg8), 0, 4UL)={-30064771101:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}] [L7176] ldv_state_variable_4 = 0 [L7177] ldv_state_variable_1 = 1 [L7178] ref_cnt = 0 [L7179] ldv_state_variable_0 = 1 [L7180] ldv_state_variable_3 = 0 [L7181] ldv_state_variable_2 = 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}] [L7183] tmp___6 = __VERIFIER_nondet_int() [L7185] case 0: [L7302] case 1: [L7308] case 2: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=2] [L7309] COND TRUE ldv_state_variable_0 != 0 [L7310] tmp___8 = __VERIFIER_nondet_int() [L7312] case 0: [L7320] case 1: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=2, tmp___8=1] [L7321] COND TRUE ldv_state_variable_0 == 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=2, tmp___8=1] [L7322] CALL, EXPR slip_init() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L6832] int status ; [L6833] void *tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L6835] COND FALSE !(slip_maxdev <= 3) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L6843] CALL, EXPR kzalloc((unsigned long )slip_maxdev * 8UL, 208U) VAL [\old(flags)=208, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4934] void *tmp ; VAL [\old(flags)=208, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, flags=208, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4936] CALL, EXPR kmalloc(size, flags | 32768U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4926] void *tmp___2 ; VAL [\old(flags)=86, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, flags=86, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4928] CALL, EXPR __kmalloc(size, flags) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \old(t)=86, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4922] CALL, EXPR ldv_malloc(size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4727] void *p ; [L4728] void *tmp ; [L4729] int tmp___0 ; [L4731] tmp___0 = __VERIFIER_nondet_int() [L4732] COND FALSE !(tmp___0 != 0) [L4735] tmp = malloc(size) [L4736] p = tmp [L4738] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294967297:0}, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, malloc(size)={4294967297:0}, p={4294967297:0}, ref_cnt=0, size=2048, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={4294967297:0}, tmp___0=0] [L4922] RET, EXPR ldv_malloc(size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \old(t)=86, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_malloc(size)={4294967297:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, t=86] [L4922] return ldv_malloc(size); [L4928] RET, EXPR __kmalloc(size, flags) VAL [\old(flags)=86, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __kmalloc(size, flags)={4294967297:0}, __this_module={4294967351:4294967347}, flags=86, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4928] tmp___2 = __kmalloc(size, flags) [L4929] return (tmp___2); VAL [\old(flags)=86, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294967297:0}, __this_module={4294967351:4294967347}, flags=86, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp___2={4294967297:0}] [L4936] RET, EXPR kmalloc(size, flags | 32768U) VAL [\old(flags)=208, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, flags=208, kmalloc(size, flags | 32768U)={4294967297:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L4936] tmp = kmalloc(size, flags | 32768U) [L4937] return (tmp); VAL [\old(flags)=208, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2048, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294967297:0}, __this_module={4294967351:4294967347}, flags=208, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2048, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256, tmp={4294967297:0}] [L6843] RET, EXPR kzalloc((unsigned long )slip_maxdev * 8UL, 208U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, kzalloc((unsigned long )slip_maxdev * 8UL, 208U)={4294967297:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={0:0}, slip_maxdev=256] [L6843] tmp = kzalloc((unsigned long )slip_maxdev * 8UL, 208U) [L6844] slip_devs = (struct net_device **)tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={4294967297:0}] [L6845] COND FALSE !((unsigned long )slip_devs == (unsigned long )((struct net_device **)0)) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={4294967297:0}] [L6850] CALL, EXPR tty_register_ldisc(1, & sl_ldisc) VAL [\old(arg0)=1, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, arg1={-30064771077:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7800] return __VERIFIER_nondet_int(); [L6850] RET, EXPR tty_register_ldisc(1, & sl_ldisc) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={4294967297:0}, tty_register_ldisc(1, & sl_ldisc)=0] [L6850] status = tty_register_ldisc(1, & sl_ldisc) [L6851] COND FALSE !(status != 0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, status=0, tmp={4294967297:0}] [L6856] return (status); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result=0, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, status=0, tmp={4294967297:0}] [L7322] RET, EXPR slip_init() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_init()=0, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=2, tmp___8=1] [L7322] ldv_retval_2 = slip_init() [L7323] COND FALSE !(ldv_retval_2 != 0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=2, tmp___8=1] [L7328] COND TRUE ldv_retval_2 == 0 [L7329] ldv_state_variable_0 = 2 [L7330] ldv_state_variable_3 = 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=2, tmp___8=1] [L7331] CALL ldv_target_type_3() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7016] void *tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7018] CALL, EXPR ldv_init_zalloc(2696UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2696, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2696, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, calloc(1UL, size)={4294964516:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2696, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2696, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294964516:0}, __this_module={4294967351:4294967347}, calloc(1UL, size)={4294964516:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={4294964516:0}, ref_cnt=0, size=2696, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={4294964516:0}] [L7018] RET, EXPR ldv_init_zalloc(2696UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(2696UL)={4294964516:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={0:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7018] tmp = ldv_init_zalloc(2696UL) [L7019] sl_ldisc_group1 = (struct tty_struct *)tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={4294964516:0}] [L7331] RET ldv_target_type_3() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=2, tmp___8=1] [L7332] ldv_state_variable_4 = 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=2, tmp___8=1] [L7333] CALL ldv_net_device_ops_4() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7025] void *tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7027] CALL, EXPR ldv_init_zalloc(2496UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2496, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4761] void *p ; [L4762] void *tmp ; [L4764] EXPR, FCALL calloc(1UL, size) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2496, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, calloc(1UL, size)={-30064771071:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, size=2496, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4764] tmp = calloc(1UL, size) [L4765] p = tmp [L4767] return (p); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(size)=2496, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={-30064771071:0}, __this_module={4294967351:4294967347}, calloc(1UL, size)={-30064771071:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, p={-30064771071:0}, ref_cnt=0, size=2496, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-30064771071:0}] [L7027] RET, EXPR ldv_init_zalloc(2496UL) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_init_zalloc(2496UL)={-30064771071:0}, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={0:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7027] tmp = ldv_init_zalloc(2496UL) [L7028] sl_netdev_ops_group1 = (struct net_device *)tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-30064771071:0}] [L7333] RET ldv_net_device_ops_4() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=2, tmp___8=1] [L7183] tmp___6 = __VERIFIER_nondet_int() [L7185] case 0: [L7302] case 1: [L7308] case 2: [L7346] case 3: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=3, tmp___8=1] [L7347] COND TRUE ldv_state_variable_3 != 0 [L7348] tmp___9 = __VERIFIER_nondet_int() [L7350] case 0: [L7362] case 1: [L7374] case 2: [L7382] case 3: [L7389] case 4: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=3, tmp___8=1, tmp___9=4] [L7390] COND TRUE ldv_state_variable_3 == 1 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ldvarg0={-17179869183:0}, ldvarg1={-25769803775:0}, ldvarg10={-12884901887:0}, ldvarg11={-30064771103:0}, ldvarg12={-30064771105:0}, ldvarg13={4294967325:4294967379}, ldvarg2={-30064771100:0}, ldvarg3={-30064771099:0}, ldvarg4={-21474836479:0}, ldvarg5={-30064771102:0}, ldvarg6={-30064771104:0}, ldvarg7={4294967398:4294967360}, ldvarg8={-30064771101:0}, ldvarg9={-8589934591:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp={-25769803775:0}, tmp___0={-21474836479:0}, tmp___1={-17179869183:0}, tmp___2={4294967398:4294967360}, tmp___3={4294967325:4294967379}, tmp___4={-12884901887:0}, tmp___5={-8589934591:0}, tmp___6=3, tmp___8=1, tmp___9=4] [L7391] CALL ldv_slip_open_18(sl_ldisc_group1) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tty={4294964516:0}] [L7636] ldv_func_ret_type___16 ldv_func_res ; [L7637] int tmp ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tty={4294964516:0}, tty={4294964516:0}] [L7639] CALL, EXPR slip_open(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tty={4294964516:0}] [L6140] struct slip *sl ; [L6141] int err ; [L6142] int tmp ; [L6143] dev_t tmp___0 ; [L6144] struct task_struct *tmp___1 ; [L6145] int tmp___2 ; VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tty={4294964516:0}, tty={4294964516:0}] [L6147] CALL, EXPR capable(12) VAL [\old(arg0)=12, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7693] return __VERIFIER_nondet_int(); [L6147] RET, EXPR capable(12) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, capable(12)=9, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tty={4294964516:0}, tty={4294964516:0}] [L6147] tmp = capable(12) [L6148] COND FALSE !(tmp == 0) [L6152] EXPR tty->ops [L6152] EXPR (tty->ops)->write VAL [(tty->ops)->write={-2:3}, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tty={4294964516:0}, tty={4294964516:0}, tty->ops={4294967315:0}] [L6152-L6154] COND FALSE !((unsigned long )(tty->ops)->write == (unsigned long )((int (* )(struct tty_struct * , unsigned char const * , int ))0)) [L6158] FCALL rtnl_lock() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tty={4294964516:0}, tty={4294964516:0}] [L6159] CALL sl_sync() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6029] int i ; [L6030] struct net_device *dev ; [L6031] struct slip *sl ; [L6032] void *tmp ; [L6034] i = 0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6055] COND TRUE i < slip_maxdev VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6037] EXPR slip_devs + (unsigned long )i [L6037] dev = *(slip_devs + (unsigned long )i) [L6038] COND TRUE (unsigned long )dev == (unsigned long )((struct net_device *)0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6159] RET sl_sync() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tty={4294964516:0}, tty={4294964516:0}] [L6160] EXPR tty->disc_data [L6160] sl = (struct slip *)tty->disc_data [L6161] err = -17 [L6162] (unsigned long )sl != (unsigned long )((struct slip *)0) && sl->magic == 21250 [L6162] EXPR sl->magic [L6162] (unsigned long )sl != (unsigned long )((struct slip *)0) && sl->magic == 21250 VAL [(unsigned long )sl != (unsigned long )((struct slip *)0) && sl->magic == 21250=0, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-17, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl->magic=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tty={4294964516:0}, tty={4294964516:0}] [L6162] COND FALSE !((unsigned long )sl != (unsigned long )((struct slip *)0) && sl->magic == 21250) [L6166] err = -23 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tty={4294964516:0}, tty={4294964516:0}] [L6167] CALL, EXPR tty_devnum(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, arg0={4294964516:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7789] return __VERIFIER_nondet_uint(); [L6167] RET, EXPR tty_devnum(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tty={4294964516:0}, tty={4294964516:0}, tty_devnum(tty)=4294967396] [L6167] tmp___0 = tty_devnum(tty) [L6168] CALL, EXPR sl_alloc(tmp___0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6065] int i ; [L6066] struct net_device *dev ; [L6067] struct slip *sl ; [L6068] void *tmp ; [L6069] int tmp___0 ; [L6070] char name[16U] ; [L6071] void *tmp___1 ; [L6072] struct lock_class_key __key ; [L6074] dev = (struct net_device *)0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={0:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6075] COND FALSE !((unsigned long )slip_devs == (unsigned long )((struct net_device **)0)) [L6079] i = 0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6089] COND TRUE i < slip_maxdev VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6082] EXPR slip_devs + (unsigned long )i [L6082] dev = *(slip_devs + (unsigned long )i) [L6083] COND TRUE (unsigned long )dev == (unsigned long )((struct net_device *)0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6094] COND FALSE !(i >= slip_maxdev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6098] COND FALSE !((unsigned long )dev != (unsigned long )((struct net_device *)0)) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6110] COND TRUE (unsigned long )dev == (unsigned long )((struct net_device *)0) [L6112] CALL, EXPR alloc_netdev_mqs(472, (char const *)(& name), & sl_setup, 1U, 1U) VAL [\old(arg0)=472, \old(arg3)=1, \old(arg4)=1, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, arg1={-30064771106:0}, arg2={-1:10}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7689] CALL, EXPR external_alloc() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7817] return __VERIFIER_nondet_pointer(); [L7689] RET, EXPR external_alloc() VAL [\old(arg0)=472, \old(arg3)=1, \old(arg4)=1, \old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, arg0=472, arg1={-30064771106:0}, arg1={-30064771106:0}, arg2={-1:10}, arg2={-1:10}, arg3=1, arg4=1, external_alloc()={4294964516:283}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7689] return (struct net_device *)external_alloc(); [L6112] RET, EXPR alloc_netdev_mqs(472, (char const *)(& name), & sl_setup, 1U, 1U) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, alloc_netdev_mqs(472, (char const *)(& name), & sl_setup, 1U, 1U)={4294964516:283}, dev={0:0}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6112] dev = alloc_netdev_mqs(472, (char const *)(& name), & sl_setup, 1U, 1U) [L6113] COND FALSE !((unsigned long )dev == (unsigned long )((struct net_device *)0)) [L6117] dev->base_addr = (unsigned long )i VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={4294964516:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6120] CALL, EXPR netdev_priv((struct net_device const *)dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, dev={4294964516:283}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L5007] return ((void *)dev + 2496U); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294964516:2779}, __this_module={4294967351:4294967347}, dev={4294964516:283}, dev={4294964516:283}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6120] RET, EXPR netdev_priv((struct net_device const *)dev) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={4294964516:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, netdev_priv((struct net_device const *)dev)={4294964516:2779}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6120] tmp___1 = netdev_priv((struct net_device const *)dev) [L6121] sl = (struct slip *)tmp___1 [L6122] sl->magic = 21250 [L6123] sl->dev = dev VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={4294964516:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={4294964516:2779}] [L6124] CALL spinlock_check(& sl->lock) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, lock={4294964516:2791}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4866] return (& lock->__annonCompField19.rlock); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294964516:2791}, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, lock={4294964516:2791}, lock={4294964516:2791}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6124] RET spinlock_check(& sl->lock) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={4294964516:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, spinlock_check(& sl->lock)={4294964516:2791}, tmp___1={4294964516:2779}] [L6125-L6126] FCALL __raw_spin_lock_init(& sl->lock.__annonCompField19.rlock, "&(&sl->lock)->rlock", & __key) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={4294964516:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={4294964516:2779}] [L6127] sl->mode = 8U VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={4294964516:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={4294964516:2779}] [L6128] CALL reg_timer_1(& sl->keepalive_timer) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={0:0}, ldv_timer_list_2={0:0}, ldv_timer_state_1=0, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, timer={4294964516:2979}] [L7063] ldv_timer_list_1 = timer [L7064] ldv_timer_state_1 = 1 [L7065] return (0); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result=0, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2979}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, timer={4294964516:2979}, timer={4294964516:2979}] [L6128] RET reg_timer_1(& sl->keepalive_timer) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={4294964516:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2979}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, reg_timer_1(& sl->keepalive_timer)=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={4294964516:2779}] [L6129] sl->keepalive_timer.data = (unsigned long )sl [L6130] sl->keepalive_timer.function = & sl_keepalive VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={4294964516:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2979}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={4294964516:2779}] [L6131] CALL reg_timer_1(& sl->outfill_timer) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=2979, \old(ldv_timer_list_1)=4294964516, \old(ldv_timer_state_1)=1, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2979}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, timer={4294964516:2903}] [L7063] ldv_timer_list_1 = timer [L7064] ldv_timer_state_1 = 1 [L7065] return (0); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=2979, \old(ldv_timer_list_1)=4294964516, \old(ldv_timer_state_1)=1, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result=0, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, timer={4294964516:2903}, timer={4294964516:2903}] [L6131] RET reg_timer_1(& sl->outfill_timer) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __key={-30064771073:0}, __this_module={4294967351:4294967347}, dev={4294964516:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, line=100, name={-30064771106:0}, ref_cnt=0, reg_timer_1(& sl->outfill_timer)=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={4294964516:2779}] [L6132] sl->outfill_timer.data = (unsigned long )sl [L6133] sl->outfill_timer.function = & sl_outfill [L6134] *(slip_devs + (unsigned long )i) = dev [L6135] return (sl); [L6135] return (sl); [L6135] return (sl); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(line)=100, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294964516:2779}, __this_module={4294967351:4294967347}, dev={4294964516:283}, i=0, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, line=100, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp___1={4294964516:2779}] [L6168] RET, EXPR sl_alloc(tmp___0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl_alloc(tmp___0)={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tmp___0=100, tty={4294964516:0}, tty={4294964516:0}] [L6168] sl = sl_alloc(tmp___0) [L6169] COND FALSE !((unsigned long )sl == (unsigned long )((struct slip *)0)) [L6173] sl->tty = tty [L6174] tty->disc_data = (void *)sl VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tmp___0=100, tty={4294964516:0}, tty={4294964516:0}] [L6175] CALL, EXPR tty_devnum(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, arg0={4294964516:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7789] return __VERIFIER_nondet_uint(); [L6175] RET, EXPR tty_devnum(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tmp___0=100, tty={4294964516:0}, tty={4294964516:0}, tty_devnum(tty)=0] [L6175] sl->line = tty_devnum(tty) [L6176] CALL, EXPR get_current() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4834] struct task_struct *pfo_ret__ ; [L4837] case 1UL: [L4840] case 2UL: [L4843] case 4UL: [L4846] case 8UL: VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4853] return (pfo_ret__); VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, \result={4294967323:0}, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, pfo_ret__={4294967323:0}, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L6176] RET, EXPR get_current() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-23, get_current()={4294967323:0}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tmp___0=100, tty={4294964516:0}, tty={4294964516:0}] [L6176] tmp___1 = get_current() [L6177] EXPR tmp___1->pid [L6177] sl->pid = tmp___1->pid [L6178] CALL, EXPR constant_test_bit(0U, (unsigned long const volatile *)(& sl->flags)) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(nr)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, addr={4294964516:2887}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L4711] EXPR addr + (unsigned long )(nr / 64U) [L4711] return ((int )((unsigned long )*(addr + (unsigned long )(nr / 64U)) >> ((int )nr & 63)) & 1); [L6178] RET, EXPR constant_test_bit(0U, (unsigned long const volatile *)(& sl->flags)) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, constant_test_bit(0U, (unsigned long const volatile *)(& sl->flags))=1, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tmp___0=100, tmp___1={4294967323:0}, tty={4294964516:0}, tty={4294964516:0}] [L6178] tmp___2 = constant_test_bit(0U, (unsigned long const volatile *)(& sl->flags)) [L6179] COND FALSE !(tmp___2 == 0) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tmp___0=100, tmp___1={4294967323:0}, tmp___2=1, tty={4294964516:0}, tty={4294964516:0}] [L6193] EXPR sl->keepalive VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl->keepalive=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tmp___0=100, tmp___1={4294967323:0}, tmp___2=1, tty={4294964516:0}, tty={4294964516:0}] [L6193] COND FALSE !((unsigned int )sl->keepalive != 0U) [L6198] EXPR sl->outfill VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl->outfill=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tmp___0=100, tmp___1={4294967323:0}, tmp___2=1, tty={4294964516:0}, tty={4294964516:0}] [L6198] COND FALSE !((unsigned int )sl->outfill != 0U) [L6203] FCALL rtnl_unlock() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, err=-23, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl={4294964516:2779}, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=9, tmp___0=100, tmp___1={4294967323:0}, tmp___2=1, tty={4294964516:0}, tty={4294964516:0}] [L6204] tty->receive_room = 65536U [L6205] EXPR sl->dev [L6205] EXPR (sl->dev)->base_addr [L6205] return ((int )(sl->dev)->base_addr); [L7639] RET, EXPR slip_open(tty) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, slip_open(tty)=65536, tty={4294964516:0}, tty={4294964516:0}] [L7639] tmp = slip_open(tty) [L7640] ldv_func_res = tmp VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, ldv_func_res=65536, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256, tmp=65536, tty={4294964516:0}, tty={4294964516:0}] [L7641] CALL ldv_check_callback_ret_val(ldv_func_res) VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(ret_val)=65536, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7655] COND TRUE ret_val > 0 VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(ret_val)=65536, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, ret_val=65536, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7656] CALL ldv_error() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] [L7649] __VERIFIER_error() VAL [\old(LDV_IN_INTERRUPT)=1, \old(ldv_retval_0)=0, \old(ldv_retval_1)=0, \old(ldv_retval_2)=0, \old(ldv_retval_3)=0, \old(ldv_state_variable_0)=0, \old(ldv_state_variable_1)=0, \old(ldv_state_variable_2)=0, \old(ldv_state_variable_3)=0, \old(ldv_state_variable_4)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_list_1)=0, \old(ldv_timer_state_1)=0, \old(ldv_timer_state_2)=0, \old(ref_cnt)=0, \old(sl_ldisc_group1)=0, \old(sl_ldisc_group1)=0, \old(sl_netdev_ops_group1)=0, \old(sl_netdev_ops_group1)=0, \old(slip_devs)=0, \old(slip_devs)=0, \old(slip_maxdev)=256, __this_module={4294967351:4294967347}, LDV_IN_INTERRUPT=1, ldv_retval_0=0, ldv_retval_1=0, ldv_retval_2=0, ldv_retval_3=0, ldv_state_variable_0=2, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, ldv_timer_list_1={4294964516:2903}, ldv_timer_list_2={0:0}, ldv_timer_state_1=1, ldv_timer_state_2=0, ref_cnt=0, sl_ldisc={-30064771077:0}, sl_ldisc_group1={4294964516:0}, sl_netdev_ops={-30064771076:0}, sl_netdev_ops_group1={-30064771071:0}, slip_devs={4294967297:0}, slip_maxdev=256] - StatisticsResult: Ultimate Automizer benchmark data CFG has 157 procedures, 1492 locations, 1 error locations. UNSAFE Result, 145.0s OverallTime, 21 OverallIterations, 36 TraceHistogramMax, 14.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 38165 SDtfs, 9382 SDslu, 192664 SDs, 0 SdLazy, 5243 SolverSat, 1382 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3052 GetRequests, 2856 SyntacticMatches, 5 SemanticMatches, 191 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 364 ImplicationChecksByTransitivity, 2.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2808occurred in iteration=20, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 2.6s AutomataMinimizationTime, 20 MinimizatonAttempts, 66 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 1.1s SsaConstructionTime, 113.5s SatisfiabilityAnalysisTime, 6.2s InterpolantComputationTime, 9351 NumberOfCodeBlocks, 8851 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 8949 ConstructedInterpolants, 0 QuantifiedInterpolants, 3565655 SizeOfPredicates, 17 NumberOfNonLiveVariables, 18051 ConjunctsInSsa, 149 ConjunctsInUnsatCore, 28 InterpolantComputations, 13 PerfectInterpolantSequences, 15695/16847 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...