java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/svcomp-Reach-32bit-Automizer_Default+AIv2_INT.epf -i ../../../trunk/examples/svcomp/systemc/transmitter.04.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-112bae1 [2019-09-10 03:44:37,061 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-09-10 03:44:37,063 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-09-10 03:44:37,074 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-09-10 03:44:37,074 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-09-10 03:44:37,075 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-09-10 03:44:37,077 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-09-10 03:44:37,079 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-09-10 03:44:37,080 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-09-10 03:44:37,081 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-09-10 03:44:37,082 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-09-10 03:44:37,083 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-09-10 03:44:37,083 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-09-10 03:44:37,084 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-09-10 03:44:37,085 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-09-10 03:44:37,086 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-09-10 03:44:37,087 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-09-10 03:44:37,088 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-09-10 03:44:37,090 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-09-10 03:44:37,092 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-09-10 03:44:37,094 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-09-10 03:44:37,095 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-09-10 03:44:37,096 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-09-10 03:44:37,097 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-09-10 03:44:37,099 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-09-10 03:44:37,102 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-09-10 03:44:37,103 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-09-10 03:44:37,103 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-09-10 03:44:37,104 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-09-10 03:44:37,105 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-09-10 03:44:37,105 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-09-10 03:44:37,106 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-09-10 03:44:37,106 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-09-10 03:44:37,106 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-09-10 03:44:37,107 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-09-10 03:44:37,108 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-09-10 03:44:37,109 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/svcomp-Reach-32bit-Automizer_Default+AIv2_INT.epf [2019-09-10 03:44:37,124 INFO L113 SettingsManager]: Loading preferences was successful [2019-09-10 03:44:37,124 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-09-10 03:44:37,124 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2019-09-10 03:44:37,124 INFO L138 SettingsManager]: * Log level for plugins=info [2019-09-10 03:44:37,125 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-09-10 03:44:37,125 INFO L138 SettingsManager]: * User list type=DISABLED [2019-09-10 03:44:37,125 INFO L138 SettingsManager]: * Ignore calls to and inside polymorphic procedures=false [2019-09-10 03:44:37,126 INFO L138 SettingsManager]: * Ignore calls to recursive procedures=false [2019-09-10 03:44:37,126 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-09-10 03:44:37,126 INFO L138 SettingsManager]: * Abstract domain=IntervalDomain [2019-09-10 03:44:37,127 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-09-10 03:44:37,127 INFO L138 SettingsManager]: * sizeof long=4 [2019-09-10 03:44:37,127 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-09-10 03:44:37,127 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-09-10 03:44:37,128 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-09-10 03:44:37,128 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-09-10 03:44:37,128 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-09-10 03:44:37,128 INFO L138 SettingsManager]: * sizeof long double=12 [2019-09-10 03:44:37,128 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-09-10 03:44:37,128 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-09-10 03:44:37,129 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-09-10 03:44:37,129 INFO L138 SettingsManager]: * Remove goto edges from RCFG=true [2019-09-10 03:44:37,129 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-09-10 03:44:37,129 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-09-10 03:44:37,130 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-09-10 03:44:37,130 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-09-10 03:44:37,130 INFO L138 SettingsManager]: * Trace refinement strategy=TAIPAN [2019-09-10 03:44:37,130 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-09-10 03:44:37,130 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-09-10 03:44:37,130 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2019-09-10 03:44:37,158 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-09-10 03:44:37,175 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-09-10 03:44:37,179 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-09-10 03:44:37,180 INFO L271 PluginConnector]: Initializing CDTParser... [2019-09-10 03:44:37,181 INFO L275 PluginConnector]: CDTParser initialized [2019-09-10 03:44:37,181 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/transmitter.04.cil.c [2019-09-10 03:44:37,254 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/258ab1c13/b40b8e6499dc43438e410c7b6381e2c7/FLAGb2b10ca81 [2019-09-10 03:44:37,726 INFO L306 CDTParser]: Found 1 translation units. [2019-09-10 03:44:37,727 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/transmitter.04.cil.c [2019-09-10 03:44:37,741 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/258ab1c13/b40b8e6499dc43438e410c7b6381e2c7/FLAGb2b10ca81 [2019-09-10 03:44:38,118 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/258ab1c13/b40b8e6499dc43438e410c7b6381e2c7 [2019-09-10 03:44:38,130 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-09-10 03:44:38,132 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-09-10 03:44:38,134 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-09-10 03:44:38,135 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-09-10 03:44:38,138 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-09-10 03:44:38,139 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 03:44:38" (1/1) ... [2019-09-10 03:44:38,142 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6bb25d7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38, skipping insertion in model container [2019-09-10 03:44:38,142 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.09 03:44:38" (1/1) ... [2019-09-10 03:44:38,149 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-09-10 03:44:38,204 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-09-10 03:44:38,565 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-09-10 03:44:38,576 INFO L188 MainTranslator]: Completed pre-run [2019-09-10 03:44:38,766 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-09-10 03:44:38,788 INFO L192 MainTranslator]: Completed translation [2019-09-10 03:44:38,788 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38 WrapperNode [2019-09-10 03:44:38,789 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-09-10 03:44:38,789 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-09-10 03:44:38,789 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-09-10 03:44:38,789 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-09-10 03:44:38,802 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38" (1/1) ... [2019-09-10 03:44:38,803 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38" (1/1) ... [2019-09-10 03:44:38,818 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38" (1/1) ... [2019-09-10 03:44:38,818 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38" (1/1) ... [2019-09-10 03:44:38,830 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38" (1/1) ... [2019-09-10 03:44:38,855 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38" (1/1) ... [2019-09-10 03:44:38,858 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38" (1/1) ... [2019-09-10 03:44:38,864 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-09-10 03:44:38,864 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-09-10 03:44:38,864 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-09-10 03:44:38,864 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-09-10 03:44:38,865 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-09-10 03:44:38,917 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-09-10 03:44:38,917 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-09-10 03:44:38,917 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2019-09-10 03:44:38,917 INFO L138 BoogieDeclarations]: Found implementation of procedure master [2019-09-10 03:44:38,917 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit1 [2019-09-10 03:44:38,917 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit2 [2019-09-10 03:44:38,918 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit3 [2019-09-10 03:44:38,918 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit4 [2019-09-10 03:44:38,918 INFO L138 BoogieDeclarations]: Found implementation of procedure is_master_triggered [2019-09-10 03:44:38,918 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit1_triggered [2019-09-10 03:44:38,918 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit2_triggered [2019-09-10 03:44:38,918 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit3_triggered [2019-09-10 03:44:38,919 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit4_triggered [2019-09-10 03:44:38,919 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2019-09-10 03:44:38,919 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2019-09-10 03:44:38,919 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2019-09-10 03:44:38,919 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2019-09-10 03:44:38,920 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2019-09-10 03:44:38,920 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2019-09-10 03:44:38,920 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2019-09-10 03:44:38,920 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2019-09-10 03:44:38,920 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2019-09-10 03:44:38,920 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2019-09-10 03:44:38,921 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2019-09-10 03:44:38,921 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2019-09-10 03:44:38,921 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2019-09-10 03:44:38,921 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-09-10 03:44:38,921 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-09-10 03:44:38,921 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-09-10 03:44:38,922 INFO L130 BoogieDeclarations]: Found specification of procedure error [2019-09-10 03:44:38,922 INFO L130 BoogieDeclarations]: Found specification of procedure is_master_triggered [2019-09-10 03:44:38,922 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit1_triggered [2019-09-10 03:44:38,922 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit2_triggered [2019-09-10 03:44:38,922 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit3_triggered [2019-09-10 03:44:38,922 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit4_triggered [2019-09-10 03:44:38,922 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2019-09-10 03:44:38,923 INFO L130 BoogieDeclarations]: Found specification of procedure master [2019-09-10 03:44:38,923 INFO L130 BoogieDeclarations]: Found specification of procedure transmit1 [2019-09-10 03:44:38,923 INFO L130 BoogieDeclarations]: Found specification of procedure transmit2 [2019-09-10 03:44:38,923 INFO L130 BoogieDeclarations]: Found specification of procedure transmit3 [2019-09-10 03:44:38,923 INFO L130 BoogieDeclarations]: Found specification of procedure transmit4 [2019-09-10 03:44:38,923 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2019-09-10 03:44:38,923 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2019-09-10 03:44:38,924 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2019-09-10 03:44:38,924 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2019-09-10 03:44:38,924 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2019-09-10 03:44:38,924 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2019-09-10 03:44:38,924 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2019-09-10 03:44:38,924 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2019-09-10 03:44:38,925 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2019-09-10 03:44:38,925 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2019-09-10 03:44:38,925 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2019-09-10 03:44:38,925 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2019-09-10 03:44:38,925 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-09-10 03:44:38,925 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-09-10 03:44:38,925 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-09-10 03:44:39,620 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-09-10 03:44:39,621 INFO L283 CfgBuilder]: Removed 8 assume(true) statements. [2019-09-10 03:44:39,622 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 03:44:39 BoogieIcfgContainer [2019-09-10 03:44:39,622 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-09-10 03:44:39,623 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-09-10 03:44:39,624 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-09-10 03:44:39,626 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-09-10 03:44:39,627 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.09 03:44:38" (1/3) ... [2019-09-10 03:44:39,628 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@120e20bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 03:44:39, skipping insertion in model container [2019-09-10 03:44:39,628 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.09 03:44:38" (2/3) ... [2019-09-10 03:44:39,628 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@120e20bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.09 03:44:39, skipping insertion in model container [2019-09-10 03:44:39,628 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.09 03:44:39" (3/3) ... [2019-09-10 03:44:39,630 INFO L109 eAbstractionObserver]: Analyzing ICFG transmitter.04.cil.c [2019-09-10 03:44:39,640 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-09-10 03:44:39,648 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-09-10 03:44:39,664 INFO L252 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-09-10 03:44:39,690 INFO L377 AbstractCegarLoop]: Interprodecural is true [2019-09-10 03:44:39,691 INFO L378 AbstractCegarLoop]: Hoare is false [2019-09-10 03:44:39,691 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-09-10 03:44:39,691 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-09-10 03:44:39,692 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-09-10 03:44:39,692 INFO L382 AbstractCegarLoop]: Difference is false [2019-09-10 03:44:39,692 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-09-10 03:44:39,692 INFO L388 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-09-10 03:44:39,715 INFO L276 IsEmpty]: Start isEmpty. Operand 229 states. [2019-09-10 03:44:39,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:39,733 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:39,735 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:39,737 INFO L418 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:39,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:39,744 INFO L82 PathProgramCache]: Analyzing trace with hash -1449217388, now seen corresponding path program 1 times [2019-09-10 03:44:39,746 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:39,787 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:39,788 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:39,788 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:39,788 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:39,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:40,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:40,221 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:40,221 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:40,222 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:40,228 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:40,242 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:40,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:40,246 INFO L87 Difference]: Start difference. First operand 229 states. Second operand 5 states. [2019-09-10 03:44:40,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:40,922 INFO L93 Difference]: Finished difference Result 268 states and 380 transitions. [2019-09-10 03:44:40,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:40,924 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2019-09-10 03:44:40,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:40,940 INFO L225 Difference]: With dead ends: 268 [2019-09-10 03:44:40,940 INFO L226 Difference]: Without dead ends: 256 [2019-09-10 03:44:40,942 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:40,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2019-09-10 03:44:40,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 220. [2019-09-10 03:44:40,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-09-10 03:44:41,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 304 transitions. [2019-09-10 03:44:41,004 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 304 transitions. Word has length 120 [2019-09-10 03:44:41,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:41,005 INFO L475 AbstractCegarLoop]: Abstraction has 220 states and 304 transitions. [2019-09-10 03:44:41,005 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:41,005 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 304 transitions. [2019-09-10 03:44:41,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:41,009 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:41,010 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:41,010 INFO L418 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:41,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:41,010 INFO L82 PathProgramCache]: Analyzing trace with hash 1789018706, now seen corresponding path program 1 times [2019-09-10 03:44:41,011 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:41,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:41,012 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:41,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:41,012 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:41,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:41,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:41,133 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:41,133 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:41,133 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:41,139 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:41,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:41,140 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:41,140 INFO L87 Difference]: Start difference. First operand 220 states and 304 transitions. Second operand 5 states. [2019-09-10 03:44:41,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:41,705 INFO L93 Difference]: Finished difference Result 256 states and 367 transitions. [2019-09-10 03:44:41,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:41,707 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2019-09-10 03:44:41,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:41,712 INFO L225 Difference]: With dead ends: 256 [2019-09-10 03:44:41,712 INFO L226 Difference]: Without dead ends: 256 [2019-09-10 03:44:41,718 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:41,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2019-09-10 03:44:41,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 220. [2019-09-10 03:44:41,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-09-10 03:44:41,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 303 transitions. [2019-09-10 03:44:41,763 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 303 transitions. Word has length 120 [2019-09-10 03:44:41,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:41,764 INFO L475 AbstractCegarLoop]: Abstraction has 220 states and 303 transitions. [2019-09-10 03:44:41,764 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:41,764 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 303 transitions. [2019-09-10 03:44:41,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:41,772 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:41,772 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:41,772 INFO L418 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:41,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:41,773 INFO L82 PathProgramCache]: Analyzing trace with hash -1154563372, now seen corresponding path program 1 times [2019-09-10 03:44:41,773 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:41,774 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:41,774 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:41,775 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:41,775 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:41,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:41,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:41,916 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:41,916 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:41,917 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:41,917 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:41,917 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:41,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:41,918 INFO L87 Difference]: Start difference. First operand 220 states and 303 transitions. Second operand 5 states. [2019-09-10 03:44:42,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:42,438 INFO L93 Difference]: Finished difference Result 254 states and 362 transitions. [2019-09-10 03:44:42,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:42,439 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2019-09-10 03:44:42,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:42,442 INFO L225 Difference]: With dead ends: 254 [2019-09-10 03:44:42,442 INFO L226 Difference]: Without dead ends: 254 [2019-09-10 03:44:42,442 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:42,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2019-09-10 03:44:42,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 220. [2019-09-10 03:44:42,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-09-10 03:44:42,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 302 transitions. [2019-09-10 03:44:42,473 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 302 transitions. Word has length 120 [2019-09-10 03:44:42,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:42,474 INFO L475 AbstractCegarLoop]: Abstraction has 220 states and 302 transitions. [2019-09-10 03:44:42,474 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:42,474 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 302 transitions. [2019-09-10 03:44:42,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:42,477 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:42,477 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:42,477 INFO L418 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:42,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:42,478 INFO L82 PathProgramCache]: Analyzing trace with hash 1521429010, now seen corresponding path program 1 times [2019-09-10 03:44:42,478 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:42,479 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:42,479 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:42,479 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:42,479 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:42,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:42,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:42,548 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:42,549 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:42,549 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:42,549 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:42,550 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:42,550 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:42,550 INFO L87 Difference]: Start difference. First operand 220 states and 302 transitions. Second operand 5 states. [2019-09-10 03:44:43,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:43,088 INFO L93 Difference]: Finished difference Result 252 states and 357 transitions. [2019-09-10 03:44:43,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:43,089 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2019-09-10 03:44:43,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:43,092 INFO L225 Difference]: With dead ends: 252 [2019-09-10 03:44:43,093 INFO L226 Difference]: Without dead ends: 252 [2019-09-10 03:44:43,093 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:43,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2019-09-10 03:44:43,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 220. [2019-09-10 03:44:43,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-09-10 03:44:43,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 301 transitions. [2019-09-10 03:44:43,106 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 301 transitions. Word has length 120 [2019-09-10 03:44:43,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:43,107 INFO L475 AbstractCegarLoop]: Abstraction has 220 states and 301 transitions. [2019-09-10 03:44:43,107 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:43,107 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 301 transitions. [2019-09-10 03:44:43,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:43,109 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:43,109 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:43,109 INFO L418 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:43,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:43,110 INFO L82 PathProgramCache]: Analyzing trace with hash 637920020, now seen corresponding path program 1 times [2019-09-10 03:44:43,110 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:43,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:43,111 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:43,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:43,111 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:43,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:43,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:43,191 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:43,191 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:43,192 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:43,192 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:43,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:43,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:43,193 INFO L87 Difference]: Start difference. First operand 220 states and 301 transitions. Second operand 5 states. [2019-09-10 03:44:43,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:43,628 INFO L93 Difference]: Finished difference Result 273 states and 392 transitions. [2019-09-10 03:44:43,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:43,629 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2019-09-10 03:44:43,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:43,632 INFO L225 Difference]: With dead ends: 273 [2019-09-10 03:44:43,632 INFO L226 Difference]: Without dead ends: 273 [2019-09-10 03:44:43,632 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:43,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states. [2019-09-10 03:44:43,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 220. [2019-09-10 03:44:43,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-09-10 03:44:43,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 300 transitions. [2019-09-10 03:44:43,644 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 300 transitions. Word has length 120 [2019-09-10 03:44:43,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:43,644 INFO L475 AbstractCegarLoop]: Abstraction has 220 states and 300 transitions. [2019-09-10 03:44:43,644 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:43,645 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 300 transitions. [2019-09-10 03:44:43,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:43,646 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:43,646 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:43,647 INFO L418 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:43,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:43,647 INFO L82 PathProgramCache]: Analyzing trace with hash -1302661994, now seen corresponding path program 1 times [2019-09-10 03:44:43,647 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:43,648 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:43,648 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:43,648 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:43,649 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:43,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:43,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:43,713 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:43,713 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:43,713 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:43,714 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:43,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:43,715 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:43,715 INFO L87 Difference]: Start difference. First operand 220 states and 300 transitions. Second operand 5 states. [2019-09-10 03:44:44,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:44,189 INFO L93 Difference]: Finished difference Result 271 states and 387 transitions. [2019-09-10 03:44:44,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:44,189 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2019-09-10 03:44:44,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:44,192 INFO L225 Difference]: With dead ends: 271 [2019-09-10 03:44:44,192 INFO L226 Difference]: Without dead ends: 271 [2019-09-10 03:44:44,192 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:44,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states. [2019-09-10 03:44:44,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 220. [2019-09-10 03:44:44,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-09-10 03:44:44,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 299 transitions. [2019-09-10 03:44:44,203 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 299 transitions. Word has length 120 [2019-09-10 03:44:44,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:44,203 INFO L475 AbstractCegarLoop]: Abstraction has 220 states and 299 transitions. [2019-09-10 03:44:44,203 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:44,203 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 299 transitions. [2019-09-10 03:44:44,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:44,205 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:44,205 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:44,205 INFO L418 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:44,206 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:44,206 INFO L82 PathProgramCache]: Analyzing trace with hash 574401236, now seen corresponding path program 1 times [2019-09-10 03:44:44,206 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:44,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:44,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:44,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:44,207 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:44,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:44,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:44,279 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:44,279 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:44,279 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:44,280 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:44,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:44,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:44,281 INFO L87 Difference]: Start difference. First operand 220 states and 299 transitions. Second operand 5 states. [2019-09-10 03:44:44,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:44,713 INFO L93 Difference]: Finished difference Result 269 states and 382 transitions. [2019-09-10 03:44:44,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:44,713 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2019-09-10 03:44:44,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:44,717 INFO L225 Difference]: With dead ends: 269 [2019-09-10 03:44:44,717 INFO L226 Difference]: Without dead ends: 269 [2019-09-10 03:44:44,718 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:44,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2019-09-10 03:44:44,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 220. [2019-09-10 03:44:44,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-09-10 03:44:44,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 298 transitions. [2019-09-10 03:44:44,728 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 298 transitions. Word has length 120 [2019-09-10 03:44:44,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:44,729 INFO L475 AbstractCegarLoop]: Abstraction has 220 states and 298 transitions. [2019-09-10 03:44:44,729 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:44,729 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 298 transitions. [2019-09-10 03:44:44,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:44,730 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:44,731 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:44,731 INFO L418 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:44,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:44,731 INFO L82 PathProgramCache]: Analyzing trace with hash -196332330, now seen corresponding path program 1 times [2019-09-10 03:44:44,731 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:44,732 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:44,732 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:44,732 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:44,733 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:44,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:44,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:44,802 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:44,802 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:44,802 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:44,803 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:44,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:44,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:44,804 INFO L87 Difference]: Start difference. First operand 220 states and 298 transitions. Second operand 5 states. [2019-09-10 03:44:45,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:45,269 INFO L93 Difference]: Finished difference Result 267 states and 377 transitions. [2019-09-10 03:44:45,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:45,269 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2019-09-10 03:44:45,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:45,272 INFO L225 Difference]: With dead ends: 267 [2019-09-10 03:44:45,273 INFO L226 Difference]: Without dead ends: 267 [2019-09-10 03:44:45,273 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:45,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2019-09-10 03:44:45,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 220. [2019-09-10 03:44:45,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2019-09-10 03:44:45,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 297 transitions. [2019-09-10 03:44:45,288 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 297 transitions. Word has length 120 [2019-09-10 03:44:45,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:45,288 INFO L475 AbstractCegarLoop]: Abstraction has 220 states and 297 transitions. [2019-09-10 03:44:45,288 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:45,288 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 297 transitions. [2019-09-10 03:44:45,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:45,291 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:45,291 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:45,292 INFO L418 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:45,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:45,292 INFO L82 PathProgramCache]: Analyzing trace with hash -1191026028, now seen corresponding path program 1 times [2019-09-10 03:44:45,292 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:45,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:45,293 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:45,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:45,293 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:45,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:45,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:45,384 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:45,384 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-10 03:44:45,384 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:45,385 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-10 03:44:45,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-10 03:44:45,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:45,387 INFO L87 Difference]: Start difference. First operand 220 states and 297 transitions. Second operand 6 states. [2019-09-10 03:44:45,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:45,415 INFO L93 Difference]: Finished difference Result 239 states and 327 transitions. [2019-09-10 03:44:45,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-10 03:44:45,423 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 120 [2019-09-10 03:44:45,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:45,425 INFO L225 Difference]: With dead ends: 239 [2019-09-10 03:44:45,426 INFO L226 Difference]: Without dead ends: 239 [2019-09-10 03:44:45,427 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-10 03:44:45,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2019-09-10 03:44:45,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 225. [2019-09-10 03:44:45,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2019-09-10 03:44:45,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 302 transitions. [2019-09-10 03:44:45,438 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 302 transitions. Word has length 120 [2019-09-10 03:44:45,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:45,438 INFO L475 AbstractCegarLoop]: Abstraction has 225 states and 302 transitions. [2019-09-10 03:44:45,438 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-10 03:44:45,439 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 302 transitions. [2019-09-10 03:44:45,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:45,441 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:45,441 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:45,442 INFO L418 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:45,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:45,442 INFO L82 PathProgramCache]: Analyzing trace with hash 543078422, now seen corresponding path program 1 times [2019-09-10 03:44:45,442 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:45,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:45,444 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:45,444 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:45,444 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:45,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:45,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:45,512 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:45,512 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-10 03:44:45,512 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:45,513 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-10 03:44:45,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-10 03:44:45,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:45,514 INFO L87 Difference]: Start difference. First operand 225 states and 302 transitions. Second operand 6 states. [2019-09-10 03:44:45,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:45,547 INFO L93 Difference]: Finished difference Result 241 states and 327 transitions. [2019-09-10 03:44:45,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-10 03:44:45,547 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 120 [2019-09-10 03:44:45,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:45,550 INFO L225 Difference]: With dead ends: 241 [2019-09-10 03:44:45,550 INFO L226 Difference]: Without dead ends: 241 [2019-09-10 03:44:45,550 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-10 03:44:45,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states. [2019-09-10 03:44:45,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 230. [2019-09-10 03:44:45,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2019-09-10 03:44:45,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 307 transitions. [2019-09-10 03:44:45,560 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 307 transitions. Word has length 120 [2019-09-10 03:44:45,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:45,561 INFO L475 AbstractCegarLoop]: Abstraction has 230 states and 307 transitions. [2019-09-10 03:44:45,561 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-10 03:44:45,561 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 307 transitions. [2019-09-10 03:44:45,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:45,563 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:45,564 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:45,564 INFO L418 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:45,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:45,564 INFO L82 PathProgramCache]: Analyzing trace with hash -188889004, now seen corresponding path program 1 times [2019-09-10 03:44:45,564 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:45,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:45,565 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:45,565 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:45,566 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:45,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:45,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:45,656 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:45,656 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-10 03:44:45,657 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:45,657 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-10 03:44:45,657 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-10 03:44:45,657 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-10 03:44:45,658 INFO L87 Difference]: Start difference. First operand 230 states and 307 transitions. Second operand 4 states. [2019-09-10 03:44:45,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:45,898 INFO L93 Difference]: Finished difference Result 430 states and 570 transitions. [2019-09-10 03:44:45,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-10 03:44:45,899 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2019-09-10 03:44:45,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:45,902 INFO L225 Difference]: With dead ends: 430 [2019-09-10 03:44:45,902 INFO L226 Difference]: Without dead ends: 430 [2019-09-10 03:44:45,902 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-10 03:44:45,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2019-09-10 03:44:45,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 425. [2019-09-10 03:44:45,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 425 states. [2019-09-10 03:44:45,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 566 transitions. [2019-09-10 03:44:45,917 INFO L78 Accepts]: Start accepts. Automaton has 425 states and 566 transitions. Word has length 120 [2019-09-10 03:44:45,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:45,917 INFO L475 AbstractCegarLoop]: Abstraction has 425 states and 566 transitions. [2019-09-10 03:44:45,918 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-10 03:44:45,918 INFO L276 IsEmpty]: Start isEmpty. Operand 425 states and 566 transitions. [2019-09-10 03:44:45,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:45,919 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:45,919 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:45,920 INFO L418 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:45,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:45,920 INFO L82 PathProgramCache]: Analyzing trace with hash 388039637, now seen corresponding path program 1 times [2019-09-10 03:44:45,920 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:45,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:45,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:45,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:45,921 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:45,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:45,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:45,974 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:45,974 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-10 03:44:45,974 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:45,975 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-10 03:44:45,975 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-10 03:44:45,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:45,976 INFO L87 Difference]: Start difference. First operand 425 states and 566 transitions. Second operand 6 states. [2019-09-10 03:44:46,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:46,004 INFO L93 Difference]: Finished difference Result 438 states and 584 transitions. [2019-09-10 03:44:46,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-10 03:44:46,004 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 120 [2019-09-10 03:44:46,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:46,007 INFO L225 Difference]: With dead ends: 438 [2019-09-10 03:44:46,007 INFO L226 Difference]: Without dead ends: 438 [2019-09-10 03:44:46,008 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-10 03:44:46,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 438 states. [2019-09-10 03:44:46,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 438 to 430. [2019-09-10 03:44:46,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 430 states. [2019-09-10 03:44:46,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 570 transitions. [2019-09-10 03:44:46,022 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 570 transitions. Word has length 120 [2019-09-10 03:44:46,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:46,023 INFO L475 AbstractCegarLoop]: Abstraction has 430 states and 570 transitions. [2019-09-10 03:44:46,023 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-10 03:44:46,023 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 570 transitions. [2019-09-10 03:44:46,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:46,024 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:46,025 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:46,025 INFO L418 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:46,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:46,025 INFO L82 PathProgramCache]: Analyzing trace with hash 1648956887, now seen corresponding path program 1 times [2019-09-10 03:44:46,025 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:46,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:46,026 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:46,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:46,027 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:46,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:46,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:46,081 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:46,081 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-10 03:44:46,081 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:46,082 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-10 03:44:46,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-10 03:44:46,083 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-10 03:44:46,083 INFO L87 Difference]: Start difference. First operand 430 states and 570 transitions. Second operand 4 states. [2019-09-10 03:44:46,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:46,300 INFO L93 Difference]: Finished difference Result 824 states and 1086 transitions. [2019-09-10 03:44:46,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-10 03:44:46,301 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2019-09-10 03:44:46,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:46,307 INFO L225 Difference]: With dead ends: 824 [2019-09-10 03:44:46,307 INFO L226 Difference]: Without dead ends: 824 [2019-09-10 03:44:46,307 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-10 03:44:46,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 824 states. [2019-09-10 03:44:46,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 824 to 817. [2019-09-10 03:44:46,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 817 states. [2019-09-10 03:44:46,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 817 states to 817 states and 1080 transitions. [2019-09-10 03:44:46,336 INFO L78 Accepts]: Start accepts. Automaton has 817 states and 1080 transitions. Word has length 120 [2019-09-10 03:44:46,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:46,337 INFO L475 AbstractCegarLoop]: Abstraction has 817 states and 1080 transitions. [2019-09-10 03:44:46,337 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-10 03:44:46,337 INFO L276 IsEmpty]: Start isEmpty. Operand 817 states and 1080 transitions. [2019-09-10 03:44:46,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:46,339 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:46,339 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:46,340 INFO L418 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:46,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:46,340 INFO L82 PathProgramCache]: Analyzing trace with hash 1751758134, now seen corresponding path program 1 times [2019-09-10 03:44:46,341 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:46,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:46,342 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:46,342 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:46,342 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:46,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:46,418 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:46,418 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:46,418 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-10 03:44:46,419 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:46,419 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-10 03:44:46,419 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-10 03:44:46,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:46,420 INFO L87 Difference]: Start difference. First operand 817 states and 1080 transitions. Second operand 6 states. [2019-09-10 03:44:46,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:46,457 INFO L93 Difference]: Finished difference Result 837 states and 1106 transitions. [2019-09-10 03:44:46,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-10 03:44:46,458 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 120 [2019-09-10 03:44:46,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:46,465 INFO L225 Difference]: With dead ends: 837 [2019-09-10 03:44:46,465 INFO L226 Difference]: Without dead ends: 837 [2019-09-10 03:44:46,466 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-10 03:44:46,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 837 states. [2019-09-10 03:44:46,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 837 to 827. [2019-09-10 03:44:46,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 827 states. [2019-09-10 03:44:46,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 827 states to 827 states and 1088 transitions. [2019-09-10 03:44:46,497 INFO L78 Accepts]: Start accepts. Automaton has 827 states and 1088 transitions. Word has length 120 [2019-09-10 03:44:46,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:46,498 INFO L475 AbstractCegarLoop]: Abstraction has 827 states and 1088 transitions. [2019-09-10 03:44:46,498 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-10 03:44:46,498 INFO L276 IsEmpty]: Start isEmpty. Operand 827 states and 1088 transitions. [2019-09-10 03:44:46,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-09-10 03:44:46,501 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:46,501 INFO L399 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:46,501 INFO L418 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:46,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:46,502 INFO L82 PathProgramCache]: Analyzing trace with hash -604047116, now seen corresponding path program 1 times [2019-09-10 03:44:46,502 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:46,503 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:46,503 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:46,503 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:46,503 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:46,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:46,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:44:46,575 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:46,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-10 03:44:46,576 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:46,576 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-10 03:44:46,576 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-10 03:44:46,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-10 03:44:46,577 INFO L87 Difference]: Start difference. First operand 827 states and 1088 transitions. Second operand 4 states. [2019-09-10 03:44:46,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:46,859 INFO L93 Difference]: Finished difference Result 1607 states and 2106 transitions. [2019-09-10 03:44:46,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-10 03:44:46,860 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2019-09-10 03:44:46,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:46,867 INFO L225 Difference]: With dead ends: 1607 [2019-09-10 03:44:46,868 INFO L226 Difference]: Without dead ends: 1607 [2019-09-10 03:44:46,868 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-10 03:44:46,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1607 states. [2019-09-10 03:44:46,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1607 to 1598. [2019-09-10 03:44:46,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1598 states. [2019-09-10 03:44:46,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1598 states to 1598 states and 2097 transitions. [2019-09-10 03:44:46,915 INFO L78 Accepts]: Start accepts. Automaton has 1598 states and 2097 transitions. Word has length 120 [2019-09-10 03:44:46,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:46,916 INFO L475 AbstractCegarLoop]: Abstraction has 1598 states and 2097 transitions. [2019-09-10 03:44:46,916 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-10 03:44:46,916 INFO L276 IsEmpty]: Start isEmpty. Operand 1598 states and 2097 transitions. [2019-09-10 03:44:46,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2019-09-10 03:44:46,919 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:46,919 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:46,919 INFO L418 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:46,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:46,920 INFO L82 PathProgramCache]: Analyzing trace with hash -1761845548, now seen corresponding path program 1 times [2019-09-10 03:44:46,920 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:46,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:46,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:46,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:46,921 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:46,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:46,975 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-09-10 03:44:46,975 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:46,975 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-10 03:44:46,975 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:46,976 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-10 03:44:46,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-10 03:44:46,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:46,976 INFO L87 Difference]: Start difference. First operand 1598 states and 2097 transitions. Second operand 6 states. [2019-09-10 03:44:47,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:47,015 INFO L93 Difference]: Finished difference Result 1626 states and 2129 transitions. [2019-09-10 03:44:47,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-10 03:44:47,015 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 141 [2019-09-10 03:44:47,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:47,024 INFO L225 Difference]: With dead ends: 1626 [2019-09-10 03:44:47,024 INFO L226 Difference]: Without dead ends: 1626 [2019-09-10 03:44:47,025 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-10 03:44:47,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1626 states. [2019-09-10 03:44:47,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1626 to 1618. [2019-09-10 03:44:47,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1618 states. [2019-09-10 03:44:47,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 2113 transitions. [2019-09-10 03:44:47,072 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 2113 transitions. Word has length 141 [2019-09-10 03:44:47,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:47,073 INFO L475 AbstractCegarLoop]: Abstraction has 1618 states and 2113 transitions. [2019-09-10 03:44:47,073 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-10 03:44:47,073 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 2113 transitions. [2019-09-10 03:44:47,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2019-09-10 03:44:47,076 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:47,076 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:47,076 INFO L418 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:47,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:47,077 INFO L82 PathProgramCache]: Analyzing trace with hash -1560021614, now seen corresponding path program 1 times [2019-09-10 03:44:47,077 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:47,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:47,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:47,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:47,078 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:47,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:47,136 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-09-10 03:44:47,137 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:47,137 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:47,137 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:47,138 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:47,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:47,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:47,138 INFO L87 Difference]: Start difference. First operand 1618 states and 2113 transitions. Second operand 5 states. [2019-09-10 03:44:47,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:47,639 INFO L93 Difference]: Finished difference Result 1618 states and 2097 transitions. [2019-09-10 03:44:47,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:47,640 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2019-09-10 03:44:47,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:47,651 INFO L225 Difference]: With dead ends: 1618 [2019-09-10 03:44:47,651 INFO L226 Difference]: Without dead ends: 1618 [2019-09-10 03:44:47,652 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:47,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1618 states. [2019-09-10 03:44:47,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1618 to 1618. [2019-09-10 03:44:47,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1618 states. [2019-09-10 03:44:47,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 2097 transitions. [2019-09-10 03:44:47,700 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 2097 transitions. Word has length 141 [2019-09-10 03:44:47,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:47,701 INFO L475 AbstractCegarLoop]: Abstraction has 1618 states and 2097 transitions. [2019-09-10 03:44:47,701 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:47,701 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 2097 transitions. [2019-09-10 03:44:47,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2019-09-10 03:44:47,704 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:47,704 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:47,705 INFO L418 AbstractCegarLoop]: === Iteration 18 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:47,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:47,705 INFO L82 PathProgramCache]: Analyzing trace with hash -173236204, now seen corresponding path program 1 times [2019-09-10 03:44:47,705 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:47,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:47,706 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:47,706 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:47,706 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:47,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:47,814 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-09-10 03:44:47,815 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:47,815 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:47,815 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:47,815 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:47,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:47,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:47,816 INFO L87 Difference]: Start difference. First operand 1618 states and 2097 transitions. Second operand 5 states. [2019-09-10 03:44:48,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:48,279 INFO L93 Difference]: Finished difference Result 1618 states and 2081 transitions. [2019-09-10 03:44:48,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:48,280 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2019-09-10 03:44:48,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:48,292 INFO L225 Difference]: With dead ends: 1618 [2019-09-10 03:44:48,292 INFO L226 Difference]: Without dead ends: 1618 [2019-09-10 03:44:48,293 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:48,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1618 states. [2019-09-10 03:44:48,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1618 to 1618. [2019-09-10 03:44:48,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1618 states. [2019-09-10 03:44:48,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 2081 transitions. [2019-09-10 03:44:48,355 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 2081 transitions. Word has length 141 [2019-09-10 03:44:48,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:48,356 INFO L475 AbstractCegarLoop]: Abstraction has 1618 states and 2081 transitions. [2019-09-10 03:44:48,356 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:48,356 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 2081 transitions. [2019-09-10 03:44:48,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2019-09-10 03:44:48,360 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:48,361 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:48,361 INFO L418 AbstractCegarLoop]: === Iteration 19 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:48,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:48,363 INFO L82 PathProgramCache]: Analyzing trace with hash 702782802, now seen corresponding path program 1 times [2019-09-10 03:44:48,363 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:48,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:48,364 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:48,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:48,364 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:48,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:48,448 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-09-10 03:44:48,448 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:48,448 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:48,449 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:48,451 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:48,451 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:48,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:48,452 INFO L87 Difference]: Start difference. First operand 1618 states and 2081 transitions. Second operand 5 states. [2019-09-10 03:44:48,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:48,847 INFO L93 Difference]: Finished difference Result 1618 states and 2065 transitions. [2019-09-10 03:44:48,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:44:48,848 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2019-09-10 03:44:48,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:48,856 INFO L225 Difference]: With dead ends: 1618 [2019-09-10 03:44:48,857 INFO L226 Difference]: Without dead ends: 1618 [2019-09-10 03:44:48,858 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:44:48,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1618 states. [2019-09-10 03:44:48,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1618 to 1618. [2019-09-10 03:44:48,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1618 states. [2019-09-10 03:44:48,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 2065 transitions. [2019-09-10 03:44:48,899 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 2065 transitions. Word has length 141 [2019-09-10 03:44:48,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:48,899 INFO L475 AbstractCegarLoop]: Abstraction has 1618 states and 2065 transitions. [2019-09-10 03:44:48,899 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:48,900 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 2065 transitions. [2019-09-10 03:44:48,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2019-09-10 03:44:48,903 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:48,903 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:48,903 INFO L418 AbstractCegarLoop]: === Iteration 20 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:48,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:48,904 INFO L82 PathProgramCache]: Analyzing trace with hash 1146683476, now seen corresponding path program 1 times [2019-09-10 03:44:48,904 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:48,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:48,905 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:48,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:48,905 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:48,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:49,005 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-09-10 03:44:49,005 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:49,006 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:49,006 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:49,007 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:49,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:49,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:49,008 INFO L87 Difference]: Start difference. First operand 1618 states and 2065 transitions. Second operand 5 states. [2019-09-10 03:44:49,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:49,672 INFO L93 Difference]: Finished difference Result 2468 states and 3146 transitions. [2019-09-10 03:44:49,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-10 03:44:49,673 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2019-09-10 03:44:49,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:49,685 INFO L225 Difference]: With dead ends: 2468 [2019-09-10 03:44:49,685 INFO L226 Difference]: Without dead ends: 2468 [2019-09-10 03:44:49,686 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-09-10 03:44:49,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2468 states. [2019-09-10 03:44:49,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2468 to 2324. [2019-09-10 03:44:49,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2324 states. [2019-09-10 03:44:49,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 2324 states and 2887 transitions. [2019-09-10 03:44:49,751 INFO L78 Accepts]: Start accepts. Automaton has 2324 states and 2887 transitions. Word has length 141 [2019-09-10 03:44:49,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:49,754 INFO L475 AbstractCegarLoop]: Abstraction has 2324 states and 2887 transitions. [2019-09-10 03:44:49,754 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:49,754 INFO L276 IsEmpty]: Start isEmpty. Operand 2324 states and 2887 transitions. [2019-09-10 03:44:49,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2019-09-10 03:44:49,757 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:49,757 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:49,757 INFO L418 AbstractCegarLoop]: === Iteration 21 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:49,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:49,758 INFO L82 PathProgramCache]: Analyzing trace with hash -1609943790, now seen corresponding path program 1 times [2019-09-10 03:44:49,758 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:49,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:49,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:49,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:49,760 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:49,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:49,827 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-09-10 03:44:49,827 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:49,828 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:49,828 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:49,830 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:49,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:49,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:49,831 INFO L87 Difference]: Start difference. First operand 2324 states and 2887 transitions. Second operand 5 states. [2019-09-10 03:44:50,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:50,416 INFO L93 Difference]: Finished difference Result 3505 states and 4449 transitions. [2019-09-10 03:44:50,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-10 03:44:50,416 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2019-09-10 03:44:50,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:50,436 INFO L225 Difference]: With dead ends: 3505 [2019-09-10 03:44:50,436 INFO L226 Difference]: Without dead ends: 3505 [2019-09-10 03:44:50,436 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-09-10 03:44:50,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3505 states. [2019-09-10 03:44:50,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3505 to 2820. [2019-09-10 03:44:50,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2820 states. [2019-09-10 03:44:50,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2820 states to 2820 states and 3415 transitions. [2019-09-10 03:44:50,563 INFO L78 Accepts]: Start accepts. Automaton has 2820 states and 3415 transitions. Word has length 141 [2019-09-10 03:44:50,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:50,563 INFO L475 AbstractCegarLoop]: Abstraction has 2820 states and 3415 transitions. [2019-09-10 03:44:50,563 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:50,563 INFO L276 IsEmpty]: Start isEmpty. Operand 2820 states and 3415 transitions. [2019-09-10 03:44:50,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2019-09-10 03:44:50,566 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:50,566 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:50,567 INFO L418 AbstractCegarLoop]: === Iteration 22 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:50,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:50,567 INFO L82 PathProgramCache]: Analyzing trace with hash 656437396, now seen corresponding path program 1 times [2019-09-10 03:44:50,567 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:50,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:50,568 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:50,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:50,568 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:50,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:50,637 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-09-10 03:44:50,637 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:50,637 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:50,638 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:50,638 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:50,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:50,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:50,639 INFO L87 Difference]: Start difference. First operand 2820 states and 3415 transitions. Second operand 5 states. [2019-09-10 03:44:51,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:51,234 INFO L93 Difference]: Finished difference Result 3631 states and 4561 transitions. [2019-09-10 03:44:51,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-10 03:44:51,234 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2019-09-10 03:44:51,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:51,253 INFO L225 Difference]: With dead ends: 3631 [2019-09-10 03:44:51,253 INFO L226 Difference]: Without dead ends: 3631 [2019-09-10 03:44:51,253 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-09-10 03:44:51,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3631 states. [2019-09-10 03:44:51,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3631 to 3266. [2019-09-10 03:44:51,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3266 states. [2019-09-10 03:44:51,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3266 states to 3266 states and 3871 transitions. [2019-09-10 03:44:51,347 INFO L78 Accepts]: Start accepts. Automaton has 3266 states and 3871 transitions. Word has length 141 [2019-09-10 03:44:51,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:51,347 INFO L475 AbstractCegarLoop]: Abstraction has 3266 states and 3871 transitions. [2019-09-10 03:44:51,347 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:51,347 INFO L276 IsEmpty]: Start isEmpty. Operand 3266 states and 3871 transitions. [2019-09-10 03:44:51,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2019-09-10 03:44:51,350 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:51,351 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:51,351 INFO L418 AbstractCegarLoop]: === Iteration 23 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:51,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:51,351 INFO L82 PathProgramCache]: Analyzing trace with hash 175357138, now seen corresponding path program 1 times [2019-09-10 03:44:51,352 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:51,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:51,352 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:51,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:51,353 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:51,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:51,419 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-09-10 03:44:51,420 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:44:51,420 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-10 03:44:51,420 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:51,421 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-10 03:44:51,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-10 03:44:51,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:44:51,422 INFO L87 Difference]: Start difference. First operand 3266 states and 3871 transitions. Second operand 5 states. [2019-09-10 03:44:52,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:44:52,008 INFO L93 Difference]: Finished difference Result 3613 states and 4336 transitions. [2019-09-10 03:44:52,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-10 03:44:52,009 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2019-09-10 03:44:52,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:44:52,023 INFO L225 Difference]: With dead ends: 3613 [2019-09-10 03:44:52,023 INFO L226 Difference]: Without dead ends: 3613 [2019-09-10 03:44:52,024 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-09-10 03:44:52,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3613 states. [2019-09-10 03:44:52,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3613 to 3448. [2019-09-10 03:44:52,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3448 states. [2019-09-10 03:44:52,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3448 states to 3448 states and 4017 transitions. [2019-09-10 03:44:52,098 INFO L78 Accepts]: Start accepts. Automaton has 3448 states and 4017 transitions. Word has length 141 [2019-09-10 03:44:52,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:44:52,099 INFO L475 AbstractCegarLoop]: Abstraction has 3448 states and 4017 transitions. [2019-09-10 03:44:52,099 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-10 03:44:52,099 INFO L276 IsEmpty]: Start isEmpty. Operand 3448 states and 4017 transitions. [2019-09-10 03:44:52,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2019-09-10 03:44:52,102 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:44:52,102 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:44:52,102 INFO L418 AbstractCegarLoop]: === Iteration 24 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:44:52,103 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:52,103 INFO L82 PathProgramCache]: Analyzing trace with hash 159838420, now seen corresponding path program 1 times [2019-09-10 03:44:52,103 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:44:52,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:52,104 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:44:52,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:44:52,104 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:44:52,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:44:52,158 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-09-10 03:44:52,158 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:44:52,158 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:44:52,159 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 142 with the following transitions: [2019-09-10 03:44:52,161 INFO L207 CegarAbsIntRunner]: [89], [91], [94], [105], [107], [113], [114], [119], [133], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [285], [287], [289], [290], [293], [295], [300], [303], [308], [311], [316], [319], [324], [327], [332], [334], [335], [338], [362], [363], [364], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [510], [511], [512], [522], [524], [526], [527], [528], [537], [540], [543], [558], [571], [584], [597], [601], [604], [616], [617], [631], [633], [666], [667], [674], [676], [677], [678], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [738], [739], [740] [2019-09-10 03:44:52,225 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:44:52,226 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:44:52,480 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2019-09-10 03:44:52,482 INFO L272 AbstractInterpreter]: Visited 110 different actions 110 times. Never merged. Never widened. Performed 482 root evaluator evaluations with a maximum evaluation depth of 4. Performed 482 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Never found a fixpoint. Largest state had 58 variables. [2019-09-10 03:44:52,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:44:52,487 INFO L403 sIntCurrentIteration]: Generating AbsInt predicates [2019-09-10 03:44:52,689 INFO L227 lantSequenceWeakener]: Weakened 118 states. On average, predicates are now at 69.56% of their original sizes. [2019-09-10 03:44:52,689 INFO L418 sIntCurrentIteration]: Unifying AI predicates [2019-09-10 03:44:53,498 INFO L420 sIntCurrentIteration]: We unified 140 AI predicates to 140 [2019-09-10 03:44:53,498 INFO L429 sIntCurrentIteration]: Finished generation of AbsInt predicates [2019-09-10 03:44:53,499 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-10 03:44:53,499 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [46] imperfect sequences [3] total 47 [2019-09-10 03:44:53,499 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:44:53,500 INFO L454 AbstractCegarLoop]: Interpolant automaton has 46 states [2019-09-10 03:44:53,500 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2019-09-10 03:44:53,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=414, Invalid=1656, Unknown=0, NotChecked=0, Total=2070 [2019-09-10 03:44:53,501 INFO L87 Difference]: Start difference. First operand 3448 states and 4017 transitions. Second operand 46 states. [2019-09-10 03:45:04,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:45:04,093 INFO L93 Difference]: Finished difference Result 3564 states and 4139 transitions. [2019-09-10 03:45:04,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-09-10 03:45:04,093 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 141 [2019-09-10 03:45:04,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:45:04,116 INFO L225 Difference]: With dead ends: 3564 [2019-09-10 03:45:04,117 INFO L226 Difference]: Without dead ends: 3564 [2019-09-10 03:45:04,119 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 96 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1530 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1227, Invalid=4473, Unknown=0, NotChecked=0, Total=5700 [2019-09-10 03:45:04,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3564 states. [2019-09-10 03:45:04,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3564 to 3551. [2019-09-10 03:45:04,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3551 states. [2019-09-10 03:45:04,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3551 states to 3551 states and 4125 transitions. [2019-09-10 03:45:04,219 INFO L78 Accepts]: Start accepts. Automaton has 3551 states and 4125 transitions. Word has length 141 [2019-09-10 03:45:04,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:45:04,221 INFO L475 AbstractCegarLoop]: Abstraction has 3551 states and 4125 transitions. [2019-09-10 03:45:04,221 INFO L476 AbstractCegarLoop]: Interpolant automaton has 46 states. [2019-09-10 03:45:04,221 INFO L276 IsEmpty]: Start isEmpty. Operand 3551 states and 4125 transitions. [2019-09-10 03:45:04,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2019-09-10 03:45:04,224 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:45:04,225 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:45:04,225 INFO L418 AbstractCegarLoop]: === Iteration 25 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:45:04,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:45:04,226 INFO L82 PathProgramCache]: Analyzing trace with hash -1797671022, now seen corresponding path program 1 times [2019-09-10 03:45:04,226 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:45:04,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:45:04,227 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:45:04,227 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:45:04,227 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:45:04,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:45:04,274 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 9 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-09-10 03:45:04,274 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:45:04,274 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:45:04,275 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 146 with the following transitions: [2019-09-10 03:45:04,277 INFO L207 CegarAbsIntRunner]: [89], [91], [94], [105], [107], [113], [114], [119], [133], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [285], [287], [289], [290], [293], [295], [300], [303], [308], [311], [316], [319], [324], [327], [332], [334], [335], [338], [362], [363], [364], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [510], [511], [512], [522], [524], [526], [527], [528], [537], [540], [543], [549], [555], [558], [562], [568], [571], [575], [581], [584], [588], [594], [597], [601], [604], [616], [617], [631], [633], [666], [667], [674], [676], [677], [678], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [738], [739], [740] [2019-09-10 03:45:04,288 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:45:04,288 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:45:04,352 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2019-09-10 03:45:04,353 INFO L272 AbstractInterpreter]: Visited 130 different actions 152 times. Merged at 13 different actions 13 times. Never widened. Performed 714 root evaluator evaluations with a maximum evaluation depth of 4. Performed 714 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 1 fixpoints after 1 different actions. Largest state had 60 variables. [2019-09-10 03:45:04,353 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:45:04,353 INFO L403 sIntCurrentIteration]: Generating AbsInt predicates [2019-09-10 03:45:04,486 INFO L227 lantSequenceWeakener]: Weakened 140 states. On average, predicates are now at 72.89% of their original sizes. [2019-09-10 03:45:04,486 INFO L418 sIntCurrentIteration]: Unifying AI predicates [2019-09-10 03:45:06,016 INFO L420 sIntCurrentIteration]: We unified 144 AI predicates to 144 [2019-09-10 03:45:06,016 INFO L429 sIntCurrentIteration]: Finished generation of AbsInt predicates [2019-09-10 03:45:06,016 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-10 03:45:06,016 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [61] imperfect sequences [3] total 62 [2019-09-10 03:45:06,017 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:45:06,017 INFO L454 AbstractCegarLoop]: Interpolant automaton has 61 states [2019-09-10 03:45:06,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2019-09-10 03:45:06,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=792, Invalid=2868, Unknown=0, NotChecked=0, Total=3660 [2019-09-10 03:45:06,019 INFO L87 Difference]: Start difference. First operand 3551 states and 4125 transitions. Second operand 61 states. [2019-09-10 03:45:53,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:45:53,221 INFO L93 Difference]: Finished difference Result 22219 states and 27227 transitions. [2019-09-10 03:45:53,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 122 states. [2019-09-10 03:45:53,221 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 145 [2019-09-10 03:45:53,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:45:53,288 INFO L225 Difference]: With dead ends: 22219 [2019-09-10 03:45:53,288 INFO L226 Difference]: Without dead ends: 17023 [2019-09-10 03:45:53,296 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 161 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8941 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=3937, Invalid=22469, Unknown=0, NotChecked=0, Total=26406 [2019-09-10 03:45:53,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17023 states. [2019-09-10 03:45:53,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17023 to 16330. [2019-09-10 03:45:53,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16330 states. [2019-09-10 03:45:53,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16330 states to 16330 states and 19750 transitions. [2019-09-10 03:45:53,854 INFO L78 Accepts]: Start accepts. Automaton has 16330 states and 19750 transitions. Word has length 145 [2019-09-10 03:45:53,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:45:53,854 INFO L475 AbstractCegarLoop]: Abstraction has 16330 states and 19750 transitions. [2019-09-10 03:45:53,855 INFO L476 AbstractCegarLoop]: Interpolant automaton has 61 states. [2019-09-10 03:45:53,855 INFO L276 IsEmpty]: Start isEmpty. Operand 16330 states and 19750 transitions. [2019-09-10 03:45:53,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2019-09-10 03:45:53,887 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:45:53,887 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:45:53,888 INFO L418 AbstractCegarLoop]: === Iteration 26 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:45:53,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:45:53,888 INFO L82 PathProgramCache]: Analyzing trace with hash -1127288248, now seen corresponding path program 1 times [2019-09-10 03:45:53,888 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:45:53,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:45:53,891 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:45:53,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:45:53,891 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:45:53,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:45:53,985 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2019-09-10 03:45:53,985 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-10 03:45:53,985 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-10 03:45:53,985 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:45:53,986 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-10 03:45:53,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-10 03:45:53,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-10 03:45:53,987 INFO L87 Difference]: Start difference. First operand 16330 states and 19750 transitions. Second operand 4 states. [2019-09-10 03:45:54,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:45:54,180 INFO L93 Difference]: Finished difference Result 14015 states and 16496 transitions. [2019-09-10 03:45:54,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-10 03:45:54,181 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 207 [2019-09-10 03:45:54,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:45:54,220 INFO L225 Difference]: With dead ends: 14015 [2019-09-10 03:45:54,220 INFO L226 Difference]: Without dead ends: 14015 [2019-09-10 03:45:54,221 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-10 03:45:54,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14015 states. [2019-09-10 03:45:54,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14015 to 14009. [2019-09-10 03:45:54,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14009 states. [2019-09-10 03:45:54,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14009 states to 14009 states and 16490 transitions. [2019-09-10 03:45:54,720 INFO L78 Accepts]: Start accepts. Automaton has 14009 states and 16490 transitions. Word has length 207 [2019-09-10 03:45:54,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:45:54,721 INFO L475 AbstractCegarLoop]: Abstraction has 14009 states and 16490 transitions. [2019-09-10 03:45:54,721 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-10 03:45:54,721 INFO L276 IsEmpty]: Start isEmpty. Operand 14009 states and 16490 transitions. [2019-09-10 03:45:54,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2019-09-10 03:45:54,753 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:45:54,754 INFO L399 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:45:54,754 INFO L418 AbstractCegarLoop]: === Iteration 27 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:45:54,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:45:54,755 INFO L82 PathProgramCache]: Analyzing trace with hash 361286749, now seen corresponding path program 1 times [2019-09-10 03:45:54,755 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:45:54,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:45:54,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:45:54,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:45:54,756 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:45:54,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:45:54,833 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 11 proven. 8 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2019-09-10 03:45:54,834 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:45:54,834 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:45:54,834 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 215 with the following transitions: [2019-09-10 03:45:54,835 INFO L207 CegarAbsIntRunner]: [31], [33], [36], [47], [49], [51], [53], [57], [89], [91], [94], [105], [107], [113], [114], [119], [133], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [278], [281], [285], [287], [289], [290], [292], [293], [295], [300], [303], [308], [311], [316], [319], [324], [327], [330], [332], [334], [335], [338], [362], [363], [364], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [510], [511], [512], [515], [520], [522], [524], [526], [527], [528], [537], [540], [543], [549], [555], [558], [562], [568], [571], [575], [581], [584], [588], [591], [601], [604], [616], [617], [631], [633], [666], [667], [670], [671], [674], [676], [677], [678], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [738], [739], [740] [2019-09-10 03:45:54,841 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:45:54,842 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:45:54,964 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:45:54,966 INFO L272 AbstractInterpreter]: Visited 152 different actions 258 times. Merged at 29 different actions 35 times. Never widened. Performed 1104 root evaluator evaluations with a maximum evaluation depth of 4. Performed 1104 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 4 fixpoints after 3 different actions. Largest state had 60 variables. [2019-09-10 03:45:54,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:45:54,969 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:45:54,969 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:45:54,969 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:45:55,001 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:45:55,002 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2019-09-10 03:45:55,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:45:55,202 INFO L256 TraceCheckSpWp]: Trace formula consists of 1037 conjuncts, 2 conjunts are in the unsatisfiable core [2019-09-10 03:45:55,234 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:45:55,341 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 71 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-10 03:45:55,341 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:45:55,600 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 14 proven. 2 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2019-09-10 03:45:55,616 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:45:55,616 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4, 3] total 6 [2019-09-10 03:45:55,616 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:45:55,617 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:45:55,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:45:55,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:45:55,618 INFO L87 Difference]: Start difference. First operand 14009 states and 16490 transitions. Second operand 3 states. [2019-09-10 03:45:55,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:45:55,689 INFO L93 Difference]: Finished difference Result 11762 states and 13800 transitions. [2019-09-10 03:45:55,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:45:55,690 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 214 [2019-09-10 03:45:55,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:45:55,726 INFO L225 Difference]: With dead ends: 11762 [2019-09-10 03:45:55,726 INFO L226 Difference]: Without dead ends: 11762 [2019-09-10 03:45:55,727 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 433 GetRequests, 429 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:45:55,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11762 states. [2019-09-10 03:45:55,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11762 to 11756. [2019-09-10 03:45:55,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11756 states. [2019-09-10 03:45:55,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11756 states to 11756 states and 13795 transitions. [2019-09-10 03:45:55,978 INFO L78 Accepts]: Start accepts. Automaton has 11756 states and 13795 transitions. Word has length 214 [2019-09-10 03:45:55,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:45:55,979 INFO L475 AbstractCegarLoop]: Abstraction has 11756 states and 13795 transitions. [2019-09-10 03:45:55,979 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:45:55,979 INFO L276 IsEmpty]: Start isEmpty. Operand 11756 states and 13795 transitions. [2019-09-10 03:45:56,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 430 [2019-09-10 03:45:56,029 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:45:56,029 INFO L399 BasicCegarLoop]: trace histogram [6, 6, 6, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:45:56,029 INFO L418 AbstractCegarLoop]: === Iteration 28 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:45:56,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:45:56,030 INFO L82 PathProgramCache]: Analyzing trace with hash 1144118666, now seen corresponding path program 1 times [2019-09-10 03:45:56,030 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:45:56,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:45:56,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:45:56,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:45:56,031 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:45:56,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:45:56,242 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 39 proven. 29 refuted. 0 times theorem prover too weak. 390 trivial. 0 not checked. [2019-09-10 03:45:56,243 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:45:56,243 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:45:56,243 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 430 with the following transitions: [2019-09-10 03:45:56,244 INFO L207 CegarAbsIntRunner]: [2], [18], [20], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [308], [311], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [340], [343], [362], [363], [364], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [555], [558], [562], [565], [568], [571], [575], [578], [581], [588], [591], [594], [601], [604], [607], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:45:56,247 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:45:56,247 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:45:57,406 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:45:57,406 INFO L272 AbstractInterpreter]: Visited 180 different actions 1660 times. Merged at 58 different actions 504 times. Never widened. Performed 9097 root evaluator evaluations with a maximum evaluation depth of 4. Performed 9097 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 85 fixpoints after 14 different actions. Largest state had 60 variables. [2019-09-10 03:45:57,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:45:57,406 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:45:57,407 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:45:57,407 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-10 03:45:57,432 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:45:57,432 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:45:57,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:45:57,628 INFO L256 TraceCheckSpWp]: Trace formula consists of 1731 conjuncts, 2 conjunts are in the unsatisfiable core [2019-09-10 03:45:57,640 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:45:57,750 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 239 proven. 0 refuted. 0 times theorem prover too weak. 219 trivial. 0 not checked. [2019-09-10 03:45:57,750 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:45:58,093 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 42 proven. 12 refuted. 0 times theorem prover too weak. 404 trivial. 0 not checked. [2019-09-10 03:45:58,106 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:45:58,107 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [5, 4] total 8 [2019-09-10 03:45:58,107 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:45:58,108 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:45:58,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:45:58,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-09-10 03:45:58,109 INFO L87 Difference]: Start difference. First operand 11756 states and 13795 transitions. Second operand 3 states. [2019-09-10 03:45:58,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:45:58,224 INFO L93 Difference]: Finished difference Result 18422 states and 22020 transitions. [2019-09-10 03:45:58,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:45:58,224 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 429 [2019-09-10 03:45:58,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:45:58,272 INFO L225 Difference]: With dead ends: 18422 [2019-09-10 03:45:58,273 INFO L226 Difference]: Without dead ends: 18422 [2019-09-10 03:45:58,273 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 863 GetRequests, 856 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-09-10 03:45:58,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18422 states. [2019-09-10 03:45:58,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18422 to 18402. [2019-09-10 03:45:58,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18402 states. [2019-09-10 03:45:58,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18402 states to 18402 states and 22001 transitions. [2019-09-10 03:45:58,621 INFO L78 Accepts]: Start accepts. Automaton has 18402 states and 22001 transitions. Word has length 429 [2019-09-10 03:45:58,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:45:58,622 INFO L475 AbstractCegarLoop]: Abstraction has 18402 states and 22001 transitions. [2019-09-10 03:45:58,622 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:45:58,622 INFO L276 IsEmpty]: Start isEmpty. Operand 18402 states and 22001 transitions. [2019-09-10 03:45:58,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 496 [2019-09-10 03:45:58,690 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:45:58,691 INFO L399 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:45:58,691 INFO L418 AbstractCegarLoop]: === Iteration 29 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:45:58,691 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:45:58,691 INFO L82 PathProgramCache]: Analyzing trace with hash 929382168, now seen corresponding path program 1 times [2019-09-10 03:45:58,692 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:45:58,692 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:45:58,692 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:45:58,693 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:45:58,693 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:45:58,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:45:58,913 INFO L134 CoverageAnalysis]: Checked inductivity of 658 backedges. 39 proven. 26 refuted. 0 times theorem prover too weak. 593 trivial. 0 not checked. [2019-09-10 03:45:58,914 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:45:58,914 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:45:58,914 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 496 with the following transitions: [2019-09-10 03:45:58,915 INFO L207 CegarAbsIntRunner]: [2], [18], [20], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [306], [308], [311], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [340], [345], [348], [350], [353], [362], [363], [364], [367], [370], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [468], [484], [486], [488], [497], [499], [507], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [552], [555], [558], [562], [565], [571], [575], [578], [581], [588], [591], [594], [601], [604], [610], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:45:58,917 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:45:58,917 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:46:01,338 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:46:01,339 INFO L272 AbstractInterpreter]: Visited 198 different actions 7872 times. Merged at 77 different actions 2679 times. Widened at 1 different actions 7 times. Performed 49526 root evaluator evaluations with a maximum evaluation depth of 4. Performed 49526 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 384 fixpoints after 26 different actions. Largest state had 60 variables. [2019-09-10 03:46:01,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:01,340 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:46:01,340 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:01,340 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:46:01,362 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:01,362 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2019-09-10 03:46:01,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:01,616 INFO L256 TraceCheckSpWp]: Trace formula consists of 1914 conjuncts, 3 conjunts are in the unsatisfiable core [2019-09-10 03:46:01,626 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:46:01,862 INFO L134 CoverageAnalysis]: Checked inductivity of 658 backedges. 345 proven. 0 refuted. 0 times theorem prover too weak. 313 trivial. 0 not checked. [2019-09-10 03:46:01,862 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:46:02,253 INFO L134 CoverageAnalysis]: Checked inductivity of 658 backedges. 60 proven. 50 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2019-09-10 03:46:02,258 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:46:02,258 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8, 4] total 10 [2019-09-10 03:46:02,258 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:46:02,259 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:46:02,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:46:02,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-09-10 03:46:02,259 INFO L87 Difference]: Start difference. First operand 18402 states and 22001 transitions. Second operand 3 states. [2019-09-10 03:46:02,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:46:02,351 INFO L93 Difference]: Finished difference Result 27868 states and 34020 transitions. [2019-09-10 03:46:02,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:46:02,352 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 495 [2019-09-10 03:46:02,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:46:02,423 INFO L225 Difference]: With dead ends: 27868 [2019-09-10 03:46:02,424 INFO L226 Difference]: Without dead ends: 27868 [2019-09-10 03:46:02,424 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 1000 GetRequests, 992 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-09-10 03:46:02,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27868 states. [2019-09-10 03:46:03,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27868 to 27607. [2019-09-10 03:46:03,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27607 states. [2019-09-10 03:46:03,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27607 states to 27607 states and 33760 transitions. [2019-09-10 03:46:03,232 INFO L78 Accepts]: Start accepts. Automaton has 27607 states and 33760 transitions. Word has length 495 [2019-09-10 03:46:03,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:46:03,233 INFO L475 AbstractCegarLoop]: Abstraction has 27607 states and 33760 transitions. [2019-09-10 03:46:03,233 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:46:03,233 INFO L276 IsEmpty]: Start isEmpty. Operand 27607 states and 33760 transitions. [2019-09-10 03:46:03,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 286 [2019-09-10 03:46:03,307 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:46:03,307 INFO L399 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:46:03,308 INFO L418 AbstractCegarLoop]: === Iteration 30 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:46:03,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:03,308 INFO L82 PathProgramCache]: Analyzing trace with hash 2108519711, now seen corresponding path program 1 times [2019-09-10 03:46:03,308 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:46:03,309 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:03,309 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:03,309 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:03,309 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:46:03,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:03,413 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 13 proven. 13 refuted. 0 times theorem prover too weak. 151 trivial. 0 not checked. [2019-09-10 03:46:03,413 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:03,413 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:46:03,414 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 286 with the following transitions: [2019-09-10 03:46:03,414 INFO L207 CegarAbsIntRunner]: [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [133], [136], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [308], [311], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [362], [363], [364], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [549], [555], [558], [562], [568], [571], [575], [578], [588], [591], [601], [604], [616], [617], [631], [633], [666], [667], [670], [671], [672], [673], [674], [676], [677], [678], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [738], [739], [740] [2019-09-10 03:46:03,416 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:46:03,416 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:46:03,453 INFO L266 AbstractInterpreter]: Error location(s) were unreachable [2019-09-10 03:46:03,454 INFO L272 AbstractInterpreter]: Visited 147 different actions 163 times. Merged at 9 different actions 9 times. Never widened. Performed 819 root evaluator evaluations with a maximum evaluation depth of 4. Performed 819 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 1 fixpoints after 1 different actions. Largest state had 60 variables. [2019-09-10 03:46:03,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:03,454 INFO L403 sIntCurrentIteration]: Generating AbsInt predicates [2019-09-10 03:46:03,579 INFO L227 lantSequenceWeakener]: Weakened 166 states. On average, predicates are now at 69.8% of their original sizes. [2019-09-10 03:46:03,579 INFO L418 sIntCurrentIteration]: Unifying AI predicates [2019-09-10 03:46:05,618 INFO L420 sIntCurrentIteration]: We unified 284 AI predicates to 284 [2019-09-10 03:46:05,618 INFO L429 sIntCurrentIteration]: Finished generation of AbsInt predicates [2019-09-10 03:46:05,618 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-10 03:46:05,619 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [71] imperfect sequences [4] total 73 [2019-09-10 03:46:05,619 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:46:05,620 INFO L454 AbstractCegarLoop]: Interpolant automaton has 71 states [2019-09-10 03:46:05,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2019-09-10 03:46:05,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=750, Invalid=4220, Unknown=0, NotChecked=0, Total=4970 [2019-09-10 03:46:05,623 INFO L87 Difference]: Start difference. First operand 27607 states and 33760 transitions. Second operand 71 states. [2019-09-10 03:46:41,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:46:41,661 INFO L93 Difference]: Finished difference Result 28629 states and 35170 transitions. [2019-09-10 03:46:41,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2019-09-10 03:46:41,662 INFO L78 Accepts]: Start accepts. Automaton has 71 states. Word has length 285 [2019-09-10 03:46:41,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:46:41,727 INFO L225 Difference]: With dead ends: 28629 [2019-09-10 03:46:41,727 INFO L226 Difference]: Without dead ends: 28629 [2019-09-10 03:46:41,732 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 344 GetRequests, 215 SyntacticMatches, 0 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5134 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=2281, Invalid=14749, Unknown=0, NotChecked=0, Total=17030 [2019-09-10 03:46:41,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28629 states. [2019-09-10 03:46:42,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28629 to 28228. [2019-09-10 03:46:42,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28228 states. [2019-09-10 03:46:42,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28228 states to 28228 states and 34504 transitions. [2019-09-10 03:46:42,396 INFO L78 Accepts]: Start accepts. Automaton has 28228 states and 34504 transitions. Word has length 285 [2019-09-10 03:46:42,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:46:42,396 INFO L475 AbstractCegarLoop]: Abstraction has 28228 states and 34504 transitions. [2019-09-10 03:46:42,396 INFO L476 AbstractCegarLoop]: Interpolant automaton has 71 states. [2019-09-10 03:46:42,397 INFO L276 IsEmpty]: Start isEmpty. Operand 28228 states and 34504 transitions. [2019-09-10 03:46:42,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 431 [2019-09-10 03:46:42,458 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:46:42,459 INFO L399 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:46:42,460 INFO L418 AbstractCegarLoop]: === Iteration 31 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:46:42,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:42,460 INFO L82 PathProgramCache]: Analyzing trace with hash 1280931003, now seen corresponding path program 1 times [2019-09-10 03:46:42,460 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:46:42,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:42,461 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:42,461 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:42,461 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:46:42,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:42,780 INFO L134 CoverageAnalysis]: Checked inductivity of 455 backedges. 38 proven. 26 refuted. 0 times theorem prover too weak. 391 trivial. 0 not checked. [2019-09-10 03:46:42,780 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:42,780 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:46:42,780 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 431 with the following transitions: [2019-09-10 03:46:42,781 INFO L207 CegarAbsIntRunner]: [2], [18], [20], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [308], [311], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [340], [345], [350], [353], [362], [363], [364], [367], [372], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [555], [558], [562], [565], [568], [571], [575], [578], [584], [588], [591], [594], [601], [604], [610], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:46:42,783 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:46:42,783 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:46:43,105 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:46:43,105 INFO L272 AbstractInterpreter]: Visited 182 different actions 1202 times. Merged at 65 different actions 370 times. Never widened. Performed 6145 root evaluator evaluations with a maximum evaluation depth of 4. Performed 6145 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 54 fixpoints after 20 different actions. Largest state had 60 variables. [2019-09-10 03:46:43,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:43,107 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:46:43,107 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:43,107 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-10 03:46:43,129 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:43,129 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:46:43,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:43,319 INFO L256 TraceCheckSpWp]: Trace formula consists of 1718 conjuncts, 3 conjunts are in the unsatisfiable core [2019-09-10 03:46:43,327 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:46:43,431 INFO L134 CoverageAnalysis]: Checked inductivity of 455 backedges. 290 proven. 0 refuted. 0 times theorem prover too weak. 165 trivial. 0 not checked. [2019-09-10 03:46:43,432 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:46:43,778 INFO L134 CoverageAnalysis]: Checked inductivity of 455 backedges. 50 proven. 15 refuted. 0 times theorem prover too weak. 390 trivial. 0 not checked. [2019-09-10 03:46:43,782 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:46:43,782 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8, 4] total 10 [2019-09-10 03:46:43,782 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:46:43,783 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:46:43,783 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:46:43,783 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-09-10 03:46:43,783 INFO L87 Difference]: Start difference. First operand 28228 states and 34504 transitions. Second operand 3 states. [2019-09-10 03:46:43,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:46:43,961 INFO L93 Difference]: Finished difference Result 48391 states and 62194 transitions. [2019-09-10 03:46:43,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:46:43,961 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 430 [2019-09-10 03:46:43,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:46:44,100 INFO L225 Difference]: With dead ends: 48391 [2019-09-10 03:46:44,100 INFO L226 Difference]: Without dead ends: 48391 [2019-09-10 03:46:44,101 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 870 GetRequests, 862 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-09-10 03:46:44,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48391 states. [2019-09-10 03:46:45,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48391 to 45914. [2019-09-10 03:46:45,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45914 states. [2019-09-10 03:46:45,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45914 states to 45914 states and 59610 transitions. [2019-09-10 03:46:45,769 INFO L78 Accepts]: Start accepts. Automaton has 45914 states and 59610 transitions. Word has length 430 [2019-09-10 03:46:45,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:46:45,770 INFO L475 AbstractCegarLoop]: Abstraction has 45914 states and 59610 transitions. [2019-09-10 03:46:45,770 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:46:45,770 INFO L276 IsEmpty]: Start isEmpty. Operand 45914 states and 59610 transitions. [2019-09-10 03:46:45,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 438 [2019-09-10 03:46:45,876 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:46:45,878 INFO L399 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:46:45,878 INFO L418 AbstractCegarLoop]: === Iteration 32 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:46:45,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:45,879 INFO L82 PathProgramCache]: Analyzing trace with hash -717809385, now seen corresponding path program 1 times [2019-09-10 03:46:45,879 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:46:45,880 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:45,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:45,880 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:45,880 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:46:45,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:46,047 INFO L134 CoverageAnalysis]: Checked inductivity of 454 backedges. 38 proven. 26 refuted. 0 times theorem prover too weak. 390 trivial. 0 not checked. [2019-09-10 03:46:46,048 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:46,048 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:46:46,048 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 438 with the following transitions: [2019-09-10 03:46:46,049 INFO L207 CegarAbsIntRunner]: [2], [18], [20], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [207], [210], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [298], [300], [303], [308], [311], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [340], [345], [348], [362], [363], [364], [367], [372], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [470], [473], [497], [499], [507], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [552], [555], [558], [562], [565], [571], [575], [578], [581], [588], [591], [597], [601], [604], [607], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [698], [699], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:46:46,051 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:46:46,051 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:46:46,454 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:46:46,455 INFO L272 AbstractInterpreter]: Visited 186 different actions 1026 times. Merged at 55 different actions 238 times. Never widened. Performed 5222 root evaluator evaluations with a maximum evaluation depth of 4. Performed 5222 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 42 fixpoints after 11 different actions. Largest state had 60 variables. [2019-09-10 03:46:46,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:46,456 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:46:46,456 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:46,456 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-10 03:46:46,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:46,482 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:46:46,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:46,764 INFO L256 TraceCheckSpWp]: Trace formula consists of 1768 conjuncts, 3 conjunts are in the unsatisfiable core [2019-09-10 03:46:46,786 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:46:46,942 INFO L134 CoverageAnalysis]: Checked inductivity of 454 backedges. 296 proven. 0 refuted. 0 times theorem prover too weak. 158 trivial. 0 not checked. [2019-09-10 03:46:46,942 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:46:47,243 INFO L134 CoverageAnalysis]: Checked inductivity of 454 backedges. 94 proven. 21 refuted. 0 times theorem prover too weak. 339 trivial. 0 not checked. [2019-09-10 03:46:47,248 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:46:47,249 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8, 4] total 10 [2019-09-10 03:46:47,249 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:46:47,250 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:46:47,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:46:47,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-09-10 03:46:47,251 INFO L87 Difference]: Start difference. First operand 45914 states and 59610 transitions. Second operand 3 states. [2019-09-10 03:46:47,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:46:47,551 INFO L93 Difference]: Finished difference Result 49998 states and 62350 transitions. [2019-09-10 03:46:47,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:46:47,552 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 437 [2019-09-10 03:46:47,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:46:47,998 INFO L225 Difference]: With dead ends: 49998 [2019-09-10 03:46:47,998 INFO L226 Difference]: Without dead ends: 49998 [2019-09-10 03:46:48,004 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 884 GetRequests, 876 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-09-10 03:46:48,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49998 states. [2019-09-10 03:46:49,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49998 to 49984. [2019-09-10 03:46:49,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49984 states. [2019-09-10 03:46:49,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49984 states to 49984 states and 62336 transitions. [2019-09-10 03:46:49,256 INFO L78 Accepts]: Start accepts. Automaton has 49984 states and 62336 transitions. Word has length 437 [2019-09-10 03:46:49,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:46:49,257 INFO L475 AbstractCegarLoop]: Abstraction has 49984 states and 62336 transitions. [2019-09-10 03:46:49,257 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:46:49,257 INFO L276 IsEmpty]: Start isEmpty. Operand 49984 states and 62336 transitions. [2019-09-10 03:46:49,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 430 [2019-09-10 03:46:49,351 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:46:49,352 INFO L399 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:46:49,352 INFO L418 AbstractCegarLoop]: === Iteration 33 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:46:49,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:49,352 INFO L82 PathProgramCache]: Analyzing trace with hash 1236487741, now seen corresponding path program 1 times [2019-09-10 03:46:49,353 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:46:49,353 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:49,353 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:49,353 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:49,354 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:46:49,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:49,516 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 40 proven. 26 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2019-09-10 03:46:49,516 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:49,517 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:46:49,517 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 430 with the following transitions: [2019-09-10 03:46:49,517 INFO L207 CegarAbsIntRunner]: [2], [18], [20], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [308], [311], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [362], [363], [364], [367], [372], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [555], [562], [565], [568], [571], [575], [578], [581], [588], [591], [597], [601], [604], [607], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:46:49,519 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:46:49,520 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:46:50,289 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:46:50,290 INFO L272 AbstractInterpreter]: Visited 180 different actions 2314 times. Merged at 63 different actions 843 times. Never widened. Performed 10369 root evaluator evaluations with a maximum evaluation depth of 4. Performed 10369 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 118 fixpoints after 19 different actions. Largest state had 60 variables. [2019-09-10 03:46:50,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:50,290 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:46:50,290 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:50,290 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-10 03:46:50,316 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:50,316 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:46:50,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:50,503 INFO L256 TraceCheckSpWp]: Trace formula consists of 1734 conjuncts, 2 conjunts are in the unsatisfiable core [2019-09-10 03:46:50,511 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:46:50,933 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 261 proven. 0 refuted. 0 times theorem prover too weak. 197 trivial. 0 not checked. [2019-09-10 03:46:50,933 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:46:51,179 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 36 proven. 2 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2019-09-10 03:46:51,184 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:46:51,184 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8, 3] total 10 [2019-09-10 03:46:51,185 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:46:51,186 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:46:51,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:46:51,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2019-09-10 03:46:51,186 INFO L87 Difference]: Start difference. First operand 49984 states and 62336 transitions. Second operand 3 states. [2019-09-10 03:46:51,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:46:51,455 INFO L93 Difference]: Finished difference Result 51367 states and 64218 transitions. [2019-09-10 03:46:51,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:46:51,455 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 429 [2019-09-10 03:46:51,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:46:51,597 INFO L225 Difference]: With dead ends: 51367 [2019-09-10 03:46:51,598 INFO L226 Difference]: Without dead ends: 51367 [2019-09-10 03:46:51,599 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 868 GetRequests, 860 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2019-09-10 03:46:51,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51367 states. [2019-09-10 03:46:52,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51367 to 51333. [2019-09-10 03:46:52,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51333 states. [2019-09-10 03:46:52,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51333 states to 51333 states and 64185 transitions. [2019-09-10 03:46:52,750 INFO L78 Accepts]: Start accepts. Automaton has 51333 states and 64185 transitions. Word has length 429 [2019-09-10 03:46:52,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:46:52,751 INFO L475 AbstractCegarLoop]: Abstraction has 51333 states and 64185 transitions. [2019-09-10 03:46:52,751 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:46:52,751 INFO L276 IsEmpty]: Start isEmpty. Operand 51333 states and 64185 transitions. [2019-09-10 03:46:52,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 514 [2019-09-10 03:46:52,834 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:46:52,835 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:46:52,835 INFO L418 AbstractCegarLoop]: === Iteration 34 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:46:52,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:52,835 INFO L82 PathProgramCache]: Analyzing trace with hash -1584222668, now seen corresponding path program 1 times [2019-09-10 03:46:52,835 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:46:52,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:52,836 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:52,836 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:52,837 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:46:52,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:53,026 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 62 proven. 93 refuted. 0 times theorem prover too weak. 576 trivial. 0 not checked. [2019-09-10 03:46:53,026 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:53,026 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:46:53,026 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 514 with the following transitions: [2019-09-10 03:46:53,027 INFO L207 CegarAbsIntRunner]: [4], [7], [18], [20], [22], [24], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [139], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [308], [311], [314], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [340], [343], [362], [363], [364], [367], [372], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [470], [473], [497], [499], [507], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [552], [555], [562], [565], [568], [571], [575], [578], [584], [588], [591], [597], [601], [604], [607], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [668], [669], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [698], [699], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:46:53,029 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:46:53,030 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:46:53,508 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:46:53,509 INFO L272 AbstractInterpreter]: Visited 181 different actions 771 times. Merged at 51 different actions 192 times. Never widened. Performed 3392 root evaluator evaluations with a maximum evaluation depth of 4. Performed 3392 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 26 fixpoints after 10 different actions. Largest state had 60 variables. [2019-09-10 03:46:53,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:53,509 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:46:53,509 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:53,509 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-10 03:46:53,523 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:53,524 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:46:53,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:53,745 INFO L256 TraceCheckSpWp]: Trace formula consists of 1962 conjuncts, 3 conjunts are in the unsatisfiable core [2019-09-10 03:46:53,753 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:46:53,864 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 381 proven. 0 refuted. 0 times theorem prover too weak. 350 trivial. 0 not checked. [2019-09-10 03:46:53,864 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:46:54,204 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 95 proven. 60 refuted. 0 times theorem prover too weak. 576 trivial. 0 not checked. [2019-09-10 03:46:54,213 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:46:54,214 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [5, 4] total 6 [2019-09-10 03:46:54,214 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:46:54,214 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:46:54,215 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:46:54,215 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:46:54,215 INFO L87 Difference]: Start difference. First operand 51333 states and 64185 transitions. Second operand 3 states. [2019-09-10 03:46:54,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:46:54,359 INFO L93 Difference]: Finished difference Result 54056 states and 62994 transitions. [2019-09-10 03:46:54,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:46:54,359 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 513 [2019-09-10 03:46:54,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:46:54,460 INFO L225 Difference]: With dead ends: 54056 [2019-09-10 03:46:54,460 INFO L226 Difference]: Without dead ends: 45246 [2019-09-10 03:46:54,460 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 1032 GetRequests, 1028 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-10 03:46:54,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45246 states. [2019-09-10 03:46:55,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45246 to 43379. [2019-09-10 03:46:55,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43379 states. [2019-09-10 03:46:55,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43379 states to 43379 states and 50384 transitions. [2019-09-10 03:46:55,420 INFO L78 Accepts]: Start accepts. Automaton has 43379 states and 50384 transitions. Word has length 513 [2019-09-10 03:46:55,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:46:55,421 INFO L475 AbstractCegarLoop]: Abstraction has 43379 states and 50384 transitions. [2019-09-10 03:46:55,421 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:46:55,421 INFO L276 IsEmpty]: Start isEmpty. Operand 43379 states and 50384 transitions. [2019-09-10 03:46:55,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 504 [2019-09-10 03:46:55,521 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:46:55,522 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:46:55,522 INFO L418 AbstractCegarLoop]: === Iteration 35 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:46:55,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:55,523 INFO L82 PathProgramCache]: Analyzing trace with hash 1493692395, now seen corresponding path program 1 times [2019-09-10 03:46:55,523 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:46:55,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:55,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:55,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:55,525 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:46:55,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:56,039 INFO L134 CoverageAnalysis]: Checked inductivity of 726 backedges. 56 proven. 32 refuted. 0 times theorem prover too weak. 638 trivial. 0 not checked. [2019-09-10 03:46:56,039 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:56,039 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:46:56,040 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 504 with the following transitions: [2019-09-10 03:46:56,040 INFO L207 CegarAbsIntRunner]: [4], [7], [18], [20], [22], [24], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [139], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [308], [311], [314], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [362], [363], [364], [367], [372], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [555], [562], [565], [568], [571], [575], [578], [584], [588], [591], [594], [601], [604], [607], [610], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [668], [669], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:46:56,042 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:46:56,042 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:46:56,233 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:46:56,233 INFO L272 AbstractInterpreter]: Visited 178 different actions 887 times. Merged at 53 different actions 229 times. Never widened. Performed 4657 root evaluator evaluations with a maximum evaluation depth of 4. Performed 4657 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 41 fixpoints after 12 different actions. Largest state had 60 variables. [2019-09-10 03:46:56,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:56,233 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:46:56,234 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:56,234 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:46:56,261 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:56,261 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2019-09-10 03:46:56,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:56,490 INFO L256 TraceCheckSpWp]: Trace formula consists of 1929 conjuncts, 3 conjunts are in the unsatisfiable core [2019-09-10 03:46:56,498 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:46:56,609 INFO L134 CoverageAnalysis]: Checked inductivity of 726 backedges. 417 proven. 0 refuted. 0 times theorem prover too weak. 309 trivial. 0 not checked. [2019-09-10 03:46:56,609 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:46:56,945 INFO L134 CoverageAnalysis]: Checked inductivity of 726 backedges. 64 proven. 20 refuted. 0 times theorem prover too weak. 642 trivial. 0 not checked. [2019-09-10 03:46:56,950 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:46:56,950 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8, 3] total 9 [2019-09-10 03:46:56,950 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:46:56,951 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:46:56,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:46:56,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-09-10 03:46:56,951 INFO L87 Difference]: Start difference. First operand 43379 states and 50384 transitions. Second operand 3 states. [2019-09-10 03:46:57,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:46:57,155 INFO L93 Difference]: Finished difference Result 43115 states and 49858 transitions. [2019-09-10 03:46:57,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:46:57,156 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 503 [2019-09-10 03:46:57,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:46:57,323 INFO L225 Difference]: With dead ends: 43115 [2019-09-10 03:46:57,324 INFO L226 Difference]: Without dead ends: 43099 [2019-09-10 03:46:57,324 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 1016 GetRequests, 1009 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-09-10 03:46:57,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43099 states. [2019-09-10 03:46:58,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43099 to 42884. [2019-09-10 03:46:58,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42884 states. [2019-09-10 03:46:58,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42884 states to 42884 states and 49626 transitions. [2019-09-10 03:46:58,261 INFO L78 Accepts]: Start accepts. Automaton has 42884 states and 49626 transitions. Word has length 503 [2019-09-10 03:46:58,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:46:58,262 INFO L475 AbstractCegarLoop]: Abstraction has 42884 states and 49626 transitions. [2019-09-10 03:46:58,262 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:46:58,262 INFO L276 IsEmpty]: Start isEmpty. Operand 42884 states and 49626 transitions. [2019-09-10 03:46:58,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 489 [2019-09-10 03:46:58,351 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:46:58,352 INFO L399 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:46:58,352 INFO L418 AbstractCegarLoop]: === Iteration 36 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:46:58,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:58,352 INFO L82 PathProgramCache]: Analyzing trace with hash 1228157719, now seen corresponding path program 1 times [2019-09-10 03:46:58,353 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:46:58,353 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:58,353 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:58,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:46:58,354 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:46:58,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:46:59,677 INFO L134 CoverageAnalysis]: Checked inductivity of 663 backedges. 41 proven. 26 refuted. 0 times theorem prover too weak. 596 trivial. 0 not checked. [2019-09-10 03:46:59,678 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:59,678 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:46:59,678 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 489 with the following transitions: [2019-09-10 03:46:59,679 INFO L207 CegarAbsIntRunner]: [4], [7], [18], [20], [22], [24], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [139], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [308], [311], [314], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [362], [363], [364], [367], [372], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [555], [562], [565], [568], [571], [575], [578], [581], [588], [591], [594], [601], [604], [610], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [668], [669], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [696], [697], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:46:59,681 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:46:59,681 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:46:59,897 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:46:59,897 INFO L272 AbstractInterpreter]: Visited 177 different actions 865 times. Merged at 51 different actions 245 times. Never widened. Performed 3771 root evaluator evaluations with a maximum evaluation depth of 4. Performed 3771 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 35 fixpoints after 11 different actions. Largest state had 60 variables. [2019-09-10 03:46:59,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:46:59,897 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:46:59,898 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:46:59,898 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-10 03:46:59,911 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:46:59,912 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:47:00,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:47:00,116 INFO L256 TraceCheckSpWp]: Trace formula consists of 1888 conjuncts, 8 conjunts are in the unsatisfiable core [2019-09-10 03:47:00,124 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:47:00,409 INFO L134 CoverageAnalysis]: Checked inductivity of 663 backedges. 312 proven. 0 refuted. 0 times theorem prover too weak. 351 trivial. 0 not checked. [2019-09-10 03:47:00,409 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:47:00,692 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-09-10 03:47:00,698 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-09-10 03:47:00,702 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-09-10 03:47:00,706 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-09-10 03:47:00,994 INFO L134 CoverageAnalysis]: Checked inductivity of 663 backedges. 58 proven. 54 refuted. 0 times theorem prover too weak. 551 trivial. 0 not checked. [2019-09-10 03:47:01,008 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:47:01,009 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [8, 5] total 12 [2019-09-10 03:47:01,009 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:47:01,009 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-10 03:47:01,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-10 03:47:01,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-09-10 03:47:01,010 INFO L87 Difference]: Start difference. First operand 42884 states and 49626 transitions. Second operand 4 states. [2019-09-10 03:47:01,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:47:01,515 INFO L93 Difference]: Finished difference Result 26118 states and 29678 transitions. [2019-09-10 03:47:01,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-10 03:47:01,516 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 488 [2019-09-10 03:47:01,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:47:01,573 INFO L225 Difference]: With dead ends: 26118 [2019-09-10 03:47:01,574 INFO L226 Difference]: Without dead ends: 19162 [2019-09-10 03:47:01,574 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 988 GetRequests, 970 SyntacticMatches, 7 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-09-10 03:47:01,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19162 states. [2019-09-10 03:47:01,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19162 to 19127. [2019-09-10 03:47:01,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19127 states. [2019-09-10 03:47:01,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19127 states to 19127 states and 21769 transitions. [2019-09-10 03:47:01,902 INFO L78 Accepts]: Start accepts. Automaton has 19127 states and 21769 transitions. Word has length 488 [2019-09-10 03:47:01,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:47:01,902 INFO L475 AbstractCegarLoop]: Abstraction has 19127 states and 21769 transitions. [2019-09-10 03:47:01,902 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-10 03:47:01,902 INFO L276 IsEmpty]: Start isEmpty. Operand 19127 states and 21769 transitions. [2019-09-10 03:47:01,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 581 [2019-09-10 03:47:01,943 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:47:01,943 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:47:01,944 INFO L418 AbstractCegarLoop]: === Iteration 37 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:47:01,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:47:01,944 INFO L82 PathProgramCache]: Analyzing trace with hash 1241278171, now seen corresponding path program 1 times [2019-09-10 03:47:01,944 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:47:01,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:47:01,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:47:01,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:47:01,945 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:47:01,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:47:02,177 INFO L134 CoverageAnalysis]: Checked inductivity of 998 backedges. 67 proven. 50 refuted. 0 times theorem prover too weak. 881 trivial. 0 not checked. [2019-09-10 03:47:02,178 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:47:02,178 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:47:02,179 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 581 with the following transitions: [2019-09-10 03:47:02,179 INFO L207 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [22], [24], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [139], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [207], [212], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [306], [308], [311], [314], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [340], [343], [362], [363], [364], [367], [370], [372], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [468], [484], [486], [488], [497], [499], [507], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [552], [555], [558], [562], [565], [571], [575], [578], [584], [588], [591], [594], [597], [601], [604], [607], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [668], [669], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:47:02,183 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:47:02,183 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:47:05,608 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:47:05,609 INFO L272 AbstractInterpreter]: Visited 207 different actions 9539 times. Merged at 92 different actions 3698 times. Widened at 3 different actions 4 times. Performed 46013 root evaluator evaluations with a maximum evaluation depth of 4. Performed 46013 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 499 fixpoints after 32 different actions. Largest state had 60 variables. [2019-09-10 03:47:05,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:47:05,609 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:47:05,609 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:47:05,609 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:47:05,619 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:47:05,620 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2019-09-10 03:47:05,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:47:05,868 INFO L256 TraceCheckSpWp]: Trace formula consists of 2153 conjuncts, 3 conjunts are in the unsatisfiable core [2019-09-10 03:47:05,878 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:47:06,024 INFO L134 CoverageAnalysis]: Checked inductivity of 998 backedges. 559 proven. 0 refuted. 0 times theorem prover too weak. 439 trivial. 0 not checked. [2019-09-10 03:47:06,025 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:47:06,512 INFO L134 CoverageAnalysis]: Checked inductivity of 998 backedges. 67 proven. 50 refuted. 0 times theorem prover too weak. 881 trivial. 0 not checked. [2019-09-10 03:47:06,516 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:47:06,517 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [3, 3] total 3 [2019-09-10 03:47:06,517 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:47:06,517 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:47:06,518 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:47:06,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-10 03:47:06,518 INFO L87 Difference]: Start difference. First operand 19127 states and 21769 transitions. Second operand 3 states. [2019-09-10 03:47:06,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:47:06,565 INFO L93 Difference]: Finished difference Result 18900 states and 21414 transitions. [2019-09-10 03:47:06,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:47:06,565 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 580 [2019-09-10 03:47:06,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:47:06,599 INFO L225 Difference]: With dead ends: 18900 [2019-09-10 03:47:06,599 INFO L226 Difference]: Without dead ends: 18860 [2019-09-10 03:47:06,600 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 1162 GetRequests, 1161 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-10 03:47:06,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18860 states. [2019-09-10 03:47:06,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18860 to 18857. [2019-09-10 03:47:06,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18857 states. [2019-09-10 03:47:06,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18857 states to 18857 states and 21371 transitions. [2019-09-10 03:47:06,849 INFO L78 Accepts]: Start accepts. Automaton has 18857 states and 21371 transitions. Word has length 580 [2019-09-10 03:47:06,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:47:06,850 INFO L475 AbstractCegarLoop]: Abstraction has 18857 states and 21371 transitions. [2019-09-10 03:47:06,850 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:47:06,850 INFO L276 IsEmpty]: Start isEmpty. Operand 18857 states and 21371 transitions. [2019-09-10 03:47:06,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 584 [2019-09-10 03:47:06,877 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:47:06,878 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:47:06,878 INFO L418 AbstractCegarLoop]: === Iteration 38 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:47:06,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:47:06,878 INFO L82 PathProgramCache]: Analyzing trace with hash -1793759232, now seen corresponding path program 1 times [2019-09-10 03:47:06,878 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:47:06,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:47:06,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:47:06,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:47:06,879 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:47:06,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:47:07,279 INFO L134 CoverageAnalysis]: Checked inductivity of 1000 backedges. 68 proven. 31 refuted. 0 times theorem prover too weak. 901 trivial. 0 not checked. [2019-09-10 03:47:07,279 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:47:07,279 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:47:07,279 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 584 with the following transitions: [2019-09-10 03:47:07,280 INFO L207 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [22], [24], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [139], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [207], [212], [214], [216], [218], [219], [275], [278], [281], [285], [287], [289], [290], [292], [293], [295], [300], [303], [306], [308], [311], [314], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [340], [343], [345], [350], [355], [360], [362], [363], [364], [367], [370], [372], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [468], [484], [486], [488], [497], [499], [507], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [552], [555], [558], [562], [565], [568], [571], [575], [578], [584], [588], [591], [594], [601], [604], [607], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [668], [669], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:47:07,282 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:47:07,282 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:47:10,424 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:47:10,425 INFO L272 AbstractInterpreter]: Visited 237 different actions 14211 times. Merged at 108 different actions 4797 times. Widened at 2 different actions 5 times. Performed 79319 root evaluator evaluations with a maximum evaluation depth of 4. Performed 79319 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 652 fixpoints after 37 different actions. Largest state had 60 variables. [2019-09-10 03:47:10,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:47:10,425 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:47:10,425 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:47:10,425 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:47:10,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:47:10,435 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2019-09-10 03:47:10,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:47:10,675 INFO L256 TraceCheckSpWp]: Trace formula consists of 2165 conjuncts, 3 conjunts are in the unsatisfiable core [2019-09-10 03:47:10,689 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:47:10,997 INFO L134 CoverageAnalysis]: Checked inductivity of 1000 backedges. 394 proven. 0 refuted. 0 times theorem prover too weak. 606 trivial. 0 not checked. [2019-09-10 03:47:10,998 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:47:11,578 INFO L134 CoverageAnalysis]: Checked inductivity of 1000 backedges. 94 proven. 7 refuted. 0 times theorem prover too weak. 899 trivial. 0 not checked. [2019-09-10 03:47:11,585 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:47:11,585 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8, 4] total 10 [2019-09-10 03:47:11,585 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:47:11,586 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:47:11,586 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:47:11,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-09-10 03:47:11,587 INFO L87 Difference]: Start difference. First operand 18857 states and 21371 transitions. Second operand 3 states. [2019-09-10 03:47:11,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:47:11,657 INFO L93 Difference]: Finished difference Result 18577 states and 20980 transitions. [2019-09-10 03:47:11,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:47:11,657 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 583 [2019-09-10 03:47:11,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:47:11,694 INFO L225 Difference]: With dead ends: 18577 [2019-09-10 03:47:11,694 INFO L226 Difference]: Without dead ends: 18577 [2019-09-10 03:47:11,695 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 1176 GetRequests, 1168 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-09-10 03:47:11,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18577 states. [2019-09-10 03:47:11,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18577 to 18255. [2019-09-10 03:47:11,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18255 states. [2019-09-10 03:47:11,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18255 states to 18255 states and 20620 transitions. [2019-09-10 03:47:11,975 INFO L78 Accepts]: Start accepts. Automaton has 18255 states and 20620 transitions. Word has length 583 [2019-09-10 03:47:11,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:47:11,976 INFO L475 AbstractCegarLoop]: Abstraction has 18255 states and 20620 transitions. [2019-09-10 03:47:11,976 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:47:11,976 INFO L276 IsEmpty]: Start isEmpty. Operand 18255 states and 20620 transitions. [2019-09-10 03:47:12,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 587 [2019-09-10 03:47:12,015 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:47:12,015 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:47:12,015 INFO L418 AbstractCegarLoop]: === Iteration 39 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:47:12,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:47:12,016 INFO L82 PathProgramCache]: Analyzing trace with hash -796207567, now seen corresponding path program 1 times [2019-09-10 03:47:12,016 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:47:12,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:47:12,017 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:47:12,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:47:12,017 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:47:12,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:47:12,235 INFO L134 CoverageAnalysis]: Checked inductivity of 1000 backedges. 80 proven. 14 refuted. 0 times theorem prover too weak. 906 trivial. 0 not checked. [2019-09-10 03:47:12,235 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:47:12,235 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:47:12,236 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 587 with the following transitions: [2019-09-10 03:47:12,236 INFO L207 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [22], [24], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [139], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [207], [212], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [306], [308], [311], [314], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [340], [345], [348], [362], [363], [364], [367], [370], [372], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [468], [470], [473], [484], [486], [488], [497], [499], [507], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [552], [555], [558], [562], [565], [568], [571], [575], [578], [581], [584], [588], [591], [594], [601], [604], [610], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [668], [669], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:47:12,238 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:47:12,238 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:47:14,641 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:47:14,641 INFO L272 AbstractInterpreter]: Visited 211 different actions 11299 times. Merged at 93 different actions 3815 times. Widened at 1 different actions 4 times. Performed 65630 root evaluator evaluations with a maximum evaluation depth of 4. Performed 65630 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 603 fixpoints after 35 different actions. Largest state had 60 variables. [2019-09-10 03:47:14,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:47:14,641 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:47:14,641 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:47:14,641 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:47:14,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:47:14,652 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2019-09-10 03:47:14,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:47:14,903 INFO L256 TraceCheckSpWp]: Trace formula consists of 2204 conjuncts, 2 conjunts are in the unsatisfiable core [2019-09-10 03:47:14,917 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:47:15,035 INFO L134 CoverageAnalysis]: Checked inductivity of 1000 backedges. 566 proven. 0 refuted. 0 times theorem prover too weak. 434 trivial. 0 not checked. [2019-09-10 03:47:15,035 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:47:15,460 INFO L134 CoverageAnalysis]: Checked inductivity of 1000 backedges. 80 proven. 14 refuted. 0 times theorem prover too weak. 906 trivial. 0 not checked. [2019-09-10 03:47:15,465 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:47:15,465 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4, 4] total 5 [2019-09-10 03:47:15,465 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:47:15,466 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-10 03:47:15,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-10 03:47:15,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:47:15,466 INFO L87 Difference]: Start difference. First operand 18255 states and 20620 transitions. Second operand 3 states. [2019-09-10 03:47:15,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:47:15,512 INFO L93 Difference]: Finished difference Result 17927 states and 19704 transitions. [2019-09-10 03:47:15,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-10 03:47:15,513 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 586 [2019-09-10 03:47:15,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:47:15,536 INFO L225 Difference]: With dead ends: 17927 [2019-09-10 03:47:15,536 INFO L226 Difference]: Without dead ends: 17927 [2019-09-10 03:47:15,537 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 1175 GetRequests, 1171 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-09-10 03:47:15,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17927 states. [2019-09-10 03:47:15,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17927 to 17388. [2019-09-10 03:47:15,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17388 states. [2019-09-10 03:47:15,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17388 states to 17388 states and 19110 transitions. [2019-09-10 03:47:15,710 INFO L78 Accepts]: Start accepts. Automaton has 17388 states and 19110 transitions. Word has length 586 [2019-09-10 03:47:15,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:47:15,710 INFO L475 AbstractCegarLoop]: Abstraction has 17388 states and 19110 transitions. [2019-09-10 03:47:15,710 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-10 03:47:15,710 INFO L276 IsEmpty]: Start isEmpty. Operand 17388 states and 19110 transitions. [2019-09-10 03:47:15,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 583 [2019-09-10 03:47:15,725 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:47:15,725 INFO L399 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:47:15,725 INFO L418 AbstractCegarLoop]: === Iteration 40 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:47:15,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:47:15,726 INFO L82 PathProgramCache]: Analyzing trace with hash -879781227, now seen corresponding path program 1 times [2019-09-10 03:47:15,726 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:47:15,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:47:15,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:47:15,727 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:47:15,727 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:47:15,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:47:16,697 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 70 proven. 31 refuted. 0 times theorem prover too weak. 900 trivial. 0 not checked. [2019-09-10 03:47:16,698 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:47:16,698 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2019-09-10 03:47:16,699 INFO L205 CegarAbsIntRunner]: Running AI on error trace of length 583 with the following transitions: [2019-09-10 03:47:16,699 INFO L207 CegarAbsIntRunner]: [2], [4], [7], [18], [20], [22], [24], [28], [31], [33], [36], [47], [49], [51], [53], [57], [60], [62], [65], [76], [78], [80], [82], [86], [89], [91], [94], [105], [107], [113], [114], [119], [122], [124], [129], [131], [132], [133], [136], [139], [141], [143], [145], [147], [148], [153], [159], [165], [171], [177], [183], [189], [195], [201], [203], [204], [207], [212], [214], [216], [218], [219], [275], [278], [281], [283], [285], [287], [289], [290], [292], [293], [295], [300], [303], [306], [308], [311], [314], [316], [319], [322], [324], [327], [330], [332], [334], [335], [338], [340], [343], [362], [363], [364], [367], [370], [372], [374], [376], [378], [379], [384], [390], [396], [402], [408], [414], [420], [426], [432], [434], [437], [443], [449], [455], [461], [465], [468], [484], [486], [488], [497], [499], [507], [510], [511], [512], [515], [518], [520], [522], [524], [526], [527], [528], [537], [540], [543], [545], [549], [552], [555], [558], [562], [565], [568], [575], [578], [581], [588], [591], [594], [597], [601], [604], [607], [615], [616], [617], [631], [633], [635], [637], [642], [650], [653], [658], [666], [667], [668], [669], [670], [671], [672], [673], [674], [676], [677], [678], [680], [681], [682], [683], [684], [685], [686], [687], [688], [689], [690], [691], [692], [693], [694], [695], [696], [697], [698], [699], [700], [701], [702], [703], [704], [705], [706], [707], [708], [709], [710], [711], [712], [713], [714], [715], [716], [717], [718], [719], [720], [721], [722], [723], [724], [725], [726], [727], [728], [729], [736], [737], [738], [739], [740] [2019-09-10 03:47:16,706 INFO L148 AbstractInterpreter]: Using domain IntervalDomain [2019-09-10 03:47:16,706 INFO L101 FixpointEngine]: Starting fixpoint engine with domain IntervalDomain (maxUnwinding=3, maxParallelStates=2) [2019-09-10 03:47:18,717 INFO L263 AbstractInterpreter]: Some error location(s) were reachable [2019-09-10 03:47:18,717 INFO L272 AbstractInterpreter]: Visited 207 different actions 10352 times. Merged at 92 different actions 3405 times. Widened at 2 different actions 3 times. Performed 57256 root evaluator evaluations with a maximum evaluation depth of 4. Performed 57256 inverse root evaluator evaluations with a maximum inverse evaluation depth of 4. Found 572 fixpoints after 33 different actions. Largest state had 60 variables. [2019-09-10 03:47:18,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:47:18,717 INFO L422 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2019-09-10 03:47:18,718 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-10 03:47:18,718 INFO L193 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-10 03:47:18,728 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:47:18,728 INFO L289 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2019-09-10 03:47:18,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-10 03:47:18,978 INFO L256 TraceCheckSpWp]: Trace formula consists of 2177 conjuncts, 5 conjunts are in the unsatisfiable core [2019-09-10 03:47:18,987 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-10 03:47:19,235 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 559 proven. 0 refuted. 0 times theorem prover too weak. 442 trivial. 0 not checked. [2019-09-10 03:47:19,236 INFO L322 TraceCheckSpWp]: Computing backward predicates... [2019-09-10 03:47:19,706 INFO L134 CoverageAnalysis]: Checked inductivity of 1001 backedges. 75 proven. 12 refuted. 0 times theorem prover too weak. 914 trivial. 0 not checked. [2019-09-10 03:47:19,759 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2019-09-10 03:47:19,759 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [8, 6] total 12 [2019-09-10 03:47:19,759 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-09-10 03:47:19,760 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-10 03:47:19,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-10 03:47:19,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-09-10 03:47:19,760 INFO L87 Difference]: Start difference. First operand 17388 states and 19110 transitions. Second operand 6 states. [2019-09-10 03:47:19,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-10 03:47:19,801 INFO L93 Difference]: Finished difference Result 2491 states and 2649 transitions. [2019-09-10 03:47:19,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-09-10 03:47:19,801 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 582 [2019-09-10 03:47:19,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-10 03:47:19,805 INFO L225 Difference]: With dead ends: 2491 [2019-09-10 03:47:19,805 INFO L226 Difference]: Without dead ends: 2491 [2019-09-10 03:47:19,806 INFO L628 BasicCegarLoop]: 0 DeclaredPredicates, 1176 GetRequests, 1160 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2019-09-10 03:47:19,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2491 states. [2019-09-10 03:47:19,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2491 to 2331. [2019-09-10 03:47:19,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2331 states. [2019-09-10 03:47:19,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2331 states to 2331 states and 2474 transitions. [2019-09-10 03:47:19,823 INFO L78 Accepts]: Start accepts. Automaton has 2331 states and 2474 transitions. Word has length 582 [2019-09-10 03:47:19,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-10 03:47:19,824 INFO L475 AbstractCegarLoop]: Abstraction has 2331 states and 2474 transitions. [2019-09-10 03:47:19,824 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-10 03:47:19,824 INFO L276 IsEmpty]: Start isEmpty. Operand 2331 states and 2474 transitions. [2019-09-10 03:47:19,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 427 [2019-09-10 03:47:19,826 INFO L391 BasicCegarLoop]: Found error trace [2019-09-10 03:47:19,827 INFO L399 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-10 03:47:19,827 INFO L418 AbstractCegarLoop]: === Iteration 41 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-10 03:47:19,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-10 03:47:19,827 INFO L82 PathProgramCache]: Analyzing trace with hash -618645878, now seen corresponding path program 1 times [2019-09-10 03:47:19,827 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-09-10 03:47:19,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:47:19,828 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-10 03:47:19,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-10 03:47:19,828 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-09-10 03:47:19,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-09-10 03:47:19,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-09-10 03:47:20,108 INFO L466 BasicCegarLoop]: Counterexample might be feasible [2019-09-10 03:47:20,431 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.09 03:47:20 BoogieIcfgContainer [2019-09-10 03:47:20,431 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-09-10 03:47:20,437 INFO L168 Benchmark]: Toolchain (without parser) took 162301.46 ms. Allocated memory was 142.6 MB in the beginning and 2.8 GB in the end (delta: 2.6 GB). Free memory was 88.4 MB in the beginning and 2.5 GB in the end (delta: -2.4 GB). Peak memory consumption was 254.0 MB. Max. memory is 7.1 GB. [2019-09-10 03:47:20,438 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 142.6 MB. Free memory was 107.6 MB in the beginning and 107.4 MB in the end (delta: 212.8 kB). Peak memory consumption was 212.8 kB. Max. memory is 7.1 GB. [2019-09-10 03:47:20,439 INFO L168 Benchmark]: CACSL2BoogieTranslator took 654.52 ms. Allocated memory was 142.6 MB in the beginning and 202.4 MB in the end (delta: 59.8 MB). Free memory was 88.2 MB in the beginning and 176.0 MB in the end (delta: -87.8 MB). Peak memory consumption was 23.4 MB. Max. memory is 7.1 GB. [2019-09-10 03:47:20,439 INFO L168 Benchmark]: Boogie Preprocessor took 74.63 ms. Allocated memory is still 202.4 MB. Free memory was 176.0 MB in the beginning and 173.6 MB in the end (delta: 2.3 MB). Peak memory consumption was 2.3 MB. Max. memory is 7.1 GB. [2019-09-10 03:47:20,440 INFO L168 Benchmark]: RCFGBuilder took 758.43 ms. Allocated memory is still 202.4 MB. Free memory was 173.6 MB in the beginning and 127.0 MB in the end (delta: 46.7 MB). Peak memory consumption was 46.7 MB. Max. memory is 7.1 GB. [2019-09-10 03:47:20,442 INFO L168 Benchmark]: TraceAbstraction took 160807.94 ms. Allocated memory was 202.4 MB in the beginning and 2.8 GB in the end (delta: 2.6 GB). Free memory was 126.4 MB in the beginning and 2.5 GB in the end (delta: -2.4 GB). Peak memory consumption was 232.2 MB. Max. memory is 7.1 GB. [2019-09-10 03:47:20,448 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 142.6 MB. Free memory was 107.6 MB in the beginning and 107.4 MB in the end (delta: 212.8 kB). Peak memory consumption was 212.8 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 654.52 ms. Allocated memory was 142.6 MB in the beginning and 202.4 MB in the end (delta: 59.8 MB). Free memory was 88.2 MB in the beginning and 176.0 MB in the end (delta: -87.8 MB). Peak memory consumption was 23.4 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 74.63 ms. Allocated memory is still 202.4 MB. Free memory was 176.0 MB in the beginning and 173.6 MB in the end (delta: 2.3 MB). Peak memory consumption was 2.3 MB. Max. memory is 7.1 GB. * RCFGBuilder took 758.43 ms. Allocated memory is still 202.4 MB. Free memory was 173.6 MB in the beginning and 127.0 MB in the end (delta: 46.7 MB). Peak memory consumption was 46.7 MB. Max. memory is 7.1 GB. * TraceAbstraction took 160807.94 ms. Allocated memory was 202.4 MB in the beginning and 2.8 GB in the end (delta: 2.6 GB). Free memory was 126.4 MB in the beginning and 2.5 GB in the end (delta: -2.4 GB). Peak memory consumption was 232.2 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int t3_pc = 0; [L19] int t4_pc = 0; [L20] int m_st ; [L21] int t1_st ; [L22] int t2_st ; [L23] int t3_st ; [L24] int t4_st ; [L25] int m_i ; [L26] int t1_i ; [L27] int t2_i ; [L28] int t3_i ; [L29] int t4_i ; [L30] int M_E = 2; [L31] int T1_E = 2; [L32] int T2_E = 2; [L33] int T3_E = 2; [L34] int T4_E = 2; [L35] int E_1 = 2; [L36] int E_2 = 2; [L37] int E_3 = 2; [L38] int E_4 = 2; VAL [\old(E_1)=21, \old(E_2)=5, \old(E_3)=25, \old(E_4)=11, \old(M_E)=17, \old(m_i)=7, \old(m_pc)=15, \old(m_st)=16, \old(T1_E)=3, \old(t1_i)=19, \old(t1_pc)=9, \old(t1_st)=4, \old(T2_E)=18, \old(t2_i)=6, \old(t2_pc)=10, \old(t2_st)=13, \old(T3_E)=23, \old(t3_i)=24, \old(t3_pc)=8, \old(t3_st)=14, \old(T4_E)=26, \old(t4_i)=20, \old(t4_pc)=22, \old(t4_st)=12, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0] [L811] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0] [L815] CALL init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0] [L723] m_i = 1 [L724] t1_i = 1 [L725] t2_i = 1 [L726] t3_i = 1 [L727] t4_i = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L815] RET init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L816] CALL start_simulation() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L752] int kernel_st ; [L753] int tmp ; [L754] int tmp___0 ; [L758] kernel_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L759] FCALL update_channels() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L760] CALL init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L331] COND TRUE m_i == 1 [L332] m_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L336] COND TRUE t1_i == 1 [L337] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L341] COND TRUE t2_i == 1 [L342] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L346] COND TRUE t3_i == 1 [L347] t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L351] COND TRUE t4_i == 1 [L352] t4_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L760] RET init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L761] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L492] COND FALSE !(M_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L497] COND FALSE !(T1_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L502] COND FALSE !(T2_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L507] COND FALSE !(T3_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L512] COND FALSE !(T4_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L517] COND FALSE !(E_1 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L522] COND FALSE !(E_2 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L527] COND FALSE !(E_3 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L532] COND FALSE !(E_4 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L761] RET fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L762] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L228] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L247] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L266] COND FALSE !(t2_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L285] COND FALSE !(t3_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L304] COND FALSE !(t4_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0, tmp___3=0] [L762] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L763] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L545] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L550] COND FALSE !(T1_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L555] COND FALSE !(T2_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L560] COND FALSE !(T3_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L565] COND FALSE !(T4_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L570] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L575] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L580] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L585] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L763] RET reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L766] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L769] kernel_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L770] CALL eval() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L397] int tmp ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L401] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L404] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L361] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L364] COND TRUE m_st == 0 [L365] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L392] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L404] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L404] tmp = exists_runnable_thread() [L406] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1] [L411] COND TRUE m_st == 0 [L412] int tmp_ndt_1; [L413] tmp_ndt_1 = __VERIFIER_nondet_int() [L414] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0] [L425] COND TRUE t1_st == 0 [L426] int tmp_ndt_2; [L427] tmp_ndt_2 = __VERIFIER_nondet_int() [L428] COND TRUE \read(tmp_ndt_2) [L430] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L431] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L90] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L101] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L103] t1_pc = 1 [L104] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L431] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L439] COND TRUE t2_st == 0 [L440] int tmp_ndt_3; [L441] tmp_ndt_3 = __VERIFIER_nondet_int() [L442] COND TRUE \read(tmp_ndt_3) [L444] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L445] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L125] COND TRUE t2_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L136] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L138] t2_pc = 1 [L139] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L445] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L453] COND TRUE t3_st == 0 [L454] int tmp_ndt_4; [L455] tmp_ndt_4 = __VERIFIER_nondet_int() [L456] COND TRUE \read(tmp_ndt_4) [L458] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L459] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L160] COND TRUE t3_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L171] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L173] t3_pc = 1 [L174] t3_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L459] RET transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L467] COND TRUE t4_st == 0 [L468] int tmp_ndt_5; [L469] tmp_ndt_5 = __VERIFIER_nondet_int() [L470] COND TRUE \read(tmp_ndt_5) [L472] t4_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L473] CALL transmit4() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1] [L195] COND TRUE t4_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1] [L206] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1] [L208] t4_pc = 1 [L209] t4_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L473] RET transmit4() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L401] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L404] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L361] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L364] COND TRUE m_st == 0 [L365] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L392] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L404] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L404] tmp = exists_runnable_thread() [L406] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L411] COND TRUE m_st == 0 [L412] int tmp_ndt_1; [L413] tmp_ndt_1 = __VERIFIER_nondet_int() [L414] COND TRUE \read(tmp_ndt_1) [L416] m_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L417] CALL master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L49] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L60] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L63] E_1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L64] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND TRUE E_1 == 1 [L249] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND TRUE \read(tmp___0) [L614] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0, tmp___3=0] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L64] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L65] E_1 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L68] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L70] m_pc = 1 [L71] m_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L417] RET master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L425] COND TRUE t1_st == 0 [L426] int tmp_ndt_2; [L427] tmp_ndt_2 = __VERIFIER_nondet_int() [L428] COND TRUE \read(tmp_ndt_2) [L430] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L431] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L90] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L93] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L109] E_2 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L110] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L229] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND TRUE E_2 == 1 [L268] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit2_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND TRUE \read(tmp___1) [L622] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0, tmp___3=0] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L110] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L111] E_2 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L101] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L103] t1_pc = 1 [L104] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L431] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L439] COND TRUE t2_st == 0 [L440] int tmp_ndt_3; [L441] tmp_ndt_3 = __VERIFIER_nondet_int() [L442] COND TRUE \read(tmp_ndt_3) [L444] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L445] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L125] COND FALSE !(t2_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L128] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L144] E_3 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L145] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L229] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND TRUE E_3 == 1 [L287] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit3_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND TRUE \read(tmp___2) [L630] t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1, tmp___3=0] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L145] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L146] E_3 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L136] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L138] t2_pc = 1 [L139] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L445] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L453] COND TRUE t3_st == 0 [L454] int tmp_ndt_4; [L455] tmp_ndt_4 = __VERIFIER_nondet_int() [L456] COND TRUE \read(tmp_ndt_4) [L458] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L459] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L160] COND FALSE !(t3_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L163] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L179] E_4 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L180] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L229] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND TRUE E_4 == 1 [L306] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit4_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND TRUE \read(tmp___3) [L638] t4_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0, tmp___3=1] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L180] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L181] E_4 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L171] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L173] t3_pc = 1 [L174] t3_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L459] RET transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L467] COND TRUE t4_st == 0 [L468] int tmp_ndt_5; [L469] tmp_ndt_5 = __VERIFIER_nondet_int() [L470] COND TRUE \read(tmp_ndt_5) [L472] t4_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L473] CALL transmit4() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L195] COND FALSE !(t4_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L198] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L214] CALL error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 27 procedures, 229 locations, 1 error locations. UNSAFE Result, 160.7s OverallTime, 41 OverallIterations, 7 TraceHistogramMax, 106.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 14416 SDtfs, 18252 SDslu, 36076 SDs, 0 SdLazy, 17873 SolverSat, 4401 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 19.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 13617 GetRequests, 13042 SyntacticMatches, 26 SemanticMatches, 549 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15698 ImplicationChecksByTransitivity, 13.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=51333occurred in iteration=33, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 17.5s AbstIntTime, 16 AbstIntIterations, 3 AbstIntStrong, 0.9927382670391124 AbsIntWeakeningRatio, 0.6091549295774648 AbsIntAvgWeakeningVarsNumRemoved, 20.116197183098592 AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 11.1s AutomataMinimizationTime, 40 MinimizatonAttempts, 8835 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.8s SsaConstructionTime, 2.8s SatisfiabilityAnalysisTime, 10.1s InterpolantComputationTime, 16670 NumberOfCodeBlocks, 16670 NumberOfCodeBlocksAsserted, 54 NumberOfCheckSat, 22447 ConstructedInterpolants, 0 QuantifiedInterpolants, 11359107 SizeOfPredicates, 6 NumberOfNonLiveVariables, 24380 ConjunctsInSsa, 42 ConjunctsInUnsatCore, 66 InterpolantComputations, 37 PerfectInterpolantSequences, 25675/26431 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...