java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/systemc/kundu1.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.1.24-efa34d5 [2019-09-16 16:39:53,809 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-09-16 16:39:53,812 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-09-16 16:39:53,830 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-09-16 16:39:53,830 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-09-16 16:39:53,833 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-09-16 16:39:53,835 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-09-16 16:39:53,845 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-09-16 16:39:53,848 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-09-16 16:39:53,851 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-09-16 16:39:53,854 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-09-16 16:39:53,856 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-09-16 16:39:53,856 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-09-16 16:39:53,858 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-09-16 16:39:53,860 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-09-16 16:39:53,861 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-09-16 16:39:53,862 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-09-16 16:39:53,864 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-09-16 16:39:53,866 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-09-16 16:39:53,871 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-09-16 16:39:53,875 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-09-16 16:39:53,877 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-09-16 16:39:53,880 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-09-16 16:39:53,881 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-09-16 16:39:53,884 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-09-16 16:39:53,884 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-09-16 16:39:53,884 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-09-16 16:39:53,886 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-09-16 16:39:53,888 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-09-16 16:39:53,888 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-09-16 16:39:53,889 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-09-16 16:39:53,891 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-09-16 16:39:53,892 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-09-16 16:39:53,892 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-09-16 16:39:53,895 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-09-16 16:39:53,895 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-09-16 16:39:53,896 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-09-16 16:39:53,896 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-09-16 16:39:53,896 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-09-16 16:39:53,897 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-09-16 16:39:53,898 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-09-16 16:39:53,899 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2019-09-16 16:39:53,936 INFO L113 SettingsManager]: Loading preferences was successful [2019-09-16 16:39:53,936 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-09-16 16:39:53,938 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-09-16 16:39:53,938 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-09-16 16:39:53,938 INFO L138 SettingsManager]: * Use SBE=true [2019-09-16 16:39:53,938 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-09-16 16:39:53,938 INFO L138 SettingsManager]: * sizeof long=4 [2019-09-16 16:39:53,939 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-09-16 16:39:53,939 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-09-16 16:39:53,939 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-09-16 16:39:53,941 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-09-16 16:39:53,941 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-09-16 16:39:53,942 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-09-16 16:39:53,942 INFO L138 SettingsManager]: * sizeof long double=12 [2019-09-16 16:39:53,942 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-09-16 16:39:53,942 INFO L138 SettingsManager]: * Use constant arrays=true [2019-09-16 16:39:53,942 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-09-16 16:39:53,943 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-09-16 16:39:53,943 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-09-16 16:39:53,943 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-09-16 16:39:53,943 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-09-16 16:39:53,943 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-09-16 16:39:53,944 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-09-16 16:39:53,944 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-09-16 16:39:53,946 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-09-16 16:39:53,946 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-09-16 16:39:53,946 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-09-16 16:39:53,946 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-09-16 16:39:53,947 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-09-16 16:39:53,997 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-09-16 16:39:54,008 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-09-16 16:39:54,012 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-09-16 16:39:54,013 INFO L271 PluginConnector]: Initializing CDTParser... [2019-09-16 16:39:54,013 INFO L275 PluginConnector]: CDTParser initialized [2019-09-16 16:39:54,014 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/kundu1.cil.c [2019-09-16 16:39:54,080 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/88fcc5854/3f2a0e43d193405fb484019734cda8c6/FLAGb7cce933c [2019-09-16 16:39:54,577 INFO L306 CDTParser]: Found 1 translation units. [2019-09-16 16:39:54,578 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/kundu1.cil.c [2019-09-16 16:39:54,594 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/88fcc5854/3f2a0e43d193405fb484019734cda8c6/FLAGb7cce933c [2019-09-16 16:39:54,921 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/88fcc5854/3f2a0e43d193405fb484019734cda8c6 [2019-09-16 16:39:54,931 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-09-16 16:39:54,933 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-09-16 16:39:54,934 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-09-16 16:39:54,934 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-09-16 16:39:54,938 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-09-16 16:39:54,938 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.09 04:39:54" (1/1) ... [2019-09-16 16:39:54,941 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3fbd8e3a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:54, skipping insertion in model container [2019-09-16 16:39:54,941 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.09 04:39:54" (1/1) ... [2019-09-16 16:39:54,948 INFO L142 MainTranslator]: Starting translation in SV-COMP mode [2019-09-16 16:39:54,980 INFO L173 MainTranslator]: Built tables and reachable declarations [2019-09-16 16:39:55,308 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-09-16 16:39:55,317 INFO L188 MainTranslator]: Completed pre-run [2019-09-16 16:39:55,474 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-09-16 16:39:55,499 INFO L192 MainTranslator]: Completed translation [2019-09-16 16:39:55,501 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:55 WrapperNode [2019-09-16 16:39:55,501 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-09-16 16:39:55,502 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-09-16 16:39:55,502 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-09-16 16:39:55,502 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-09-16 16:39:55,513 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:55" (1/1) ... [2019-09-16 16:39:55,513 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:55" (1/1) ... [2019-09-16 16:39:55,520 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:55" (1/1) ... [2019-09-16 16:39:55,520 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:55" (1/1) ... [2019-09-16 16:39:55,537 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:55" (1/1) ... [2019-09-16 16:39:55,552 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:55" (1/1) ... [2019-09-16 16:39:55,554 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:55" (1/1) ... [2019-09-16 16:39:55,557 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-09-16 16:39:55,558 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-09-16 16:39:55,558 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-09-16 16:39:55,558 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-09-16 16:39:55,559 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:55" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-09-16 16:39:55,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-09-16 16:39:55,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-09-16 16:39:55,613 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2019-09-16 16:39:55,614 INFO L138 BoogieDeclarations]: Found implementation of procedure read_data [2019-09-16 16:39:55,615 INFO L138 BoogieDeclarations]: Found implementation of procedure write_data [2019-09-16 16:39:55,615 INFO L138 BoogieDeclarations]: Found implementation of procedure P_1 [2019-09-16 16:39:55,615 INFO L138 BoogieDeclarations]: Found implementation of procedure is_P_1_triggered [2019-09-16 16:39:55,615 INFO L138 BoogieDeclarations]: Found implementation of procedure C_1 [2019-09-16 16:39:55,615 INFO L138 BoogieDeclarations]: Found implementation of procedure is_C_1_triggered [2019-09-16 16:39:55,615 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2019-09-16 16:39:55,616 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2019-09-16 16:39:55,616 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2019-09-16 16:39:55,616 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2019-09-16 16:39:55,616 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2019-09-16 16:39:55,616 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2019-09-16 16:39:55,617 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2019-09-16 16:39:55,617 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2019-09-16 16:39:55,617 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2019-09-16 16:39:55,617 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2019-09-16 16:39:55,617 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2019-09-16 16:39:55,618 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2019-09-16 16:39:55,618 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2019-09-16 16:39:55,618 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-09-16 16:39:55,618 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2019-09-16 16:39:55,618 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2019-09-16 16:39:55,618 INFO L130 BoogieDeclarations]: Found specification of procedure error [2019-09-16 16:39:55,620 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2019-09-16 16:39:55,621 INFO L130 BoogieDeclarations]: Found specification of procedure read_data [2019-09-16 16:39:55,621 INFO L130 BoogieDeclarations]: Found specification of procedure write_data [2019-09-16 16:39:55,621 INFO L130 BoogieDeclarations]: Found specification of procedure P_1 [2019-09-16 16:39:55,621 INFO L130 BoogieDeclarations]: Found specification of procedure is_P_1_triggered [2019-09-16 16:39:55,621 INFO L130 BoogieDeclarations]: Found specification of procedure C_1 [2019-09-16 16:39:55,621 INFO L130 BoogieDeclarations]: Found specification of procedure is_C_1_triggered [2019-09-16 16:39:55,622 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2019-09-16 16:39:55,622 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2019-09-16 16:39:55,622 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2019-09-16 16:39:55,622 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2019-09-16 16:39:55,622 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2019-09-16 16:39:55,622 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2019-09-16 16:39:55,622 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2019-09-16 16:39:55,623 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2019-09-16 16:39:55,623 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2019-09-16 16:39:55,623 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2019-09-16 16:39:55,623 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2019-09-16 16:39:55,624 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2019-09-16 16:39:55,624 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-09-16 16:39:55,624 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-09-16 16:39:55,624 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-09-16 16:39:56,128 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-09-16 16:39:56,128 INFO L283 CfgBuilder]: Removed 4 assume(true) statements. [2019-09-16 16:39:56,130 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.09 04:39:56 BoogieIcfgContainer [2019-09-16 16:39:56,130 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-09-16 16:39:56,131 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-09-16 16:39:56,131 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-09-16 16:39:56,134 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-09-16 16:39:56,134 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.09 04:39:54" (1/3) ... [2019-09-16 16:39:56,135 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@452b58c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.09 04:39:56, skipping insertion in model container [2019-09-16 16:39:56,135 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.09 04:39:55" (2/3) ... [2019-09-16 16:39:56,136 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@452b58c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.09 04:39:56, skipping insertion in model container [2019-09-16 16:39:56,136 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.09 04:39:56" (3/3) ... [2019-09-16 16:39:56,138 INFO L109 eAbstractionObserver]: Analyzing ICFG kundu1.cil.c [2019-09-16 16:39:56,146 INFO L152 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-09-16 16:39:56,153 INFO L164 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-09-16 16:39:56,167 INFO L252 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-09-16 16:39:56,197 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2019-09-16 16:39:56,198 INFO L377 AbstractCegarLoop]: Interprodecural is true [2019-09-16 16:39:56,198 INFO L378 AbstractCegarLoop]: Hoare is true [2019-09-16 16:39:56,198 INFO L379 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-09-16 16:39:56,199 INFO L380 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-09-16 16:39:56,199 INFO L381 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-09-16 16:39:56,199 INFO L382 AbstractCegarLoop]: Difference is false [2019-09-16 16:39:56,199 INFO L383 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-09-16 16:39:56,199 INFO L388 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-09-16 16:39:56,220 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states. [2019-09-16 16:39:56,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-09-16 16:39:56,229 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:39:56,230 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:39:56,232 INFO L418 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:39:56,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:39:56,237 INFO L82 PathProgramCache]: Analyzing trace with hash -798642762, now seen corresponding path program 1 times [2019-09-16 16:39:56,238 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:39:56,239 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:39:56,292 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:56,292 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:39:56,292 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:56,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:39:56,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:39:56,572 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:39:56,573 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-16 16:39:56,578 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-16 16:39:56,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-16 16:39:56,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:39:56,595 INFO L87 Difference]: Start difference. First operand 152 states. Second operand 4 states. [2019-09-16 16:39:57,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:39:57,046 INFO L93 Difference]: Finished difference Result 402 states and 558 transitions. [2019-09-16 16:39:57,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-16 16:39:57,048 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 72 [2019-09-16 16:39:57,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:39:57,078 INFO L225 Difference]: With dead ends: 402 [2019-09-16 16:39:57,078 INFO L226 Difference]: Without dead ends: 258 [2019-09-16 16:39:57,091 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:39:57,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258 states. [2019-09-16 16:39:57,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258 to 246. [2019-09-16 16:39:57,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2019-09-16 16:39:57,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 315 transitions. [2019-09-16 16:39:57,183 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 315 transitions. Word has length 72 [2019-09-16 16:39:57,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:39:57,184 INFO L475 AbstractCegarLoop]: Abstraction has 246 states and 315 transitions. [2019-09-16 16:39:57,184 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-16 16:39:57,184 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 315 transitions. [2019-09-16 16:39:57,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-09-16 16:39:57,188 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:39:57,188 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:39:57,188 INFO L418 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:39:57,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:39:57,189 INFO L82 PathProgramCache]: Analyzing trace with hash -1672120457, now seen corresponding path program 1 times [2019-09-16 16:39:57,189 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:39:57,189 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:39:57,191 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:57,191 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:39:57,192 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:57,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:39:57,310 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:39:57,311 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:39:57,311 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-16 16:39:57,313 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-16 16:39:57,313 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-16 16:39:57,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:39:57,314 INFO L87 Difference]: Start difference. First operand 246 states and 315 transitions. Second operand 4 states. [2019-09-16 16:39:57,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:39:57,592 INFO L93 Difference]: Finished difference Result 685 states and 902 transitions. [2019-09-16 16:39:57,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-16 16:39:57,595 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 72 [2019-09-16 16:39:57,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:39:57,606 INFO L225 Difference]: With dead ends: 685 [2019-09-16 16:39:57,606 INFO L226 Difference]: Without dead ends: 459 [2019-09-16 16:39:57,612 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:39:57,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 459 states. [2019-09-16 16:39:57,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 459 to 434. [2019-09-16 16:39:57,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 434 states. [2019-09-16 16:39:57,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 547 transitions. [2019-09-16 16:39:57,707 INFO L78 Accepts]: Start accepts. Automaton has 434 states and 547 transitions. Word has length 72 [2019-09-16 16:39:57,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:39:57,707 INFO L475 AbstractCegarLoop]: Abstraction has 434 states and 547 transitions. [2019-09-16 16:39:57,708 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-16 16:39:57,708 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 547 transitions. [2019-09-16 16:39:57,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-09-16 16:39:57,710 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:39:57,710 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:39:57,711 INFO L418 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:39:57,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:39:57,711 INFO L82 PathProgramCache]: Analyzing trace with hash -539585734, now seen corresponding path program 1 times [2019-09-16 16:39:57,711 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:39:57,712 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:39:57,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:57,713 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:39:57,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:57,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:39:57,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:39:57,822 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:39:57,822 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-16 16:39:57,823 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-16 16:39:57,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-16 16:39:57,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:39:57,823 INFO L87 Difference]: Start difference. First operand 434 states and 547 transitions. Second operand 4 states. [2019-09-16 16:39:58,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:39:58,091 INFO L93 Difference]: Finished difference Result 1069 states and 1394 transitions. [2019-09-16 16:39:58,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-16 16:39:58,092 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 73 [2019-09-16 16:39:58,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:39:58,098 INFO L225 Difference]: With dead ends: 1069 [2019-09-16 16:39:58,099 INFO L226 Difference]: Without dead ends: 655 [2019-09-16 16:39:58,102 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:39:58,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 655 states. [2019-09-16 16:39:58,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 655 to 628. [2019-09-16 16:39:58,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 628 states. [2019-09-16 16:39:58,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 628 states to 628 states and 789 transitions. [2019-09-16 16:39:58,167 INFO L78 Accepts]: Start accepts. Automaton has 628 states and 789 transitions. Word has length 73 [2019-09-16 16:39:58,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:39:58,168 INFO L475 AbstractCegarLoop]: Abstraction has 628 states and 789 transitions. [2019-09-16 16:39:58,168 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-16 16:39:58,168 INFO L276 IsEmpty]: Start isEmpty. Operand 628 states and 789 transitions. [2019-09-16 16:39:58,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-09-16 16:39:58,170 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:39:58,170 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:39:58,171 INFO L418 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:39:58,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:39:58,171 INFO L82 PathProgramCache]: Analyzing trace with hash 1990564953, now seen corresponding path program 1 times [2019-09-16 16:39:58,171 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:39:58,171 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:39:58,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:58,173 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:39:58,173 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:58,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:39:58,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:39:58,294 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:39:58,294 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-16 16:39:58,295 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-16 16:39:58,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-16 16:39:58,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:39:58,296 INFO L87 Difference]: Start difference. First operand 628 states and 789 transitions. Second operand 6 states. [2019-09-16 16:39:58,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:39:58,385 INFO L93 Difference]: Finished difference Result 1266 states and 1608 transitions. [2019-09-16 16:39:58,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-16 16:39:58,386 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2019-09-16 16:39:58,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:39:58,392 INFO L225 Difference]: With dead ends: 1266 [2019-09-16 16:39:58,393 INFO L226 Difference]: Without dead ends: 658 [2019-09-16 16:39:58,398 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-16 16:39:58,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 658 states. [2019-09-16 16:39:58,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 658 to 643. [2019-09-16 16:39:58,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 643 states. [2019-09-16 16:39:58,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 643 states to 643 states and 801 transitions. [2019-09-16 16:39:58,462 INFO L78 Accepts]: Start accepts. Automaton has 643 states and 801 transitions. Word has length 73 [2019-09-16 16:39:58,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:39:58,464 INFO L475 AbstractCegarLoop]: Abstraction has 643 states and 801 transitions. [2019-09-16 16:39:58,464 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-16 16:39:58,464 INFO L276 IsEmpty]: Start isEmpty. Operand 643 states and 801 transitions. [2019-09-16 16:39:58,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-09-16 16:39:58,471 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:39:58,471 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:39:58,471 INFO L418 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:39:58,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:39:58,472 INFO L82 PathProgramCache]: Analyzing trace with hash 618757655, now seen corresponding path program 1 times [2019-09-16 16:39:58,472 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:39:58,472 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:39:58,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:58,473 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:39:58,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:58,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:39:58,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:39:58,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:39:58,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-16 16:39:58,594 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-16 16:39:58,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-16 16:39:58,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:39:58,595 INFO L87 Difference]: Start difference. First operand 643 states and 801 transitions. Second operand 6 states. [2019-09-16 16:39:58,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:39:58,669 INFO L93 Difference]: Finished difference Result 1294 states and 1626 transitions. [2019-09-16 16:39:58,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-16 16:39:58,670 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2019-09-16 16:39:58,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:39:58,675 INFO L225 Difference]: With dead ends: 1294 [2019-09-16 16:39:58,675 INFO L226 Difference]: Without dead ends: 671 [2019-09-16 16:39:58,678 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-09-16 16:39:58,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 671 states. [2019-09-16 16:39:58,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 671 to 663. [2019-09-16 16:39:58,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 663 states. [2019-09-16 16:39:58,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 663 states to 663 states and 819 transitions. [2019-09-16 16:39:58,728 INFO L78 Accepts]: Start accepts. Automaton has 663 states and 819 transitions. Word has length 73 [2019-09-16 16:39:58,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:39:58,729 INFO L475 AbstractCegarLoop]: Abstraction has 663 states and 819 transitions. [2019-09-16 16:39:58,729 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-16 16:39:58,729 INFO L276 IsEmpty]: Start isEmpty. Operand 663 states and 819 transitions. [2019-09-16 16:39:58,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-09-16 16:39:58,732 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:39:58,733 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:39:58,733 INFO L418 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:39:58,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:39:58,733 INFO L82 PathProgramCache]: Analyzing trace with hash 641389909, now seen corresponding path program 1 times [2019-09-16 16:39:58,733 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:39:58,734 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:39:58,735 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:58,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:39:58,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:58,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:39:58,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:39:58,844 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:39:58,844 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-16 16:39:58,844 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-16 16:39:58,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-16 16:39:58,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:39:58,845 INFO L87 Difference]: Start difference. First operand 663 states and 819 transitions. Second operand 6 states. [2019-09-16 16:39:58,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:39:58,978 INFO L93 Difference]: Finished difference Result 1333 states and 1667 transitions. [2019-09-16 16:39:58,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-09-16 16:39:58,979 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2019-09-16 16:39:58,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:39:58,986 INFO L225 Difference]: With dead ends: 1333 [2019-09-16 16:39:58,987 INFO L226 Difference]: Without dead ends: 784 [2019-09-16 16:39:58,989 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-09-16 16:39:58,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 784 states. [2019-09-16 16:39:59,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 784 to 770. [2019-09-16 16:39:59,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 770 states. [2019-09-16 16:39:59,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 770 states to 770 states and 953 transitions. [2019-09-16 16:39:59,063 INFO L78 Accepts]: Start accepts. Automaton has 770 states and 953 transitions. Word has length 73 [2019-09-16 16:39:59,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:39:59,064 INFO L475 AbstractCegarLoop]: Abstraction has 770 states and 953 transitions. [2019-09-16 16:39:59,064 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-16 16:39:59,064 INFO L276 IsEmpty]: Start isEmpty. Operand 770 states and 953 transitions. [2019-09-16 16:39:59,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2019-09-16 16:39:59,065 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:39:59,066 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:39:59,066 INFO L418 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:39:59,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:39:59,066 INFO L82 PathProgramCache]: Analyzing trace with hash 298865229, now seen corresponding path program 1 times [2019-09-16 16:39:59,066 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:39:59,067 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:39:59,068 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:59,068 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:39:59,068 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:39:59,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:39:59,139 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:39:59,140 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:39:59,140 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-09-16 16:39:59,140 INFO L454 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-09-16 16:39:59,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-09-16 16:39:59,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:39:59,141 INFO L87 Difference]: Start difference. First operand 770 states and 953 transitions. Second operand 6 states. [2019-09-16 16:39:59,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:39:59,975 INFO L93 Difference]: Finished difference Result 1390 states and 1848 transitions. [2019-09-16 16:39:59,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-09-16 16:39:59,976 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 86 [2019-09-16 16:39:59,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:39:59,985 INFO L225 Difference]: With dead ends: 1390 [2019-09-16 16:39:59,985 INFO L226 Difference]: Without dead ends: 1052 [2019-09-16 16:39:59,987 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-09-16 16:39:59,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1052 states. [2019-09-16 16:40:00,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1052 to 996. [2019-09-16 16:40:00,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 996 states. [2019-09-16 16:40:00,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 996 states to 996 states and 1303 transitions. [2019-09-16 16:40:00,058 INFO L78 Accepts]: Start accepts. Automaton has 996 states and 1303 transitions. Word has length 86 [2019-09-16 16:40:00,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:00,059 INFO L475 AbstractCegarLoop]: Abstraction has 996 states and 1303 transitions. [2019-09-16 16:40:00,059 INFO L476 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-09-16 16:40:00,059 INFO L276 IsEmpty]: Start isEmpty. Operand 996 states and 1303 transitions. [2019-09-16 16:40:00,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-09-16 16:40:00,060 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:00,061 INFO L407 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:00,061 INFO L418 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:00,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:00,061 INFO L82 PathProgramCache]: Analyzing trace with hash -681624608, now seen corresponding path program 1 times [2019-09-16 16:40:00,061 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:00,062 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:00,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:00,063 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:00,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:00,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:00,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:00,256 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:00,257 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-09-16 16:40:00,257 INFO L454 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-09-16 16:40:00,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-09-16 16:40:00,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-09-16 16:40:00,258 INFO L87 Difference]: Start difference. First operand 996 states and 1303 transitions. Second operand 9 states. [2019-09-16 16:40:01,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:01,674 INFO L93 Difference]: Finished difference Result 2244 states and 3204 transitions. [2019-09-16 16:40:01,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-09-16 16:40:01,675 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 90 [2019-09-16 16:40:01,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:01,688 INFO L225 Difference]: With dead ends: 2244 [2019-09-16 16:40:01,688 INFO L226 Difference]: Without dead ends: 1719 [2019-09-16 16:40:01,692 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=207, Unknown=0, NotChecked=0, Total=272 [2019-09-16 16:40:01,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1719 states. [2019-09-16 16:40:01,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1719 to 1584. [2019-09-16 16:40:01,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1584 states. [2019-09-16 16:40:01,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1584 states to 1584 states and 2177 transitions. [2019-09-16 16:40:01,800 INFO L78 Accepts]: Start accepts. Automaton has 1584 states and 2177 transitions. Word has length 90 [2019-09-16 16:40:01,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:01,802 INFO L475 AbstractCegarLoop]: Abstraction has 1584 states and 2177 transitions. [2019-09-16 16:40:01,802 INFO L476 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-09-16 16:40:01,802 INFO L276 IsEmpty]: Start isEmpty. Operand 1584 states and 2177 transitions. [2019-09-16 16:40:01,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-09-16 16:40:01,805 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:01,805 INFO L407 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:01,805 INFO L418 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:01,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:01,806 INFO L82 PathProgramCache]: Analyzing trace with hash 1835313196, now seen corresponding path program 1 times [2019-09-16 16:40:01,806 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:01,806 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:01,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:01,808 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:01,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:01,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:01,854 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-09-16 16:40:01,854 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:01,854 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:01,891 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:01,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:01,964 INFO L256 TraceCheckSpWp]: Trace formula consists of 485 conjuncts, 3 conjunts are in the unsatisfiable core [2019-09-16 16:40:01,984 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:02,010 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-09-16 16:40:02,023 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-16 16:40:02,023 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [3] total 3 [2019-09-16 16:40:02,024 INFO L454 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-09-16 16:40:02,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-09-16 16:40:02,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-16 16:40:02,024 INFO L87 Difference]: Start difference. First operand 1584 states and 2177 transitions. Second operand 3 states. [2019-09-16 16:40:02,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:02,226 INFO L93 Difference]: Finished difference Result 4511 states and 6933 transitions. [2019-09-16 16:40:02,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-09-16 16:40:02,227 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2019-09-16 16:40:02,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:02,256 INFO L225 Difference]: With dead ends: 4511 [2019-09-16 16:40:02,256 INFO L226 Difference]: Without dead ends: 2948 [2019-09-16 16:40:02,269 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-09-16 16:40:02,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2948 states. [2019-09-16 16:40:02,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2948 to 2944. [2019-09-16 16:40:02,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2944 states. [2019-09-16 16:40:02,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2944 states to 2944 states and 4358 transitions. [2019-09-16 16:40:02,475 INFO L78 Accepts]: Start accepts. Automaton has 2944 states and 4358 transitions. Word has length 92 [2019-09-16 16:40:02,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:02,476 INFO L475 AbstractCegarLoop]: Abstraction has 2944 states and 4358 transitions. [2019-09-16 16:40:02,476 INFO L476 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-09-16 16:40:02,476 INFO L276 IsEmpty]: Start isEmpty. Operand 2944 states and 4358 transitions. [2019-09-16 16:40:02,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-09-16 16:40:02,481 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:02,481 INFO L407 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:02,481 INFO L418 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:02,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:02,482 INFO L82 PathProgramCache]: Analyzing trace with hash -1952555228, now seen corresponding path program 1 times [2019-09-16 16:40:02,482 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:02,482 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:02,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:02,484 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:02,484 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:02,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:02,573 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2019-09-16 16:40:02,573 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:02,574 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:02,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:02,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:02,674 INFO L256 TraceCheckSpWp]: Trace formula consists of 499 conjuncts, 2 conjunts are in the unsatisfiable core [2019-09-16 16:40:02,689 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:02,742 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:02,753 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-16 16:40:02,753 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2019-09-16 16:40:02,754 INFO L454 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-09-16 16:40:02,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-09-16 16:40:02,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-09-16 16:40:02,754 INFO L87 Difference]: Start difference. First operand 2944 states and 4358 transitions. Second operand 8 states. [2019-09-16 16:40:05,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:05,823 INFO L93 Difference]: Finished difference Result 12365 states and 21891 transitions. [2019-09-16 16:40:05,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-09-16 16:40:05,824 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 94 [2019-09-16 16:40:05,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:05,910 INFO L225 Difference]: With dead ends: 12365 [2019-09-16 16:40:05,910 INFO L226 Difference]: Without dead ends: 9448 [2019-09-16 16:40:05,984 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 119 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2019-09-16 16:40:05,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9448 states. [2019-09-16 16:40:06,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9448 to 8324. [2019-09-16 16:40:06,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8324 states. [2019-09-16 16:40:06,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8324 states to 8324 states and 11249 transitions. [2019-09-16 16:40:06,792 INFO L78 Accepts]: Start accepts. Automaton has 8324 states and 11249 transitions. Word has length 94 [2019-09-16 16:40:06,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:06,793 INFO L475 AbstractCegarLoop]: Abstraction has 8324 states and 11249 transitions. [2019-09-16 16:40:06,793 INFO L476 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-09-16 16:40:06,793 INFO L276 IsEmpty]: Start isEmpty. Operand 8324 states and 11249 transitions. [2019-09-16 16:40:06,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2019-09-16 16:40:06,798 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:06,799 INFO L407 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:06,799 INFO L418 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:06,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:06,799 INFO L82 PathProgramCache]: Analyzing trace with hash -1028804159, now seen corresponding path program 1 times [2019-09-16 16:40:06,800 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:06,800 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:06,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:06,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:06,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:06,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:06,931 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-09-16 16:40:06,932 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:06,932 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:06,966 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:07,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:07,048 INFO L256 TraceCheckSpWp]: Trace formula consists of 516 conjuncts, 2 conjunts are in the unsatisfiable core [2019-09-16 16:40:07,063 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:07,087 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-09-16 16:40:07,092 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-16 16:40:07,092 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8] total 9 [2019-09-16 16:40:07,093 INFO L454 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-09-16 16:40:07,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-09-16 16:40:07,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2019-09-16 16:40:07,094 INFO L87 Difference]: Start difference. First operand 8324 states and 11249 transitions. Second operand 9 states. [2019-09-16 16:40:09,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:09,459 INFO L93 Difference]: Finished difference Result 18309 states and 26517 transitions. [2019-09-16 16:40:09,459 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-09-16 16:40:09,459 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 97 [2019-09-16 16:40:09,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:09,528 INFO L225 Difference]: With dead ends: 18309 [2019-09-16 16:40:09,528 INFO L226 Difference]: Without dead ends: 9537 [2019-09-16 16:40:09,557 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 106 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-09-16 16:40:09,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9537 states. [2019-09-16 16:40:10,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9537 to 8351. [2019-09-16 16:40:10,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8351 states. [2019-09-16 16:40:10,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8351 states to 8351 states and 10178 transitions. [2019-09-16 16:40:10,086 INFO L78 Accepts]: Start accepts. Automaton has 8351 states and 10178 transitions. Word has length 97 [2019-09-16 16:40:10,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:10,087 INFO L475 AbstractCegarLoop]: Abstraction has 8351 states and 10178 transitions. [2019-09-16 16:40:10,087 INFO L476 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-09-16 16:40:10,087 INFO L276 IsEmpty]: Start isEmpty. Operand 8351 states and 10178 transitions. [2019-09-16 16:40:10,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2019-09-16 16:40:10,099 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:10,100 INFO L407 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:10,100 INFO L418 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:10,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:10,101 INFO L82 PathProgramCache]: Analyzing trace with hash -630281820, now seen corresponding path program 1 times [2019-09-16 16:40:10,101 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:10,101 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:10,102 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:10,103 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:10,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:10,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:10,186 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 19 proven. 20 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2019-09-16 16:40:10,186 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:10,187 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2019-09-16 16:40:10,220 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:10,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:10,307 INFO L256 TraceCheckSpWp]: Trace formula consists of 686 conjuncts, 2 conjunts are in the unsatisfiable core [2019-09-16 16:40:10,311 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:10,848 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 58 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2019-09-16 16:40:10,853 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-16 16:40:10,854 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8] total 9 [2019-09-16 16:40:10,854 INFO L454 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-09-16 16:40:10,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-09-16 16:40:10,855 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-09-16 16:40:10,855 INFO L87 Difference]: Start difference. First operand 8351 states and 10178 transitions. Second operand 9 states. [2019-09-16 16:40:11,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:11,229 INFO L93 Difference]: Finished difference Result 13111 states and 16006 transitions. [2019-09-16 16:40:11,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-09-16 16:40:11,230 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 165 [2019-09-16 16:40:11,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:11,255 INFO L225 Difference]: With dead ends: 13111 [2019-09-16 16:40:11,255 INFO L226 Difference]: Without dead ends: 4483 [2019-09-16 16:40:11,272 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 170 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-09-16 16:40:11,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4483 states. [2019-09-16 16:40:11,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4483 to 4175. [2019-09-16 16:40:11,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4175 states. [2019-09-16 16:40:11,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4175 states to 4175 states and 4967 transitions. [2019-09-16 16:40:11,594 INFO L78 Accepts]: Start accepts. Automaton has 4175 states and 4967 transitions. Word has length 165 [2019-09-16 16:40:11,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:11,594 INFO L475 AbstractCegarLoop]: Abstraction has 4175 states and 4967 transitions. [2019-09-16 16:40:11,594 INFO L476 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-09-16 16:40:11,595 INFO L276 IsEmpty]: Start isEmpty. Operand 4175 states and 4967 transitions. [2019-09-16 16:40:11,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2019-09-16 16:40:11,602 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:11,602 INFO L407 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:11,603 INFO L418 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:11,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:11,603 INFO L82 PathProgramCache]: Analyzing trace with hash -703541462, now seen corresponding path program 1 times [2019-09-16 16:40:11,604 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:11,604 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:11,605 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:11,606 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:11,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:11,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:11,721 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2019-09-16 16:40:11,723 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:11,724 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-16 16:40:11,725 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-16 16:40:11,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-16 16:40:11,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:40:11,726 INFO L87 Difference]: Start difference. First operand 4175 states and 4967 transitions. Second operand 4 states. [2019-09-16 16:40:12,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:12,006 INFO L93 Difference]: Finished difference Result 7774 states and 9340 transitions. [2019-09-16 16:40:12,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-16 16:40:12,006 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 170 [2019-09-16 16:40:12,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:12,036 INFO L225 Difference]: With dead ends: 7774 [2019-09-16 16:40:12,037 INFO L226 Difference]: Without dead ends: 3932 [2019-09-16 16:40:12,045 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:40:12,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3932 states. [2019-09-16 16:40:12,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3932 to 3932. [2019-09-16 16:40:12,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3932 states. [2019-09-16 16:40:12,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3932 states to 3932 states and 4518 transitions. [2019-09-16 16:40:12,354 INFO L78 Accepts]: Start accepts. Automaton has 3932 states and 4518 transitions. Word has length 170 [2019-09-16 16:40:12,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:12,354 INFO L475 AbstractCegarLoop]: Abstraction has 3932 states and 4518 transitions. [2019-09-16 16:40:12,354 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-16 16:40:12,355 INFO L276 IsEmpty]: Start isEmpty. Operand 3932 states and 4518 transitions. [2019-09-16 16:40:12,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2019-09-16 16:40:12,360 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:12,361 INFO L407 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:12,361 INFO L418 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:12,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:12,362 INFO L82 PathProgramCache]: Analyzing trace with hash 771902308, now seen corresponding path program 1 times [2019-09-16 16:40:12,362 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:12,362 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:12,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:12,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:12,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:12,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:12,533 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 22 proven. 20 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2019-09-16 16:40:12,533 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:12,534 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:12,563 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:12,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:12,668 INFO L256 TraceCheckSpWp]: Trace formula consists of 792 conjuncts, 11 conjunts are in the unsatisfiable core [2019-09-16 16:40:12,675 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:12,737 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 109 proven. 0 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2019-09-16 16:40:12,746 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-16 16:40:12,748 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 8 [2019-09-16 16:40:12,749 INFO L454 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-09-16 16:40:12,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-09-16 16:40:12,751 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-09-16 16:40:12,751 INFO L87 Difference]: Start difference. First operand 3932 states and 4518 transitions. Second operand 8 states. [2019-09-16 16:40:13,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:13,556 INFO L93 Difference]: Finished difference Result 6009 states and 6951 transitions. [2019-09-16 16:40:13,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-09-16 16:40:13,556 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 204 [2019-09-16 16:40:13,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:13,570 INFO L225 Difference]: With dead ends: 6009 [2019-09-16 16:40:13,571 INFO L226 Difference]: Without dead ends: 3004 [2019-09-16 16:40:13,577 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 207 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2019-09-16 16:40:13,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3004 states. [2019-09-16 16:40:13,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3004 to 3001. [2019-09-16 16:40:13,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3001 states. [2019-09-16 16:40:13,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3001 states to 3001 states and 3419 transitions. [2019-09-16 16:40:13,752 INFO L78 Accepts]: Start accepts. Automaton has 3001 states and 3419 transitions. Word has length 204 [2019-09-16 16:40:13,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:13,752 INFO L475 AbstractCegarLoop]: Abstraction has 3001 states and 3419 transitions. [2019-09-16 16:40:13,752 INFO L476 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-09-16 16:40:13,753 INFO L276 IsEmpty]: Start isEmpty. Operand 3001 states and 3419 transitions. [2019-09-16 16:40:13,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2019-09-16 16:40:13,759 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:13,760 INFO L407 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:13,760 INFO L418 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:13,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:13,760 INFO L82 PathProgramCache]: Analyzing trace with hash 1674822886, now seen corresponding path program 1 times [2019-09-16 16:40:13,761 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:13,761 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:13,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:13,763 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:13,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:13,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:13,869 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 129 trivial. 0 not checked. [2019-09-16 16:40:13,869 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:13,869 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-09-16 16:40:13,871 INFO L454 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-09-16 16:40:13,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-09-16 16:40:13,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:40:13,871 INFO L87 Difference]: Start difference. First operand 3001 states and 3419 transitions. Second operand 4 states. [2019-09-16 16:40:14,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:14,049 INFO L93 Difference]: Finished difference Result 3333 states and 3781 transitions. [2019-09-16 16:40:14,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-09-16 16:40:14,049 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 204 [2019-09-16 16:40:14,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:14,060 INFO L225 Difference]: With dead ends: 3333 [2019-09-16 16:40:14,060 INFO L226 Difference]: Without dead ends: 2950 [2019-09-16 16:40:14,064 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-09-16 16:40:14,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2950 states. [2019-09-16 16:40:14,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2950 to 2599. [2019-09-16 16:40:14,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2599 states. [2019-09-16 16:40:14,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2599 states to 2599 states and 2974 transitions. [2019-09-16 16:40:14,212 INFO L78 Accepts]: Start accepts. Automaton has 2599 states and 2974 transitions. Word has length 204 [2019-09-16 16:40:14,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:14,212 INFO L475 AbstractCegarLoop]: Abstraction has 2599 states and 2974 transitions. [2019-09-16 16:40:14,212 INFO L476 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-09-16 16:40:14,213 INFO L276 IsEmpty]: Start isEmpty. Operand 2599 states and 2974 transitions. [2019-09-16 16:40:14,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2019-09-16 16:40:14,217 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:14,217 INFO L407 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:14,218 INFO L418 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:14,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:14,218 INFO L82 PathProgramCache]: Analyzing trace with hash 519037793, now seen corresponding path program 1 times [2019-09-16 16:40:14,218 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:14,218 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:14,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:14,220 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:14,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:14,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:14,312 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 122 trivial. 0 not checked. [2019-09-16 16:40:14,313 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-09-16 16:40:14,313 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-09-16 16:40:14,313 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:14,313 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:14,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:14,314 INFO L87 Difference]: Start difference. First operand 2599 states and 2974 transitions. Second operand 5 states. [2019-09-16 16:40:14,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:14,799 INFO L93 Difference]: Finished difference Result 4874 states and 5585 transitions. [2019-09-16 16:40:14,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-09-16 16:40:14,799 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 212 [2019-09-16 16:40:14,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:14,810 INFO L225 Difference]: With dead ends: 4874 [2019-09-16 16:40:14,811 INFO L226 Difference]: Without dead ends: 2465 [2019-09-16 16:40:14,816 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-09-16 16:40:14,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2465 states. [2019-09-16 16:40:14,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2465 to 2454. [2019-09-16 16:40:14,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2454 states. [2019-09-16 16:40:14,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2454 states to 2454 states and 2788 transitions. [2019-09-16 16:40:14,979 INFO L78 Accepts]: Start accepts. Automaton has 2454 states and 2788 transitions. Word has length 212 [2019-09-16 16:40:14,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:14,980 INFO L475 AbstractCegarLoop]: Abstraction has 2454 states and 2788 transitions. [2019-09-16 16:40:14,980 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:14,980 INFO L276 IsEmpty]: Start isEmpty. Operand 2454 states and 2788 transitions. [2019-09-16 16:40:14,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2019-09-16 16:40:14,985 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:14,985 INFO L407 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:14,986 INFO L418 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:14,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:14,986 INFO L82 PathProgramCache]: Analyzing trace with hash 772783692, now seen corresponding path program 1 times [2019-09-16 16:40:14,986 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:14,986 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:14,988 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:14,988 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:14,988 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:15,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:15,120 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 28 proven. 7 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2019-09-16 16:40:15,120 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:15,121 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:15,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:15,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:15,260 INFO L256 TraceCheckSpWp]: Trace formula consists of 865 conjuncts, 6 conjunts are in the unsatisfiable core [2019-09-16 16:40:15,265 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:15,380 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 96 proven. 0 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2019-09-16 16:40:15,384 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-09-16 16:40:15,385 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 5 [2019-09-16 16:40:15,386 INFO L454 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-09-16 16:40:15,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-09-16 16:40:15,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:15,387 INFO L87 Difference]: Start difference. First operand 2454 states and 2788 transitions. Second operand 5 states. [2019-09-16 16:40:15,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:15,677 INFO L93 Difference]: Finished difference Result 4589 states and 5267 transitions. [2019-09-16 16:40:15,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-09-16 16:40:15,677 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 222 [2019-09-16 16:40:15,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:15,688 INFO L225 Difference]: With dead ends: 4589 [2019-09-16 16:40:15,688 INFO L226 Difference]: Without dead ends: 2325 [2019-09-16 16:40:15,693 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 221 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-09-16 16:40:15,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2325 states. [2019-09-16 16:40:15,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2325 to 2253. [2019-09-16 16:40:15,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2253 states. [2019-09-16 16:40:15,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2253 states to 2253 states and 2519 transitions. [2019-09-16 16:40:15,844 INFO L78 Accepts]: Start accepts. Automaton has 2253 states and 2519 transitions. Word has length 222 [2019-09-16 16:40:15,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:15,845 INFO L475 AbstractCegarLoop]: Abstraction has 2253 states and 2519 transitions. [2019-09-16 16:40:15,845 INFO L476 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-09-16 16:40:15,845 INFO L276 IsEmpty]: Start isEmpty. Operand 2253 states and 2519 transitions. [2019-09-16 16:40:15,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2019-09-16 16:40:15,852 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:15,853 INFO L407 BasicCegarLoop]: trace histogram [5, 5, 5, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:15,853 INFO L418 AbstractCegarLoop]: === Iteration 18 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:15,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:15,854 INFO L82 PathProgramCache]: Analyzing trace with hash 204920273, now seen corresponding path program 1 times [2019-09-16 16:40:15,854 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:15,854 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:15,855 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:15,855 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:15,855 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:15,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:16,043 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2019-09-16 16:40:16,044 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:16,044 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:16,070 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:16,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:16,175 INFO L256 TraceCheckSpWp]: Trace formula consists of 862 conjuncts, 35 conjunts are in the unsatisfiable core [2019-09-16 16:40:16,180 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:16,302 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 33 proven. 15 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked. [2019-09-16 16:40:16,321 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-09-16 16:40:16,321 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 14 [2019-09-16 16:40:16,322 INFO L454 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-09-16 16:40:16,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-09-16 16:40:16,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2019-09-16 16:40:16,323 INFO L87 Difference]: Start difference. First operand 2253 states and 2519 transitions. Second operand 14 states. [2019-09-16 16:40:19,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:19,174 INFO L93 Difference]: Finished difference Result 6012 states and 7154 transitions. [2019-09-16 16:40:19,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-09-16 16:40:19,174 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 222 [2019-09-16 16:40:19,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:19,195 INFO L225 Difference]: With dead ends: 6012 [2019-09-16 16:40:19,195 INFO L226 Difference]: Without dead ends: 4052 [2019-09-16 16:40:19,201 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 229 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2019-09-16 16:40:19,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4052 states. [2019-09-16 16:40:19,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4052 to 3451. [2019-09-16 16:40:19,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3451 states. [2019-09-16 16:40:19,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3451 states to 3451 states and 3986 transitions. [2019-09-16 16:40:19,471 INFO L78 Accepts]: Start accepts. Automaton has 3451 states and 3986 transitions. Word has length 222 [2019-09-16 16:40:19,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:19,473 INFO L475 AbstractCegarLoop]: Abstraction has 3451 states and 3986 transitions. [2019-09-16 16:40:19,473 INFO L476 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-09-16 16:40:19,473 INFO L276 IsEmpty]: Start isEmpty. Operand 3451 states and 3986 transitions. [2019-09-16 16:40:19,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2019-09-16 16:40:19,477 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:19,477 INFO L407 BasicCegarLoop]: trace histogram [6, 6, 6, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:19,478 INFO L418 AbstractCegarLoop]: === Iteration 19 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:19,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:19,478 INFO L82 PathProgramCache]: Analyzing trace with hash 1036438586, now seen corresponding path program 1 times [2019-09-16 16:40:19,478 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:19,478 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:19,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:19,480 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:19,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:19,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:19,769 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 6 proven. 68 refuted. 0 times theorem prover too weak. 115 trivial. 0 not checked. [2019-09-16 16:40:19,769 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-09-16 16:40:19,770 INFO L224 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-09-16 16:40:19,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:19,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-09-16 16:40:19,903 INFO L256 TraceCheckSpWp]: Trace formula consists of 869 conjuncts, 21 conjunts are in the unsatisfiable core [2019-09-16 16:40:19,918 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2019-09-16 16:40:19,989 INFO L134 CoverageAnalysis]: Checked inductivity of 189 backedges. 97 proven. 34 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [MP z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (9)] Exception during sending of exit command (exit): Broken pipe [2019-09-16 16:40:19,994 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-09-16 16:40:19,994 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 8] total 15 [2019-09-16 16:40:19,995 INFO L454 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-09-16 16:40:19,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-09-16 16:40:19,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2019-09-16 16:40:19,995 INFO L87 Difference]: Start difference. First operand 3451 states and 3986 transitions. Second operand 15 states. [2019-09-16 16:40:23,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-09-16 16:40:23,239 INFO L93 Difference]: Finished difference Result 5822 states and 6800 transitions. [2019-09-16 16:40:23,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-09-16 16:40:23,240 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 226 [2019-09-16 16:40:23,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-09-16 16:40:23,256 INFO L225 Difference]: With dead ends: 5822 [2019-09-16 16:40:23,256 INFO L226 Difference]: Without dead ends: 3618 [2019-09-16 16:40:23,263 INFO L636 BasicCegarLoop]: 0 DeclaredPredicates, 295 GetRequests, 252 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 435 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=277, Invalid=1529, Unknown=0, NotChecked=0, Total=1806 [2019-09-16 16:40:23,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3618 states. [2019-09-16 16:40:23,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3618 to 3547. [2019-09-16 16:40:23,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3547 states. [2019-09-16 16:40:23,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3547 states to 3547 states and 4092 transitions. [2019-09-16 16:40:23,527 INFO L78 Accepts]: Start accepts. Automaton has 3547 states and 4092 transitions. Word has length 226 [2019-09-16 16:40:23,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-09-16 16:40:23,528 INFO L475 AbstractCegarLoop]: Abstraction has 3547 states and 4092 transitions. [2019-09-16 16:40:23,528 INFO L476 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-09-16 16:40:23,528 INFO L276 IsEmpty]: Start isEmpty. Operand 3547 states and 4092 transitions. [2019-09-16 16:40:23,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 361 [2019-09-16 16:40:23,540 INFO L399 BasicCegarLoop]: Found error trace [2019-09-16 16:40:23,540 INFO L407 BasicCegarLoop]: trace histogram [10, 10, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-09-16 16:40:23,541 INFO L418 AbstractCegarLoop]: === Iteration 20 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-09-16 16:40:23,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-09-16 16:40:23,541 INFO L82 PathProgramCache]: Analyzing trace with hash -640042898, now seen corresponding path program 1 times [2019-09-16 16:40:23,541 INFO L224 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-09-16 16:40:23,541 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-09-16 16:40:23,542 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:23,543 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-09-16 16:40:23,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-09-16 16:40:23,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-09-16 16:40:23,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-09-16 16:40:23,875 INFO L474 BasicCegarLoop]: Counterexample might be feasible [2019-09-16 16:40:24,215 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.09 04:40:24 BoogieIcfgContainer [2019-09-16 16:40:24,216 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-09-16 16:40:24,225 INFO L168 Benchmark]: Toolchain (without parser) took 29284.73 ms. Allocated memory was 133.2 MB in the beginning and 1.0 GB in the end (delta: 886.0 MB). Free memory was 88.1 MB in the beginning and 203.2 MB in the end (delta: -115.1 MB). Peak memory consumption was 770.9 MB. Max. memory is 7.1 GB. [2019-09-16 16:40:24,226 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 133.2 MB. Free memory was 107.4 MB in the beginning and 107.2 MB in the end (delta: 212.8 kB). Peak memory consumption was 212.8 kB. Max. memory is 7.1 GB. [2019-09-16 16:40:24,228 INFO L168 Benchmark]: CACSL2BoogieTranslator took 567.50 ms. Allocated memory was 133.2 MB in the beginning and 200.3 MB in the end (delta: 67.1 MB). Free memory was 87.9 MB in the beginning and 174.0 MB in the end (delta: -86.0 MB). Peak memory consumption was 26.5 MB. Max. memory is 7.1 GB. [2019-09-16 16:40:24,230 INFO L168 Benchmark]: Boogie Preprocessor took 55.81 ms. Allocated memory is still 200.3 MB. Free memory was 174.0 MB in the beginning and 172.1 MB in the end (delta: 1.8 MB). Peak memory consumption was 1.8 MB. Max. memory is 7.1 GB. [2019-09-16 16:40:24,235 INFO L168 Benchmark]: RCFGBuilder took 572.10 ms. Allocated memory is still 200.3 MB. Free memory was 172.1 MB in the beginning and 140.1 MB in the end (delta: 32.0 MB). Peak memory consumption was 32.0 MB. Max. memory is 7.1 GB. [2019-09-16 16:40:24,236 INFO L168 Benchmark]: TraceAbstraction took 28084.70 ms. Allocated memory was 200.3 MB in the beginning and 1.0 GB in the end (delta: 818.9 MB). Free memory was 139.5 MB in the beginning and 203.2 MB in the end (delta: -63.7 MB). Peak memory consumption was 755.2 MB. Max. memory is 7.1 GB. [2019-09-16 16:40:24,250 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 133.2 MB. Free memory was 107.4 MB in the beginning and 107.2 MB in the end (delta: 212.8 kB). Peak memory consumption was 212.8 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 567.50 ms. Allocated memory was 133.2 MB in the beginning and 200.3 MB in the end (delta: 67.1 MB). Free memory was 87.9 MB in the beginning and 174.0 MB in the end (delta: -86.0 MB). Peak memory consumption was 26.5 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 55.81 ms. Allocated memory is still 200.3 MB. Free memory was 174.0 MB in the beginning and 172.1 MB in the end (delta: 1.8 MB). Peak memory consumption was 1.8 MB. Max. memory is 7.1 GB. * RCFGBuilder took 572.10 ms. Allocated memory is still 200.3 MB. Free memory was 172.1 MB in the beginning and 140.1 MB in the end (delta: 32.0 MB). Peak memory consumption was 32.0 MB. Max. memory is 7.1 GB. * TraceAbstraction took 28084.70 ms. Allocated memory was 200.3 MB in the beginning and 1.0 GB in the end (delta: 818.9 MB). Free memory was 139.5 MB in the beginning and 203.2 MB in the end (delta: -63.7 MB). Peak memory consumption was 755.2 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 9]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int max_loop ; [L16] int num ; [L17] int i ; [L18] int e ; [L19] int timer ; [L20] char data_0 ; [L21] char data_1 ; [L64] int P_1_pc; [L65] int P_1_st ; [L66] int P_1_i ; [L67] int P_1_ev ; [L122] int C_1_pc ; [L123] int C_1_st ; [L124] int C_1_i ; [L125] int C_1_ev ; [L126] int C_1_pr ; VAL [\old(C_1_ev)=76, \old(C_1_i)=68, \old(C_1_pc)=81, \old(C_1_pr)=78, \old(C_1_st)=80, \old(data_0)=74, \old(data_1)=67, \old(e)=66, \old(i)=70, \old(max_loop)=79, \old(num)=69, \old(P_1_ev)=71, \old(P_1_i)=77, \old(P_1_pc)=72, \old(P_1_st)=75, \old(timer)=73, C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=0, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, timer=0] [L490] int count ; [L491] int __retres2 ; [L495] num = 0 [L496] i = 0 [L497] max_loop = 2 [L499] timer = 0 [L500] P_1_pc = 0 [L501] C_1_pc = 0 [L503] count = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, count=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, timer=0] [L504] CALL init_model() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, timer=0] [L483] P_1_i = 1 [L484] C_1_i = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L504] RET init_model() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, count=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L505] CALL start_simulation() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L421] int kernel_st ; [L422] int tmp ; [L423] int tmp___0 ; [L427] kernel_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L428] FCALL update_channels() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L429] CALL init_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L226] COND TRUE (int )P_1_i == 1 [L227] P_1_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L231] COND TRUE (int )C_1_i == 1 [L232] C_1_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L429] RET init_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L430] FCALL fire_delta_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L431] CALL activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L371] CALL, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L104] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L107] COND FALSE !((int )P_1_pc == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L117] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L119] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L371] RET, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, is_P_1_triggered()=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L371] tmp = is_P_1_triggered() [L373] COND FALSE !(\read(tmp)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0, tmp=0] [L379] CALL, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L186] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L189] COND FALSE !((int )C_1_pc == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L199] COND FALSE !((int )C_1_pc == 2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L209] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L211] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L379] RET, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, is_C_1_triggered()=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0, tmp=0] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0, tmp=0, tmp___1=0] [L431] RET activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L432] FCALL reset_delta_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L435] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L438] kernel_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, kernel_st=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L439] CALL eval() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L262] int tmp ; [L263] int tmp___0 ; [L264] int tmp___1 ; [L265] int tmp___2 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L269] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L272] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L241] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres1=1, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L258] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=1, __retres1=1, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L272] RET, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, exists_runnable_thread()=1, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0, tmp___2=1] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND FALSE !(\read(tmp)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0, tmp=0, tmp___2=1] [L294] COND TRUE (int )C_1_st == 0 [L296] tmp___1 = __VERIFIER_nondet_int() [L298] COND TRUE \read(tmp___1) [L300] C_1_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0, tmp=0, tmp___1=1, tmp___2=1] [L301] CALL C_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L128] char c ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L131] COND TRUE (int )C_1_pc == 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L146] COND TRUE i < max_loop VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L148] COND TRUE num == 0 [L149] timer = 1 [L150] i += 1 [L151] C_1_pc = 1 [L152] C_1_st = 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=1, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L301] RET C_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1, tmp=0, tmp___1=1, tmp___2=1] [L269] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1, tmp=0, tmp___1=1, tmp___2=1] [L272] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres1=1, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L258] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=1, __retres1=1, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L272] RET, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, exists_runnable_thread()=1, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1, tmp=0, tmp___1=1, tmp___2=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1, tmp=0, tmp___1=1, tmp___2=1] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND TRUE \read(tmp) [L285] P_1_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1, tmp=1, tmp___1=1, tmp___2=1] [L286] CALL P_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L72] COND TRUE (int )P_1_pc == 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L83] COND TRUE i < max_loop VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L86] CALL write_data(num, 'A') VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(i___0)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L49] COND TRUE i___0 == 0 [L50] data_0 = c VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(i___0)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(timer)=0, c=65, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, i___0=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L86] RET write_data(num, 'A') VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L87] num += 1 [L88] P_1_pc = 1 [L89] P_1_st = 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=1, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L286] RET P_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=1, tmp___1=1, tmp___2=1] [L294] COND FALSE !((int )C_1_st == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=1, tmp___1=1, tmp___2=1] [L269] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=1, tmp___1=1, tmp___2=1] [L272] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L272] RET, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, exists_runnable_thread()=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=1, tmp___1=1, tmp___2=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND FALSE !(\read(tmp___2)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=1, tmp___1=1, tmp___2=0] [L439] RET eval() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L442] kernel_st = 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=2, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L443] FCALL update_channels() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=2, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L446] kernel_st = 3 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=3, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L447] FCALL fire_delta_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=3, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L448] CALL activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] CALL, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L104] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND FALSE !((int )P_1_ev == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L117] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] RET, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, is_P_1_triggered()=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND FALSE !(\read(tmp)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0] [L379] CALL, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L186] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L190] COND FALSE !((int )e == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L209] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L379] RET, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, is_C_1_triggered()=0, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___1=0] [L448] RET activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=3, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L449] FCALL reset_delta_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=3, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L452] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=0, __retres1=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L452] RET, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, exists_runnable_thread()=0, i=1, kernel_st=3, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L452] tmp = exists_runnable_thread() [L454] COND TRUE tmp == 0 [L456] kernel_st = 4 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0] [L457] CALL fire_time_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L336] C_1_ev = 1 [L338] P_1_ev = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L457] RET fire_time_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0] [L458] CALL activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] CALL, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L104] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND TRUE (int )P_1_ev == 1 [L109] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, __retres1=1, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, \result=1, __retres1=1, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] RET, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, is_P_1_triggered()=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND TRUE \read(tmp) [L374] P_1_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=1] [L379] CALL, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L186] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L190] COND FALSE !((int )e == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L209] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, __retres1=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, \result=0, __retres1=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L379] RET, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, is_C_1_triggered()=0, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=1] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=1, tmp___1=0] [L458] RET activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=0] [L459] CALL reset_time_events() VAL [\old(C_1_ev)=1, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=1, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L350] COND TRUE (int )P_1_ev == 1 [L351] P_1_ev = 2 VAL [\old(C_1_ev)=1, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=1, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L355] COND TRUE (int )C_1_ev == 1 [L356] C_1_ev = 2 VAL [\old(C_1_ev)=1, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=1, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L459] RET reset_time_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=0] [L465] CALL, EXPR stop_simulation() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L402] int tmp ; [L403] int __retres2 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L407] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=1, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L407] RET, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, exists_runnable_thread()=1, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L407] tmp = exists_runnable_thread() [L409] COND TRUE \read(tmp) [L410] __retres2 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres2=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=1] [L417] return (__retres2); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=0, __retres2=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=1] [L465] RET, EXPR stop_simulation() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, stop_simulation()=0, timer=1, tmp=0] [L465] tmp___0 = stop_simulation() [L467] COND FALSE !(\read(tmp___0)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=0, tmp___0=0] [L435] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=4, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=0, tmp___0=0] [L438] kernel_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, kernel_st=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=0, tmp___0=0] [L439] CALL eval() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L262] int tmp ; [L263] int tmp___0 ; [L264] int tmp___1 ; [L265] int tmp___2 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L269] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L272] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, \result=1, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L272] RET, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, exists_runnable_thread()=1, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp___2=1] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND TRUE \read(tmp) [L285] P_1_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1, tmp=1, tmp___2=1] [L286] CALL P_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L72] COND FALSE !((int )P_1_pc == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L75] COND TRUE (int )P_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L83] COND TRUE i < max_loop VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L86] CALL write_data(num, 'A') VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(i___0)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L49] COND FALSE !(i___0 == 0) VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(i___0)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, c=65, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, i___0=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L52] COND TRUE i___0 == 1 [L53] data_1 = c VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(i___0)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, c=65, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, i___0=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L86] RET write_data(num, 'A') VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L87] num += 1 [L88] P_1_pc = 1 [L89] P_1_st = 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L286] RET P_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=1, tmp___2=1] [L294] COND FALSE !((int )C_1_st == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=1, tmp___2=1] [L269] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=1, tmp___2=1] [L272] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, __retres1=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, \result=0, __retres1=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L272] RET, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, exists_runnable_thread()=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=1, tmp___2=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND FALSE !(\read(tmp___2)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=0, \old(i)=1, \old(max_loop)=0, \old(num)=1, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=1, tmp___2=0] [L439] RET eval() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___0=0] [L442] kernel_st = 2 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=2, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___0=0] [L443] FCALL update_channels() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=2, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___0=0] [L446] kernel_st = 3 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=3, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___0=0] [L447] FCALL fire_delta_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=3, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___0=0] [L448] CALL activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] CALL, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L104] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND FALSE !((int )P_1_ev == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L117] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, __retres1=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, \result=0, __retres1=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] RET, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, is_P_1_triggered()=0, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND FALSE !(\read(tmp)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0] [L379] CALL, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L186] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L190] COND FALSE !((int )e == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L209] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, __retres1=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, \result=0, __retres1=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L379] RET, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, is_C_1_triggered()=0, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___1=0] [L448] RET activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=3, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___0=0] [L449] FCALL reset_delta_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=3, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___0=0] [L452] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres1=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=0, __retres1=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L452] RET, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, exists_runnable_thread()=0, i=1, kernel_st=3, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___0=0] [L452] tmp = exists_runnable_thread() [L454] COND TRUE tmp == 0 [L456] kernel_st = 4 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=4, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___0=0] [L457] CALL fire_time_events() VAL [\old(C_1_ev)=2, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=2, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L336] C_1_ev = 1 [L338] P_1_ev = 1 VAL [\old(C_1_ev)=2, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=2, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L457] RET fire_time_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=4, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1, tmp=0, tmp___0=0] [L458] CALL activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] CALL, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L104] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND TRUE (int )P_1_ev == 1 [L109] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, __retres1=1, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, \result=1, __retres1=1, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] RET, EXPR is_P_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, is_P_1_triggered()=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND TRUE \read(tmp) [L374] P_1_st = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=1] [L379] CALL, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L186] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L190] COND FALSE !((int )e == 1) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L209] __retres1 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, __retres1=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, \result=0, __retres1=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L379] RET, EXPR is_C_1_triggered() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, is_C_1_triggered()=0, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=1] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=2, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=2, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=1, tmp___1=0] [L458] RET activate_threads() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=4, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=0, tmp___0=0] [L459] CALL reset_time_events() VAL [\old(C_1_ev)=1, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=1, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L350] COND TRUE (int )P_1_ev == 1 [L351] P_1_ev = 2 VAL [\old(C_1_ev)=1, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=1, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L355] COND TRUE (int )C_1_ev == 1 [L356] C_1_ev = 2 VAL [\old(C_1_ev)=1, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=1, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L459] RET reset_time_events() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=4, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=0, tmp___0=0] [L465] CALL, EXPR stop_simulation() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L402] int tmp ; [L403] int __retres2 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L407] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=1, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L407] RET, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, exists_runnable_thread()=1, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L407] tmp = exists_runnable_thread() [L409] COND TRUE \read(tmp) [L410] __retres2 = 0 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, __retres2=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=1] [L417] return (__retres2); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, \result=0, __retres2=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=1] [L465] RET, EXPR stop_simulation() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=4, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, stop_simulation()=0, timer=1, tmp=0, tmp___0=0] [L465] tmp___0 = stop_simulation() [L467] COND FALSE !(\read(tmp___0)) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=4, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=0, tmp___0=0] [L435] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=4, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=0, tmp___0=0] [L438] kernel_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=0, \old(C_1_st)=0, \old(data_0)=0, \old(data_1)=0, \old(i)=0, \old(max_loop)=0, \old(num)=0, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=0, \old(P_1_st)=0, \old(timer)=0, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, kernel_st=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp=0, tmp___0=0] [L439] CALL eval() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L262] int tmp ; [L263] int tmp___0 ; [L264] int tmp___1 ; [L265] int tmp___2 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L269] COND TRUE 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L272] CALL, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, \result=1, __retres1=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L272] RET, EXPR exists_runnable_thread() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, exists_runnable_thread()=1, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1, tmp___2=1] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND TRUE \read(tmp) [L285] P_1_st = 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=0, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1, tmp=1, tmp___2=1] [L286] CALL P_1() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L72] COND FALSE !((int )P_1_pc == 0) VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L75] COND TRUE (int )P_1_pc == 1 VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L83] COND TRUE i < max_loop VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L86] CALL write_data(num, 'A') VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(i___0)=2, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L49] COND FALSE !(i___0 == 0) VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(i___0)=2, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, c=65, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, i___0=2, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L52] COND FALSE !(i___0 == 1) VAL [\old(c)=65, \old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(i___0)=2, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, c=65, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, i___0=2, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L56] CALL error() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L9] __VERIFIER_error() VAL [\old(C_1_ev)=0, \old(C_1_i)=0, \old(C_1_pc)=1, \old(C_1_st)=2, \old(data_0)=65, \old(data_1)=65, \old(i)=1, \old(max_loop)=0, \old(num)=2, \old(P_1_ev)=0, \old(P_1_i)=0, \old(P_1_pc)=1, \old(P_1_st)=1, \old(timer)=1, C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 23 procedures, 153 locations, 1 error locations. UNSAFE Result, 28.0s OverallTime, 20 OverallIterations, 10 TraceHistogramMax, 18.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4869 SDtfs, 8182 SDslu, 8195 SDs, 0 SdLazy, 11891 SolverSat, 3767 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1636 GetRequests, 1434 SyntacticMatches, 16 SemanticMatches, 186 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 819 ImplicationChecksByTransitivity, 1.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8351occurred in iteration=11, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 3.9s AutomataMinimizationTime, 19 MinimizatonAttempts, 4023 StatesRemovedByMinimization, 18 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.9s SatisfiabilityAnalysisTime, 2.7s InterpolantComputationTime, 4202 NumberOfCodeBlocks, 4202 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 3815 ConstructedInterpolants, 0 QuantifiedInterpolants, 1215968 SizeOfPredicates, 13 NumberOfNonLiveVariables, 5574 ConjunctsInSsa, 82 ConjunctsInUnsatCore, 27 InterpolantComputations, 17 PerfectInterpolantSequences, 1742/1937 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...